[igt-dev] [PATCH i-g-t v6 1/7] tests/kms_frontbuffer_tracking: Add tiling to test_mode

[igt-dev] [PATCH i-g-t v6 1/7] tests/kms_frontbuffer_tracking: Add tiling to test_mode

[José Roberto de Souza]

This will allow us to do tests with different tile types, for now
all tests will continue to run with the default X tiling.
It will be used in upcoming patches.

It also allow user to run all tests with liner tiling when set by
parameter.

v2:
- renamed tile to tiling (Ville)
- added to the commit message that this will be used in upcoming
patches

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 tests/kms_frontbuffer_tracking.c | 122 ++++++++++++++++++++-----------
 1 file changed, 78 insertions(+), 44 deletions(-)

diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index c4b4af43..c4deb72b 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -130,6 +130,14 @@ struct test_mode {
 		FLIP_COUNT,
 	} flip;
 
+	enum tiling_type {
+		TILING_LINEAR = 0,
+		TILING_X,
+		TILING_Y,
+		TILING_COUNT,
+		TILING_DEFAULT = TILING_X,
+	} tiling;
+
 	enum igt_draw_method method;
 };
 
@@ -235,7 +243,7 @@ struct {
 	int only_pipes;
 	int shared_fb_x_offset;
 	int shared_fb_y_offset;
-	uint64_t tiling;
+	enum tiling_type tiling;
 } opt = {
 	.check_status = true,
 	.check_crc = true,
@@ -248,7 +256,7 @@ struct {
 	.only_pipes = PIPE_COUNT,
 	.shared_fb_x_offset = 248,
 	.shared_fb_y_offset = 500,
-	.tiling = LOCAL_I915_FORMAT_MOD_X_TILED,
+	.tiling = TILING_DEFAULT,
 };
 
 struct modeset_params {
@@ -444,13 +452,26 @@ static bool init_modeset_cached_params(void)
 	return true;
 }
 
+static uint64_t tiling_to_modifier(enum tiling_type tiling)
+{
+	switch (tiling) {
+	case TILING_LINEAR:
+		return LOCAL_DRM_FORMAT_MOD_NONE;
+	case TILING_X:
+		return LOCAL_I915_FORMAT_MOD_X_TILED;
+	case TILING_Y:
+		return LOCAL_I915_FORMAT_MOD_Y_TILED;
+	default:
+		igt_assert(false);
+	}
+}
+
 static void create_fb(enum pixel_format pformat, int width, int height,
-		      uint64_t tiling, int plane, struct igt_fb *fb)
+		      enum tiling_type tiling, int plane, struct igt_fb *fb)
 {
 	uint32_t format;
-	uint64_t size;
+	uint64_t size, modifier;
 	unsigned int stride;
-	uint64_t tiling_for_size;
 
 	switch (pformat) {
 	case FORMAT_RGB888:
@@ -480,19 +501,14 @@ static void create_fb(enum pixel_format pformat, int width, int height,
 		igt_assert(false);
 	}
 
-	/* We want all frontbuffers with the same width/height/format to have
-	 * the same size regardless of tiling since we want to properly exercise
-	 * the Kernel's specific tiling-checking code paths without accidentally
-	 * hitting size-checking ones first. */
-	if (plane == PLANE_CUR)
-		tiling_for_size = LOCAL_DRM_FORMAT_MOD_NONE;
-	else
-		tiling_for_size = opt.tiling;
+	modifier = tiling_to_modifier(tiling);
 
-	igt_calc_fb_size(drm.fd, width, height, format, tiling_for_size, &size,
+	igt_warn_on(plane == PLANE_CUR && tiling != TILING_LINEAR);
+
+	igt_calc_fb_size(drm.fd, width, height, format, modifier, &size,
 			 &stride);
 
-	igt_create_fb_with_bo_size(drm.fd, width, height, format, tiling,
+	igt_create_fb_with_bo_size(drm.fd, width, height, format, modifier,
 				   IGT_COLOR_YCBCR_BT709,
 				   IGT_COLOR_YCBCR_LIMITED_RANGE,
 				   fb, size, stride);
@@ -594,7 +610,7 @@ static void fill_fb(struct igt_fb *fb, enum color ecolor)
  * We do it vertically instead of the more common horizontal case in order to
  * avoid super huge strides not supported by FBC.
  */
-static void create_shared_fb(enum pixel_format format)
+static void create_shared_fb(enum pixel_format format, enum tiling_type tiling)
 {
 	int prim_w, prim_h, scnd_w, scnd_h, offs_w, offs_h, big_w, big_h;
 	struct screen_fbs *s = &fbs[format];
@@ -621,7 +637,7 @@ static void create_shared_fb(enum pixel_format format)
 
 	big_h = prim_h + scnd_h + offs_h + opt.shared_fb_y_offset;
 
-	create_fb(format, big_w, big_h, opt.tiling, PLANE_PRI, &s->big);
+	create_fb(format, big_w, big_h, tiling, PLANE_PRI, &s->big);
 }
 
 static void destroy_fbs(enum pixel_format format)
@@ -643,7 +659,7 @@ static void destroy_fbs(enum pixel_format format)
 	igt_remove_fb(drm.fd, &s->big);
 }
 
-static void create_fbs(enum pixel_format format)
+static void create_fbs(enum pixel_format format, enum tiling_type tiling)
 {
 	struct screen_fbs *s = &fbs[format];
 
@@ -653,30 +669,29 @@ static void create_fbs(enum pixel_format format)
 	s->initialized = true;
 
 	create_fb(format, prim_mode_params.mode->hdisplay,
-		  prim_mode_params.mode->vdisplay, opt.tiling, PLANE_PRI,
+		  prim_mode_params.mode->vdisplay, tiling, PLANE_PRI,
 		  &s->prim_pri);
 	create_fb(format, prim_mode_params.cursor.w,
 		  prim_mode_params.cursor.h, LOCAL_DRM_FORMAT_MOD_NONE,
 		  PLANE_CUR, &s->prim_cur);
 	create_fb(format, prim_mode_params.sprite.w,
-		  prim_mode_params.sprite.h, opt.tiling, PLANE_SPR,
-		  &s->prim_spr);
+		  prim_mode_params.sprite.h, tiling, PLANE_SPR, &s->prim_spr);
 
-	create_fb(format, offscreen_fb.w, offscreen_fb.h, opt.tiling, PLANE_PRI,
+	create_fb(format, offscreen_fb.w, offscreen_fb.h, tiling, PLANE_PRI,
 		  &s->offscreen);
 
-	create_shared_fb(format);
+	create_shared_fb(format, tiling);
 
 	if (!scnd_mode_params.output)
 		return;
 
 	create_fb(format, scnd_mode_params.mode->hdisplay,
-		  scnd_mode_params.mode->vdisplay, opt.tiling, PLANE_PRI,
+		  scnd_mode_params.mode->vdisplay, tiling, PLANE_PRI,
 		  &s->scnd_pri);
 	create_fb(format, scnd_mode_params.cursor.w, scnd_mode_params.cursor.h,
 		  LOCAL_DRM_FORMAT_MOD_NONE, PLANE_CUR, &s->scnd_cur);
 	create_fb(format, scnd_mode_params.sprite.w, scnd_mode_params.sprite.h,
-		  opt.tiling, PLANE_SPR, &s->scnd_spr);
+		  tiling, PLANE_SPR, &s->scnd_spr);
 }
 
 static void __set_prim_plane_for_params(struct modeset_params *params)
@@ -1177,7 +1192,7 @@ static void collect_crc(igt_crc_t *crc)
 	igt_pipe_crc_collect_crc(pipe_crc, crc);
 }
 
-static void init_blue_crc(enum pixel_format format)
+static void init_blue_crc(enum pixel_format format, enum tiling_type tiling)
 {
 	struct igt_fb blue;
 
@@ -1185,7 +1200,7 @@ static void init_blue_crc(enum pixel_format format)
 		return;
 
 	create_fb(format, prim_mode_params.mode->hdisplay,
-		  prim_mode_params.mode->vdisplay, opt.tiling, PLANE_PRI,
+		  prim_mode_params.mode->vdisplay, tiling, PLANE_PRI,
 		  &blue);
 
 	fill_fb(&blue, COLOR_PRIM_BG);
@@ -1211,7 +1226,7 @@ static void init_blue_crc(enum pixel_format format)
 	blue_crcs[format].initialized = true;
 }
 
-static void init_crcs(enum pixel_format format,
+static void init_crcs(enum pixel_format format, enum tiling_type tiling,
 		      struct draw_pattern_info *pattern)
 {
 	int r, r_;
@@ -1225,7 +1240,7 @@ static void init_crcs(enum pixel_format format,
 
 	for (r = 0; r < pattern->n_rects; r++)
 		create_fb(format, prim_mode_params.mode->hdisplay,
-			  prim_mode_params.mode->vdisplay, opt.tiling,
+			  prim_mode_params.mode->vdisplay, tiling,
 			  PLANE_PRI, &tmp_fbs[r]);
 
 	for (r = 0; r < pattern->n_rects; r++)
@@ -1290,7 +1305,7 @@ static void setup_modeset(void)
 	offscreen_fb.fb = NULL;
 	offscreen_fb.w = 1024;
 	offscreen_fb.h = 1024;
-	create_fbs(FORMAT_DEFAULT);
+	create_fbs(FORMAT_DEFAULT, opt.tiling);
 }
 
 static void teardown_modeset(void)
@@ -1751,7 +1766,7 @@ static void set_crtc_fbs(const struct test_mode *t)
 {
 	struct screen_fbs *s = &fbs[t->format];
 
-	create_fbs(t->format);
+	create_fbs(t->format, t->tiling);
 
 	switch (t->fbs) {
 	case FBS_INDIVIDUAL:
@@ -1811,9 +1826,9 @@ static void prepare_subtest_data(const struct test_mode *t,
 	if (need_modeset)
 		igt_display_commit(&drm.display);
 
-	init_blue_crc(t->format);
+	init_blue_crc(t->format, t->tiling);
 	if (pattern)
-		init_crcs(t->format, pattern);
+		init_crcs(t->format, t->tiling, pattern);
 
 	need_modeset = enable_features_for_test(t);
 	if (need_modeset)
@@ -2304,7 +2319,7 @@ static void flip_subtest(const struct test_mode *t)
 	prepare_subtest(t, pattern);
 
 	create_fb(t->format, params->primary.fb->width, params->primary.fb->height,
-		  opt.tiling, t->plane, &fb2);
+		  t->tiling, t->plane, &fb2);
 	fill_fb(&fb2, bg_color);
 	orig_fb = params->primary.fb;
 
@@ -2353,7 +2368,7 @@ static void fliptrack_subtest(const struct test_mode *t, enum flip_type type)
 	prepare_subtest(t, pattern);
 
 	create_fb(t->format, params->primary.fb->width, params->primary.fb->height,
-		  opt.tiling, t->plane, &fb2);
+		  t->tiling, t->plane, &fb2);
 	fill_fb(&fb2, COLOR_PRIM_BG);
 	orig_fb = params->primary.fb;
 
@@ -2511,7 +2526,7 @@ static void fullscreen_plane_subtest(const struct test_mode *t)
 	prepare_subtest(t, pattern);
 
 	rect = pattern->get_rect(&params->primary, 0);
-	create_fb(t->format, rect.w, rect.h, opt.tiling, t->plane,
+	create_fb(t->format, rect.w, rect.h, t->tiling, t->plane,
 		  &fullscreen_fb);
 	/* Call pick_color() again since PRI and SPR may not support the same
 	 * pixel formats. */
@@ -2584,7 +2599,7 @@ static void scaledprimary_subtest(const struct test_mode *t)
 	old_fb = reg->fb;
 
 	create_fb(t->format, reg->fb->width, reg->fb->height,
-		  opt.tiling, t->plane, &new_fb);
+		  t->tiling, t->plane, &new_fb);
 	fill_fb(&new_fb, COLOR_BLUE);
 
 	igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, &new_fb, t->method,
@@ -2679,7 +2694,7 @@ static void modesetfrombusy_subtest(const struct test_mode *t)
 	prepare_subtest(t, NULL);
 
 	create_fb(t->format, params->primary.fb->width, params->primary.fb->height,
-		  opt.tiling, t->plane, &fb2);
+		  t->tiling, t->plane, &fb2);
 	fill_fb(&fb2, COLOR_PRIM_BG);
 
 	start_busy_thread(params->primary.fb);
@@ -2782,7 +2797,7 @@ static void farfromfence_subtest(const struct test_mode *t)
 	prepare_subtest(t, pattern);
 	target = pick_target(t, params);
 
-	create_fb(t->format, params->mode->hdisplay, max_height, opt.tiling,
+	create_fb(t->format, params->mode->hdisplay, max_height, t->tiling,
 		  t->plane, &tall_fb);
 
 	fill_fb(&tall_fb, COLOR_PRIM_BG);
@@ -2859,7 +2874,7 @@ static void badstride_subtest(const struct test_mode *t)
 	old_fb = params->primary.fb;
 
 	create_fb(t->format, params->primary.fb->width + 4096, params->primary.fb->height,
-		  opt.tiling, t->plane, &wide_fb);
+		  t->tiling, t->plane, &wide_fb);
 	igt_assert(wide_fb.strides[0] > 16384);
 
 	fill_fb(&wide_fb, COLOR_PRIM_BG);
@@ -3039,7 +3054,7 @@ static void basic_subtest(const struct test_mode *t)
 	prepare_subtest(t, pattern);
 
 	create_fb(t->format, params->primary.fb->width, params->primary.fb->height,
-		  opt.tiling, t->plane, &fb2);
+		  t->tiling, t->plane, &fb2);
 	fb1 = params->primary.fb;
 
 	for (r = 0, method = 0; method < IGT_DRAW_METHOD_COUNT; method++) {
@@ -3120,10 +3135,12 @@ static int opt_handler(int option, int option_index, void *data)
 		break;
 	case 'l':
 		if (!strcmp(optarg, "x"))
-			opt.tiling = LOCAL_I915_FORMAT_MOD_X_TILED;
+			opt.tiling = TILING_X;
 		else if (!strcmp(optarg, "y"))
-			opt.tiling = LOCAL_I915_FORMAT_MOD_Y_TILED;
-		else {
+			opt.tiling = TILING_Y;
+		else if (!strcmp(optarg, "l")) {
+			opt.tiling = TILING_LINEAR;
+		} else {
 			igt_warn("Bad tiling value: %s\n", optarg);
 			return IGT_OPT_HANDLER_ERROR;
 		}
@@ -3255,9 +3272,24 @@ static const char *flip_str(enum flip_type flip)
 	}
 }
 
+static const char *tiling_str(enum tiling_type tiling)
+{
+	switch (tiling) {
+	case TILING_LINEAR:
+		return "linear";
+	case TILING_X:
+		return "x";
+	case TILING_Y:
+		return "y";
+	default:
+		igt_assert(false);
+	}
+}
+
 #define TEST_MODE_ITER_BEGIN(t) \
 	t.format = FORMAT_DEFAULT;					   \
 	t.flip = FLIP_PAGEFLIP;						   \
+	t.tiling = opt.tiling;;						   \
 	for (t.feature = 0; t.feature < FEATURE_COUNT; t.feature++) {	   \
 	for (t.pipes = 0; t.pipes < PIPE_COUNT; t.pipes++) {		   \
 	for (t.screen = 0; t.screen < SCREEN_COUNT; t.screen++) {	   \
@@ -3315,6 +3347,7 @@ igt_main_args("", long_options, help_str, opt_handler, NULL)
 			/* Make sure nothing is using these values. */
 			t.flip = -1;
 			t.method = -1;
+			t.tiling = opt.tiling;
 
 			igt_subtest_f("%s-%s-rte",
 				      feature_str(t.feature),
@@ -3499,6 +3532,7 @@ igt_main_args("", long_options, help_str, opt_handler, NULL)
 	t.feature = FEATURE_DEFAULT;
 	t.format = FORMAT_DEFAULT;
 	t.flip = FLIP_PAGEFLIP;
+	t.tiling = opt.tiling;
 	igt_subtest("basic") {
 		igt_require_gem(drm.fd);
 		basic_subtest(&t);
-- 
2.26.0

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[igt-dev] [PATCH i-g-t v6 2/7] tests/kms_frontbuffer_tracking: Improve tiling test coverage

[José Roberto de Souza]

Lets add some more tiling tests, if tiling is supported by FBC draw
some rectangles and compare the CRC against benchmark if not
supported run the test to guarantee that FBC is disabled.

This is a preparation for when kernel will allow FBC to be enabled
without fences, so we can better test linear and Y tiled
frontbuffers.

v2:
- renamed tile to tiling (Ville)
- removed *-tiling-x test (Ville)
- improved tiling_disable_fbc_subtest documentation (Ville)

v3:
- added new tests description
- fixed failure in prepare_subtest()

v5:
- not adding tiling Y tests to GENs older than 9 because it is not
supported

v6:
- fixed GEN check above

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 tests/kms_frontbuffer_tracking.c | 78 +++++++++++++++++++++++++-------
 1 file changed, 61 insertions(+), 17 deletions(-)

diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index c4deb72b..f7733da8 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -2170,6 +2170,23 @@ static void format_draw_subtest(const struct test_mode *t)
 		badformat_subtest(t);
 }
 
+static bool tiling_is_valid(int feature_flags, enum tiling_type tiling)
+{
+	if (!(feature_flags & FEATURE_FBC))
+		return true;
+
+	switch (tiling) {
+	case TILING_LINEAR:
+		return false;
+	case TILING_X:
+	case TILING_Y:
+		return true;
+	default:
+		igt_assert(false);
+		return false;
+	}
+}
+
 /*
  * slow_draw - sleep a little bit between drawing operations
  *
@@ -2975,45 +2992,47 @@ static void stridechange_subtest(const struct test_mode *t)
 }
 
 /**
- * tilingchange - alternate between tiled and untiled in multiple ways
+ * tiling_disable_fbc_subtest - Check if tiling is unsupported by FBC
  *
  * METHOD
- *   This test alternates between tiled and untiled frontbuffers of the same
- *   size and format through multiple different APIs: the page flip IOCTL,
- *   normal modesets and the plane APIs.
+ *   This test alternates between a FBC supported and non-supported tiled
+ *   frontbuffers of the same size and format through multiple different
+ *   APIs: the page flip IOCTL, normal modesets and the plane APIs.
  *
  * EXPECTED RESULTS
- *   FBC gets properly disabled for the untiled FB and reenabled for the
- *   tiled FB.
+ *   FBC gets properly disabled for the non-supported tiling and reenabled for
+ *   the supported tiling.
  *
  * FAILURES
  *   Bad Kernels may somehow leave FBC enabled, which can cause FIFO underruns
  *   that lead to CRC assertion failures.
  */
-static void tilingchange_subtest(const struct test_mode *t)
+static void tiling_disable_fbc_subtest(const struct test_mode *t)
 {
-	struct igt_fb new_fb, *old_fb;
+	struct igt_fb new_fb, *supported_fb;
 	struct modeset_params *params = pick_params(t);
 	enum flip_type flip_type;
+	struct test_mode supported_mode;
 
-	prepare_subtest(t, NULL);
+	memcpy(&supported_mode, t, sizeof(*t));
+	supported_mode.tiling = TILING_X;
+	prepare_subtest(&supported_mode, NULL);
+	supported_fb = params->primary.fb;
 
-	old_fb = params->primary.fb;
-
-	create_fb(t->format, params->primary.fb->width, params->primary.fb->height,
-		  LOCAL_DRM_FORMAT_MOD_NONE, t->plane, &new_fb);
+	create_fb(t->format, params->primary.fb->width,
+		  params->primary.fb->height, t->tiling, t->plane, &new_fb);
 	fill_fb(&new_fb, COLOR_PRIM_BG);
 
 	for (flip_type = 0; flip_type < FLIP_COUNT; flip_type++) {
 		igt_debug("Flip type: %d\n", flip_type);
 
-		/* Set a buffer with no tiling. */
+		/* Set a buffer with new tiling. */
 		params->primary.fb = &new_fb;
 		page_flip_for_params(params, flip_type);
 		do_assertions(ASSERT_FBC_DISABLED);
 
 		/* Put FBC back in a working state. */
-		params->primary.fb = old_fb;
+		params->primary.fb = supported_fb;
 		page_flip_for_params(params, flip_type);
 		do_assertions(0);
 	}
@@ -3513,8 +3532,33 @@ igt_main_args("", long_options, help_str, opt_handler, NULL)
 			igt_subtest_f("%s-stridechange", feature_str(t.feature))
 				stridechange_subtest(&t);
 
-			igt_subtest_f("%s-tilingchange", feature_str(t.feature))
-				tilingchange_subtest(&t);
+			for (t.tiling = TILING_LINEAR; t.tiling < TILING_COUNT;
+			     t.tiling++) {
+				if (t.tiling == TILING_X)
+					continue;
+
+				igt_describe("Test the tiling formats, if the "
+					     "tiling format supports FBC do"
+					     "the basic drawing test if not "
+					     "set the mode and test if FBC is "
+					     "disabled");
+				igt_subtest_f("%s-tiling-%s",
+					      feature_str(t.feature),
+					      tiling_str(t.tiling)) {
+
+					/* Tiling Y is only supported on GEN9+ */
+					if (t.tiling == TILING_Y) {
+						int devid = intel_get_drm_devid(drm.fd);
+						igt_require(AT_LEAST_GEN(devid, 9));
+					}
+
+					if (tiling_is_valid(t.feature, t.tiling))
+						draw_subtest(&t);
+					else
+						tiling_disable_fbc_subtest(&t);
+				}
+			}
+			t.tiling = opt.tiling;
 		}
 
 		if ((t.feature & FEATURE_PSR) || (t.feature & FEATURE_DRRS))
-- 
2.26.0

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[igt-dev] [PATCH i-g-t v6 3/7] tests/kms_frontbuffer_tracking: Enable positive test on linear tiling

[José Roberto de Souza]

i915 is making fences not mandatory to enable FBC in newer platforms.
As BSpec do not have restrictions against tiling formats to enable
FBC it will be possible to enable FBC with linear tiling, so lets test
it.

v2:
- changed from GEN11 to GEN9 following kernel patches

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 tests/kms_frontbuffer_tracking.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index f7733da8..34723922 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -2172,12 +2172,14 @@ static void format_draw_subtest(const struct test_mode *t)
 
 static bool tiling_is_valid(int feature_flags, enum tiling_type tiling)
 {
+	int devid = intel_get_drm_devid(drm.fd);
+
 	if (!(feature_flags & FEATURE_FBC))
 		return true;
 
 	switch (tiling) {
 	case TILING_LINEAR:
-		return false;
+		return AT_LEAST_GEN(devid, 9);
 	case TILING_X:
 	case TILING_Y:
 		return true;
-- 
2.26.0

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[igt-dev] [PATCH i-g-t v6 4/7] tests/kms_fbcon_fbt: Reduce execution time

[José Roberto de Souza]

Every time fbc_wait_until_enabled() is called from
fbc_wait_until_update() it was waiting the whole 5 seconds of timeout
to return false as expected.
To save most 99% of this adding here fbc_wait_until_disabled().

v5:
- Fixed fbc_wait_until_update() test

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 tests/kms_fbcon_fbt.c | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/tests/kms_fbcon_fbt.c b/tests/kms_fbcon_fbt.c
index ed4cccbe..b8000a24 100644
--- a/tests/kms_fbcon_fbt.c
+++ b/tests/kms_fbcon_fbt.c
@@ -113,18 +113,28 @@ static void fbc_print_status(int debugfs_fd)
 	igt_debug("FBC status: %s\n", buf);
 }
 
-static bool fbc_is_enabled(int debugfs_fd)
+static bool fbc_check_status(int debugfs_fd, bool enabled)
 {
 	char buf[128];
 
 	igt_debugfs_simple_read(debugfs_fd, "i915_fbc_status", buf,
 				sizeof(buf));
-	return strstr(buf, "FBC enabled\n");
+	if (enabled)
+		return strstr(buf, "FBC enabled\n");
+	else
+		return strstr(buf, "FBC disabled");
 }
 
 static bool fbc_wait_until_enabled(int debugfs_fd)
 {
-	bool r = igt_wait(fbc_is_enabled(debugfs_fd), 5000, 1);
+	bool r = igt_wait(fbc_check_status(debugfs_fd, true), 5000, 1);
+	fbc_print_status(debugfs_fd);
+	return r;
+}
+
+static bool fbc_wait_until_disabled(int debugfs_fd)
+{
+	bool r = igt_wait(fbc_check_status(debugfs_fd, false), 5000, 1);
 	fbc_print_status(debugfs_fd);
 	return r;
 }
@@ -141,7 +151,7 @@ static bool fbc_wait_until_update(int debugfs)
 	 * If one day fbcon starts to use a tiled framebuffer we would need to
 	 * check the 'Compressing' status as in each blink it would be disabled.
 	 */
-	return !fbc_wait_until_enabled(debugfs);
+	return fbc_wait_until_disabled(debugfs);
 }
 
 typedef bool (*connector_possible_fn)(drmModeConnectorPtr connector);
-- 
2.26.0

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[igt-dev] [PATCH i-g-t v6 5/7] tests/kms_fbcon_fbt: Handle FBC enabled on fbcon in GEN9+

[José Roberto de Souza]

As now kernel enables FBC on linear surfaces on GEN9+, it will allow
FBC to be enabled on fbcon, so doing the changes he to tests this new
case.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 tests/kms_fbcon_fbt.c | 42 ++++++++++++++++++++++++++++--------------
 1 file changed, 28 insertions(+), 14 deletions(-)

diff --git a/tests/kms_fbcon_fbt.c b/tests/kms_fbcon_fbt.c
index b8000a24..081d57f6 100644
--- a/tests/kms_fbcon_fbt.c
+++ b/tests/kms_fbcon_fbt.c
@@ -42,6 +42,7 @@ struct drm_info {
 	int debugfs_fd;
 	drmModeResPtr res;
 	drmModeConnectorPtr connectors[MAX_CONNECTORS];
+	int devid;
 };
 
 static void wait_user(const char *msg)
@@ -67,6 +68,8 @@ static void setup_drm(struct drm_info *drm)
 		drm->connectors[i] = drmModeGetConnectorCurrent(drm->fd,
 						drm->res->connectors[i]);
 
+	drm->devid = intel_get_drm_devid(drm->fd);
+
 	kmstest_set_vt_graphics_mode();
 }
 
@@ -139,19 +142,30 @@ static bool fbc_wait_until_disabled(int debugfs_fd)
 	return r;
 }
 
-static bool fbc_wait_until_update(int debugfs)
+static bool fbc_not_compressing_enabled(int debugfs_fd)
+{
+	char buf[128];
+
+	igt_debugfs_simple_read(debugfs_fd, "i915_fbc_status", buf,
+				sizeof(buf));
+	return strstr(buf, "FBC enabled\nCompressing: no");
+}
+
+static bool fbc_wait_until_update(struct drm_info *drm)
 {
 	/*
-	 * FBC is not expected to be enabled because fbcon do not uses a tiled
-	 * framebuffer so a fence can not be setup on the framebuffer and FBC
-	 * code requires a fence to accurate track frontbuffer modifications
-	 * (what maybe is not necessary anymore as we now have
-	 * intel_fbc_invalidate()/flush()).
+	 * As now kernel enables FBC on linear surfaces on GEN9+, check if the
+	 * fbcon cursor blinking is causing the FBC to uncompress the
+	 * framebuffer.
 	 *
-	 * If one day fbcon starts to use a tiled framebuffer we would need to
-	 * check the 'Compressing' status as in each blink it would be disabled.
+	 * For older GENs FBC is still expected to be disabled as it still
+	 * relies on a tiled and fenceable framebuffer to track modifications.
 	 */
-	return fbc_wait_until_disabled(debugfs);
+	if (AT_LEAST_GEN(drm->devid, 9))
+		return igt_wait(fbc_not_compressing_enabled(drm->debugfs_fd),
+				2000, 1);
+	else
+		return fbc_wait_until_disabled(drm->debugfs_fd);
 }
 
 typedef bool (*connector_possible_fn)(drmModeConnectorPtr connector);
@@ -220,9 +234,9 @@ static bool psr_supported_on_chipset(int debugfs_fd)
 	return psr_sink_support(debugfs_fd, PSR_MODE_1);
 }
 
-static bool psr_wait_until_update(int debugfs_fd)
+static bool psr_wait_until_update(struct drm_info *drm)
 {
-	return psr_long_wait_update(debugfs_fd, PSR_MODE_1);
+	return psr_long_wait_update(drm->debugfs_fd, PSR_MODE_1);
 }
 
 static void disable_features(int debugfs_fd)
@@ -245,7 +259,7 @@ static inline void psr_debugfs_enable(int debugfs_fd)
 struct feature {
 	bool (*supported_on_chipset)(int debugfs_fd);
 	bool (*wait_until_enabled)(int debugfs_fd);
-	bool (*wait_until_update)(int debugfs_fd);
+	bool (*wait_until_update)(struct drm_info *drm);
 	bool (*connector_possible_fn)(drmModeConnectorPtr connector);
 	void (*enable)(int debugfs_fd);
 } fbc = {
@@ -295,13 +309,13 @@ static void subtest(struct drm_info *drm, struct feature *feature, bool suspend)
 	sleep(3);
 
 	wait_user("Back to fbcon.");
-	igt_assert(feature->wait_until_update(drm->debugfs_fd));
+	igt_assert(feature->wait_until_update(drm));
 
 	if (suspend) {
 		igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
 					      SUSPEND_TEST_NONE);
 		sleep(5);
-		igt_assert(feature->wait_until_update(drm->debugfs_fd));
+		igt_assert(feature->wait_until_update(drm));
 	}
 }
 
-- 
2.26.0

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[igt-dev] [PATCH i-g-t v6 6/7] DO_NOT_MERGE: Revert "tests/kms_frontbuffer_tracking: Enable positive test on linear tiling"

[José Roberto de Souza]

Reverting this one as the kernel patches did not landed yet so it would
cause CI to fail.

This reverts commit e12efda2439e045aba423b2af9c205f60cfaecc6.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 tests/kms_frontbuffer_tracking.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 34723922..f7733da8 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -2172,14 +2172,12 @@ static void format_draw_subtest(const struct test_mode *t)
 
 static bool tiling_is_valid(int feature_flags, enum tiling_type tiling)
 {
-	int devid = intel_get_drm_devid(drm.fd);
-
 	if (!(feature_flags & FEATURE_FBC))
 		return true;
 
 	switch (tiling) {
 	case TILING_LINEAR:
-		return AT_LEAST_GEN(devid, 9);
+		return false;
 	case TILING_X:
 	case TILING_Y:
 		return true;
-- 
2.26.0

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[igt-dev] [PATCH i-g-t v6 7/7] DO_NOT_MERGE: Revert "tests/kms_fbcon_fbt: Handle FBC enabled on fbcon in GEN9+"

[José Roberto de Souza]

Reverting this one as the kernel patches did not landed yet so it would
cause CI to fail.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 tests/kms_fbcon_fbt.c | 42 ++++++++++++++----------------------------
 1 file changed, 14 insertions(+), 28 deletions(-)

diff --git a/tests/kms_fbcon_fbt.c b/tests/kms_fbcon_fbt.c
index 081d57f6..b8000a24 100644
--- a/tests/kms_fbcon_fbt.c
+++ b/tests/kms_fbcon_fbt.c
@@ -42,7 +42,6 @@ struct drm_info {
 	int debugfs_fd;
 	drmModeResPtr res;
 	drmModeConnectorPtr connectors[MAX_CONNECTORS];
-	int devid;
 };
 
 static void wait_user(const char *msg)
@@ -68,8 +67,6 @@ static void setup_drm(struct drm_info *drm)
 		drm->connectors[i] = drmModeGetConnectorCurrent(drm->fd,
 						drm->res->connectors[i]);
 
-	drm->devid = intel_get_drm_devid(drm->fd);
-
 	kmstest_set_vt_graphics_mode();
 }
 
@@ -142,30 +139,19 @@ static bool fbc_wait_until_disabled(int debugfs_fd)
 	return r;
 }
 
-static bool fbc_not_compressing_enabled(int debugfs_fd)
-{
-	char buf[128];
-
-	igt_debugfs_simple_read(debugfs_fd, "i915_fbc_status", buf,
-				sizeof(buf));
-	return strstr(buf, "FBC enabled\nCompressing: no");
-}
-
-static bool fbc_wait_until_update(struct drm_info *drm)
+static bool fbc_wait_until_update(int debugfs)
 {
 	/*
-	 * As now kernel enables FBC on linear surfaces on GEN9+, check if the
-	 * fbcon cursor blinking is causing the FBC to uncompress the
-	 * framebuffer.
+	 * FBC is not expected to be enabled because fbcon do not uses a tiled
+	 * framebuffer so a fence can not be setup on the framebuffer and FBC
+	 * code requires a fence to accurate track frontbuffer modifications
+	 * (what maybe is not necessary anymore as we now have
+	 * intel_fbc_invalidate()/flush()).
 	 *
-	 * For older GENs FBC is still expected to be disabled as it still
-	 * relies on a tiled and fenceable framebuffer to track modifications.
+	 * If one day fbcon starts to use a tiled framebuffer we would need to
+	 * check the 'Compressing' status as in each blink it would be disabled.
 	 */
-	if (AT_LEAST_GEN(drm->devid, 9))
-		return igt_wait(fbc_not_compressing_enabled(drm->debugfs_fd),
-				2000, 1);
-	else
-		return fbc_wait_until_disabled(drm->debugfs_fd);
+	return fbc_wait_until_disabled(debugfs);
 }
 
 typedef bool (*connector_possible_fn)(drmModeConnectorPtr connector);
@@ -234,9 +220,9 @@ static bool psr_supported_on_chipset(int debugfs_fd)
 	return psr_sink_support(debugfs_fd, PSR_MODE_1);
 }
 
-static bool psr_wait_until_update(struct drm_info *drm)
+static bool psr_wait_until_update(int debugfs_fd)
 {
-	return psr_long_wait_update(drm->debugfs_fd, PSR_MODE_1);
+	return psr_long_wait_update(debugfs_fd, PSR_MODE_1);
 }
 
 static void disable_features(int debugfs_fd)
@@ -259,7 +245,7 @@ static inline void psr_debugfs_enable(int debugfs_fd)
 struct feature {
 	bool (*supported_on_chipset)(int debugfs_fd);
 	bool (*wait_until_enabled)(int debugfs_fd);
-	bool (*wait_until_update)(struct drm_info *drm);
+	bool (*wait_until_update)(int debugfs_fd);
 	bool (*connector_possible_fn)(drmModeConnectorPtr connector);
 	void (*enable)(int debugfs_fd);
 } fbc = {
@@ -309,13 +295,13 @@ static void subtest(struct drm_info *drm, struct feature *feature, bool suspend)
 	sleep(3);
 
 	wait_user("Back to fbcon.");
-	igt_assert(feature->wait_until_update(drm));
+	igt_assert(feature->wait_until_update(drm->debugfs_fd));
 
 	if (suspend) {
 		igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
 					      SUSPEND_TEST_NONE);
 		sleep(5);
-		igt_assert(feature->wait_until_update(drm));
+		igt_assert(feature->wait_until_update(drm->debugfs_fd));
 	}
 }
 
-- 
2.26.0

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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,v6,1/7] tests/kms_frontbuffer_tracking: Add tiling to test_mode

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v6,1/7] tests/kms_frontbuffer_tracking: Add tiling to test_mode
URL   : https://patchwork.freedesktop.org/series/75036/
State : success

== Summary ==

CI Bug Log - changes from IGT_5536 -> IGTPW_4348
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/index.html

Known issues
------------

  Here are the changes found in IGTPW_4348 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@execlists:
    - fi-cfl-8109u:       [PASS][1] -> [INCOMPLETE][2] ([i915#656])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/fi-cfl-8109u/igt@i915_selftest@live@execlists.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/fi-cfl-8109u/igt@i915_selftest@live@execlists.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@execlists:
    - fi-icl-y:           [DMESG-FAIL][3] ([fdo#108569]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/fi-icl-y/igt@i915_selftest@live@execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/fi-icl-y/igt@i915_selftest@live@execlists.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-skl-6700k2:      [INCOMPLETE][5] ([i915#146] / [i915#69]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/fi-skl-6700k2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/fi-skl-6700k2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  
#### Warnings ####

  * igt@i915_selftest@live@gem_contexts:
    - fi-skl-lmem:        [DMESG-FAIL][7] ([i915#933]) -> [INCOMPLETE][8] ([i915#424])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/fi-skl-lmem/igt@i915_selftest@live@gem_contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/fi-skl-lmem/igt@i915_selftest@live@gem_contexts.html

  
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#933]: https://gitlab.freedesktop.org/drm/intel/issues/933


Participating hosts (48 -> 42)
------------------------------

  Additional (1): fi-hsw-4770r 
  Missing    (7): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5536 -> IGTPW_4348

  CI-20190529: 20190529
  CI_DRM_8184: 1a72c9d9d3140e92190485d766b9d165932c5b86 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4348: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/index.html
  IGT_5536: bf17da7fdd7f1d3b4b2f21bccd2a4d17813e5ba7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+igt@kms_frontbuffer_tracking@fbcdrrs-tiling-linear
+igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y
+igt@kms_frontbuffer_tracking@fbcpsrdrrs-tiling-linear
+igt@kms_frontbuffer_tracking@fbcpsrdrrs-tiling-y
+igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear
+igt@kms_frontbuffer_tracking@fbcpsr-tiling-y
+igt@kms_frontbuffer_tracking@fbc-tiling-linear
+igt@kms_frontbuffer_tracking@fbc-tiling-y
-igt@kms_frontbuffer_tracking@fbcdrrs-tilingchange
-igt@kms_frontbuffer_tracking@fbcpsrdrrs-tilingchange
-igt@kms_frontbuffer_tracking@fbcpsr-tilingchange
-igt@kms_frontbuffer_tracking@fbc-tilingchange

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/index.html
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[igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,v6,1/7] tests/kms_frontbuffer_tracking: Add tiling to test_mode

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v6,1/7] tests/kms_frontbuffer_tracking: Add tiling to test_mode
URL   : https://patchwork.freedesktop.org/series/75036/
State : failure

== Summary ==

CI Bug Log - changes from IGT_5536_full -> IGTPW_4348_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_4348_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_4348_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_4348_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_capture@capture-blt:
    - shard-snb:          NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-snb4/igt@gem_exec_capture@capture-blt.html

  * {igt@kms_frontbuffer_tracking@fbc-tiling-linear} (NEW):
    - shard-glk:          NOTRUN -> [FAIL][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-glk2/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html
    - shard-tglb:         NOTRUN -> [FAIL][3] +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html

  * {igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear} (NEW):
    - shard-iclb:         NOTRUN -> [FAIL][4] +1 similar issue
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear.html

  * igt@kms_plane_cursor@pipe-a-overlay-size-256:
    - shard-kbl:          [PASS][5] -> [FAIL][6] +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-kbl7/igt@kms_plane_cursor@pipe-a-overlay-size-256.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-kbl7/igt@kms_plane_cursor@pipe-a-overlay-size-256.html
    - shard-apl:          [PASS][7] -> [FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-apl6/igt@kms_plane_cursor@pipe-a-overlay-size-256.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-apl3/igt@kms_plane_cursor@pipe-a-overlay-size-256.html

  
New tests
---------

  New tests have been introduced between IGT_5536_full and IGTPW_4348_full:

### New IGT tests (4) ###

  * igt@kms_frontbuffer_tracking@fbc-tiling-linear:
    - Statuses : 3 fail(s) 3 pass(s) 1 skip(s)
    - Exec time: [0.0, 8.04] s

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - Statuses : 5 pass(s) 2 skip(s)
    - Exec time: [0.0, 2.43] s

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear:
    - Statuses : 2 fail(s) 3 skip(s)
    - Exec time: [0.0, 3.04] s

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - Statuses : 2 pass(s) 5 skip(s)
    - Exec time: [0.0, 4.93] s

  

Known issues
------------

  Here are the changes found in IGTPW_4348_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#112080]) +14 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb2/igt@gem_busy@busy-vcs1.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb6/igt@gem_busy@busy-vcs1.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#110841])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb8/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_parallel@vecs0-fds:
    - shard-glk:          [PASS][13] -> [INCOMPLETE][14] ([i915#529] / [i915#58] / [k.org#198133])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-glk2/igt@gem_exec_parallel@vecs0-fds.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-glk4/igt@gem_exec_parallel@vecs0-fds.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [PASS][15] -> [SKIP][16] ([fdo#112146]) +7 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_softpin@noreloc-s3:
    - shard-kbl:          [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +2 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-kbl2/igt@gem_softpin@noreloc-s3.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-kbl7/igt@gem_softpin@noreloc-s3.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [PASS][19] -> [FAIL][20] ([i915#454])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb8/igt@i915_pm_dc@dc6-psr.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb6/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@dpms-non-lpsp:
    - shard-glk:          [PASS][21] -> [SKIP][22] ([fdo#109271])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-glk6/igt@i915_pm_rpm@dpms-non-lpsp.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-glk3/igt@i915_pm_rpm@dpms-non-lpsp.html

  * igt@i915_pm_rpm@system-suspend-execbuf:
    - shard-kbl:          [PASS][23] -> [INCOMPLETE][24] ([i915#151] / [i915#155])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-kbl6/igt@i915_pm_rpm@system-suspend-execbuf.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-kbl2/igt@i915_pm_rpm@system-suspend-execbuf.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x128-offscreen:
    - shard-apl:          [PASS][25] -> [FAIL][26] ([i915#54])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-apl6/igt@kms_cursor_crc@pipe-a-cursor-128x128-offscreen.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-apl3/igt@kms_cursor_crc@pipe-a-cursor-128x128-offscreen.html

  * igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen:
    - shard-kbl:          [PASS][27] -> [FAIL][28] ([i915#54]) +3 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html

  * igt@kms_cursor_legacy@cursor-vs-flip-toggle:
    - shard-hsw:          [PASS][29] -> [FAIL][30] ([i915#57])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw8/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          [PASS][31] -> [FAIL][32] ([IGT#5] / [i915#697])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled:
    - shard-glk:          [PASS][33] -> [FAIL][34] ([i915#52] / [i915#54]) +1 similar issue
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-glk7/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-glk9/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][35] -> [SKIP][36] ([fdo#109441]) +3 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb8/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [PASS][37] -> [SKIP][38] ([fdo#109276]) +19 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@vcs1-clean:
    - shard-iclb:         [SKIP][39] ([fdo#112080]) -> [PASS][40] +10 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb3/igt@gem_ctx_isolation@vcs1-clean.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb1/igt@gem_ctx_isolation@vcs1-clean.html

  * igt@gem_exec_schedule@implicit-read-write-bsd1:
    - shard-iclb:         [SKIP][41] ([fdo#109276] / [i915#677]) -> [PASS][42] +2 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb3/igt@gem_exec_schedule@implicit-read-write-bsd1.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb2/igt@gem_exec_schedule@implicit-read-write-bsd1.html

  * igt@gem_exec_schedule@pi-shared-iova-bsd:
    - shard-iclb:         [SKIP][43] ([i915#677]) -> [PASS][44] +2 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb2/igt@gem_exec_schedule@pi-shared-iova-bsd.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb5/igt@gem_exec_schedule@pi-shared-iova-bsd.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [SKIP][45] ([fdo#112146]) -> [PASS][46] +3 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb3/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_userptr_blits@sync-unmap-after-close:
    - shard-hsw:          [DMESG-WARN][47] ([fdo#111870]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw1/igt@gem_userptr_blits@sync-unmap-after-close.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw8/igt@gem_userptr_blits@sync-unmap-after-close.html
    - shard-snb:          [DMESG-WARN][49] ([fdo#111870] / [i915#478]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-snb4/igt@gem_userptr_blits@sync-unmap-after-close.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-snb6/igt@gem_userptr_blits@sync-unmap-after-close.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-glk:          [INCOMPLETE][51] ([i915#58] / [k.org#198133]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-glk4/igt@gen9_exec_parse@allowed-all.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-glk7/igt@gen9_exec_parse@allowed-all.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
    - shard-glk:          [FAIL][55] ([i915#177] / [i915#52] / [i915#54]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-glk2/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-glk4/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html

  * igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled:
    - shard-glk:          [FAIL][57] ([i915#52] / [i915#54]) -> [PASS][58] +2 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-glk4/igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-glk8/igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-kbl:          [FAIL][59] ([i915#64]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-kbl6/igt@kms_fbcon_fbt@fbc.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-kbl6/igt@kms_fbcon_fbt@fbc.html
    - shard-apl:          [FAIL][61] -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-apl2/igt@kms_fbcon_fbt@fbc.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-apl3/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-apl:          [FAIL][63] ([i915#79]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-apl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-apl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [DMESG-WARN][65] ([i915#180]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_psr@psr2_sprite_mmap_cpu:
    - shard-iclb:         [SKIP][67] ([fdo#109441]) -> [PASS][68] +1 similar issue
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_cpu.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][69] ([fdo#109276]) -> [PASS][70] +13 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb3/igt@prime_busy@hang-bsd2.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb1/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_userptr_blits@map-fixed-invalidate-busy@gtt:
    - shard-hsw:          [DMESG-WARN][71] ([i915#478]) -> [DMESG-WARN][72] ([fdo#110789] / [i915#478])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy@gtt.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-busy@gtt.html
    - shard-snb:          [DMESG-WARN][73] ([i915#478]) -> [DMESG-WARN][74] ([fdo#110789] / [i915#478])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-snb6/igt@gem_userptr_blits@map-fixed-invalidate-busy@gtt.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-busy@gtt.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         [FAIL][75] ([i915#454]) -> [SKIP][76] ([i915#468])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-tglb1/igt@i915_pm_dc@dc6-psr.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-tglb2/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@dpms-non-lpsp:
    - shard-tglb:         [SKIP][77] ([fdo#111644] / [i915#1397]) -> [SKIP][78] ([i915#1316])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-tglb5/igt@i915_pm_rpm@dpms-non-lpsp.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-tglb5/igt@i915_pm_rpm@dpms-non-lpsp.html
    - shard-iclb:         [SKIP][79] ([fdo#110892]) -> [SKIP][80] ([i915#1316])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-iclb3/igt@i915_pm_rpm@dpms-non-lpsp.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-iclb2/igt@i915_pm_rpm@dpms-non-lpsp.html

  * igt@runner@aborted:
    - shard-hsw:          ([FAIL][81], [FAIL][82], [FAIL][83], [FAIL][84], [FAIL][85], [FAIL][86], [FAIL][87], [FAIL][88]) ([fdo#111870] / [i915#1400] / [i915#1485]) -> ([FAIL][89], [FAIL][90], [FAIL][91], [FAIL][92], [FAIL][93], [FAIL][94], [FAIL][95]) ([fdo#111870] / [i915#1485] / [i915#478])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw1/igt@runner@aborted.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw1/igt@runner@aborted.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw1/igt@runner@aborted.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw4/igt@runner@aborted.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw7/igt@runner@aborted.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw2/igt@runner@aborted.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw4/igt@runner@aborted.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-hsw5/igt@runner@aborted.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw5/igt@runner@aborted.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw8/igt@runner@aborted.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw4/igt@runner@aborted.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw2/igt@runner@aborted.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw1/igt@runner@aborted.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw8/igt@runner@aborted.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-hsw6/igt@runner@aborted.html
    - shard-kbl:          ([FAIL][96], [FAIL][97]) ([i915#1485] / [i915#656] / [i915#92]) -> [FAIL][98] ([i915#92])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-kbl7/igt@runner@aborted.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-kbl4/igt@runner@aborted.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-kbl7/igt@runner@aborted.html
    - shard-apl:          ([FAIL][99], [FAIL][100]) ([fdo#103927] / [i915#1485] / [i915#529]) -> ([FAIL][101], [FAIL][102]) ([fdo#103927] / [i915#529])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-apl6/igt@runner@aborted.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5536/shard-apl1/igt@runner@aborted.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-apl7/igt@runner@aborted.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/shard-apl2/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#110892]: https://bugs.freedesktop.org/show_bug.cgi?id=110892
  [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [i915#1316]: https://gitlab.freedesktop.org/drm/intel/issues/1316
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1400]: https://gitlab.freedesktop.org/drm/intel/issues/1400
  [i915#1485]: https://gitlab.freedesktop.org/drm/intel/issues/1485
  [i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
  [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
  [i915#177]: https://gitlab.freedesktop.org/drm/intel/issues/177
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
  [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
  [i915#529]: https://gitlab.freedesktop.org/drm/intel/issues/529
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#57]: https://gitlab.freedesktop.org/drm/intel/issues/57
  [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
  [i915#64]: https://gitlab.freedesktop.org/drm/intel/issues/64
  [i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#697]: https://gitlab.freedesktop.org/drm/intel/issues/697
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (8 -> 8)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5536 -> IGTPW_4348

  CI-20190529: 20190529
  CI_DRM_8184: 1a72c9d9d3140e92190485d766b9d165932c5b86 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4348: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/index.html
  IGT_5536: bf17da7fdd7f1d3b4b2f21bccd2a4d17813e5ba7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4348/index.html
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