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* [Intel-gfx] [PATCH i-g-t] i915/perf_pmu: Exercise mixing perf reads into i915 mmaps
@ 2020-04-02 14:00 ` Chris Wilson
  0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2020-04-02 14:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev, Chris Wilson

Feed a fresh i915 mmap into a read(perf_fd) to teach lockdep about the
potential lock chains should we take a pagefault into our vm_fault
handlers from within perf.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index 259670f4b..1d6681d80 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1827,6 +1827,35 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
 	assert_within(100.0 * busy_r, 100.0 * expected, 2);
 }
 
+static void *create_mmap(int gem_fd, const struct mmap_offset *t, int sz)
+{
+	uint32_t handle;
+	void *ptr;
+
+	handle = gem_create(gem_fd, sz);
+	ptr = __gem_mmap_offset(gem_fd, handle, 0, sz, PROT_WRITE, t->type);
+	gem_close(gem_fd, handle);
+
+	return ptr;
+}
+
+static void
+faulting_read(int gem_fd, const struct mmap_offset *t)
+{
+	void *ptr;
+	int fd;
+
+	ptr = create_mmap(gem_fd, t, 4096);
+	igt_require(ptr != NULL);
+
+	fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(0, 0));
+	igt_require(fd != -1);
+	igt_assert_eq(read(fd, ptr, 4096), 2 * sizeof(uint64_t));
+	close(fd);
+
+	munmap(ptr, 4096);
+}
+
 #define test_each_engine(T, i915, e) \
 	igt_subtest_with_dynamic(T) __for_each_physical_engine(i915, e) \
 		igt_dynamic_f("%s", e->name)
@@ -1860,6 +1889,16 @@ igt_main
 	igt_subtest("invalid-init")
 		invalid_init(fd);
 
+	igt_subtest_with_dynamic("faulting-read") {
+		for_each_mmap_offset_type(fd, t) {
+			if (!gem_has_mmap_offset_type(fd, t))
+				continue;
+
+			igt_dynamic_f("%s", t->name)
+				faulting_read(fd, t);
+		}
+	}
+
 	/**
 	 * Test that a single engine metric can be initialized or it
 	 * is correctly rejected.
-- 
2.26.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [igt-dev] [PATCH i-g-t] i915/perf_pmu: Exercise mixing perf reads into i915 mmaps
@ 2020-04-02 14:00 ` Chris Wilson
  0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2020-04-02 14:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev, Tvrtko Ursulin, Chris Wilson

Feed a fresh i915 mmap into a read(perf_fd) to teach lockdep about the
potential lock chains should we take a pagefault into our vm_fault
handlers from within perf.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index 259670f4b..1d6681d80 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1827,6 +1827,35 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
 	assert_within(100.0 * busy_r, 100.0 * expected, 2);
 }
 
+static void *create_mmap(int gem_fd, const struct mmap_offset *t, int sz)
+{
+	uint32_t handle;
+	void *ptr;
+
+	handle = gem_create(gem_fd, sz);
+	ptr = __gem_mmap_offset(gem_fd, handle, 0, sz, PROT_WRITE, t->type);
+	gem_close(gem_fd, handle);
+
+	return ptr;
+}
+
+static void
+faulting_read(int gem_fd, const struct mmap_offset *t)
+{
+	void *ptr;
+	int fd;
+
+	ptr = create_mmap(gem_fd, t, 4096);
+	igt_require(ptr != NULL);
+
+	fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(0, 0));
+	igt_require(fd != -1);
+	igt_assert_eq(read(fd, ptr, 4096), 2 * sizeof(uint64_t));
+	close(fd);
+
+	munmap(ptr, 4096);
+}
+
 #define test_each_engine(T, i915, e) \
 	igt_subtest_with_dynamic(T) __for_each_physical_engine(i915, e) \
 		igt_dynamic_f("%s", e->name)
@@ -1860,6 +1889,16 @@ igt_main
 	igt_subtest("invalid-init")
 		invalid_init(fd);
 
+	igt_subtest_with_dynamic("faulting-read") {
+		for_each_mmap_offset_type(fd, t) {
+			if (!gem_has_mmap_offset_type(fd, t))
+				continue;
+
+			igt_dynamic_f("%s", t->name)
+				faulting_read(fd, t);
+		}
+	}
+
 	/**
 	 * Test that a single engine metric can be initialized or it
 	 * is correctly rejected.
-- 
2.26.0

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t] i915/perf_pmu: Exercise mixing perf reads into i915 mmaps
  2020-04-02 14:00 ` [igt-dev] " Chris Wilson
@ 2020-04-02 14:07   ` Chris Wilson
  -1 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2020-04-02 14:07 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Quoting Chris Wilson (2020-04-02 15:00:57)
> Feed a fresh i915 mmap into a read(perf_fd) to teach lockdep about the
> potential lock chains should we take a pagefault into our vm_fault
> handlers from within perf.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>  tests/perf_pmu.c | 39 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 39 insertions(+)
> 
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index 259670f4b..1d6681d80 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -1827,6 +1827,35 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
>         assert_within(100.0 * busy_r, 100.0 * expected, 2);
>  }
>  
> +static void *create_mmap(int gem_fd, const struct mmap_offset *t, int sz)
> +{
> +       uint32_t handle;
> +       void *ptr;
> +
> +       handle = gem_create(gem_fd, sz);
> +       ptr = __gem_mmap_offset(gem_fd, handle, 0, sz, PROT_WRITE, t->type);
> +       gem_close(gem_fd, handle);
> +
> +       return ptr;
> +}
> +
> +static void
> +faulting_read(int gem_fd, const struct mmap_offset *t)
> +{
> +       void *ptr;
> +       int fd;
> +
> +       ptr = create_mmap(gem_fd, t, 4096);
> +       igt_require(ptr != NULL);
> +
> +       fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(0, 0));
> +       igt_require(fd != -1);
> +       igt_assert_eq(read(fd, ptr, 4096), 2 * sizeof(uint64_t));
> +       close(fd);
> +
> +       munmap(ptr, 4096);
> +}
> +
>  #define test_each_engine(T, i915, e) \
>         igt_subtest_with_dynamic(T) __for_each_physical_engine(i915, e) \
>                 igt_dynamic_f("%s", e->name)
> @@ -1860,6 +1889,16 @@ igt_main
>         igt_subtest("invalid-init")
>                 invalid_init(fd);
>  
> +       igt_subtest_with_dynamic("faulting-read") {
> +               for_each_mmap_offset_type(fd, t) {
> +                       if (!gem_has_mmap_offset_type(fd, t))
> +                               continue;

Redundant, for_each_mmap_offset_type() includes the skip.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] i915/perf_pmu: Exercise mixing perf reads into i915 mmaps
@ 2020-04-02 14:07   ` Chris Wilson
  0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2020-04-02 14:07 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev, Tvrtko Ursulin

Quoting Chris Wilson (2020-04-02 15:00:57)
> Feed a fresh i915 mmap into a read(perf_fd) to teach lockdep about the
> potential lock chains should we take a pagefault into our vm_fault
> handlers from within perf.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>  tests/perf_pmu.c | 39 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 39 insertions(+)
> 
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index 259670f4b..1d6681d80 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -1827,6 +1827,35 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
>         assert_within(100.0 * busy_r, 100.0 * expected, 2);
>  }
>  
> +static void *create_mmap(int gem_fd, const struct mmap_offset *t, int sz)
> +{
> +       uint32_t handle;
> +       void *ptr;
> +
> +       handle = gem_create(gem_fd, sz);
> +       ptr = __gem_mmap_offset(gem_fd, handle, 0, sz, PROT_WRITE, t->type);
> +       gem_close(gem_fd, handle);
> +
> +       return ptr;
> +}
> +
> +static void
> +faulting_read(int gem_fd, const struct mmap_offset *t)
> +{
> +       void *ptr;
> +       int fd;
> +
> +       ptr = create_mmap(gem_fd, t, 4096);
> +       igt_require(ptr != NULL);
> +
> +       fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(0, 0));
> +       igt_require(fd != -1);
> +       igt_assert_eq(read(fd, ptr, 4096), 2 * sizeof(uint64_t));
> +       close(fd);
> +
> +       munmap(ptr, 4096);
> +}
> +
>  #define test_each_engine(T, i915, e) \
>         igt_subtest_with_dynamic(T) __for_each_physical_engine(i915, e) \
>                 igt_dynamic_f("%s", e->name)
> @@ -1860,6 +1889,16 @@ igt_main
>         igt_subtest("invalid-init")
>                 invalid_init(fd);
>  
> +       igt_subtest_with_dynamic("faulting-read") {
> +               for_each_mmap_offset_type(fd, t) {
> +                       if (!gem_has_mmap_offset_type(fd, t))
> +                               continue;

Redundant, for_each_mmap_offset_type() includes the skip.
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/perf_pmu: Exercise mixing perf reads into i915 mmaps
  2020-04-02 14:07   ` [igt-dev] " Chris Wilson
  (?)
@ 2020-04-02 16:10   ` Tvrtko Ursulin
  -1 siblings, 0 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2020-04-02 16:10 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx; +Cc: igt-dev


On 02/04/2020 15:07, Chris Wilson wrote:
> Quoting Chris Wilson (2020-04-02 15:00:57)
>> Feed a fresh i915 mmap into a read(perf_fd) to teach lockdep about the
>> potential lock chains should we take a pagefault into our vm_fault
>> handlers from within perf.
>>
>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> ---
>>   tests/perf_pmu.c | 39 +++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 39 insertions(+)
>>
>> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
>> index 259670f4b..1d6681d80 100644
>> --- a/tests/perf_pmu.c
>> +++ b/tests/perf_pmu.c
>> @@ -1827,6 +1827,35 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
>>          assert_within(100.0 * busy_r, 100.0 * expected, 2);
>>   }
>>   
>> +static void *create_mmap(int gem_fd, const struct mmap_offset *t, int sz)
>> +{
>> +       uint32_t handle;
>> +       void *ptr;
>> +
>> +       handle = gem_create(gem_fd, sz);
>> +       ptr = __gem_mmap_offset(gem_fd, handle, 0, sz, PROT_WRITE, t->type);
>> +       gem_close(gem_fd, handle);
>> +
>> +       return ptr;
>> +}
>> +
>> +static void
>> +faulting_read(int gem_fd, const struct mmap_offset *t)
>> +{
>> +       void *ptr;
>> +       int fd;
>> +
>> +       ptr = create_mmap(gem_fd, t, 4096);
>> +       igt_require(ptr != NULL);
>> +
>> +       fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(0, 0));
>> +       igt_require(fd != -1);
>> +       igt_assert_eq(read(fd, ptr, 4096), 2 * sizeof(uint64_t));
>> +       close(fd);
>> +
>> +       munmap(ptr, 4096);
>> +}
>> +
>>   #define test_each_engine(T, i915, e) \
>>          igt_subtest_with_dynamic(T) __for_each_physical_engine(i915, e) \
>>                  igt_dynamic_f("%s", e->name)
>> @@ -1860,6 +1889,16 @@ igt_main
>>          igt_subtest("invalid-init")
>>                  invalid_init(fd);
>>   
>> +       igt_subtest_with_dynamic("faulting-read") {
>> +               for_each_mmap_offset_type(fd, t) {
>> +                       if (!gem_has_mmap_offset_type(fd, t))
>> +                               continue;
> 
> Redundant, for_each_mmap_offset_type() includes the skip.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [igt-dev] ✗ Fi.CI.BUILD: failure for i915/perf_pmu: Exercise mixing perf reads into i915 mmaps
  2020-04-02 14:00 ` [igt-dev] " Chris Wilson
  (?)
  (?)
@ 2020-04-02 19:51 ` Patchwork
  -1 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-04-02 19:51 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev

== Series Details ==

Series: i915/perf_pmu: Exercise mixing perf reads into i915 mmaps
URL   : https://patchwork.freedesktop.org/series/75421/
State : failure

== Summary ==

Applying: i915/perf_pmu: Exercise mixing perf reads into i915 mmaps
Using index info to reconstruct a base tree...
M	tests/perf_pmu.c
Falling back to patching base and 3-way merge...
Auto-merging tests/perf_pmu.c
CONFLICT (content): Merge conflict in tests/perf_pmu.c
Patch failed at 0001 i915/perf_pmu: Exercise mixing perf reads into i915 mmaps
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2020-04-02 19:51 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-02 14:00 [Intel-gfx] [PATCH i-g-t] i915/perf_pmu: Exercise mixing perf reads into i915 mmaps Chris Wilson
2020-04-02 14:00 ` [igt-dev] " Chris Wilson
2020-04-02 14:07 ` [Intel-gfx] " Chris Wilson
2020-04-02 14:07   ` [igt-dev] " Chris Wilson
2020-04-02 16:10   ` [Intel-gfx] " Tvrtko Ursulin
2020-04-02 19:51 ` [igt-dev] ✗ Fi.CI.BUILD: failure for " Patchwork

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