* [PATCH/RFC 0/2] arm64: dts: renesas: add some device nodes for r8a77961
@ 2020-04-10 10:47 Yoshihiro Shimoda
2020-04-10 10:47 ` [PATCH/RFC 1/2] arm64: dts: renesas: add PWM " Yoshihiro Shimoda
2020-04-10 10:47 ` [PATCH/RFC 2/2] arm64: dts: renesas: add PCIe " Yoshihiro Shimoda
0 siblings, 2 replies; 5+ messages in thread
From: Yoshihiro Shimoda @ 2020-04-10 10:47 UTC (permalink / raw)
To: geert+renesas, magnus.damm; +Cc: linux-renesas-soc, Yoshihiro Shimoda
This patch series is based on renesas-devel / renesas-arm64-dt-for-v5.8
branch. Since the dt-bindings for these device nodes are submitting now [1],
I marked RFC on this patch series.
[1]
https://patchwork.kernel.org/patch/11483041/
https://patchwork.kernel.org/patch/11483045/
Yoshihiro Shimoda (2):
arm64: dts: renesas: add PWM device nodes for r8a77961
arm64: dts: renesas: add PCIe device nodes for r8a77961
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 114 +++++++++++++++++++++++++++++-
1 file changed, 111 insertions(+), 3 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH/RFC 1/2] arm64: dts: renesas: add PWM device nodes for r8a77961
2020-04-10 10:47 [PATCH/RFC 0/2] arm64: dts: renesas: add some device nodes for r8a77961 Yoshihiro Shimoda
@ 2020-04-10 10:47 ` Yoshihiro Shimoda
2020-04-13 8:48 ` Geert Uytterhoeven
2020-04-10 10:47 ` [PATCH/RFC 2/2] arm64: dts: renesas: add PCIe " Yoshihiro Shimoda
1 sibling, 1 reply; 5+ messages in thread
From: Yoshihiro Shimoda @ 2020-04-10 10:47 UTC (permalink / raw)
To: geert+renesas, magnus.damm; +Cc: linux-renesas-soc, Yoshihiro Shimoda
Add PWM device nodes for r8a77961 (R-Car M3-W+).
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 66 ++++++++++++++++++++++++++++++-
1 file changed, 65 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index de27b2f..adc54ff 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -846,10 +846,74 @@
status = "disabled";
};
+ pwm0: pwm@e6e30000 {
+ compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
+ reg = <0 0xe6e30000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
pwm1: pwm@e6e31000 {
+ compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
reg = <0 0xe6e31000 0 8>;
#pwm-cells = <2>;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm2: pwm@e6e32000 {
+ compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
+ reg = <0 0xe6e32000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm3: pwm@e6e33000 {
+ compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
+ reg = <0 0xe6e33000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm4: pwm@e6e34000 {
+ compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
+ reg = <0 0xe6e34000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm5: pwm@e6e35000 {
+ compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
+ reg = <0 0xe6e35000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm6: pwm@e6e36000 {
+ compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
+ reg = <0 0xe6e36000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ status = "disabled";
};
scif1: serial@e6e68000 {
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH/RFC 2/2] arm64: dts: renesas: add PCIe device nodes for r8a77961
2020-04-10 10:47 [PATCH/RFC 0/2] arm64: dts: renesas: add some device nodes for r8a77961 Yoshihiro Shimoda
2020-04-10 10:47 ` [PATCH/RFC 1/2] arm64: dts: renesas: add PWM " Yoshihiro Shimoda
@ 2020-04-10 10:47 ` Yoshihiro Shimoda
2020-04-13 8:54 ` Geert Uytterhoeven
1 sibling, 1 reply; 5+ messages in thread
From: Yoshihiro Shimoda @ 2020-04-10 10:47 UTC (permalink / raw)
To: geert+renesas, magnus.damm; +Cc: linux-renesas-soc, Yoshihiro Shimoda
Add PCIe device nodes for r8a77961 (R-Car M3-W+).
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 48 +++++++++++++++++++++++++++++--
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index adc54ff..2a11301 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -1160,13 +1160,57 @@
};
pciec0: pcie@fe000000 {
+ compatible = "renesas,pcie-r8a77961",
+ "renesas,pcie-rcar-gen3";
reg = <0 0xfe000000 0 0x80000>;
- /* placeholder */
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
+ <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
+ <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
+ <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
};
pciec1: pcie@ee800000 {
+ compatible = "renesas,pcie-r8a77961",
+ "renesas,pcie-rcar-gen3";
reg = <0 0xee800000 0 0x80000>;
- /* placeholder */
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
+ <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
+ <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
+ <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
};
csi20: csi2@fea80000 {
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH/RFC 1/2] arm64: dts: renesas: add PWM device nodes for r8a77961
2020-04-10 10:47 ` [PATCH/RFC 1/2] arm64: dts: renesas: add PWM " Yoshihiro Shimoda
@ 2020-04-13 8:48 ` Geert Uytterhoeven
0 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2020-04-13 8:48 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: Magnus Damm, Linux-Renesas
On Fri, Apr 10, 2020 at 12:47 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> Add PWM device nodes for r8a77961 (R-Car M3-W+).
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.8.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH/RFC 2/2] arm64: dts: renesas: add PCIe device nodes for r8a77961
2020-04-10 10:47 ` [PATCH/RFC 2/2] arm64: dts: renesas: add PCIe " Yoshihiro Shimoda
@ 2020-04-13 8:54 ` Geert Uytterhoeven
0 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2020-04-13 8:54 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: Magnus Damm, Linux-Renesas
On Fri, Apr 10, 2020 at 12:47 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> Add PCIe device nodes for r8a77961 (R-Car M3-W+).
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.8.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 5+ messages in thread
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2020-04-10 10:47 [PATCH/RFC 0/2] arm64: dts: renesas: add some device nodes for r8a77961 Yoshihiro Shimoda
2020-04-10 10:47 ` [PATCH/RFC 1/2] arm64: dts: renesas: add PWM " Yoshihiro Shimoda
2020-04-13 8:48 ` Geert Uytterhoeven
2020-04-10 10:47 ` [PATCH/RFC 2/2] arm64: dts: renesas: add PCIe " Yoshihiro Shimoda
2020-04-13 8:54 ` Geert Uytterhoeven
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