* [Intel-gfx] [PATCH 1/4] drm/i915: introduce a mechanism to extend execbuf2
@ 2020-04-10 16:51 Venkata Sandeep Dhanalakota
2020-04-10 16:51 ` [Intel-gfx] [PATCH 2/4] drm/i915: add syncobj timeline support Venkata Sandeep Dhanalakota
` (5 more replies)
0 siblings, 6 replies; 14+ messages in thread
From: Venkata Sandeep Dhanalakota @ 2020-04-10 16:51 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson
From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
We're planning to use this for a couple of new feature where we need
to provide additional parameters to execbuf.
v2: Check for invalid flags in execbuffer2 (Lionel)
v3: Rename I915_EXEC_EXT -> I915_EXEC_USE_EXTENSIONS (Chris)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v1)
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 39 ++++++++++++++++++-
include/uapi/drm/i915_drm.h | 26 +++++++++++--
2 files changed, 61 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 9d11bad74e9a..16831f715daa 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -26,6 +26,7 @@
#include "i915_gem_ioctls.h"
#include "i915_sw_fence_work.h"
#include "i915_trace.h"
+#include "i915_user_extensions.h"
struct eb_vma {
struct i915_vma *vma;
@@ -288,6 +289,10 @@ struct i915_execbuffer {
int lut_size;
struct hlist_head *buckets; /** ht for relocation handles */
struct eb_vma_array *array;
+
+ struct {
+ u64 flags; /** Available extensions parameters */
+ } extensions;
};
static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb)
@@ -1698,7 +1703,8 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
return -EINVAL;
/* Kernel clipping was a DRI1 misfeature */
- if (!(exec->flags & I915_EXEC_FENCE_ARRAY)) {
+ if (!(exec->flags & (I915_EXEC_FENCE_ARRAY |
+ I915_EXEC_USE_EXTENSIONS))) {
if (exec->num_cliprects || exec->cliprects_ptr)
return -EINVAL;
}
@@ -2431,6 +2437,33 @@ static void eb_request_add(struct i915_execbuffer *eb)
mutex_unlock(&tl->mutex);
}
+static const i915_user_extension_fn execbuf_extensions[] = {
+};
+
+static int
+parse_execbuf2_extensions(struct drm_i915_gem_execbuffer2 *args,
+ struct i915_execbuffer *eb)
+{
+ eb->extensions.flags = 0;
+
+ if (!(args->flags & I915_EXEC_USE_EXTENSIONS))
+ return 0;
+
+ /* The execbuf2 extension mechanism reuses cliprects_ptr. So we cannot
+ * have another flag also using it at the same time.
+ */
+ if (eb->args->flags & I915_EXEC_FENCE_ARRAY)
+ return -EINVAL;
+
+ if (args->num_cliprects != 0)
+ return -EINVAL;
+
+ return i915_user_extensions(u64_to_user_ptr(args->cliprects_ptr),
+ execbuf_extensions,
+ ARRAY_SIZE(execbuf_extensions),
+ eb);
+}
+
static int
i915_gem_do_execbuffer(struct drm_device *dev,
struct drm_file *file,
@@ -2484,6 +2517,10 @@ i915_gem_do_execbuffer(struct drm_device *dev,
if (args->flags & I915_EXEC_IS_PINNED)
eb.batch_flags |= I915_DISPATCH_PINNED;
+ err = parse_execbuf2_extensions(args, &eb);
+ if (err)
+ return err;
+
if (args->flags & I915_EXEC_FENCE_IN) {
in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
if (!in_fence)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 14b67cd6b54b..7ea38aa6502c 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1046,6 +1046,10 @@ struct drm_i915_gem_exec_fence {
__u32 flags;
};
+enum drm_i915_gem_execbuffer_ext {
+ DRM_I915_GEM_EXECBUFFER_EXT_MAX /* non-ABI */
+};
+
struct drm_i915_gem_execbuffer2 {
/**
* List of gem_exec_object2 structs
@@ -1062,8 +1066,15 @@ struct drm_i915_gem_execbuffer2 {
__u32 num_cliprects;
/**
* This is a struct drm_clip_rect *cliprects if I915_EXEC_FENCE_ARRAY
- * is not set. If I915_EXEC_FENCE_ARRAY is set, then this is a
- * struct drm_i915_gem_exec_fence *fences.
+ * & I915_EXEC_USE_EXTENSIONS are not set.
+ *
+ * If I915_EXEC_FENCE_ARRAY is set, then this is a pointer to an array
+ * of struct drm_i915_gem_exec_fence and num_cliprects is the length
+ * of the array.
+ *
+ * If I915_EXEC_USE_EXTENSIONS is set, then this is a pointer to a
+ * single struct drm_i915_gem_base_execbuffer_ext and num_cliprects is
+ * 0.
*/
__u64 cliprects_ptr;
#define I915_EXEC_RING_MASK (0x3f)
@@ -1181,7 +1192,16 @@ struct drm_i915_gem_execbuffer2 {
*/
#define I915_EXEC_FENCE_SUBMIT (1 << 20)
-#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_SUBMIT << 1))
+/*
+ * Setting I915_EXEC_USE_EXTENSIONS implies that
+ * drm_i915_gem_execbuffer2.cliprects_ptr is treated as a pointer to an linked
+ * list of i915_user_extension. Each i915_user_extension node is the base of a
+ * larger structure. The list of supported structures are listed in the
+ * drm_i915_gem_execbuffer_ext enum.
+ */
+#define I915_EXEC_USE_EXTENSIONS (1 << 21)
+
+#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_USE_EXTENSIONS<<1))
#define I915_EXEC_CONTEXT_ID_MASK (0xffffffff)
#define i915_execbuffer2_set_context_id(eb2, context) \
--
2.21.0.5.gaeb582a983
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 2/4] drm/i915: add syncobj timeline support
2020-04-10 16:51 [Intel-gfx] [PATCH 1/4] drm/i915: introduce a mechanism to extend execbuf2 Venkata Sandeep Dhanalakota
@ 2020-04-10 16:51 ` Venkata Sandeep Dhanalakota
2020-04-10 16:51 ` [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences Venkata Sandeep Dhanalakota
` (4 subsequent siblings)
5 siblings, 0 replies; 14+ messages in thread
From: Venkata Sandeep Dhanalakota @ 2020-04-10 16:51 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson
Introduces a new parameters to execbuf so that we can specify syncobj
handles as well as timeline points.
v2: Reuse i915_user_extension_fn
v3: Check that the chained extension is only present once (Chris)
v4: Check that dma_fence_chain_find_seqno returns a non NULL fence
(Lionel)
v5: Use BIT_ULL (Chris)
v6: Fix issue with already signaled timeline points,
dma_fence_chain_find_seqno() setting fence to NULL (Chris)
v7: Report ENOENT with invalid syncobj handle (Lionel)
v8: Check for out of order timeline point insertion (Chris)
v9: After explanations on
https://lists.freedesktop.org/archives/dri-devel/2019-August/229287.html
drop the ordering check from v8 (Lionel)
v10: Set first extension enum item to 1 (Jason)
v11: Add wait on previous sync points in timelines (Sandeep)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 316 ++++++++++++++----
drivers/gpu/drm/i915/i915_drv.c | 3 +-
drivers/gpu/drm/i915/i915_getparam.c | 1 +
include/uapi/drm/i915_drm.h | 38 +++
4 files changed, 300 insertions(+), 58 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 16831f715daa..8dd651cdca39 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -230,6 +230,13 @@ enum {
* the batchbuffer in trusted mode, otherwise the ioctl is rejected.
*/
+struct i915_eb_fences {
+ struct drm_syncobj *syncobj; /* Use with ptr_mask_bits() */
+ struct dma_fence *dma_fence;
+ u64 value;
+ struct dma_fence_chain *chain_fence;
+};
+
struct i915_execbuffer {
struct drm_i915_private *i915; /** i915 backpointer */
struct drm_file *file; /** per-file lookup tables and limits */
@@ -292,6 +299,7 @@ struct i915_execbuffer {
struct {
u64 flags; /** Available extensions parameters */
+ struct drm_i915_gem_execbuffer_ext_timeline_fences timeline_fences;
} extensions;
};
@@ -2244,67 +2252,223 @@ eb_pin_engine(struct i915_execbuffer *eb,
}
static void
-__free_fence_array(struct drm_syncobj **fences, unsigned int n)
+__free_fence_array(struct i915_eb_fences *fences, unsigned int n)
{
- while (n--)
- drm_syncobj_put(ptr_mask_bits(fences[n], 2));
+ while (n--) {
+ drm_syncobj_put(ptr_mask_bits(fences[n].syncobj, 2));
+ dma_fence_put(fences[n].dma_fence);
+ kfree(fences[n].chain_fence);
+ }
kvfree(fences);
}
-static struct drm_syncobj **
-get_fence_array(struct drm_i915_gem_execbuffer2 *args,
- struct drm_file *file)
+static struct i915_eb_fences *
+get_timeline_fence_array(struct i915_execbuffer *eb, int *out_n_fences)
+{
+ struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences =
+ &eb->extensions.timeline_fences;
+ struct drm_i915_gem_exec_fence __user *user_fences;
+ struct i915_eb_fences *fences;
+ u64 __user *user_values;
+ u64 num_fences, num_user_fences = timeline_fences->fence_count;
+ unsigned long n;
+ int err = 0;
+
+ /* Check multiplication overflow for access_ok() and kvmalloc_array() */
+ BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
+ if (num_user_fences > min_t(unsigned long,
+ ULONG_MAX / sizeof(*user_fences),
+ SIZE_MAX / sizeof(*fences)))
+ return ERR_PTR(-EINVAL);
+
+ user_fences = u64_to_user_ptr(timeline_fences->handles_ptr);
+ if (!access_ok(user_fences, num_user_fences * sizeof(*user_fences)))
+ return ERR_PTR(-EFAULT);
+
+ user_values = u64_to_user_ptr(timeline_fences->values_ptr);
+ if (!access_ok(user_values, num_user_fences * sizeof(*user_values)))
+ return ERR_PTR(-EFAULT);
+
+ fences = kvmalloc_array(num_user_fences, sizeof(*fences),
+ __GFP_NOWARN | GFP_KERNEL);
+ if (!fences)
+ return ERR_PTR(-ENOMEM);
+
+ BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
+ ~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
+
+ for (n = 0, num_fences = 0; n < timeline_fences->fence_count; n++) {
+ struct drm_i915_gem_exec_fence user_fence;
+ struct drm_syncobj *syncobj;
+ struct dma_fence *fence = NULL;
+ u64 point;
+
+ if (__copy_from_user(&user_fence, user_fences++, sizeof(user_fence))) {
+ err = -EFAULT;
+ goto err;
+ }
+
+ if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) {
+ err = -EINVAL;
+ goto err;
+ }
+
+ if (__get_user(point, user_values++)) {
+ err = -EFAULT;
+ goto err;
+ }
+
+ syncobj = drm_syncobj_find(eb->file, user_fence.handle);
+ if (!syncobj) {
+ DRM_DEBUG("Invalid syncobj handle provided\n");
+ err = -ENOENT;
+ goto err;
+ }
+
+ fence = drm_syncobj_fence_get(syncobj);
+
+ if (!fence && user_fence.flags &&
+ !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
+ DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_syncobj_put(syncobj);
+ err = -EINVAL;
+ goto err;
+ }
+
+ if (fence)
+ err = dma_fence_chain_find_seqno(&fence, point);
+
+ if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
+ DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
+ drm_syncobj_put(syncobj);
+ goto err;
+ }
+
+ /* A point might have been signaled already and
+ * garbage collected from the timeline. In this case
+ * just ignore the point and carry on.
+ */
+ if (!fence && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
+ drm_syncobj_put(syncobj);
+ continue;
+ }
+
+ /*
+ * For timeline syncobjs we need to preallocate chains for
+ * later signaling.
+ */
+ if (point != 0 && user_fence.flags & I915_EXEC_FENCE_SIGNAL) {
+ /*
+ * Waiting and signaling the same point (when point !=
+ * 0) would break the timeline.
+ */
+ if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
+ DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
+ err = -EINVAL;
+ if (fence)
+ dma_fence_put(fence);
+ drm_syncobj_put(syncobj);
+ goto err;
+ }
+
+ fences[num_fences].chain_fence =
+ kmalloc(sizeof(*fences[num_fences].chain_fence),
+ GFP_KERNEL);
+ if (!fences[num_fences].chain_fence) {
+ drm_syncobj_put(syncobj);
+ err = -ENOMEM;
+ if (fence)
+ dma_fence_put(fence);
+ DRM_DEBUG("Unable to alloc chain_fence\n");
+ goto err;
+ }
+ } else {
+ fences[num_fences].chain_fence = NULL;
+ }
+
+ fences[num_fences].syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
+ fences[num_fences].dma_fence = fence;
+ fences[num_fences].value = point;
+ num_fences++;
+ }
+
+ *out_n_fences = num_fences;
+
+ return fences;
+
+err:
+ __free_fence_array(fences, num_fences);
+ return ERR_PTR(err);
+}
+
+static struct i915_eb_fences *
+get_legacy_fence_array(struct i915_execbuffer *eb,
+ int *out_n_fences)
{
- const unsigned long nfences = args->num_cliprects;
+ struct drm_i915_gem_execbuffer2 *args = eb->args;
struct drm_i915_gem_exec_fence __user *user;
- struct drm_syncobj **fences;
+ struct i915_eb_fences *fences;
+ const u32 num_fences = args->num_cliprects;
unsigned long n;
int err;
- if (!(args->flags & I915_EXEC_FENCE_ARRAY))
- return NULL;
+ *out_n_fences = num_fences;
/* Check multiplication overflow for access_ok() and kvmalloc_array() */
BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
- if (nfences > min_t(unsigned long,
- ULONG_MAX / sizeof(*user),
- SIZE_MAX / sizeof(*fences)))
+ if (*out_n_fences > min_t(unsigned long,
+ ULONG_MAX / sizeof(*user),
+ SIZE_MAX / sizeof(*fences)))
return ERR_PTR(-EINVAL);
user = u64_to_user_ptr(args->cliprects_ptr);
- if (!access_ok(user, nfences * sizeof(*user)))
+ if (!access_ok(user, *out_n_fences * sizeof(*user)))
return ERR_PTR(-EFAULT);
- fences = kvmalloc_array(nfences, sizeof(*fences),
+ fences = kvmalloc_array(*out_n_fences, sizeof(*fences),
__GFP_NOWARN | GFP_KERNEL);
if (!fences)
return ERR_PTR(-ENOMEM);
- for (n = 0; n < nfences; n++) {
- struct drm_i915_gem_exec_fence fence;
+ for (n = 0; n < *out_n_fences; n++) {
+ struct drm_i915_gem_exec_fence user_fence;
struct drm_syncobj *syncobj;
+ struct dma_fence *fence = NULL;
- if (__copy_from_user(&fence, user++, sizeof(fence))) {
+ if (__copy_from_user(&user_fence, user++, sizeof(user_fence))) {
err = -EFAULT;
goto err;
}
- if (fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) {
+ if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) {
err = -EINVAL;
goto err;
}
- syncobj = drm_syncobj_find(file, fence.handle);
+ syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
DRM_DEBUG("Invalid syncobj handle provided\n");
err = -ENOENT;
goto err;
}
+ if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
+ fence = drm_syncobj_fence_get(syncobj);
+ if (!fence) {
+ DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_syncobj_put(syncobj);
+ err = -EINVAL;
+ goto err;
+ }
+ }
+
BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
- fences[n] = ptr_pack_bits(syncobj, fence.flags, 2);
+ fences[n].syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
+ fences[n].dma_fence = fence;
+ fences[n].value = 0;
+ fences[n].chain_fence = NULL;
}
return fences;
@@ -2314,37 +2478,45 @@ get_fence_array(struct drm_i915_gem_execbuffer2 *args,
return ERR_PTR(err);
}
+static struct i915_eb_fences *
+get_fence_array(struct i915_execbuffer *eb, int *out_n_fences)
+{
+ if (eb->args->flags & I915_EXEC_FENCE_ARRAY)
+ return get_legacy_fence_array(eb, out_n_fences);
+
+ if (eb->extensions.flags & BIT_ULL(DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES))
+ return get_timeline_fence_array(eb, out_n_fences);
+
+ *out_n_fences = 0;
+ return NULL;
+}
+
static void
-put_fence_array(struct drm_i915_gem_execbuffer2 *args,
- struct drm_syncobj **fences)
+put_fence_array(struct i915_eb_fences *fences, int nfences)
{
if (fences)
- __free_fence_array(fences, args->num_cliprects);
+ __free_fence_array(fences, nfences);
}
static int
await_fence_array(struct i915_execbuffer *eb,
- struct drm_syncobj **fences)
+ struct i915_eb_fences *fences,
+ int nfences)
{
- const unsigned int nfences = eb->args->num_cliprects;
unsigned int n;
int err;
for (n = 0; n < nfences; n++) {
struct drm_syncobj *syncobj;
- struct dma_fence *fence;
unsigned int flags;
- syncobj = ptr_unpack_bits(fences[n], &flags, 2);
- if (!(flags & I915_EXEC_FENCE_WAIT))
- continue;
+ syncobj = ptr_unpack_bits(fences[n].syncobj, &flags, 2);
- fence = drm_syncobj_fence_get(syncobj);
- if (!fence)
- return -EINVAL;
+ if (!fences[n].dma_fence)
+ continue;
- err = i915_request_await_dma_fence(eb->request, fence);
- dma_fence_put(fence);
+ err = i915_request_await_dma_fence(eb->request,
+ fences[n].dma_fence);
if (err < 0)
return err;
}
@@ -2354,9 +2526,9 @@ await_fence_array(struct i915_execbuffer *eb,
static void
signal_fence_array(struct i915_execbuffer *eb,
- struct drm_syncobj **fences)
+ struct i915_eb_fences *fences,
+ int nfences)
{
- const unsigned int nfences = eb->args->num_cliprects;
struct dma_fence * const fence = &eb->request->fence;
unsigned int n;
@@ -2364,14 +2536,44 @@ signal_fence_array(struct i915_execbuffer *eb,
struct drm_syncobj *syncobj;
unsigned int flags;
- syncobj = ptr_unpack_bits(fences[n], &flags, 2);
+ syncobj = ptr_unpack_bits(fences[n].syncobj, &flags, 2);
if (!(flags & I915_EXEC_FENCE_SIGNAL))
continue;
- drm_syncobj_replace_fence(syncobj, fence);
+ if (fences[n].chain_fence) {
+ drm_syncobj_add_point(syncobj, fences[n].chain_fence,
+ fence, fences[n].value);
+ /*
+ * The chain's ownership is transferred to the
+ * timeline.
+ */
+ fences[n].chain_fence = NULL;
+ } else {
+ drm_syncobj_replace_fence(syncobj, fence);
+ }
}
}
+static int parse_timeline_fences(struct i915_user_extension __user *ext, void *data)
+{
+ struct i915_execbuffer *eb = data;
+
+ /* Timeline fences are incompatible with the fence array flag. */
+ if (eb->args->flags & I915_EXEC_FENCE_ARRAY)
+ return -EINVAL;
+
+ if (eb->extensions.flags & BIT_ULL(DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES))
+ return -EINVAL;
+
+ if (copy_from_user(&eb->extensions.timeline_fences, ext,
+ sizeof(eb->extensions.timeline_fences)))
+ return -EFAULT;
+
+ eb->extensions.flags |= BIT_ULL(DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES);
+
+ return 0;
+}
+
static void retire_requests(struct intel_timeline *tl, struct i915_request *end)
{
struct i915_request *rq, *rn;
@@ -2438,6 +2640,7 @@ static void eb_request_add(struct i915_execbuffer *eb)
}
static const i915_user_extension_fn execbuf_extensions[] = {
+ [DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES] = parse_timeline_fences,
};
static int
@@ -2468,16 +2671,17 @@ static int
i915_gem_do_execbuffer(struct drm_device *dev,
struct drm_file *file,
struct drm_i915_gem_execbuffer2 *args,
- struct drm_i915_gem_exec_object2 *exec,
- struct drm_syncobj **fences)
+ struct drm_i915_gem_exec_object2 *exec)
{
struct drm_i915_private *i915 = to_i915(dev);
struct i915_execbuffer eb;
struct dma_fence *in_fence = NULL;
struct dma_fence *exec_fence = NULL;
struct sync_file *out_fence = NULL;
+ struct i915_eb_fences *fences = NULL;
struct i915_vma *batch;
int out_fence_fd = -1;
+ int nfences = 0;
int err;
BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS);
@@ -2521,10 +2725,16 @@ i915_gem_do_execbuffer(struct drm_device *dev,
if (err)
return err;
+ fences = get_fence_array(&eb, &nfences);
+ if (IS_ERR(fences))
+ return PTR_ERR(fences);
+
if (args->flags & I915_EXEC_FENCE_IN) {
in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
- if (!in_fence)
- return -EINVAL;
+ if (!in_fence) {
+ err = -EINVAL;
+ goto err_fences;
+ }
}
if (args->flags & I915_EXEC_FENCE_SUBMIT) {
@@ -2648,7 +2858,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
}
if (fences) {
- err = await_fence_array(&eb, fences);
+ err = await_fence_array(&eb, fences, nfences);
if (err)
goto err_request;
}
@@ -2680,7 +2890,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
eb_request_add(&eb);
if (fences)
- signal_fence_array(&eb, fences);
+ signal_fence_array(&eb, fences, nfences);
if (out_fence) {
if (err == 0) {
@@ -2715,6 +2925,8 @@ i915_gem_do_execbuffer(struct drm_device *dev,
dma_fence_put(exec_fence);
err_in_fence:
dma_fence_put(in_fence);
+err_fences:
+ put_fence_array(fences, nfences);
return err;
}
@@ -2809,7 +3021,7 @@ i915_gem_execbuffer_ioctl(struct drm_device *dev, void *data,
exec2_list[i].flags = 0;
}
- err = i915_gem_do_execbuffer(dev, file, &exec2, exec2_list, NULL);
+ err = i915_gem_do_execbuffer(dev, file, &exec2, exec2_list);
if (exec2.flags & __EXEC_HAS_RELOC) {
struct drm_i915_gem_exec_object __user *user_exec_list =
u64_to_user_ptr(args->buffers_ptr);
@@ -2841,7 +3053,6 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
struct drm_i915_private *i915 = to_i915(dev);
struct drm_i915_gem_execbuffer2 *args = data;
struct drm_i915_gem_exec_object2 *exec2_list;
- struct drm_syncobj **fences = NULL;
const size_t count = args->buffer_count;
int err;
@@ -2869,15 +3080,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
return -EFAULT;
}
- if (args->flags & I915_EXEC_FENCE_ARRAY) {
- fences = get_fence_array(args, file);
- if (IS_ERR(fences)) {
- kvfree(exec2_list);
- return PTR_ERR(fences);
- }
- }
-
- err = i915_gem_do_execbuffer(dev, file, args, exec2_list, fences);
+ err = i915_gem_do_execbuffer(dev, file, args, exec2_list);
/*
* Now that we have begun execution of the batchbuffer, we ignore
@@ -2917,7 +3120,6 @@ end:;
}
args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS;
- put_fence_array(args, fences);
kvfree(exec2_list);
return err;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a7a3b4b98572..f7f868c3c510 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1828,7 +1828,8 @@ static struct drm_driver driver = {
*/
.driver_features =
DRIVER_GEM |
- DRIVER_RENDER | DRIVER_MODESET | DRIVER_ATOMIC | DRIVER_SYNCOBJ,
+ DRIVER_RENDER | DRIVER_MODESET | DRIVER_ATOMIC | DRIVER_SYNCOBJ |
+ DRIVER_SYNCOBJ_TIMELINE,
.release = i915_driver_release,
.open = i915_driver_open,
.lastclose = i915_driver_lastclose,
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 54fce81d5724..b9d3aab53c03 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -132,6 +132,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
case I915_PARAM_HAS_EXEC_BATCH_FIRST:
case I915_PARAM_HAS_EXEC_FENCE_ARRAY:
case I915_PARAM_HAS_EXEC_SUBMIT_FENCE:
+ case I915_PARAM_HAS_EXEC_TIMELINE_FENCES:
/* For the time being all of these are always true;
* if some supported hardware does not have one of these
* features this value needs to be provided from
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 7ea38aa6502c..7b8680e3b49d 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -619,6 +619,12 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_PERF_REVISION 54
+/* Query whether DRM_I915_GEM_EXECBUFFER2 supports supplying an array of
+ * timeline syncobj through drm_i915_gem_execbuf_ext_timeline_fences. See
+ * I915_EXEC_USE_EXTENSIONS.
+ */
+#define I915_PARAM_HAS_EXEC_TIMELINE_FENCES 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
@@ -1047,9 +1053,41 @@ struct drm_i915_gem_exec_fence {
};
enum drm_i915_gem_execbuffer_ext {
+ /**
+ * See drm_i915_gem_execbuf_ext_timeline_fences.
+ */
+ DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES = 1,
+
DRM_I915_GEM_EXECBUFFER_EXT_MAX /* non-ABI */
};
+/**
+ * This structure describes an array of drm_syncobj and associated points for
+ * timeline variants of drm_syncobj. It is invalid to append this structure to
+ * the execbuf if I915_EXEC_FENCE_ARRAY is set.
+ */
+struct drm_i915_gem_execbuffer_ext_timeline_fences {
+ struct i915_user_extension base;
+
+ /**
+ * Number of element in the handles_ptr & value_ptr arrays.
+ */
+ __u64 fence_count;
+
+ /**
+ * Pointer to an array of struct drm_i915_gem_exec_fence of length
+ * fence_count.
+ */
+ __u64 handles_ptr;
+
+ /**
+ * Pointer to an array of u64 values of length fence_count. Values
+ * must be 0 for a binary drm_syncobj. A Value of 0 for a timeline
+ * drm_syncobj is invalid as it turns a drm_syncobj into a binary one.
+ */
+ __u64 values_ptr;
+};
+
struct drm_i915_gem_execbuffer2 {
/**
* List of gem_exec_object2 structs
--
2.21.0.5.gaeb582a983
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences
2020-04-10 16:51 [Intel-gfx] [PATCH 1/4] drm/i915: introduce a mechanism to extend execbuf2 Venkata Sandeep Dhanalakota
2020-04-10 16:51 ` [Intel-gfx] [PATCH 2/4] drm/i915: add syncobj timeline support Venkata Sandeep Dhanalakota
@ 2020-04-10 16:51 ` Venkata Sandeep Dhanalakota
2020-04-11 5:09 ` kbuild test robot
2020-04-11 8:50 ` Lionel Landwerlin
2020-04-10 16:51 ` [Intel-gfx] [PATCH 4/4] drm/selftests: selftest for timeline semaphore Venkata Sandeep Dhanalakota
` (3 subsequent siblings)
5 siblings, 2 replies; 14+ messages in thread
From: Venkata Sandeep Dhanalakota @ 2020-04-10 16:51 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson
From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To allow faster engine to engine synchronization, peel the layer of
dma-fence-chain to expose potential i915 fences so that the
i915-request code can emit HW semaphore wait/signal operations in the
ring which is faster than waking up the host to submit unblocked
workloads after interrupt notification.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 39 +++++++++++++++++--
1 file changed, 35 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 8dd651cdca39..e43b76d7e9fd 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2508,6 +2508,7 @@ await_fence_array(struct i915_execbuffer *eb,
for (n = 0; n < nfences; n++) {
struct drm_syncobj *syncobj;
+ struct dma_fence_chain *chain;
unsigned int flags;
syncobj = ptr_unpack_bits(fences[n].syncobj, &flags, 2);
@@ -2515,10 +2516,40 @@ await_fence_array(struct i915_execbuffer *eb,
if (!fences[n].dma_fence)
continue;
- err = i915_request_await_dma_fence(eb->request,
- fences[n].dma_fence);
- if (err < 0)
- return err;
+ /*
+ * If we're dealing with a dma-fence-chain, peel the chain by
+ * adding all of the unsignaled fences
+ * (dma_fence_chain_for_each does that for us) the chain
+ * points to.
+ *
+ * This enables us to identify waits on i915 fences and allows
+ * for faster engine-to-engine synchronization using HW
+ * semaphores.
+ */
+ chain = to_dma_fence_chain(fences[n].dma_fence);
+ if (chain) {
+ struct dma_fence *iter;
+
+ dma_fence_chain_for_each(iter, fences[n].dma_fence) {
+ struct dma_fence_chain *iter_chain =
+ to_dma_fence_chain(iter);
+
+ GEM_BUG_ON(!iter_chain);
+
+ err = i915_request_await_dma_fence(eb->request,
+ iter_chain->fence);
+ if (err < 0) {
+ dma_fence_put(iter);
+ return err;
+ }
+ }
+
+ } else {
+ err = i915_request_await_dma_fence(eb->request,
+ fences[n].dma_fence);
+ if (err < 0)
+ return err;
+ }
}
return 0;
--
2.21.0.5.gaeb582a983
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 4/4] drm/selftests: selftest for timeline semaphore
2020-04-10 16:51 [Intel-gfx] [PATCH 1/4] drm/i915: introduce a mechanism to extend execbuf2 Venkata Sandeep Dhanalakota
2020-04-10 16:51 ` [Intel-gfx] [PATCH 2/4] drm/i915: add syncobj timeline support Venkata Sandeep Dhanalakota
2020-04-10 16:51 ` [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences Venkata Sandeep Dhanalakota
@ 2020-04-10 16:51 ` Venkata Sandeep Dhanalakota
2020-04-10 21:11 ` kbuild test robot
2020-04-14 13:19 ` Lionel Landwerlin
2020-04-10 16:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: introduce a mechanism to extend execbuf2 Patchwork
` (2 subsequent siblings)
5 siblings, 2 replies; 14+ messages in thread
From: Venkata Sandeep Dhanalakota @ 2020-04-10 16:51 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson
simple tests using drm api for timeline semaphore.
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
---
drivers/gpu/drm/selftests/Makefile | 2 +-
.../drm/selftests/drm_timeline_selftests.h | 16 +
.../selftests/test-drm_timeline_semaphore.c | 545 ++++++++++++++++++
3 files changed, 562 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/selftests/drm_timeline_selftests.h
create mode 100644 drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c
diff --git a/drivers/gpu/drm/selftests/Makefile b/drivers/gpu/drm/selftests/Makefile
index 0856e4b12f70..5bceef7c9d02 100644
--- a/drivers/gpu/drm/selftests/Makefile
+++ b/drivers/gpu/drm/selftests/Makefile
@@ -4,4 +4,4 @@ test-drm_modeset-y := test-drm_modeset_common.o test-drm_plane_helper.o \
test-drm_damage_helper.o test-drm_dp_mst_helper.o \
test-drm_rect.o
-obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-drm_modeset.o test-drm_cmdline_parser.o
+obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-drm_modeset.o test-drm_cmdline_parser.o test-drm_timeline_semaphore.o
diff --git a/drivers/gpu/drm/selftests/drm_timeline_selftests.h b/drivers/gpu/drm/selftests/drm_timeline_selftests.h
new file mode 100644
index 000000000000..8922a1eed525
--- /dev/null
+++ b/drivers/gpu/drm/selftests/drm_timeline_selftests.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* List each unit test as selftest(name, function)
+ *
+ * The name is used as both an enum and expanded as igt__name to create
+ * a module parameter. It must be unique and legal for a C identifier.
+ *
+ * Tests are executed in order by igt/drm_timeline_selftests
+ */
+selftest(sanitycheck, igt_sanitycheck) /* keep first (selfcheck for igt) */
+selftest(chainbasic, igt_chainbasic)
+selftest(waitchain, igt_waitchain)
+selftest(signalseqno, igt_signalseqno)
+selftest(waitseqno, igt_waitseqno)
+selftest(addunorder, igt_addunorder)
+selftest(findseqno, igt_findseqno)
+selftest(igt_forward, igt_forward)
diff --git a/drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c b/drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c
new file mode 100644
index 000000000000..8a964d302e42
--- /dev/null
+++ b/drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c
@@ -0,0 +1,545 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Test cases for the timeline semaphore
+ */
+
+#define pr_fmt(fmt) "drm_tl: " fmt
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/vmalloc.h>
+#include <linux/slab.h>
+#include <linux/mm.h>
+#include <linux/kthread.h>
+#include <linux/sched/signal.h>
+
+#include <drm/drm_syncobj.h>
+#include <linux/dma-fence.h>
+#include <linux/dma-fence-chain.h>
+
+#include "../lib/drm_random.h"
+
+#define TESTS "drm_timeline_selftests.h"
+#include "drm_selftest.h"
+
+#define MAX_TIMELINES 64
+#define MAX_THREADS (2 * MAX_TIMELINES)
+
+static struct kmem_cache *slab_timeline;
+static struct kmem_cache *slab_fence_chain;
+
+struct mock_timeline {
+ struct drm_syncobj *syncobj;
+
+ /* cb when base is signalled */
+ struct dma_fence_cb cb;
+ struct dma_fence base;
+ /* lock for dma_fence */
+ spinlock_t lock;
+ u64 point;
+ u32 flags;
+};
+
+struct fence_chain {
+ struct dma_fence_chain chain;
+ struct dma_fence fence;
+ /* cb when fence is signalled */
+ struct dma_fence_cb cb;
+ atomic_t signalers;
+ spinlock_t lock;
+};
+
+struct chain_info {
+ struct fence_chain **chains;
+ int nchains;
+};
+
+static const char *mock_name(struct dma_fence *s)
+{
+ return "timeline";
+}
+
+static void mock_release(struct dma_fence *fence)
+{
+ pr_debug("release %lld\n",fence->seqno);
+}
+
+static const struct dma_fence_ops mock_ops = {
+ .get_driver_name = mock_name,
+ .get_timeline_name = mock_name,
+ .release = mock_release,
+};
+
+static void fence_callback(struct dma_fence *f, struct dma_fence_cb *cb)
+{
+ struct fence_chain *t =
+ container_of(cb, struct fence_chain, cb);
+
+ if (atomic_dec_and_test(&t->signalers))
+ dma_fence_signal(&t->fence);
+}
+
+static void timeline_callback(struct dma_fence *f, struct dma_fence_cb *cb)
+{
+ struct mock_timeline *t =
+ container_of(cb, struct mock_timeline, cb);
+ dma_fence_signal(&t->base);
+}
+
+static struct mock_timeline *timeline(u64 point, u32 flags)
+{
+ struct mock_timeline *t;
+
+ t = kmem_cache_alloc(slab_timeline, GFP_KERNEL | __GFP_ZERO);
+ if (!t)
+ return NULL;
+
+ spin_lock_init(&t->lock);
+ dma_fence_init(&t->base, &mock_ops, &t->lock, 0, point);
+ drm_syncobj_create(&t->syncobj, flags, dma_fence_get(&t->base));
+ t->point = point;
+
+ return t;
+}
+
+static struct fence_chain* fence_chain(struct dma_fence *prev,
+ u64 seqno)
+{
+ struct fence_chain *f;
+
+ f = kmem_cache_alloc(slab_fence_chain, GFP_KERNEL | __GFP_ZERO);
+
+ if (!f)
+ return NULL;
+
+ spin_lock_init(&f->lock);
+ dma_fence_init(&f->fence, &mock_ops,
+ &f->lock, 0, seqno);
+ dma_fence_chain_init(&f->chain,
+ prev,
+ dma_fence_get(&f->fence),
+ seqno);
+
+ return f;
+}
+
+static void allocate_chains(struct chain_info *ci, int count, int start)
+{
+ struct dma_fence *prev_chain = NULL;
+ struct fence_chain **chains;
+ int i;
+
+ ci->chains = kvmalloc_array(count, sizeof(struct fence_chain *),
+ GFP_KERNEL | __GFP_ZERO);
+ if (!ci->chains)
+ return;
+
+ chains = ci->chains;
+ ci->nchains = count;
+ for (i = 0;i < ci->nchains; i++) {
+ chains[i] = fence_chain(prev_chain, start + i);
+ prev_chain = &chains[i]->chain.base;
+ dma_fence_get(prev_chain);
+ }
+}
+
+static void delete_chains(struct chain_info *ci)
+{
+ int i;
+
+ for (i = 0; i < ci->nchains; i++) {
+ dma_fence_release(&ci->chains[i]->fence.refcount);
+ kmem_cache_free(slab_fence_chain, ci->chains[i]);
+ }
+ kvfree(ci->chains);
+}
+
+static int igt_sanitycheck(void *ignored)
+{
+ struct mock_timeline *t;
+ struct dma_fence *f;
+ int err = 0;
+
+ t = timeline(1, 0);
+
+ if (!t)
+ return -ENOMEM;
+
+ dma_fence_signal(&t->base);
+
+ f = drm_syncobj_fence_get(t->syncobj);
+ if (!dma_fence_is_signaled(f))
+ err = -1;
+
+ dma_fence_put(&t->base);
+ drm_syncobj_put(t->syncobj);
+ kmem_cache_free(slab_timeline, t);
+ return err;
+}
+
+static int igt_chainbasic(void *ignored)
+{
+ struct fence_chain *last, *chain;
+ struct dma_fence *first = NULL;
+ struct chain_info ci;
+ int i, count = 10;
+ int err = 0;
+
+ allocate_chains(&ci, count, 0);
+ if (IS_ERR_OR_NULL(ci.chains))
+ return -ENOMEM;
+
+ chain = ci.chains[0];
+ first = &chain->fence;
+
+ for (i = 1; i < count; i++) {
+ chain = ci.chains[i];
+ dma_fence_signal(&chain->fence);
+ last = chain;
+ }
+ dma_fence_signal(first);
+
+ if (!dma_fence_is_signaled(&last->chain.base))
+ err = -1;
+
+ delete_chains(&ci);
+ return err;
+}
+
+static int igt_findseqno(void *ignored)
+{
+ struct dma_fence *f, *first;
+ struct chain_info ci;
+ int count = 15, start = 3;
+ int err = 0;
+
+ allocate_chains(&ci, count, start);
+ if (IS_ERR_OR_NULL(ci.chains))
+ return -ENOMEM;
+
+ f = &ci.chains[count - 1]->chain.base;
+ first = &ci.chains[0]->chain.base;
+
+ dma_fence_chain_find_seqno(&f, 1);
+ if (f && f != first) {
+ pr_err("Incorrect chain-fence.seqno:%lld reported for completed seqno:1\n",
+ f->seqno);
+ dma_fence_get(f);
+ err = dma_fence_chain_find_seqno(&f, start);
+ dma_fence_put(f);
+ if (err) {
+ pr_err("Reported %d for finding self!\n", err);
+ err = -EINVAL;
+ }
+ }
+
+ delete_chains(&ci);
+ return err;
+}
+
+static int igt_waitchain(void *ignored)
+{
+ struct fence_chain *last;
+ struct chain_info ci;
+ struct mock_timeline *t;
+ struct dma_fence *f;
+ int count = 10, i;
+ int start = 7;
+ int err = 0;
+
+ t = timeline(start, 0x0);
+
+ if (!t)
+ return -ENOMEM;
+
+ allocate_chains(&ci, count, start + 1);
+ if (IS_ERR_OR_NULL(ci.chains))
+ return -ENOMEM;
+
+ last = ci.chains[count - 1];
+ drm_syncobj_replace_fence(t->syncobj, &last->chain.base);
+
+ f = drm_syncobj_fence_get(t->syncobj);
+ if(dma_fence_is_signaled(f)) {
+ err = -1;
+ goto err;
+ }
+
+ for (i = 0; i < count; i++)
+ dma_fence_signal(&ci.chains[i]->fence);
+
+ if(!dma_fence_is_signaled(f))
+ err = -1;
+err:
+ delete_chains(&ci);
+ drm_syncobj_put(t->syncobj);
+ kmem_cache_free(slab_timeline, t);
+ return err;
+}
+
+static int igt_signalseqno(void *ignored)
+{
+ struct fence_chain *wait;
+ struct chain_info ci;
+ struct mock_timeline *t[6];
+ struct dma_fence *f;
+ int i, count = 5;
+ int err = 0;
+
+ allocate_chains(&ci, 1, 0);
+ if (IS_ERR_OR_NULL(ci.chains))
+ return -ENOMEM;
+
+ wait = ci.chains[0];
+
+ for (i = 0;i < count; i++) {
+ t[i] = timeline(i, 0x0);
+ dma_fence_add_callback(&wait->fence,
+ &t[i]->cb,
+ timeline_callback);
+ }
+
+ /* wait for available */
+ for (i = 0; i < count; i++) {
+ f = drm_syncobj_fence_get(t[i]->syncobj);
+ if(dma_fence_is_signaled(f)) {
+ err = -1;
+ goto err;
+ }
+ }
+
+ dma_fence_signal(&wait->fence);
+ for (i = 0; i < count; i++) {
+ f = drm_syncobj_fence_get(t[i]->syncobj);
+ if(!dma_fence_is_signaled(f))
+ err = -1;
+ }
+
+err:
+ for (i = 0;i < count; i++) {
+ drm_syncobj_free(&t[i]->syncobj->refcount);
+ kmem_cache_free(slab_timeline, t[i]);
+ }
+
+ delete_chains(&ci);
+ return err;
+}
+
+static int igt_waitseqno(void *ignored)
+{
+ struct fence_chain *signal;
+ struct mock_timeline *t[6];
+ struct chain_info ci;
+ struct dma_fence *f;
+ int i, count = 5;
+ int err = 0;
+
+ allocate_chains(&ci, 1, 0);
+ if (IS_ERR_OR_NULL(ci.chains))
+ return -ENOMEM;
+
+ signal = ci.chains[0];
+ atomic_set(&signal->signalers, count);
+
+ /* wait for submit */
+ for (i = 0;i < count; i++) {
+ t[i] = timeline(i, 0x0);
+ dma_fence_add_callback(t[i]->syncobj->fence,
+ &signal->cb,
+ fence_callback);
+ }
+
+ for (i = 0;i < count; i++) {
+ if(dma_fence_is_signaled(&signal->chain.base))
+ err = -1;
+
+ f = drm_syncobj_fence_get(t[i]->syncobj);
+ dma_fence_signal(f);
+ }
+
+ if(!dma_fence_is_signaled(&signal->chain.base))
+ err = -1;
+
+ for (i = 0;i < count; i++) {
+ dma_fence_put(t[i]->syncobj->fence);
+ kmem_cache_free(slab_timeline, t[i]);
+ }
+ delete_chains(&ci);
+ return err;
+}
+
+static int igt_addunorder(void *ignored)
+{
+ struct fence_chain *wait;
+ struct chain_info ci;
+ struct mock_timeline *t;
+ struct dma_fence *f;
+ int err = 0;
+
+ t = timeline(6, 0x0);
+ allocate_chains(&ci, 1, 2);
+ wait = ci.chains[0];
+ if (IS_ERR_OR_NULL(ci.chains))
+ return -ENOMEM;
+
+ drm_syncobj_add_point(t->syncobj, &wait->chain, &wait->fence, 2);
+
+ dma_fence_signal(&wait->fence);
+ f = drm_syncobj_fence_get(t->syncobj);
+ if (dma_fence_is_signaled(&wait->chain.base)) {
+ err = -1;
+ goto err;
+ }
+
+ dma_fence_signal(f);
+ if (!dma_fence_is_signaled(&wait->chain.base)) {
+ err = -1;
+ goto err;
+ }
+err:
+ delete_chains(&ci);
+ drm_syncobj_put(t->syncobj);
+ kmem_cache_free(slab_timeline, t);
+ return err;
+}
+
+static int __signal_timeline(void *arg)
+{
+ struct mock_timeline *timeline = arg;
+ struct dma_fence *f;
+
+ f = drm_syncobj_fence_get(timeline->syncobj);
+
+ if (f && dma_fence_wait(f, true)){
+ drm_syncobj_put(timeline->syncobj);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int __wait_timeline(void *arg)
+{
+ struct mock_timeline *timeline = arg;
+ struct dma_fence *f;
+
+ f = drm_syncobj_fence_get(timeline->syncobj);
+ dma_fence_signal(f);
+
+ return 0;
+}
+
+static int igt_forward(void *ignored)
+{
+ struct mock_timeline *s[MAX_TIMELINES], *t[MAX_TIMELINES];
+ struct task_struct *tasks[MAX_THREADS], *tsk;
+ struct chain_info ci, c[MAX_TIMELINES];
+ struct fence_chain *chain, *signaler;
+ int i, err = 0, count = 0;
+ struct dma_fence *last;
+
+ //signaler will signal the points in timelines;
+ allocate_chains(&ci, 1, 21);
+ signaler = ci.chains[0];
+
+ dma_fence_get(&signaler->fence);
+ for (i = 0;i < MAX_TIMELINES; i++) {
+ s[i] = timeline(i, 0x0);
+ drm_syncobj_replace_fence(s[i]->syncobj, &signaler->fence);
+ tsk = kthread_run(__signal_timeline, s[i], "signal");
+ if (IS_ERR(tsk)) {
+ err = PTR_ERR(tsk);
+ goto err;
+ }
+ get_task_struct(tsk);
+ yield_to(tsk, true);
+ tasks[count++] = tsk;
+ }
+
+ atomic_set(&signaler->signalers, MAX_TIMELINES);
+ for (i = 0;i < MAX_TIMELINES; i++) {
+
+ allocate_chains(&c[i], 1, i);
+ t[i] = timeline(i, 0x0);
+ chain = c[i].chains[0];
+
+ drm_syncobj_replace_fence(t[i]->syncobj,
+ dma_fence_get(&chain->fence));
+ last = &chain->chain.base;
+ dma_fence_add_callback(t[i]->syncobj->fence,
+ &signaler->cb,
+ fence_callback);
+ tsk = kthread_run(__wait_timeline, t[i], "wait");
+ if (IS_ERR(tsk)) {
+ err = PTR_ERR(tsk);
+ goto err;
+ }
+ get_task_struct(tsk);
+ yield_to(tsk, true);
+ tasks[count++] = tsk;
+ }
+
+ dma_fence_wait(last, true);
+ dma_fence_wait(&signaler->fence, true);
+ dma_fence_put(&signaler->fence);
+err:
+ for (i = 0;i < count; i++) {
+ int ret;
+
+ ret = kthread_stop(tasks[i]);
+ if (ret && !err)
+ err = ret;
+ put_task_struct(tasks[i]);
+ }
+
+ for (i = 0; i < MAX_TIMELINES; i++) {
+ chain = c[i].chains[0];
+
+ if (!dma_fence_get_status(&chain->chain.base) ||
+ !dma_fence_get_status(&chain->fence)) {
+ pr_err("Freeing an unsignaled fence\n");
+ err = -1;
+ }
+ delete_chains(&c[i]);
+ kmem_cache_free(slab_timeline, t[i]);
+ kmem_cache_free(slab_timeline, s[i]);
+ }
+ delete_chains(&ci);
+ return err;
+}
+
+#include "drm_selftest.c"
+
+static int __init test_drm_timline_init(void)
+{
+ int err = 0;
+
+ slab_timeline = KMEM_CACHE(mock_timeline,
+ SLAB_TYPESAFE_BY_RCU |
+ SLAB_HWCACHE_ALIGN);
+
+ slab_fence_chain = KMEM_CACHE(fence_chain,
+ SLAB_TYPESAFE_BY_RCU |
+ SLAB_HWCACHE_ALIGN);
+ if (!slab_timeline)
+ return -ENOMEM;
+
+ pr_info("Testing timeline semaphore\n");
+ err = run_selftests(selftests, ARRAY_SIZE(selftests), NULL);
+
+ return err > 0 ? 0 : err;
+}
+
+static void __exit test_drm_timeline_exit(void)
+{
+ kmem_cache_destroy(slab_timeline);
+ kmem_cache_destroy(slab_fence_chain);
+}
+
+module_init(test_drm_timline_init);
+module_exit(test_drm_timeline_exit);
+
+MODULE_AUTHOR("Intel Corporation");
+MODULE_LICENSE("GPL");
--
2.21.0.5.gaeb582a983
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: introduce a mechanism to extend execbuf2
2020-04-10 16:51 [Intel-gfx] [PATCH 1/4] drm/i915: introduce a mechanism to extend execbuf2 Venkata Sandeep Dhanalakota
` (2 preceding siblings ...)
2020-04-10 16:51 ` [Intel-gfx] [PATCH 4/4] drm/selftests: selftest for timeline semaphore Venkata Sandeep Dhanalakota
@ 2020-04-10 16:59 ` Patchwork
2020-04-10 17:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-04-10 17:23 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2020-04-10 16:59 UTC (permalink / raw)
To: Venkata Sandeep Dhanalakota; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: introduce a mechanism to extend execbuf2
URL : https://patchwork.freedesktop.org/series/75810/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f52f98b82c3b drm/i915: introduce a mechanism to extend execbuf2
-:141: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#141: FILE: include/uapi/drm/i915_drm.h:1204:
+#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_USE_EXTENSIONS<<1))
^
total: 0 errors, 0 warnings, 1 checks, 113 lines checked
8171b3a56b0a drm/i915: add syncobj timeline support
-:26: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#26:
https://lists.freedesktop.org/archives/dri-devel/2019-August/229287.html
total: 0 errors, 1 warnings, 0 checks, 555 lines checked
d387ab6f223d drm/i915: peel dma-fence-chains wait fences
2856c1eadad1 drm/selftests: selftest for timeline semaphore
-:21: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#21:
new file mode 100644
-:98: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#98: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:51:
+ spinlock_t lock;
-:113: ERROR:SPACING: space required after that ',' (ctx:VxV)
#113: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:66:
+ pr_debug("release %lld\n",fence->seqno);
^
-:154: ERROR:POINTER_LOCATION: "foo* bar" should be "foo *bar"
#154: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:107:
+static struct fence_chain* fence_chain(struct dma_fence *prev,
-:155: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#155: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:108:
+static struct fence_chain* fence_chain(struct dma_fence *prev,
+ u64 seqno)
-:166: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#166: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:119:
+ dma_fence_init(&f->fence, &mock_ops,
+ &f->lock, 0, seqno);
-:182: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#182: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:135:
+ ci->chains = kvmalloc_array(count, sizeof(struct fence_chain *),
+ GFP_KERNEL | __GFP_ZERO);
-:188: ERROR:SPACING: space required after that ';' (ctx:VxV)
#188: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:141:
+ for (i = 0;i < ci->nchains; i++) {
^
-:275: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#275: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:228:
+ pr_err("Incorrect chain-fence.seqno:%lld reported for completed seqno:1\n",
+ f->seqno);
-:312: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (8, 17)
#312: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:265:
+ if(dma_fence_is_signaled(f)) {
+ err = -1;
-:312: ERROR:SPACING: space required before the open parenthesis '('
#312: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:265:
+ if(dma_fence_is_signaled(f)) {
-:314: WARNING:TABSTOP: Statements should start on a tabstop
#314: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:267:
+ goto err;
-:320: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (8, 17)
#320: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:273:
+ if(!dma_fence_is_signaled(f))
+ err = -1;
-:320: ERROR:SPACING: space required before the open parenthesis '('
#320: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:273:
+ if(!dma_fence_is_signaled(f))
-:344: ERROR:SPACING: space required after that ';' (ctx:VxV)
#344: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:297:
+ for (i = 0;i < count; i++) {
^
-:354: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (16, 25)
#354: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:307:
+ if(dma_fence_is_signaled(f)) {
+ err = -1;
-:354: ERROR:SPACING: space required before the open parenthesis '('
#354: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:307:
+ if(dma_fence_is_signaled(f)) {
-:356: WARNING:TABSTOP: Statements should start on a tabstop
#356: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:309:
+ goto err;
-:363: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (16, 25)
#363: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:316:
+ if(!dma_fence_is_signaled(f))
+ err = -1;
-:363: ERROR:SPACING: space required before the open parenthesis '('
#363: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:316:
+ if(!dma_fence_is_signaled(f))
-:368: ERROR:SPACING: space required after that ';' (ctx:VxV)
#368: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:321:
+ for (i = 0;i < count; i++) {
^
-:394: ERROR:SPACING: space required after that ';' (ctx:VxV)
#394: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:347:
+ for (i = 0;i < count; i++) {
^
-:401: ERROR:SPACING: space required after that ';' (ctx:VxV)
#401: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:354:
+ for (i = 0;i < count; i++) {
^
-:402: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (16, 25)
#402: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:355:
+ if(dma_fence_is_signaled(&signal->chain.base))
+ err = -1;
-:402: ERROR:SPACING: space required before the open parenthesis '('
#402: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:355:
+ if(dma_fence_is_signaled(&signal->chain.base))
-:409: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (8, 17)
#409: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:362:
+ if(!dma_fence_is_signaled(&signal->chain.base))
+ err = -1;
-:409: ERROR:SPACING: space required before the open parenthesis '('
#409: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:362:
+ if(!dma_fence_is_signaled(&signal->chain.base))
-:412: ERROR:SPACING: space required after that ';' (ctx:VxV)
#412: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:365:
+ for (i = 0;i < count; i++) {
^
-:462: ERROR:SPACING: space required before the open brace '{'
#462: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:415:
+ if (f && dma_fence_wait(f, true)){
-:495: ERROR:SPACING: space required after that ';' (ctx:VxV)
#495: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:448:
+ for (i = 0;i < MAX_TIMELINES; i++) {
^
-:509: ERROR:SPACING: space required after that ';' (ctx:VxV)
#509: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:462:
+ for (i = 0;i < MAX_TIMELINES; i++) {
^
-:510: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#510: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:463:
+ for (i = 0;i < MAX_TIMELINES; i++) {
+
-:519: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#519: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:472:
+ dma_fence_add_callback(t[i]->syncobj->fence,
+ &signaler->cb,
-:535: ERROR:SPACING: space required after that ';' (ctx:VxV)
#535: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:488:
+ for (i = 0;i < count; i++) {
^
-:567: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#567: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:520:
+ slab_timeline = KMEM_CACHE(mock_timeline,
+ SLAB_TYPESAFE_BY_RCU |
-:571: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#571: FILE: drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:524:
+ slab_fence_chain = KMEM_CACHE(fence_chain,
+ SLAB_TYPESAFE_BY_RCU |
total: 18 errors, 9 warnings, 9 checks, 566 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: introduce a mechanism to extend execbuf2
2020-04-10 16:51 [Intel-gfx] [PATCH 1/4] drm/i915: introduce a mechanism to extend execbuf2 Venkata Sandeep Dhanalakota
` (3 preceding siblings ...)
2020-04-10 16:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: introduce a mechanism to extend execbuf2 Patchwork
@ 2020-04-10 17:01 ` Patchwork
2020-04-10 17:23 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2020-04-10 17:01 UTC (permalink / raw)
To: Venkata Sandeep Dhanalakota; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: introduce a mechanism to extend execbuf2
URL : https://patchwork.freedesktop.org/series/75810/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: introduce a mechanism to extend execbuf2
Okay!
Commit: drm/i915: add syncobj timeline support
Okay!
Commit: drm/i915: peel dma-fence-chains wait fences
Okay!
Commit: drm/selftests: selftest for timeline semaphore
-
+ ^
+ }
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:349:53: expected struct dma_fence *fence
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:349:53: got struct dma_fence [noderef] <asn:4> *fence
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:349:53: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:366:44: expected struct dma_fence *fence
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:366:44: got struct dma_fence [noderef] <asn:4> *fence
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:366:44: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:471:53: expected struct dma_fence *fence
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:471:53: got struct dma_fence [noderef] <asn:4> *fence
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:471:53: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:511:1: warning: the frame size of 3168 bytes is larger than 2048 bytes [-Wframe-larger-than=]
+drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c: In function ‘igt_forward’:
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: introduce a mechanism to extend execbuf2
2020-04-10 16:51 [Intel-gfx] [PATCH 1/4] drm/i915: introduce a mechanism to extend execbuf2 Venkata Sandeep Dhanalakota
` (4 preceding siblings ...)
2020-04-10 17:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2020-04-10 17:23 ` Patchwork
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2020-04-10 17:23 UTC (permalink / raw)
To: Venkata Sandeep Dhanalakota; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: introduce a mechanism to extend execbuf2
URL : https://patchwork.freedesktop.org/series/75810/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8290 -> Patchwork_17278
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_17278 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_17278, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17278/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_17278:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@gtt:
- fi-skl-lmem: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8290/fi-skl-lmem/igt@i915_selftest@live@gtt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17278/fi-skl-lmem/igt@i915_selftest@live@gtt.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_wait@busy@all}:
- fi-gdg-551: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8290/fi-gdg-551/igt@gem_wait@busy@all.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17278/fi-gdg-551/igt@gem_wait@busy@all.html
Known issues
------------
Here are the changes found in Patchwork_17278 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@objects:
- fi-bwr-2160: [PASS][5] -> [INCOMPLETE][6] ([i915#489])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8290/fi-bwr-2160/igt@i915_selftest@live@objects.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17278/fi-bwr-2160/igt@i915_selftest@live@objects.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- fi-skl-lmem: [DMESG-WARN][7] -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8290/fi-skl-lmem/igt@i915_selftest@live@hangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17278/fi-skl-lmem/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#489]: https://gitlab.freedesktop.org/drm/intel/issues/489
Participating hosts (51 -> 46)
------------------------------
Additional (1): fi-kbl-7560u
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8290 -> Patchwork_17278
CI-20190529: 20190529
CI_DRM_8290: dd69e63dc11c8fdabcc029b27f16e80be504ffc8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5587: 628878f89c61fd628c4a65076f634b099d360b85 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17278: 2856c1eadad1463f37b41fbbed16697f2897fc4f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2856c1eadad1 drm/selftests: selftest for timeline semaphore
d387ab6f223d drm/i915: peel dma-fence-chains wait fences
8171b3a56b0a drm/i915: add syncobj timeline support
f52f98b82c3b drm/i915: introduce a mechanism to extend execbuf2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17278/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 4/4] drm/selftests: selftest for timeline semaphore
2020-04-10 16:51 ` [Intel-gfx] [PATCH 4/4] drm/selftests: selftest for timeline semaphore Venkata Sandeep Dhanalakota
@ 2020-04-10 21:11 ` kbuild test robot
2020-04-14 13:19 ` Lionel Landwerlin
1 sibling, 0 replies; 14+ messages in thread
From: kbuild test robot @ 2020-04-10 21:11 UTC (permalink / raw)
To: Venkata Sandeep Dhanalakota; +Cc: intel-gfx, kbuild-all, chris.p.wilson
[-- Attachment #1: Type: text/plain, Size: 4052 bytes --]
Hi Venkata,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next linus/master v5.6 next-20200410]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Venkata-Sandeep-Dhanalakota/drm-i915-introduce-a-mechanism-to-extend-execbuf2/20200411-031057
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: parisc-allyesconfig (attached as .config)
compiler: hppa-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=9.3.0 make.cross ARCH=parisc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c: In function 'igt_forward':
>> drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:511:1: warning: the frame size of 1568 bytes is larger than 1280 bytes [-Wframe-larger-than=]
511 | }
| ^
vim +511 drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c
433
434 static int igt_forward(void *ignored)
435 {
436 struct mock_timeline *s[MAX_TIMELINES], *t[MAX_TIMELINES];
437 struct task_struct *tasks[MAX_THREADS], *tsk;
438 struct chain_info ci, c[MAX_TIMELINES];
439 struct fence_chain *chain, *signaler;
440 int i, err = 0, count = 0;
441 struct dma_fence *last;
442
443 //signaler will signal the points in timelines;
444 allocate_chains(&ci, 1, 21);
445 signaler = ci.chains[0];
446
447 dma_fence_get(&signaler->fence);
448 for (i = 0;i < MAX_TIMELINES; i++) {
449 s[i] = timeline(i, 0x0);
450 drm_syncobj_replace_fence(s[i]->syncobj, &signaler->fence);
451 tsk = kthread_run(__signal_timeline, s[i], "signal");
452 if (IS_ERR(tsk)) {
453 err = PTR_ERR(tsk);
454 goto err;
455 }
456 get_task_struct(tsk);
457 yield_to(tsk, true);
458 tasks[count++] = tsk;
459 }
460
461 atomic_set(&signaler->signalers, MAX_TIMELINES);
462 for (i = 0;i < MAX_TIMELINES; i++) {
463
464 allocate_chains(&c[i], 1, i);
465 t[i] = timeline(i, 0x0);
466 chain = c[i].chains[0];
467
468 drm_syncobj_replace_fence(t[i]->syncobj,
469 dma_fence_get(&chain->fence));
470 last = &chain->chain.base;
471 dma_fence_add_callback(t[i]->syncobj->fence,
472 &signaler->cb,
473 fence_callback);
474 tsk = kthread_run(__wait_timeline, t[i], "wait");
475 if (IS_ERR(tsk)) {
476 err = PTR_ERR(tsk);
477 goto err;
478 }
479 get_task_struct(tsk);
480 yield_to(tsk, true);
481 tasks[count++] = tsk;
482 }
483
484 dma_fence_wait(last, true);
485 dma_fence_wait(&signaler->fence, true);
486 dma_fence_put(&signaler->fence);
487 err:
488 for (i = 0;i < count; i++) {
489 int ret;
490
491 ret = kthread_stop(tasks[i]);
492 if (ret && !err)
493 err = ret;
494 put_task_struct(tasks[i]);
495 }
496
497 for (i = 0; i < MAX_TIMELINES; i++) {
498 chain = c[i].chains[0];
499
500 if (!dma_fence_get_status(&chain->chain.base) ||
501 !dma_fence_get_status(&chain->fence)) {
502 pr_err("Freeing an unsignaled fence\n");
503 err = -1;
504 }
505 delete_chains(&c[i]);
506 kmem_cache_free(slab_timeline, t[i]);
507 kmem_cache_free(slab_timeline, s[i]);
508 }
509 delete_chains(&ci);
510 return err;
> 511 }
512
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 60764 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 4/4] drm/selftests: selftest for timeline semaphore
@ 2020-04-10 21:11 ` kbuild test robot
0 siblings, 0 replies; 14+ messages in thread
From: kbuild test robot @ 2020-04-10 21:11 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 4170 bytes --]
Hi Venkata,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next linus/master v5.6 next-20200410]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Venkata-Sandeep-Dhanalakota/drm-i915-introduce-a-mechanism-to-extend-execbuf2/20200411-031057
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: parisc-allyesconfig (attached as .config)
compiler: hppa-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=9.3.0 make.cross ARCH=parisc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c: In function 'igt_forward':
>> drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c:511:1: warning: the frame size of 1568 bytes is larger than 1280 bytes [-Wframe-larger-than=]
511 | }
| ^
vim +511 drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c
433
434 static int igt_forward(void *ignored)
435 {
436 struct mock_timeline *s[MAX_TIMELINES], *t[MAX_TIMELINES];
437 struct task_struct *tasks[MAX_THREADS], *tsk;
438 struct chain_info ci, c[MAX_TIMELINES];
439 struct fence_chain *chain, *signaler;
440 int i, err = 0, count = 0;
441 struct dma_fence *last;
442
443 //signaler will signal the points in timelines;
444 allocate_chains(&ci, 1, 21);
445 signaler = ci.chains[0];
446
447 dma_fence_get(&signaler->fence);
448 for (i = 0;i < MAX_TIMELINES; i++) {
449 s[i] = timeline(i, 0x0);
450 drm_syncobj_replace_fence(s[i]->syncobj, &signaler->fence);
451 tsk = kthread_run(__signal_timeline, s[i], "signal");
452 if (IS_ERR(tsk)) {
453 err = PTR_ERR(tsk);
454 goto err;
455 }
456 get_task_struct(tsk);
457 yield_to(tsk, true);
458 tasks[count++] = tsk;
459 }
460
461 atomic_set(&signaler->signalers, MAX_TIMELINES);
462 for (i = 0;i < MAX_TIMELINES; i++) {
463
464 allocate_chains(&c[i], 1, i);
465 t[i] = timeline(i, 0x0);
466 chain = c[i].chains[0];
467
468 drm_syncobj_replace_fence(t[i]->syncobj,
469 dma_fence_get(&chain->fence));
470 last = &chain->chain.base;
471 dma_fence_add_callback(t[i]->syncobj->fence,
472 &signaler->cb,
473 fence_callback);
474 tsk = kthread_run(__wait_timeline, t[i], "wait");
475 if (IS_ERR(tsk)) {
476 err = PTR_ERR(tsk);
477 goto err;
478 }
479 get_task_struct(tsk);
480 yield_to(tsk, true);
481 tasks[count++] = tsk;
482 }
483
484 dma_fence_wait(last, true);
485 dma_fence_wait(&signaler->fence, true);
486 dma_fence_put(&signaler->fence);
487 err:
488 for (i = 0;i < count; i++) {
489 int ret;
490
491 ret = kthread_stop(tasks[i]);
492 if (ret && !err)
493 err = ret;
494 put_task_struct(tasks[i]);
495 }
496
497 for (i = 0; i < MAX_TIMELINES; i++) {
498 chain = c[i].chains[0];
499
500 if (!dma_fence_get_status(&chain->chain.base) ||
501 !dma_fence_get_status(&chain->fence)) {
502 pr_err("Freeing an unsignaled fence\n");
503 err = -1;
504 }
505 delete_chains(&c[i]);
506 kmem_cache_free(slab_timeline, t[i]);
507 kmem_cache_free(slab_timeline, s[i]);
508 }
509 delete_chains(&ci);
510 return err;
> 511 }
512
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 60764 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences
2020-04-10 16:51 ` [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences Venkata Sandeep Dhanalakota
@ 2020-04-11 5:09 ` kbuild test robot
2020-04-11 8:50 ` Lionel Landwerlin
1 sibling, 0 replies; 14+ messages in thread
From: kbuild test robot @ 2020-04-11 5:09 UTC (permalink / raw)
To: Venkata Sandeep Dhanalakota; +Cc: intel-gfx, kbuild-all, chris.p.wilson
Hi Venkata,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next linus/master v5.6 next-20200410]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Venkata-Sandeep-Dhanalakota/drm-i915-introduce-a-mechanism-to-extend-execbuf2/20200411-031057
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>
cppcheck warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2550:12: warning: Either the condition '!iter_chain' is redundant or there is possible null pointer dereference: iter_chain. [nullPointerRedundantCheck]
iter_chain->fence);
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2547:16: note: Assuming that condition '!iter_chain' is not redundant
GEM_BUG_ON(!iter_chain);
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2545:24: note: Assignment 'iter_chain=to_dma_fence_chain(iter)', assigned value is 0
to_dma_fence_chain(iter);
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2550:12: note: Null pointer dereference
iter_chain->fence);
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1423:6: warning: The scope of the variable 'err' can be reduced. [variableScope]
int err;
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:3158:1: warning: Label 'end_user' is not used. [unusedLabel]
end_user:
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1346:21: warning: Clarify calculation precedence for '&' and '?'. [clarifyCalculation]
len = offset & 7 ? 8 : 5;
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1401:24: warning: 'vaddr' is of type 'void *'. When using void pointers in calculations, the behaviour is undefined. [arithOperationsOnVoidPointer]
clflush_write32(vaddr + offset_in_page(offset),
^
vim +2550 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
2510
2511 static int
2512 await_fence_array(struct i915_execbuffer *eb,
2513 struct i915_eb_fences *fences,
2514 int nfences)
2515 {
2516 unsigned int n;
2517 int err;
2518
2519 for (n = 0; n < nfences; n++) {
2520 struct drm_syncobj *syncobj;
2521 struct dma_fence_chain *chain;
2522 unsigned int flags;
2523
2524 syncobj = ptr_unpack_bits(fences[n].syncobj, &flags, 2);
2525
2526 if (!fences[n].dma_fence)
2527 continue;
2528
2529 /*
2530 * If we're dealing with a dma-fence-chain, peel the chain by
2531 * adding all of the unsignaled fences
2532 * (dma_fence_chain_for_each does that for us) the chain
2533 * points to.
2534 *
2535 * This enables us to identify waits on i915 fences and allows
2536 * for faster engine-to-engine synchronization using HW
2537 * semaphores.
2538 */
2539 chain = to_dma_fence_chain(fences[n].dma_fence);
2540 if (chain) {
2541 struct dma_fence *iter;
2542
2543 dma_fence_chain_for_each(iter, fences[n].dma_fence) {
2544 struct dma_fence_chain *iter_chain =
2545 to_dma_fence_chain(iter);
2546
2547 GEM_BUG_ON(!iter_chain);
2548
2549 err = i915_request_await_dma_fence(eb->request,
> 2550 iter_chain->fence);
2551 if (err < 0) {
2552 dma_fence_put(iter);
2553 return err;
2554 }
2555 }
2556
2557 } else {
2558 err = i915_request_await_dma_fence(eb->request,
2559 fences[n].dma_fence);
2560 if (err < 0)
2561 return err;
2562 }
2563 }
2564
2565 return 0;
2566 }
2567
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences
@ 2020-04-11 5:09 ` kbuild test robot
0 siblings, 0 replies; 14+ messages in thread
From: kbuild test robot @ 2020-04-11 5:09 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 4246 bytes --]
Hi Venkata,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next linus/master v5.6 next-20200410]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Venkata-Sandeep-Dhanalakota/drm-i915-introduce-a-mechanism-to-extend-execbuf2/20200411-031057
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>
cppcheck warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2550:12: warning: Either the condition '!iter_chain' is redundant or there is possible null pointer dereference: iter_chain. [nullPointerRedundantCheck]
iter_chain->fence);
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2547:16: note: Assuming that condition '!iter_chain' is not redundant
GEM_BUG_ON(!iter_chain);
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2545:24: note: Assignment 'iter_chain=to_dma_fence_chain(iter)', assigned value is 0
to_dma_fence_chain(iter);
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2550:12: note: Null pointer dereference
iter_chain->fence);
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1423:6: warning: The scope of the variable 'err' can be reduced. [variableScope]
int err;
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:3158:1: warning: Label 'end_user' is not used. [unusedLabel]
end_user:
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1346:21: warning: Clarify calculation precedence for '&' and '?'. [clarifyCalculation]
len = offset & 7 ? 8 : 5;
^
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1401:24: warning: 'vaddr' is of type 'void *'. When using void pointers in calculations, the behaviour is undefined. [arithOperationsOnVoidPointer]
clflush_write32(vaddr + offset_in_page(offset),
^
vim +2550 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
2510
2511 static int
2512 await_fence_array(struct i915_execbuffer *eb,
2513 struct i915_eb_fences *fences,
2514 int nfences)
2515 {
2516 unsigned int n;
2517 int err;
2518
2519 for (n = 0; n < nfences; n++) {
2520 struct drm_syncobj *syncobj;
2521 struct dma_fence_chain *chain;
2522 unsigned int flags;
2523
2524 syncobj = ptr_unpack_bits(fences[n].syncobj, &flags, 2);
2525
2526 if (!fences[n].dma_fence)
2527 continue;
2528
2529 /*
2530 * If we're dealing with a dma-fence-chain, peel the chain by
2531 * adding all of the unsignaled fences
2532 * (dma_fence_chain_for_each does that for us) the chain
2533 * points to.
2534 *
2535 * This enables us to identify waits on i915 fences and allows
2536 * for faster engine-to-engine synchronization using HW
2537 * semaphores.
2538 */
2539 chain = to_dma_fence_chain(fences[n].dma_fence);
2540 if (chain) {
2541 struct dma_fence *iter;
2542
2543 dma_fence_chain_for_each(iter, fences[n].dma_fence) {
2544 struct dma_fence_chain *iter_chain =
2545 to_dma_fence_chain(iter);
2546
2547 GEM_BUG_ON(!iter_chain);
2548
2549 err = i915_request_await_dma_fence(eb->request,
> 2550 iter_chain->fence);
2551 if (err < 0) {
2552 dma_fence_put(iter);
2553 return err;
2554 }
2555 }
2556
2557 } else {
2558 err = i915_request_await_dma_fence(eb->request,
2559 fences[n].dma_fence);
2560 if (err < 0)
2561 return err;
2562 }
2563 }
2564
2565 return 0;
2566 }
2567
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences
2020-04-10 16:51 ` [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences Venkata Sandeep Dhanalakota
2020-04-11 5:09 ` kbuild test robot
@ 2020-04-11 8:50 ` Lionel Landwerlin
2020-04-13 1:32 ` Venkata Sandeep Dhanalakota
1 sibling, 1 reply; 14+ messages in thread
From: Lionel Landwerlin @ 2020-04-11 8:50 UTC (permalink / raw)
To: Venkata Sandeep Dhanalakota, intel-gfx; +Cc: chris.p.wilson
On 10/04/2020 19:51, Venkata Sandeep Dhanalakota wrote:
> From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>
> To allow faster engine to engine synchronization, peel the layer of
> dma-fence-chain to expose potential i915 fences so that the
> i915-request code can emit HW semaphore wait/signal operations in the
> ring which is faster than waking up the host to submit unblocked
> workloads after interrupt notification.
>
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> ---
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 39 +++++++++++++++++--
> 1 file changed, 35 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 8dd651cdca39..e43b76d7e9fd 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -2508,6 +2508,7 @@ await_fence_array(struct i915_execbuffer *eb,
>
> for (n = 0; n < nfences; n++) {
> struct drm_syncobj *syncobj;
> + struct dma_fence_chain *chain;
> unsigned int flags;
>
> syncobj = ptr_unpack_bits(fences[n].syncobj, &flags, 2);
> @@ -2515,10 +2516,40 @@ await_fence_array(struct i915_execbuffer *eb,
> if (!fences[n].dma_fence)
> continue;
>
> - err = i915_request_await_dma_fence(eb->request,
> - fences[n].dma_fence);
> - if (err < 0)
> - return err;
> + /*
> + * If we're dealing with a dma-fence-chain, peel the chain by
> + * adding all of the unsignaled fences
> + * (dma_fence_chain_for_each does that for us) the chain
> + * points to.
> + *
> + * This enables us to identify waits on i915 fences and allows
> + * for faster engine-to-engine synchronization using HW
> + * semaphores.
> + */
> + chain = to_dma_fence_chain(fences[n].dma_fence);
> + if (chain) {
> + struct dma_fence *iter;
> +
> + dma_fence_chain_for_each(iter, fences[n].dma_fence) {
The kbuild bot made me think of an interesting case.
It is possible to build a chain where the first element isn't a
dma_fence_chain.
We should handle this here like this :
if (iter_chain)
err = i915_request_await_dma_fence(eb->request, iter_chain->fence);
else
err = i915_request_await_dma_fence(eb->request, iter);
if (err < 0) {
dma_fence_put(iter);
return err;
}
> + struct dma_fence_chain *iter_chain =
> + to_dma_fence_chain(iter);
> +
> + GEM_BUG_ON(!iter_chain);
> +
> + err = i915_request_await_dma_fence(eb->request,
> + iter_chain->fence);
> + if (err < 0) {
> + dma_fence_put(iter);
> + return err;
> + }
> + }
> +
> + } else {
> + err = i915_request_await_dma_fence(eb->request,
> + fences[n].dma_fence);
> + if (err < 0)
> + return err;
> + }
> }
>
> return 0;
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences
2020-04-11 8:50 ` Lionel Landwerlin
@ 2020-04-13 1:32 ` Venkata Sandeep Dhanalakota
0 siblings, 0 replies; 14+ messages in thread
From: Venkata Sandeep Dhanalakota @ 2020-04-13 1:32 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-gfx, chris.p.wilson
On 20/04/11 11:50, Lionel Landwerlin wrote:
> On 10/04/2020 19:51, Venkata Sandeep Dhanalakota wrote:
> > From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> >
> > To allow faster engine to engine synchronization, peel the layer of
> > dma-fence-chain to expose potential i915 fences so that the
> > i915-request code can emit HW semaphore wait/signal operations in the
> > ring which is faster than waking up the host to submit unblocked
> > workloads after interrupt notification.
> >
> > Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> > ---
> > .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 39 +++++++++++++++++--
> > 1 file changed, 35 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > index 8dd651cdca39..e43b76d7e9fd 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > @@ -2508,6 +2508,7 @@ await_fence_array(struct i915_execbuffer *eb,
> > for (n = 0; n < nfences; n++) {
> > struct drm_syncobj *syncobj;
> > + struct dma_fence_chain *chain;
> > unsigned int flags;
> > syncobj = ptr_unpack_bits(fences[n].syncobj, &flags, 2);
> > @@ -2515,10 +2516,40 @@ await_fence_array(struct i915_execbuffer *eb,
> > if (!fences[n].dma_fence)
> > continue;
> > - err = i915_request_await_dma_fence(eb->request,
> > - fences[n].dma_fence);
> > - if (err < 0)
> > - return err;
> > + /*
> > + * If we're dealing with a dma-fence-chain, peel the chain by
> > + * adding all of the unsignaled fences
> > + * (dma_fence_chain_for_each does that for us) the chain
> > + * points to.
> > + *
> > + * This enables us to identify waits on i915 fences and allows
> > + * for faster engine-to-engine synchronization using HW
> > + * semaphores.
> > + */
> > + chain = to_dma_fence_chain(fences[n].dma_fence);
> > + if (chain) {
> > + struct dma_fence *iter;
> > +
> > + dma_fence_chain_for_each(iter, fences[n].dma_fence) {
>
>
> The kbuild bot made me think of an interesting case.
>
> It is possible to build a chain where the first element isn't a
> dma_fence_chain.
>
Yes agreed, we could have a valid fence-chain with first element as normal
dma_fence and so iter_chain can be null. Will address this in next
revision of the patch.
>
> We should handle this here like this :
>
>
> if (iter_chain)
>
> err = i915_request_await_dma_fence(eb->request, iter_chain->fence);
>
> else
>
> err = i915_request_await_dma_fence(eb->request, iter);
>
> if (err < 0) {
>
> dma_fence_put(iter);
>
> return err;
>
> }
>
>
> > + struct dma_fence_chain *iter_chain =
> > + to_dma_fence_chain(iter);
> > +
> > + GEM_BUG_ON(!iter_chain);
> > +
> > + err = i915_request_await_dma_fence(eb->request,
> > + iter_chain->fence);
> > + if (err < 0) {
> > + dma_fence_put(iter);
> > + return err;
> > + }
> > + }
> > +
> > + } else {
> > + err = i915_request_await_dma_fence(eb->request,
> > + fences[n].dma_fence);
> > + if (err < 0)
> > + return err;
> > + }
> > }
> > return 0;
>
>
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 4/4] drm/selftests: selftest for timeline semaphore
2020-04-10 16:51 ` [Intel-gfx] [PATCH 4/4] drm/selftests: selftest for timeline semaphore Venkata Sandeep Dhanalakota
2020-04-10 21:11 ` kbuild test robot
@ 2020-04-14 13:19 ` Lionel Landwerlin
1 sibling, 0 replies; 14+ messages in thread
From: Lionel Landwerlin @ 2020-04-14 13:19 UTC (permalink / raw)
To: Venkata Sandeep Dhanalakota, intel-gfx; +Cc: chris.p.wilson
I left some comments below, but I wonder about the values of these tests
compared to Chris' [1].
Much like the tests from Chris it mostly exercises the dma_fence_* API.
On the drm_syncobj API it's just replace_fence(), get_fence(),
add_point() (that last one cannot fail).
-Lionel
[1] : https://patchwork.freedesktop.org/patch/360865/?series=75743&rev=1
On 10/04/2020 19:51, Venkata Sandeep Dhanalakota wrote:
> simple tests using drm api for timeline semaphore.
>
> Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> ---
> drivers/gpu/drm/selftests/Makefile | 2 +-
> .../drm/selftests/drm_timeline_selftests.h | 16 +
> .../selftests/test-drm_timeline_semaphore.c | 545 ++++++++++++++++++
> 3 files changed, 562 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/selftests/drm_timeline_selftests.h
> create mode 100644 drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c
>
> diff --git a/drivers/gpu/drm/selftests/Makefile b/drivers/gpu/drm/selftests/Makefile
> index 0856e4b12f70..5bceef7c9d02 100644
> --- a/drivers/gpu/drm/selftests/Makefile
> +++ b/drivers/gpu/drm/selftests/Makefile
> @@ -4,4 +4,4 @@ test-drm_modeset-y := test-drm_modeset_common.o test-drm_plane_helper.o \
> test-drm_damage_helper.o test-drm_dp_mst_helper.o \
> test-drm_rect.o
>
> -obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-drm_modeset.o test-drm_cmdline_parser.o
> +obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-drm_modeset.o test-drm_cmdline_parser.o test-drm_timeline_semaphore.o
> diff --git a/drivers/gpu/drm/selftests/drm_timeline_selftests.h b/drivers/gpu/drm/selftests/drm_timeline_selftests.h
> new file mode 100644
> index 000000000000..8922a1eed525
> --- /dev/null
> +++ b/drivers/gpu/drm/selftests/drm_timeline_selftests.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* List each unit test as selftest(name, function)
> + *
> + * The name is used as both an enum and expanded as igt__name to create
> + * a module parameter. It must be unique and legal for a C identifier.
> + *
> + * Tests are executed in order by igt/drm_timeline_selftests
> + */
> +selftest(sanitycheck, igt_sanitycheck) /* keep first (selfcheck for igt) */
> +selftest(chainbasic, igt_chainbasic)
> +selftest(waitchain, igt_waitchain)
> +selftest(signalseqno, igt_signalseqno)
> +selftest(waitseqno, igt_waitseqno)
> +selftest(addunorder, igt_addunorder)
> +selftest(findseqno, igt_findseqno)
> +selftest(igt_forward, igt_forward)
> diff --git a/drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c b/drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c
> new file mode 100644
> index 000000000000..8a964d302e42
> --- /dev/null
> +++ b/drivers/gpu/drm/selftests/test-drm_timeline_semaphore.c
> @@ -0,0 +1,545 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Test cases for the timeline semaphore
> + */
> +
> +#define pr_fmt(fmt) "drm_tl: " fmt
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/slab.h>
> +#include <linux/random.h>
> +#include <linux/vmalloc.h>
> +#include <linux/slab.h>
> +#include <linux/mm.h>
> +#include <linux/kthread.h>
> +#include <linux/sched/signal.h>
> +
> +#include <drm/drm_syncobj.h>
> +#include <linux/dma-fence.h>
> +#include <linux/dma-fence-chain.h>
> +
> +#include "../lib/drm_random.h"
> +
> +#define TESTS "drm_timeline_selftests.h"
> +#include "drm_selftest.h"
> +
> +#define MAX_TIMELINES 64
> +#define MAX_THREADS (2 * MAX_TIMELINES)
> +
> +static struct kmem_cache *slab_timeline;
> +static struct kmem_cache *slab_fence_chain;
> +
> +struct mock_timeline {
> + struct drm_syncobj *syncobj;
> +
> + /* cb when base is signalled */
> + struct dma_fence_cb cb;
> + struct dma_fence base;
> + /* lock for dma_fence */
> + spinlock_t lock;
> + u64 point;
> + u32 flags;
> +};
> +
> +struct fence_chain {
> + struct dma_fence_chain chain;
> + struct dma_fence fence;
> + /* cb when fence is signalled */
> + struct dma_fence_cb cb;
> + atomic_t signalers;
> + spinlock_t lock;
> +};
> +
> +struct chain_info {
> + struct fence_chain **chains;
> + int nchains;
> +};
> +
> +static const char *mock_name(struct dma_fence *s)
> +{
> + return "timeline";
> +}
> +
> +static void mock_release(struct dma_fence *fence)
> +{
> + pr_debug("release %lld\n",fence->seqno);
> +}
> +
> +static const struct dma_fence_ops mock_ops = {
> + .get_driver_name = mock_name,
> + .get_timeline_name = mock_name,
> + .release = mock_release,
> +};
> +
> +static void fence_callback(struct dma_fence *f, struct dma_fence_cb *cb)
> +{
> + struct fence_chain *t =
> + container_of(cb, struct fence_chain, cb);
> +
> + if (atomic_dec_and_test(&t->signalers))
> + dma_fence_signal(&t->fence);
> +}
> +
> +static void timeline_callback(struct dma_fence *f, struct dma_fence_cb *cb)
> +{
> + struct mock_timeline *t =
> + container_of(cb, struct mock_timeline, cb);
> + dma_fence_signal(&t->base);
> +}
> +
> +static struct mock_timeline *timeline(u64 point, u32 flags)
> +{
> + struct mock_timeline *t;
> +
> + t = kmem_cache_alloc(slab_timeline, GFP_KERNEL | __GFP_ZERO);
> + if (!t)
> + return NULL;
> +
> + spin_lock_init(&t->lock);
> + dma_fence_init(&t->base, &mock_ops, &t->lock, 0, point);
> + drm_syncobj_create(&t->syncobj, flags, dma_fence_get(&t->base));
> + t->point = point;
> +
> + return t;
> +}
> +
> +static struct fence_chain* fence_chain(struct dma_fence *prev,
> + u64 seqno)
> +{
> + struct fence_chain *f;
> +
> + f = kmem_cache_alloc(slab_fence_chain, GFP_KERNEL | __GFP_ZERO);
> +
> + if (!f)
> + return NULL;
> +
> + spin_lock_init(&f->lock);
> + dma_fence_init(&f->fence, &mock_ops,
> + &f->lock, 0, seqno);
> + dma_fence_chain_init(&f->chain,
> + prev,
> + dma_fence_get(&f->fence),
> + seqno);
> +
> + return f;
> +}
> +
> +static void allocate_chains(struct chain_info *ci, int count, int start)
> +{
> + struct dma_fence *prev_chain = NULL;
> + struct fence_chain **chains;
> + int i;
> +
> + ci->chains = kvmalloc_array(count, sizeof(struct fence_chain *),
> + GFP_KERNEL | __GFP_ZERO);
> + if (!ci->chains)
> + return;
> +
> + chains = ci->chains;
> + ci->nchains = count;
> + for (i = 0;i < ci->nchains; i++) {
> + chains[i] = fence_chain(prev_chain, start + i);
> + prev_chain = &chains[i]->chain.base;
> + dma_fence_get(prev_chain);
> + }
> +}
> +
> +static void delete_chains(struct chain_info *ci)
> +{
> + int i;
> +
> + for (i = 0; i < ci->nchains; i++) {
> + dma_fence_release(&ci->chains[i]->fence.refcount);
> + kmem_cache_free(slab_fence_chain, ci->chains[i]);
> + }
> + kvfree(ci->chains);
> +}
> +
> +static int igt_sanitycheck(void *ignored)
> +{
> + struct mock_timeline *t;
> + struct dma_fence *f;
> + int err = 0;
> +
> + t = timeline(1, 0);
> +
> + if (!t)
> + return -ENOMEM;
> +
> + dma_fence_signal(&t->base);
> +
> + f = drm_syncobj_fence_get(t->syncobj);
> + if (!dma_fence_is_signaled(f))
> + err = -1;
> +
> + dma_fence_put(&t->base);
> + drm_syncobj_put(t->syncobj);
> + kmem_cache_free(slab_timeline, t);
> + return err;
> +}
> +
> +static int igt_chainbasic(void *ignored)
> +{
> + struct fence_chain *last, *chain;
> + struct dma_fence *first = NULL;
> + struct chain_info ci;
> + int i, count = 10;
> + int err = 0;
> +
> + allocate_chains(&ci, count, 0);
> + if (IS_ERR_OR_NULL(ci.chains))
> + return -ENOMEM;
> +
> + chain = ci.chains[0];
> + first = &chain->fence;
> +
> + for (i = 1; i < count; i++) {
> + chain = ci.chains[i];
> + dma_fence_signal(&chain->fence);
> + last = chain;
> + }
I guess you could add another check here :
if (dma_fence_is_signaled(&last->chain.base))
err = -1;
> + dma_fence_signal(first);
> +
> + if (!dma_fence_is_signaled(&last->chain.base))
> + err = -1;
> +
> + delete_chains(&ci);
> + return err;
> +}
> +
> +static int igt_findseqno(void *ignored)
> +{
> + struct dma_fence *f, *first;
> + struct chain_info ci;
> + int count = 15, start = 3;
> + int err = 0;
> +
> + allocate_chains(&ci, count, start);
> + if (IS_ERR_OR_NULL(ci.chains))
> + return -ENOMEM;
> +
> + f = &ci.chains[count - 1]->chain.base;
Don't you need to increment the refcount of f?
Otherwise delete_chains() will unref once too many time.
> + first = &ci.chains[0]->chain.base;
> +
> + dma_fence_chain_find_seqno(&f, 1);
> + if (f && f != first) {
> + pr_err("Incorrect chain-fence.seqno:%lld reported for completed seqno:1\n",
> + f->seqno);
> + dma_fence_get(f);
> + err = dma_fence_chain_find_seqno(&f, start);
> + dma_fence_put(f);
> + if (err) {
> + pr_err("Reported %d for finding self!\n", err);
> + err = -EINVAL;
> + }
> + }
> +
> + delete_chains(&ci);
> + return err;
> +}
> +
> +static int igt_waitchain(void *ignored)
> +{
> + struct fence_chain *last;
> + struct chain_info ci;
> + struct mock_timeline *t;
> + struct dma_fence *f;
> + int count = 10, i;
> + int start = 7;
> + int err = 0;
> +
> + t = timeline(start, 0x0);
> +
> + if (!t)
> + return -ENOMEM;
> +
> + allocate_chains(&ci, count, start + 1);
> + if (IS_ERR_OR_NULL(ci.chains))
> + return -ENOMEM;
> +
> + last = ci.chains[count - 1];
> + drm_syncobj_replace_fence(t->syncobj, &last->chain.base);
> +
> + f = drm_syncobj_fence_get(t->syncobj);
> + if(dma_fence_is_signaled(f)) {
Coding style doesn't look right. There should be a space after 'if'.
> + err = -1;
> + goto err;
> + }
> +
> + for (i = 0; i < count; i++)
> + dma_fence_signal(&ci.chains[i]->fence);
> +
> + if(!dma_fence_is_signaled(f))
> + err = -1;
> +err:
> + delete_chains(&ci);
> + drm_syncobj_put(t->syncobj);
> + kmem_cache_free(slab_timeline, t);
> + return err;
> +}
> +
> +static int igt_signalseqno(void *ignored)
> +{
> + struct fence_chain *wait;
> + struct chain_info ci;
> + struct mock_timeline *t[6];
> + struct dma_fence *f;
> + int i, count = 5;
> + int err = 0;
> +
> + allocate_chains(&ci, 1, 0);
> + if (IS_ERR_OR_NULL(ci.chains))
> + return -ENOMEM;
> +
> + wait = ci.chains[0];
> +
> + for (i = 0;i < count; i++) {
> + t[i] = timeline(i, 0x0);
> + dma_fence_add_callback(&wait->fence,
> + &t[i]->cb,
> + timeline_callback);
> + }
> +
> + /* wait for available */
> + for (i = 0; i < count; i++) {
> + f = drm_syncobj_fence_get(t[i]->syncobj);
> + if(dma_fence_is_signaled(f)) {
> + err = -1;
> + goto err;
> + }
> + }
> +
> + dma_fence_signal(&wait->fence);
> + for (i = 0; i < count; i++) {
> + f = drm_syncobj_fence_get(t[i]->syncobj);
> + if(!dma_fence_is_signaled(f))
> + err = -1;
> + }
> +
> +err:
> + for (i = 0;i < count; i++) {
> + drm_syncobj_free(&t[i]->syncobj->refcount);
> + kmem_cache_free(slab_timeline, t[i]);
> + }
> +
> + delete_chains(&ci);
> + return err;
> +}
> +
> +static int igt_waitseqno(void *ignored)
> +{
> + struct fence_chain *signal;
> + struct mock_timeline *t[6];
> + struct chain_info ci;
> + struct dma_fence *f;
> + int i, count = 5;
> + int err = 0;
> +
> + allocate_chains(&ci, 1, 0);
> + if (IS_ERR_OR_NULL(ci.chains))
> + return -ENOMEM;
> +
> + signal = ci.chains[0];
> + atomic_set(&signal->signalers, count);
> +
> + /* wait for submit */
> + for (i = 0;i < count; i++) {
> + t[i] = timeline(i, 0x0);
> + dma_fence_add_callback(t[i]->syncobj->fence,
> + &signal->cb,
> + fence_callback);
> + }
> +
> + for (i = 0;i < count; i++) {
> + if(dma_fence_is_signaled(&signal->chain.base))
> + err = -1;
> +
> + f = drm_syncobj_fence_get(t[i]->syncobj);
> + dma_fence_signal(f);
dma_fence_put(f) ?
> + }
> +
> + if(!dma_fence_is_signaled(&signal->chain.base))
> + err = -1;
> +
> + for (i = 0;i < count; i++) {
> + dma_fence_put(t[i]->syncobj->fence);
> + kmem_cache_free(slab_timeline, t[i]);
> + }
> + delete_chains(&ci);
> + return err;
> +}
> +
> +static int igt_addunorder(void *ignored)
> +{
> + struct fence_chain *wait;
> + struct chain_info ci;
> + struct mock_timeline *t;
> + struct dma_fence *f;
> + int err = 0;
> +
> + t = timeline(6, 0x0);
> + allocate_chains(&ci, 1, 2);
> + wait = ci.chains[0];
> + if (IS_ERR_OR_NULL(ci.chains))
> + return -ENOMEM;
> +
> + drm_syncobj_add_point(t->syncobj, &wait->chain, &wait->fence, 2);
This doesn't look right, because drm_syncobj_add_point() will initialize
the fence-chain using dma_fence_chain_init.
Yet allocate_chains already calls dma_fence_chain_init on the same object.
> +
> + dma_fence_signal(&wait->fence);
> + f = drm_syncobj_fence_get(t->syncobj);
> + if (dma_fence_is_signaled(&wait->chain.base)) {
> + err = -1;
> + goto err;
> + }
> +
> + dma_fence_signal(f);
> + if (!dma_fence_is_signaled(&wait->chain.base)) {
> + err = -1;
> + goto err;
> + }
> +err:
> + delete_chains(&ci);
> + drm_syncobj_put(t->syncobj);
> + kmem_cache_free(slab_timeline, t);
> + return err;
> +}
> +
> +static int __signal_timeline(void *arg)
> +{
> + struct mock_timeline *timeline = arg;
> + struct dma_fence *f;
> +
> + f = drm_syncobj_fence_get(timeline->syncobj);
> +
> + if (f && dma_fence_wait(f, true)){
> + drm_syncobj_put(timeline->syncobj);
> + return -EIO;
> + }
Leaking a ref on the fence?
> +
> + return 0;
> +}
> +
> +static int __wait_timeline(void *arg)
> +{
> + struct mock_timeline *timeline = arg;
> + struct dma_fence *f;
> +
> + f = drm_syncobj_fence_get(timeline->syncobj);
> + dma_fence_signal(f);
Leaking a ref on the fence?
> +
> + return 0;
> +}
> +
> +static int igt_forward(void *ignored)
> +{
> + struct mock_timeline *s[MAX_TIMELINES], *t[MAX_TIMELINES];
> + struct task_struct *tasks[MAX_THREADS], *tsk;
> + struct chain_info ci, c[MAX_TIMELINES];
> + struct fence_chain *chain, *signaler;
> + int i, err = 0, count = 0;
> + struct dma_fence *last;
> +
> + //signaler will signal the points in timelines;
Kernel coding style doesn't all // comments.
> + allocate_chains(&ci, 1, 21);
> + signaler = ci.chains[0];
> +
> + dma_fence_get(&signaler->fence);
> + for (i = 0;i < MAX_TIMELINES; i++) {
> + s[i] = timeline(i, 0x0);
> + drm_syncobj_replace_fence(s[i]->syncobj, &signaler->fence);
> + tsk = kthread_run(__signal_timeline, s[i], "signal");
> + if (IS_ERR(tsk)) {
> + err = PTR_ERR(tsk);
> + goto err;
> + }
> + get_task_struct(tsk);
> + yield_to(tsk, true);
> + tasks[count++] = tsk;
> + }
> +
> + atomic_set(&signaler->signalers, MAX_TIMELINES);
> + for (i = 0;i < MAX_TIMELINES; i++) {
> +
> + allocate_chains(&c[i], 1, i);
> + t[i] = timeline(i, 0x0);
> + chain = c[i].chains[0];
> +
> + drm_syncobj_replace_fence(t[i]->syncobj,
> + dma_fence_get(&chain->fence));
drm_syncobj_replace_fence() already calls dma_fence_get() internally.
> + last = &chain->chain.base;
> + dma_fence_add_callback(t[i]->syncobj->fence,
> + &signaler->cb,
> + fence_callback);
> + tsk = kthread_run(__wait_timeline, t[i], "wait");
> + if (IS_ERR(tsk)) {
> + err = PTR_ERR(tsk);
> + goto err;
> + }
> + get_task_struct(tsk);
> + yield_to(tsk, true);
> + tasks[count++] = tsk;
> + }
> +
> + dma_fence_wait(last, true);
> + dma_fence_wait(&signaler->fence, true);
> + dma_fence_put(&signaler->fence);
> +err:
> + for (i = 0;i < count; i++) {
> + int ret;
> +
> + ret = kthread_stop(tasks[i]);
> + if (ret && !err)
> + err = ret;
> + put_task_struct(tasks[i]);
> + }
> +
> + for (i = 0; i < MAX_TIMELINES; i++) {
> + chain = c[i].chains[0];
> +
> + if (!dma_fence_get_status(&chain->chain.base) ||
> + !dma_fence_get_status(&chain->fence)) {
> + pr_err("Freeing an unsignaled fence\n");
> + err = -1;
> + }
> + delete_chains(&c[i]);
> + kmem_cache_free(slab_timeline, t[i]);
> + kmem_cache_free(slab_timeline, s[i]);
> + }
> + delete_chains(&ci);
> + return err;
> +}
> +
> +#include "drm_selftest.c"
> +
> +static int __init test_drm_timline_init(void)
> +{
> + int err = 0;
> +
> + slab_timeline = KMEM_CACHE(mock_timeline,
> + SLAB_TYPESAFE_BY_RCU |
> + SLAB_HWCACHE_ALIGN);
> +
> + slab_fence_chain = KMEM_CACHE(fence_chain,
> + SLAB_TYPESAFE_BY_RCU |
> + SLAB_HWCACHE_ALIGN);
> + if (!slab_timeline)
> + return -ENOMEM;
> +
> + pr_info("Testing timeline semaphore\n");
> + err = run_selftests(selftests, ARRAY_SIZE(selftests), NULL);
> +
> + return err > 0 ? 0 : err;
> +}
> +
> +static void __exit test_drm_timeline_exit(void)
> +{
> + kmem_cache_destroy(slab_timeline);
> + kmem_cache_destroy(slab_fence_chain);
> +}
> +
> +module_init(test_drm_timline_init);
> +module_exit(test_drm_timeline_exit);
> +
> +MODULE_AUTHOR("Intel Corporation");
> +MODULE_LICENSE("GPL");
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^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2020-04-14 13:19 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-10 16:51 [Intel-gfx] [PATCH 1/4] drm/i915: introduce a mechanism to extend execbuf2 Venkata Sandeep Dhanalakota
2020-04-10 16:51 ` [Intel-gfx] [PATCH 2/4] drm/i915: add syncobj timeline support Venkata Sandeep Dhanalakota
2020-04-10 16:51 ` [Intel-gfx] [PATCH 3/4] drm/i915: peel dma-fence-chains wait fences Venkata Sandeep Dhanalakota
2020-04-11 5:09 ` kbuild test robot
2020-04-11 5:09 ` kbuild test robot
2020-04-11 8:50 ` Lionel Landwerlin
2020-04-13 1:32 ` Venkata Sandeep Dhanalakota
2020-04-10 16:51 ` [Intel-gfx] [PATCH 4/4] drm/selftests: selftest for timeline semaphore Venkata Sandeep Dhanalakota
2020-04-10 21:11 ` kbuild test robot
2020-04-10 21:11 ` kbuild test robot
2020-04-14 13:19 ` Lionel Landwerlin
2020-04-10 16:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: introduce a mechanism to extend execbuf2 Patchwork
2020-04-10 17:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-04-10 17:23 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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