* [PATCH] drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size @ 2020-04-13 14:32 ` Jason Yan 0 siblings, 0 replies; 11+ messages in thread From: Jason Yan @ 2020-04-13 14:32 UTC (permalink / raw) To: zhenyuw, zhi.a.wang, jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel, intel-gvt-dev, intel-gfx, dri-devel, linux-kernel Cc: Jason Yan Fix the following coccicheck warning: drivers/gpu/drm/i915/gvt/vgpu.c:127:30-31: WARNING: Use ARRAY_SIZE Signed-off-by: Jason Yan <yanaijie@huawei.com> --- drivers/gpu/drm/i915/gvt/vgpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 1d5ff88078bd..7d361623ff67 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -124,7 +124,7 @@ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) */ low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; - num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); + num_types = ARRAY_SIZE(vgpu_types); gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), GFP_KERNEL); -- 2.21.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size @ 2020-04-13 14:32 ` Jason Yan 0 siblings, 0 replies; 11+ messages in thread From: Jason Yan @ 2020-04-13 14:32 UTC (permalink / raw) To: zhenyuw, zhi.a.wang, jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel, intel-gvt-dev, intel-gfx, dri-devel, linux-kernel Cc: Jason Yan Fix the following coccicheck warning: drivers/gpu/drm/i915/gvt/vgpu.c:127:30-31: WARNING: Use ARRAY_SIZE Signed-off-by: Jason Yan <yanaijie@huawei.com> --- drivers/gpu/drm/i915/gvt/vgpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 1d5ff88078bd..7d361623ff67 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -124,7 +124,7 @@ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) */ low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; - num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); + num_types = ARRAY_SIZE(vgpu_types); gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), GFP_KERNEL); -- 2.21.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH] drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size @ 2020-04-13 14:32 ` Jason Yan 0 siblings, 0 replies; 11+ messages in thread From: Jason Yan @ 2020-04-13 14:32 UTC (permalink / raw) To: zhenyuw, zhi.a.wang, jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel, intel-gvt-dev, intel-gfx, dri-devel, linux-kernel Cc: Jason Yan Fix the following coccicheck warning: drivers/gpu/drm/i915/gvt/vgpu.c:127:30-31: WARNING: Use ARRAY_SIZE Signed-off-by: Jason Yan <yanaijie@huawei.com> --- drivers/gpu/drm/i915/gvt/vgpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 1d5ff88078bd..7d361623ff67 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -124,7 +124,7 @@ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) */ low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; - num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); + num_types = ARRAY_SIZE(vgpu_types); gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), GFP_KERNEL); -- 2.21.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size 2020-04-13 14:32 ` Jason Yan (?) @ 2020-04-13 17:55 ` Joe Perches -1 siblings, 0 replies; 11+ messages in thread From: Joe Perches @ 2020-04-13 17:55 UTC (permalink / raw) To: Jason Yan, zhenyuw, zhi.a.wang, jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel, intel-gvt-dev, intel-gfx, dri-devel, linux-kernel On Mon, 2020-04-13 at 22:32 +0800, Jason Yan wrote: > Fix the following coccicheck warning: > > drivers/gpu/drm/i915/gvt/vgpu.c:127:30-31: WARNING: Use ARRAY_SIZE > > Signed-off-by: Jason Yan <yanaijie@huawei.com> > --- > drivers/gpu/drm/i915/gvt/vgpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c > index 1d5ff88078bd..7d361623ff67 100644 > --- a/drivers/gpu/drm/i915/gvt/vgpu.c > +++ b/drivers/gpu/drm/i915/gvt/vgpu.c > @@ -124,7 +124,7 @@ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) > */ > low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; > high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; > - num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); > + num_types = ARRAY_SIZE(vgpu_types); > > gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), > GFP_KERNEL); It's probably better to remove num_types altogether and just use ARRAY_SIZE in both places num_types is used. Perhaps refactoring the function a bit more is also better. Perhaps: o Use ARRAY_SIZE o Make vgpu_types static const to reduce data size and move the definition into the function where it's used o Use temporaries to shorten the code indirections. --- drivers/gpu/drm/i915/gvt/vgpu.c | 92 +++++++++++++++++++++-------------------- 1 file changed, 47 insertions(+), 45 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 1d5ff8..e56f59d 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -77,26 +77,6 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu) #define VGPU_WEIGHT(vgpu_num) \ (VGPU_MAX_WEIGHT / (vgpu_num)) -static struct { - unsigned int low_mm; - unsigned int high_mm; - unsigned int fence; - - /* A vGPU with a weight of 8 will get twice as much GPU as a vGPU - * with a weight of 4 on a contended host, different vGPU type has - * different weight set. Legal weights range from 1 to 16. - */ - unsigned int weight; - enum intel_vgpu_edid edid; - char *name; -} vgpu_types[] = { -/* Fixed vGPU type table */ - { MB_TO_BYTES(64), MB_TO_BYTES(384), 4, VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" }, - { MB_TO_BYTES(128), MB_TO_BYTES(512), 4, VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" }, - { MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" }, - { MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" }, -}; - /** * intel_gvt_init_vgpu_types - initialize vGPU type list * @gvt : GVT device @@ -106,9 +86,32 @@ static struct { */ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) { - unsigned int num_types; unsigned int i, low_avail, high_avail; unsigned int min_low; + static const struct vgpu_types { + unsigned int low_mm; + unsigned int high_mm; + unsigned int fence; + + /* A vGPU with a weight of 8 will get twice as much GPU + * as a vGPU with a weight of 4 on a contended host, + * different vGPU type has different weight set. + * Legal weights range from 1 to 16. + */ + unsigned int weight; + enum intel_vgpu_edid edid; + char *name; + } vgpu_types[] = { + /* Fixed vGPU type table */ + { MB_TO_BYTES(64), MB_TO_BYTES(384), 4, + VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" }, + { MB_TO_BYTES(128), MB_TO_BYTES(512), 4, + VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" }, + { MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, + VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" }, + { MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, + VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" }, + }; /* vGPU type name is defined as GVTg_Vx_y which contains * physical GPU generation type (e.g V4 as BDW server, V5 as @@ -124,45 +127,44 @@ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) */ low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; - num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); - gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), - GFP_KERNEL); + gvt->types = kcalloc(ARRAY_SIZE(vgpu_types), + sizeof(struct intel_vgpu_type), GFP_KERNEL); if (!gvt->types) return -ENOMEM; min_low = MB_TO_BYTES(32); - for (i = 0; i < num_types; ++i) { - if (low_avail / vgpu_types[i].low_mm == 0) + for (i = 0; i < ARRAY_SIZE(vgpu_types); i++) { + struct intel_vgpu_type *type = &gvt->types[i]; + const struct vgpu_types *vgpu = &vgpu_types[i]; + + if (low_avail / vgpu->low_mm == 0) break; - gvt->types[i].low_gm_size = vgpu_types[i].low_mm; - gvt->types[i].high_gm_size = vgpu_types[i].high_mm; - gvt->types[i].fence = vgpu_types[i].fence; + type->low_gm_size = vgpu->low_mm; + type->high_gm_size = vgpu->high_mm; + type->fence = vgpu->fence; - if (vgpu_types[i].weight < 1 || - vgpu_types[i].weight > VGPU_MAX_WEIGHT) + if (vgpu->weight < 1 || vgpu->weight > VGPU_MAX_WEIGHT) return -EINVAL; - gvt->types[i].weight = vgpu_types[i].weight; - gvt->types[i].resolution = vgpu_types[i].edid; - gvt->types[i].avail_instance = min(low_avail / vgpu_types[i].low_mm, - high_avail / vgpu_types[i].high_mm); + type->weight = vgpu->weight; + type->resolution = vgpu->edid; + type->avail_instance = min(low_avail / vgpu->low_mm, + high_avail / vgpu->high_mm); if (IS_GEN(gvt->gt->i915, 8)) - sprintf(gvt->types[i].name, "GVTg_V4_%s", - vgpu_types[i].name); + sprintf(type->name, "GVTg_V4_%s", vgpu->name); else if (IS_GEN(gvt->gt->i915, 9)) - sprintf(gvt->types[i].name, "GVTg_V5_%s", - vgpu_types[i].name); + sprintf(type->name, "GVTg_V5_%s", vgpu->name); gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n", - i, gvt->types[i].name, - gvt->types[i].avail_instance, - gvt->types[i].low_gm_size, - gvt->types[i].high_gm_size, gvt->types[i].fence, - gvt->types[i].weight, - vgpu_edid_str(gvt->types[i].resolution)); + i, type->name, + type->avail_instance, + type->low_gm_size, + type->high_gm_size, type->fence, + type->weight, + vgpu_edid_str(type->resolution)); } gvt->num_types = i; ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size @ 2020-04-13 17:55 ` Joe Perches 0 siblings, 0 replies; 11+ messages in thread From: Joe Perches @ 2020-04-13 17:55 UTC (permalink / raw) To: Jason Yan, zhenyuw, zhi.a.wang, jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel, intel-gvt-dev, intel-gfx, dri-devel, linux-kernel On Mon, 2020-04-13 at 22:32 +0800, Jason Yan wrote: > Fix the following coccicheck warning: > > drivers/gpu/drm/i915/gvt/vgpu.c:127:30-31: WARNING: Use ARRAY_SIZE > > Signed-off-by: Jason Yan <yanaijie@huawei.com> > --- > drivers/gpu/drm/i915/gvt/vgpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c > index 1d5ff88078bd..7d361623ff67 100644 > --- a/drivers/gpu/drm/i915/gvt/vgpu.c > +++ b/drivers/gpu/drm/i915/gvt/vgpu.c > @@ -124,7 +124,7 @@ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) > */ > low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; > high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; > - num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); > + num_types = ARRAY_SIZE(vgpu_types); > > gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), > GFP_KERNEL); It's probably better to remove num_types altogether and just use ARRAY_SIZE in both places num_types is used. Perhaps refactoring the function a bit more is also better. Perhaps: o Use ARRAY_SIZE o Make vgpu_types static const to reduce data size and move the definition into the function where it's used o Use temporaries to shorten the code indirections. --- drivers/gpu/drm/i915/gvt/vgpu.c | 92 +++++++++++++++++++++-------------------- 1 file changed, 47 insertions(+), 45 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 1d5ff8..e56f59d 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -77,26 +77,6 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu) #define VGPU_WEIGHT(vgpu_num) \ (VGPU_MAX_WEIGHT / (vgpu_num)) -static struct { - unsigned int low_mm; - unsigned int high_mm; - unsigned int fence; - - /* A vGPU with a weight of 8 will get twice as much GPU as a vGPU - * with a weight of 4 on a contended host, different vGPU type has - * different weight set. Legal weights range from 1 to 16. - */ - unsigned int weight; - enum intel_vgpu_edid edid; - char *name; -} vgpu_types[] = { -/* Fixed vGPU type table */ - { MB_TO_BYTES(64), MB_TO_BYTES(384), 4, VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" }, - { MB_TO_BYTES(128), MB_TO_BYTES(512), 4, VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" }, - { MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" }, - { MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" }, -}; - /** * intel_gvt_init_vgpu_types - initialize vGPU type list * @gvt : GVT device @@ -106,9 +86,32 @@ static struct { */ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) { - unsigned int num_types; unsigned int i, low_avail, high_avail; unsigned int min_low; + static const struct vgpu_types { + unsigned int low_mm; + unsigned int high_mm; + unsigned int fence; + + /* A vGPU with a weight of 8 will get twice as much GPU + * as a vGPU with a weight of 4 on a contended host, + * different vGPU type has different weight set. + * Legal weights range from 1 to 16. + */ + unsigned int weight; + enum intel_vgpu_edid edid; + char *name; + } vgpu_types[] = { + /* Fixed vGPU type table */ + { MB_TO_BYTES(64), MB_TO_BYTES(384), 4, + VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" }, + { MB_TO_BYTES(128), MB_TO_BYTES(512), 4, + VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" }, + { MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, + VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" }, + { MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, + VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" }, + }; /* vGPU type name is defined as GVTg_Vx_y which contains * physical GPU generation type (e.g V4 as BDW server, V5 as @@ -124,45 +127,44 @@ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) */ low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; - num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); - gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), - GFP_KERNEL); + gvt->types = kcalloc(ARRAY_SIZE(vgpu_types), + sizeof(struct intel_vgpu_type), GFP_KERNEL); if (!gvt->types) return -ENOMEM; min_low = MB_TO_BYTES(32); - for (i = 0; i < num_types; ++i) { - if (low_avail / vgpu_types[i].low_mm == 0) + for (i = 0; i < ARRAY_SIZE(vgpu_types); i++) { + struct intel_vgpu_type *type = &gvt->types[i]; + const struct vgpu_types *vgpu = &vgpu_types[i]; + + if (low_avail / vgpu->low_mm == 0) break; - gvt->types[i].low_gm_size = vgpu_types[i].low_mm; - gvt->types[i].high_gm_size = vgpu_types[i].high_mm; - gvt->types[i].fence = vgpu_types[i].fence; + type->low_gm_size = vgpu->low_mm; + type->high_gm_size = vgpu->high_mm; + type->fence = vgpu->fence; - if (vgpu_types[i].weight < 1 || - vgpu_types[i].weight > VGPU_MAX_WEIGHT) + if (vgpu->weight < 1 || vgpu->weight > VGPU_MAX_WEIGHT) return -EINVAL; - gvt->types[i].weight = vgpu_types[i].weight; - gvt->types[i].resolution = vgpu_types[i].edid; - gvt->types[i].avail_instance = min(low_avail / vgpu_types[i].low_mm, - high_avail / vgpu_types[i].high_mm); + type->weight = vgpu->weight; + type->resolution = vgpu->edid; + type->avail_instance = min(low_avail / vgpu->low_mm, + high_avail / vgpu->high_mm); if (IS_GEN(gvt->gt->i915, 8)) - sprintf(gvt->types[i].name, "GVTg_V4_%s", - vgpu_types[i].name); + sprintf(type->name, "GVTg_V4_%s", vgpu->name); else if (IS_GEN(gvt->gt->i915, 9)) - sprintf(gvt->types[i].name, "GVTg_V5_%s", - vgpu_types[i].name); + sprintf(type->name, "GVTg_V5_%s", vgpu->name); gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n", - i, gvt->types[i].name, - gvt->types[i].avail_instance, - gvt->types[i].low_gm_size, - gvt->types[i].high_gm_size, gvt->types[i].fence, - gvt->types[i].weight, - vgpu_edid_str(gvt->types[i].resolution)); + i, type->name, + type->avail_instance, + type->low_gm_size, + type->high_gm_size, type->fence, + type->weight, + vgpu_edid_str(type->resolution)); } gvt->num_types = i; _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size @ 2020-04-13 17:55 ` Joe Perches 0 siblings, 0 replies; 11+ messages in thread From: Joe Perches @ 2020-04-13 17:55 UTC (permalink / raw) To: Jason Yan, zhenyuw, zhi.a.wang, jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel, intel-gvt-dev, intel-gfx, dri-devel, linux-kernel On Mon, 2020-04-13 at 22:32 +0800, Jason Yan wrote: > Fix the following coccicheck warning: > > drivers/gpu/drm/i915/gvt/vgpu.c:127:30-31: WARNING: Use ARRAY_SIZE > > Signed-off-by: Jason Yan <yanaijie@huawei.com> > --- > drivers/gpu/drm/i915/gvt/vgpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c > index 1d5ff88078bd..7d361623ff67 100644 > --- a/drivers/gpu/drm/i915/gvt/vgpu.c > +++ b/drivers/gpu/drm/i915/gvt/vgpu.c > @@ -124,7 +124,7 @@ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) > */ > low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; > high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; > - num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); > + num_types = ARRAY_SIZE(vgpu_types); > > gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), > GFP_KERNEL); It's probably better to remove num_types altogether and just use ARRAY_SIZE in both places num_types is used. Perhaps refactoring the function a bit more is also better. Perhaps: o Use ARRAY_SIZE o Make vgpu_types static const to reduce data size and move the definition into the function where it's used o Use temporaries to shorten the code indirections. --- drivers/gpu/drm/i915/gvt/vgpu.c | 92 +++++++++++++++++++++-------------------- 1 file changed, 47 insertions(+), 45 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 1d5ff8..e56f59d 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -77,26 +77,6 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu) #define VGPU_WEIGHT(vgpu_num) \ (VGPU_MAX_WEIGHT / (vgpu_num)) -static struct { - unsigned int low_mm; - unsigned int high_mm; - unsigned int fence; - - /* A vGPU with a weight of 8 will get twice as much GPU as a vGPU - * with a weight of 4 on a contended host, different vGPU type has - * different weight set. Legal weights range from 1 to 16. - */ - unsigned int weight; - enum intel_vgpu_edid edid; - char *name; -} vgpu_types[] = { -/* Fixed vGPU type table */ - { MB_TO_BYTES(64), MB_TO_BYTES(384), 4, VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" }, - { MB_TO_BYTES(128), MB_TO_BYTES(512), 4, VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" }, - { MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" }, - { MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" }, -}; - /** * intel_gvt_init_vgpu_types - initialize vGPU type list * @gvt : GVT device @@ -106,9 +86,32 @@ static struct { */ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) { - unsigned int num_types; unsigned int i, low_avail, high_avail; unsigned int min_low; + static const struct vgpu_types { + unsigned int low_mm; + unsigned int high_mm; + unsigned int fence; + + /* A vGPU with a weight of 8 will get twice as much GPU + * as a vGPU with a weight of 4 on a contended host, + * different vGPU type has different weight set. + * Legal weights range from 1 to 16. + */ + unsigned int weight; + enum intel_vgpu_edid edid; + char *name; + } vgpu_types[] = { + /* Fixed vGPU type table */ + { MB_TO_BYTES(64), MB_TO_BYTES(384), 4, + VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" }, + { MB_TO_BYTES(128), MB_TO_BYTES(512), 4, + VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" }, + { MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, + VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" }, + { MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, + VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" }, + }; /* vGPU type name is defined as GVTg_Vx_y which contains * physical GPU generation type (e.g V4 as BDW server, V5 as @@ -124,45 +127,44 @@ int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) */ low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; - num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]); - gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), - GFP_KERNEL); + gvt->types = kcalloc(ARRAY_SIZE(vgpu_types), + sizeof(struct intel_vgpu_type), GFP_KERNEL); if (!gvt->types) return -ENOMEM; min_low = MB_TO_BYTES(32); - for (i = 0; i < num_types; ++i) { - if (low_avail / vgpu_types[i].low_mm == 0) + for (i = 0; i < ARRAY_SIZE(vgpu_types); i++) { + struct intel_vgpu_type *type = &gvt->types[i]; + const struct vgpu_types *vgpu = &vgpu_types[i]; + + if (low_avail / vgpu->low_mm == 0) break; - gvt->types[i].low_gm_size = vgpu_types[i].low_mm; - gvt->types[i].high_gm_size = vgpu_types[i].high_mm; - gvt->types[i].fence = vgpu_types[i].fence; + type->low_gm_size = vgpu->low_mm; + type->high_gm_size = vgpu->high_mm; + type->fence = vgpu->fence; - if (vgpu_types[i].weight < 1 || - vgpu_types[i].weight > VGPU_MAX_WEIGHT) + if (vgpu->weight < 1 || vgpu->weight > VGPU_MAX_WEIGHT) return -EINVAL; - gvt->types[i].weight = vgpu_types[i].weight; - gvt->types[i].resolution = vgpu_types[i].edid; - gvt->types[i].avail_instance = min(low_avail / vgpu_types[i].low_mm, - high_avail / vgpu_types[i].high_mm); + type->weight = vgpu->weight; + type->resolution = vgpu->edid; + type->avail_instance = min(low_avail / vgpu->low_mm, + high_avail / vgpu->high_mm); if (IS_GEN(gvt->gt->i915, 8)) - sprintf(gvt->types[i].name, "GVTg_V4_%s", - vgpu_types[i].name); + sprintf(type->name, "GVTg_V4_%s", vgpu->name); else if (IS_GEN(gvt->gt->i915, 9)) - sprintf(gvt->types[i].name, "GVTg_V5_%s", - vgpu_types[i].name); + sprintf(type->name, "GVTg_V5_%s", vgpu->name); gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n", - i, gvt->types[i].name, - gvt->types[i].avail_instance, - gvt->types[i].low_gm_size, - gvt->types[i].high_gm_size, gvt->types[i].fence, - gvt->types[i].weight, - vgpu_edid_str(gvt->types[i].resolution)); + i, type->name, + type->avail_instance, + type->low_gm_size, + type->high_gm_size, type->fence, + type->weight, + vgpu_edid_str(type->resolution)); } gvt->num_types = i; _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) 2020-04-13 14:32 ` Jason Yan ` (2 preceding siblings ...) (?) @ 2020-04-14 20:30 ` Patchwork 2020-04-14 20:36 ` Joe Perches -1 siblings, 1 reply; 11+ messages in thread From: Patchwork @ 2020-04-14 20:30 UTC (permalink / raw) To: Joe Perches; +Cc: intel-gfx == Series Details == Series: drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) URL : https://patchwork.freedesktop.org/series/75888/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7523f4bbc30d drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size -:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #16: > diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c -:175: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s) total: 1 errors, 1 warnings, 0 checks, 127 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) 2020-04-14 20:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) Patchwork @ 2020-04-14 20:36 ` Joe Perches 0 siblings, 0 replies; 11+ messages in thread From: Joe Perches @ 2020-04-14 20:36 UTC (permalink / raw) To: intel-gfx On Tue, 2020-04-14 at 20:30 +0000, Patchwork wrote: > == Series Details == > > Series: drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) > URL : https://patchwork.freedesktop.org/series/75888/ > State : warning This seems an odd message to receive as I was simply making suggestions to the original submitter. It's specifically _not_ signed-off. > == Summary == > > $ dim checkpatch origin/drm-tip > 7523f4bbc30d drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size > -:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) > #16: > > diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c > > -:175: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s) > > total: 1 errors, 1 warnings, 0 checks, 127 lines checked > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) 2020-04-13 14:32 ` Jason Yan ` (3 preceding siblings ...) (?) @ 2020-04-14 20:47 ` Patchwork -1 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2020-04-14 20:47 UTC (permalink / raw) To: Joe Perches; +Cc: intel-gfx == Series Details == Series: drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) URL : https://patchwork.freedesktop.org/series/75888/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 /home/cidrm/kernel/Documentation/gpu/i915.rst:610: WARNING: duplicate label gpu/i915:layout, other instance in /home/cidrm/kernel/Documentation/gpu/i915.rst _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) 2020-04-13 14:32 ` Jason Yan ` (4 preceding siblings ...) (?) @ 2020-04-14 20:54 ` Patchwork -1 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2020-04-14 20:54 UTC (permalink / raw) To: Joe Perches; +Cc: intel-gfx == Series Details == Series: drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) URL : https://patchwork.freedesktop.org/series/75888/ State : success == Summary == CI Bug Log - changes from CI_DRM_8298 -> Patchwork_17289 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/index.html Known issues ------------ Here are the changes found in Patchwork_17289 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_pm_rpm@module-reload: - fi-icl-dsi: [PASS][1] -> [INCOMPLETE][2] ([i915#189]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/fi-icl-dsi/igt@i915_pm_rpm@module-reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/fi-icl-dsi/igt@i915_pm_rpm@module-reload.html * igt@i915_selftest@live@execlists: - fi-icl-y: [PASS][3] -> [DMESG-FAIL][4] ([i915#1314]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/fi-icl-y/igt@i915_selftest@live@execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/fi-icl-y/igt@i915_selftest@live@execlists.html #### Warnings #### * igt@i915_pm_rpm@module-reload: - fi-kbl-x1275: [SKIP][5] ([fdo#109271]) -> [FAIL][6] ([i915#62]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1314]: https://gitlab.freedesktop.org/drm/intel/issues/1314 [i915#189]: https://gitlab.freedesktop.org/drm/intel/issues/189 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 Participating hosts (48 -> 43) ------------------------------ Missing (5): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7560u fi-byt-clapper Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_8298 -> Patchwork_17289 CI-20190529: 20190529 CI_DRM_8298: 17f82f0c2857d0b442adbdb62eb44b61d0f5b775 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5589: 31962324ac86f029e2841e56e97c42cf9d572956 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_17289: 7523f4bbc30d49833788a4397e1c7feda9c48862 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 7523f4bbc30d drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) 2020-04-13 14:32 ` Jason Yan ` (5 preceding siblings ...) (?) @ 2020-04-15 12:12 ` Patchwork -1 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2020-04-15 12:12 UTC (permalink / raw) To: Joe Perches; +Cc: intel-gfx == Series Details == Series: drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) URL : https://patchwork.freedesktop.org/series/75888/ State : success == Summary == CI Bug Log - changes from CI_DRM_8298_full -> Patchwork_17289_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_17289_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen: - shard-apl: [PASS][1] -> [FAIL][2] ([i915#54] / [i915#95]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-apl1/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-apl8/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([i915#180]) +2 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic: - shard-glk: [PASS][5] -> [FAIL][6] ([i915#117] / [i915#133]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-glk7/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-glk8/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible: - shard-skl: [PASS][7] -> [FAIL][8] ([i915#34]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl4/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl1/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [PASS][9] -> [FAIL][10] ([i915#79]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([i915#221]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl4/igt@kms_flip@flip-vs-suspend-interruptible.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl8/igt@kms_flip@flip-vs-suspend-interruptible.html - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-skl: [PASS][15] -> [INCOMPLETE][16] ([i915#69]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-apl: [PASS][17] -> [DMESG-WARN][18] ([i915#180] / [i915#95]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html - shard-kbl: [PASS][19] -> [DMESG-WARN][20] ([i915#180] / [i915#93] / [i915#95]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145] / [i915#265]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_psr@psr2_primary_page_flip: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-iclb1/igt@kms_psr@psr2_primary_page_flip.html * igt@kms_setmode@basic: - shard-skl: [PASS][25] -> [FAIL][26] ([i915#31]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl7/igt@kms_setmode@basic.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl6/igt@kms_setmode@basic.html #### Possible fixes #### * {igt@gem_wait@write-wait@all}: - shard-skl: [FAIL][27] ([i915#1676]) -> [PASS][28] [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl2/igt@gem_wait@write-wait@all.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl4/igt@gem_wait@write-wait@all.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-glk: [FAIL][29] ([i915#72]) -> [PASS][30] [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-glk7/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: [FAIL][31] ([i915#79]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl8/igt@kms_flip@flip-vs-expired-vblank.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl9/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_hdr@bpc-switch: - shard-skl: [FAIL][33] ([i915#1188]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl9/igt@kms_hdr@bpc-switch.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl4/igt@kms_hdr@bpc-switch.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-kbl: [DMESG-WARN][35] ([i915#180]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [FAIL][37] ([fdo#108145] / [i915#265]) -> [PASS][38] +1 similar issue [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html * igt@kms_psr@psr2_primary_mmap_cpu: - shard-iclb: [SKIP][39] ([fdo#109441]) -> [PASS][40] +1 similar issue [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-iclb1/igt@kms_psr@psr2_primary_mmap_cpu.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html * igt@kms_vblank@pipe-b-ts-continuation-suspend: - shard-apl: [DMESG-WARN][41] ([i915#180]) -> [PASS][42] +3 similar issues [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-apl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-apl3/igt@kms_vblank@pipe-b-ts-continuation-suspend.html #### Warnings #### * igt@kms_plane_alpha_blend@pipe-a-alpha-basic: - shard-apl: [FAIL][43] ([fdo#108145] / [i915#265]) -> [FAIL][44] ([fdo#108145] / [i915#265] / [i915#95]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: - shard-apl: [FAIL][45] ([fdo#108145] / [i915#265] / [i915#95]) -> [FAIL][46] ([fdo#108145] / [i915#265]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-apl1/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-apl8/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: - shard-kbl: [FAIL][47] ([fdo#108145] / [i915#265] / [i915#93] / [i915#95]) -> [FAIL][48] ([fdo#108145] / [i915#265]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8298/shard-kbl2/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/shard-kbl3/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [i915#117]: https://gitlab.freedesktop.org/drm/intel/issues/117 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#133]: https://gitlab.freedesktop.org/drm/intel/issues/133 [i915#1459]: https://gitlab.freedesktop.org/drm/intel/issues/1459 [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542 [i915#1676]: https://gitlab.freedesktop.org/drm/intel/issues/1676 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69 [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_8298 -> Patchwork_17289 CI-20190529: 20190529 CI_DRM_8298: 17f82f0c2857d0b442adbdb62eb44b61d0f5b775 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5589: 31962324ac86f029e2841e56e97c42cf9d572956 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_17289: 7523f4bbc30d49833788a4397e1c7feda9c48862 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17289/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2020-04-15 12:12 UTC | newest] Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-04-13 14:32 [PATCH] drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size Jason Yan 2020-04-13 14:32 ` [Intel-gfx] " Jason Yan 2020-04-13 14:32 ` Jason Yan 2020-04-13 17:55 ` Joe Perches 2020-04-13 17:55 ` [Intel-gfx] " Joe Perches 2020-04-13 17:55 ` Joe Perches 2020-04-14 20:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gvt: Use ARRAY_SIZE instead of hardcoded size (rev2) Patchwork 2020-04-14 20:36 ` Joe Perches 2020-04-14 20:47 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork 2020-04-14 20:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-04-15 12:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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