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* [Intel-gfx] [PATCH v4 0/4] i915 lpsp support for lpsp igt
@ 2020-04-09  6:06 Anshuman Gupta
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 1/4] drm/i915: Power well id for ICL PG3 Anshuman Gupta
                   ` (6 more replies)
  0 siblings, 7 replies; 13+ messages in thread
From: Anshuman Gupta @ 2020-04-09  6:06 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula, ankit.k.nautiyal

v4 has fixed the review comment provided by animesh.

Test-with: 20200409053951.26929-2-anshuman.gupta@intel.com

Anshuman Gupta (4):
  drm/i915: Power well id for ICL PG3
  drm/i915: Add i915_lpsp_capability debugfs
  drm/i915: Add connector dbgfs for all connectors
  drm/i915: Add i915_lpsp_status debugfs attribute

 .../gpu/drm/i915/display/intel_connector.c    |   3 +
 .../drm/i915/display/intel_display_debugfs.c  | 109 ++++++++++++++++++
 .../drm/i915/display/intel_display_power.c    |   6 +-
 .../drm/i915/display/intel_display_power.h    |   4 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |   3 -
 drivers/gpu/drm/i915/display/intel_hdmi.c     |   3 -
 6 files changed, 118 insertions(+), 10 deletions(-)

-- 
2.26.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH v4 1/4] drm/i915: Power well id for ICL PG3
  2020-04-09  6:06 [Intel-gfx] [PATCH v4 0/4] i915 lpsp support for lpsp igt Anshuman Gupta
@ 2020-04-09  6:06 ` Anshuman Gupta
  2020-04-14 14:22   ` Manna, Animesh
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 2/4] drm/i915: Add i915_lpsp_capability debugfs Anshuman Gupta
                   ` (5 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Anshuman Gupta @ 2020-04-09  6:06 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula, ankit.k.nautiyal

Gen11 onwards PG3 is contains functions for pipe B,
external displays, and VGA. It make sense to add
a power well id with name ICL_DISP_PW_3 rather then
TGL_DISP_PW_3, Also PG3 power well id requires to
know if lpsp is enabled.

Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 6 +++---
 drivers/gpu/drm/i915/display/intel_display_power.h | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 433e5a81dd4d..3672c00be94a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -943,7 +943,7 @@ static void assert_can_enable_dc5(struct drm_i915_private *dev_priv)
 
 	/* Power wells at this level and above must be disabled for DC5 entry */
 	if (INTEL_GEN(dev_priv) >= 12)
-		high_pg = TGL_DISP_PW_3;
+		high_pg = ICL_DISP_PW_3;
 	else
 		high_pg = SKL_DISP_PW_2;
 
@@ -3571,7 +3571,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
 		.name = "power well 3",
 		.domains = ICL_PW_3_POWER_DOMAINS,
 		.ops = &hsw_power_well_ops,
-		.id = DISP_PW_ID_NONE,
+		.id = ICL_DISP_PW_3,
 		{
 			.hsw.regs = &hsw_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_PW_3,
@@ -3949,7 +3949,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
 		.name = "power well 3",
 		.domains = TGL_PW_3_POWER_DOMAINS,
 		.ops = &hsw_power_well_ops,
-		.id = TGL_DISP_PW_3,
+		.id = ICL_DISP_PW_3,
 		{
 			.hsw.regs = &hsw_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_PW_3,
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index da64a5edae7a..56cbae6327b7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -100,7 +100,7 @@ enum i915_power_well_id {
 	SKL_DISP_PW_MISC_IO,
 	SKL_DISP_PW_1,
 	SKL_DISP_PW_2,
-	TGL_DISP_PW_3,
+	ICL_DISP_PW_3,
 	SKL_DISP_DC_OFF,
 };
 
-- 
2.26.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH v4 2/4] drm/i915: Add i915_lpsp_capability debugfs
  2020-04-09  6:06 [Intel-gfx] [PATCH v4 0/4] i915 lpsp support for lpsp igt Anshuman Gupta
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 1/4] drm/i915: Power well id for ICL PG3 Anshuman Gupta
@ 2020-04-09  6:06 ` Anshuman Gupta
  2020-04-14 15:46   ` Manna, Animesh
  2020-04-15 12:50   ` Anshuman Gupta
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 3/4] drm/i915: Add connector dbgfs for all connectors Anshuman Gupta
                   ` (4 subsequent siblings)
  6 siblings, 2 replies; 13+ messages in thread
From: Anshuman Gupta @ 2020-04-09  6:06 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula, ankit.k.nautiyal

New i915_pm_lpsp igt solution approach relies on connector specific
debugfs attribute i915_lpsp_capability, it exposes whether an output is
capable of driving lpsp.

v2:
- CI fixup.
v3:
- register i915_lpsp_info only for supported connector. [Jani]
- use intel_display_power_well_is_enabled() instead of looking
  inside power_well count. [Jani]
- fixes the lpsp capable conditional logic. [Jani]
- combined the lpsp capable and enable info. [Jani]
v4:
- Separate out connector based debugfs i915_lpsp_capability
  lpsp enable status would be exposes by different entry. [Animesh]

Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../drm/i915/display/intel_display_debugfs.c  | 63 +++++++++++++++++++
 1 file changed, 63 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index bdeea2e02642..402b89daff62 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -611,6 +611,28 @@ static void intel_hdcp_info(struct seq_file *m,
 	seq_puts(m, "\n");
 }
 
+#define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
+				seq_puts(m, "LPSP: incapable\n"))
+
+static bool intel_have_edp_dsi_panel(struct drm_connector *connector)
+{
+	return connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
+		connector->connector_type == DRM_MODE_CONNECTOR_eDP;
+}
+
+static bool intel_have_dp_edp_dsi_panel(struct drm_connector *connector)
+{
+	return intel_have_edp_dsi_panel(connector) ||
+		connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort;
+}
+
+static bool intel_have_hdmi_dp_edp_dsi_panel(struct drm_connector *connector)
+{
+	return intel_have_dp_edp_dsi_panel(connector) ||
+		connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
+		connector->connector_type == DRM_MODE_CONNECTOR_HDMIB;
+}
+
 static void intel_dp_info(struct seq_file *m,
 			  struct intel_connector *intel_connector)
 {
@@ -1991,6 +2013,42 @@ static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
 }
 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
 
+static int i915_lpsp_capability_show(struct seq_file *m, void *data)
+{
+	struct drm_connector *connector = m->private;
+	struct intel_encoder *encoder =
+			intel_attached_encoder(to_intel_connector(connector));
+	struct drm_i915_private *i915 = to_i915(connector->dev);
+
+	if (connector->status != connector_status_connected)
+		return -ENODEV;
+
+	switch (INTEL_GEN(i915)) {
+	case 12:
+		/*
+		 * Actually TGL can drive LPSP on port till DDI_C
+		 * but there is no physical connected DDI_C on TGL sku's,
+		 * even driver is not initilizing DDI_C port for gen12.
+		 */
+		LPSP_CAPABLE(encoder->port <= PORT_B);
+		break;
+	case 11:
+		LPSP_CAPABLE(intel_have_edp_dsi_panel(connector));
+		break;
+	case 10:
+	case 9:
+		LPSP_CAPABLE(encoder->port == PORT_A &&
+			     intel_have_dp_edp_dsi_panel(connector));
+		break;
+	default:
+		if (IS_HASWELL(i915) || IS_BROADWELL(i915))
+			LPSP_CAPABLE(connector->connector_type == DRM_MODE_CONNECTOR_eDP);
+	}
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
+
 static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
 {
 	struct drm_connector *connector = m->private;
@@ -2134,5 +2192,10 @@ int intel_connector_debugfs_add(struct drm_connector *connector)
 		debugfs_create_file("i915_dsc_fec_support", S_IRUGO, root,
 				    connector, &i915_dsc_fec_support_fops);
 
+	/* Legacy panels doesn't lpsp on any platform */
+	if (intel_have_hdmi_dp_edp_dsi_panel(connector))
+		debugfs_create_file("i915_lpsp_capability", 0444, root,
+				    connector, &i915_lpsp_capability_fops);
+
 	return 0;
 }
-- 
2.26.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH v4 3/4] drm/i915: Add connector dbgfs for all connectors
  2020-04-09  6:06 [Intel-gfx] [PATCH v4 0/4] i915 lpsp support for lpsp igt Anshuman Gupta
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 1/4] drm/i915: Power well id for ICL PG3 Anshuman Gupta
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 2/4] drm/i915: Add i915_lpsp_capability debugfs Anshuman Gupta
@ 2020-04-09  6:06 ` Anshuman Gupta
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 4/4] drm/i915: Add i915_lpsp_status debugfs attribute Anshuman Gupta
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 13+ messages in thread
From: Anshuman Gupta @ 2020-04-09  6:06 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula, ankit.k.nautiyal

Add connector debugfs attributes for each intel
connector which is getting register.

v2:
- adding connector debugfs for each connector in
  intel_connector_register() to fix CI failure for legacy connectors.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_connector.c | 3 +++
 drivers/gpu/drm/i915/display/intel_dp.c        | 3 ---
 drivers/gpu/drm/i915/display/intel_hdmi.c      | 3 ---
 3 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_connector.c b/drivers/gpu/drm/i915/display/intel_connector.c
index 98ec2ea86c7c..406e96785c76 100644
--- a/drivers/gpu/drm/i915/display/intel_connector.c
+++ b/drivers/gpu/drm/i915/display/intel_connector.c
@@ -33,6 +33,7 @@
 
 #include "i915_drv.h"
 #include "intel_connector.h"
+#include "intel_display_debugfs.h"
 #include "intel_display_types.h"
 #include "intel_hdcp.h"
 
@@ -123,6 +124,8 @@ int intel_connector_register(struct drm_connector *connector)
 		goto err_backlight;
 	}
 
+	intel_connector_debugfs_add(connector);
+
 	return 0;
 
 err_backlight:
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 85cfd7210ad8..2cea1c0dcaa8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -48,7 +48,6 @@
 #include "intel_audio.h"
 #include "intel_connector.h"
 #include "intel_ddi.h"
-#include "intel_display_debugfs.h"
 #include "intel_display_types.h"
 #include "intel_dp.h"
 #include "intel_dp_link_training.h"
@@ -6451,8 +6450,6 @@ intel_dp_connector_register(struct drm_connector *connector)
 	if (ret)
 		return ret;
 
-	intel_connector_debugfs_add(connector);
-
 	drm_dbg_kms(&i915->drm, "registering %s bus for %s\n",
 		    intel_dp->aux.name, connector->kdev->kobj.name);
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 011d83c2a1e3..0ca8bf62cb8e 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -44,7 +44,6 @@
 #include "intel_audio.h"
 #include "intel_connector.h"
 #include "intel_ddi.h"
-#include "intel_display_debugfs.h"
 #include "intel_display_types.h"
 #include "intel_dp.h"
 #include "intel_dpio_phy.h"
@@ -2877,8 +2876,6 @@ intel_hdmi_connector_register(struct drm_connector *connector)
 	if (ret)
 		return ret;
 
-	intel_connector_debugfs_add(connector);
-
 	intel_hdmi_create_i2c_symlink(connector);
 
 	return ret;
-- 
2.26.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH v4 4/4] drm/i915: Add i915_lpsp_status debugfs attribute
  2020-04-09  6:06 [Intel-gfx] [PATCH v4 0/4] i915 lpsp support for lpsp igt Anshuman Gupta
                   ` (2 preceding siblings ...)
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 3/4] drm/i915: Add connector dbgfs for all connectors Anshuman Gupta
@ 2020-04-09  6:06 ` Anshuman Gupta
  2020-04-14 16:13   ` Manna, Animesh
  2020-04-09  7:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success for i915 lpsp support for lpsp igt (rev7) Patchwork
                   ` (2 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Anshuman Gupta @ 2020-04-09  6:06 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula, ankit.k.nautiyal

It requires a separate debugfs attribute to expose lpsp
status to user space, as there may be display less configuration
without any valid connected output, those configuration will not be
able to test lpsp status, if lpsp status exposed from a connector
based debugfs attribute.

Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../drm/i915/display/intel_display_debugfs.c  | 46 +++++++++++++++++++
 .../drm/i915/display/intel_display_power.h    |  2 +
 2 files changed, 48 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 402b89daff62..9a5b7f1cbe07 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -9,6 +9,7 @@
 #include "i915_debugfs.h"
 #include "intel_csr.h"
 #include "intel_display_debugfs.h"
+#include "intel_display_power.h"
 #include "intel_display_types.h"
 #include "intel_dp.h"
 #include "intel_fbc.h"
@@ -613,6 +614,8 @@ static void intel_hdcp_info(struct seq_file *m,
 
 #define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
 				seq_puts(m, "LPSP: incapable\n"))
+#define LPSP_STATUS(COND) (COND ? seq_puts(m, "LPSP: enabled\n") : \
+				seq_puts(m, "LPSP: disabled\n"))
 
 static bool intel_have_edp_dsi_panel(struct drm_connector *connector)
 {
@@ -1165,6 +1168,48 @@ static int i915_drrs_status(struct seq_file *m, void *unused)
 	return 0;
 }
 
+static bool
+intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
+			      enum i915_power_well_id power_well_id)
+{
+	intel_wakeref_t wakeref;
+	bool is_enabled;
+
+	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+	is_enabled = intel_display_power_well_is_enabled(i915,
+							 power_well_id);
+	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+
+	return is_enabled;
+}
+
+static int i915_lpsp_status(struct seq_file *m, void *unused)
+{
+	struct drm_i915_private *i915 = node_to_i915(m->private);
+
+	switch (INTEL_GEN(i915)) {
+	case 12:
+	case 11:
+		LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3));
+		break;
+	case 10:
+	case 9:
+		LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2));
+		break;
+	default:
+		/*
+		 * Apart from HASWELL/BROADWELL other legacy platform doesn't
+		 * support lpsp.
+		 */
+		if (IS_HASWELL(i915) || IS_BROADWELL(i915))
+			LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL));
+		else
+			seq_puts(m, "LPSP: not supported\n");
+	}
+
+	return 0;
+}
+
 static int i915_dp_mst_info(struct seq_file *m, void *unused)
 {
 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -1932,6 +1977,7 @@ static const struct drm_info_list intel_display_debugfs_list[] = {
 	{"i915_dp_mst_info", i915_dp_mst_info, 0},
 	{"i915_ddb_info", i915_ddb_info, 0},
 	{"i915_drrs_status", i915_drrs_status, 0},
+	{"i915_lpsp_status", i915_lpsp_status, 0},
 };
 
 static const struct {
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 56cbae6327b7..14c5ad20287f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -266,6 +266,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain);
 
 bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
 				    enum intel_display_power_domain domain);
+bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
+					 enum i915_power_well_id power_well_id);
 bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
 				      enum intel_display_power_domain domain);
 intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
-- 
2.26.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for i915 lpsp support for lpsp igt (rev7)
  2020-04-09  6:06 [Intel-gfx] [PATCH v4 0/4] i915 lpsp support for lpsp igt Anshuman Gupta
                   ` (3 preceding siblings ...)
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 4/4] drm/i915: Add i915_lpsp_status debugfs attribute Anshuman Gupta
@ 2020-04-09  7:31 ` Patchwork
  2020-04-10  3:33 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  2020-04-15 15:15 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915 lpsp support for lpsp igt (rev8) Patchwork
  6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2020-04-09  7:31 UTC (permalink / raw)
  To: Anshuman Gupta; +Cc: intel-gfx

== Series Details ==

Series: i915 lpsp support for lpsp igt (rev7)
URL   : https://patchwork.freedesktop.org/series/74648/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8281 -> Patchwork_17264
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_17264:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@debugfs_test@read_all_entries:
    - {fi-ehl-1}:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/fi-ehl-1/igt@debugfs_test@read_all_entries.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/fi-ehl-1/igt@debugfs_test@read_all_entries.html

  * igt@runner@aborted:
    - {fi-ehl-1}:         NOTRUN -> [FAIL][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/fi-ehl-1/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_17264 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-icl-dsi:         [INCOMPLETE][4] ([i915#189]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/fi-icl-dsi/igt@i915_pm_rpm@module-reload.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/fi-icl-dsi/igt@i915_pm_rpm@module-reload.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#189]: https://gitlab.freedesktop.org/drm/intel/issues/189


Participating hosts (51 -> 46)
------------------------------

  Additional (2): fi-skl-6770hq fi-kbl-7560u 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-8809g fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5581 -> IGTPW_4438
  * Linux: CI_DRM_8281 -> Patchwork_17264

  CI-20190529: 20190529
  CI_DRM_8281: 4d6c69198d6840226f92f2c4645e2c8260ca3e83 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4438: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4438/index.html
  IGT_5581: ab0620e555119ec55f12ba9ab9e6e9246d407648 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_17264: 314d3d56f22db613bee1306e86f1a3bf2a41edee @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

314d3d56f22d drm/i915: Add i915_lpsp_status debugfs attribute
a7c4df3f9562 drm/i915: Add connector dbgfs for all connectors
9a892f85809b drm/i915: Add i915_lpsp_capability debugfs
9485fcfc0011 drm/i915: Power well id for ICL PG3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for i915 lpsp support for lpsp igt (rev7)
  2020-04-09  6:06 [Intel-gfx] [PATCH v4 0/4] i915 lpsp support for lpsp igt Anshuman Gupta
                   ` (4 preceding siblings ...)
  2020-04-09  7:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success for i915 lpsp support for lpsp igt (rev7) Patchwork
@ 2020-04-10  3:33 ` Patchwork
  2020-04-15 15:15 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915 lpsp support for lpsp igt (rev8) Patchwork
  6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2020-04-10  3:33 UTC (permalink / raw)
  To: Anshuman Gupta; +Cc: intel-gfx

== Series Details ==

Series: i915 lpsp support for lpsp igt (rev7)
URL   : https://patchwork.freedesktop.org/series/74648/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8281_full -> Patchwork_17264_full
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with Patchwork_17264_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_17264_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_17264_full:

### IGT changes ###

#### Warnings ####

  * igt@i915_pm_lpsp@screens-disabled:
    - shard-snb:          [SKIP][1] ([fdo#109271]) -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-snb4/igt@i915_pm_lpsp@screens-disabled.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-snb4/igt@i915_pm_lpsp@screens-disabled.html

  
New tests
---------

  New tests have been introduced between CI_DRM_8281_full and Patchwork_17264_full:

### New IGT tests (7) ###

  * igt@gem_exec_store@pages:
    - Statuses :
    - Exec time: [None] s

  * igt@i915_pm_lpsp@kms-lpsp:
    - Statuses :
    - Exec time: [None] s

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp-1:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-edp-1:
    - Statuses : 3 pass(s)
    - Exec time: [0.10, 0.45] s

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a-1:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a-2:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-vga-1:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_17264_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gen9_exec_parse@allowed-all:
    - shard-glk:          [PASS][3] -> [DMESG-WARN][4] ([i915#716])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-glk8/igt@gen9_exec_parse@allowed-all.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-glk5/igt@gen9_exec_parse@allowed-all.html

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-snb:          [PASS][5] -> [FAIL][6] ([i915#1066])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-snb6/igt@i915_pm_rc6_residency@rc6-idle.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-snb2/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@kms_cursor_crc@pipe-a-cursor-64x64-offscreen:
    - shard-kbl:          [PASS][7] -> [FAIL][8] ([i915#54] / [i915#93] / [i915#95])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-64x64-offscreen.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-64x64-offscreen.html
    - shard-apl:          [PASS][9] -> [FAIL][10] ([i915#54] / [i915#95])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-apl3/igt@kms_cursor_crc@pipe-a-cursor-64x64-offscreen.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-apl3/igt@kms_cursor_crc@pipe-a-cursor-64x64-offscreen.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#109349])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-iclb5/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-glk:          [PASS][13] -> [FAIL][14] ([i915#79])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-glk9/igt@kms_flip@flip-vs-expired-vblank.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-glk3/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-skl:          [PASS][15] -> [FAIL][16] ([i915#34])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-kbl:          [PASS][17] -> [INCOMPLETE][18] ([i915#1297])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl4/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl7/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
    - shard-apl:          [PASS][19] -> [INCOMPLETE][20] ([i915#1297])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-apl6/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-apl6/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip_tiling@flip-changes-tiling-yf:
    - shard-kbl:          [PASS][21] -> [FAIL][22] ([i915#699] / [i915#93] / [i915#95]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl3/igt@kms_flip_tiling@flip-changes-tiling-yf.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl1/igt@kms_flip_tiling@flip-changes-tiling-yf.html
    - shard-apl:          [PASS][23] -> [FAIL][24] ([i915#95])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-apl4/igt@kms_flip_tiling@flip-changes-tiling-yf.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-apl8/igt@kms_flip_tiling@flip-changes-tiling-yf.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu:
    - shard-skl:          [PASS][25] -> [FAIL][26] ([i915#49]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-skl8/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-skl9/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-skl:          [PASS][27] -> [FAIL][28] ([i915#1188])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-kbl:          [PASS][29] -> [INCOMPLETE][30] ([i915#155])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][31] -> [FAIL][32] ([fdo#108145] / [i915#265]) +2 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_cursor@pipe-a-overlay-size-256:
    - shard-kbl:          [PASS][33] -> [FAIL][34] ([i915#1559] / [i915#93] / [i915#95])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl7/igt@kms_plane_cursor@pipe-a-overlay-size-256.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl6/igt@kms_plane_cursor@pipe-a-overlay-size-256.html
    - shard-apl:          [PASS][35] -> [FAIL][36] ([i915#1559] / [i915#95])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-apl8/igt@kms_plane_cursor@pipe-a-overlay-size-256.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-apl2/igt@kms_plane_cursor@pipe-a-overlay-size-256.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [PASS][37] -> [SKIP][38] ([fdo#109441])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-iclb8/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-kbl:          [PASS][39] -> [DMESG-WARN][40] ([i915#180]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl1/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@engines-mixed-process@vcs0:
    - shard-skl:          [FAIL][41] ([i915#1528]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-skl1/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-skl2/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html

  * igt@gem_exec_params@invalid-bsd-ring:
    - shard-iclb:         [SKIP][43] ([fdo#109276]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-iclb3/igt@gem_exec_params@invalid-bsd-ring.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-iclb2/igt@gem_exec_params@invalid-bsd-ring.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [FAIL][45] ([i915#454]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-iclb7/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_lpsp@screens-disabled:
    - shard-skl:          [SKIP][47] ([fdo#109271]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-skl2/igt@i915_pm_lpsp@screens-disabled.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-skl9/igt@i915_pm_lpsp@screens-disabled.html
    - shard-tglb:         [SKIP][49] ([fdo#109301]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-tglb3/igt@i915_pm_lpsp@screens-disabled.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-tglb8/igt@i915_pm_lpsp@screens-disabled.html
    - shard-kbl:          [SKIP][51] ([fdo#109271]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl3/igt@i915_pm_lpsp@screens-disabled.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl1/igt@i915_pm_lpsp@screens-disabled.html
    - shard-apl:          [SKIP][53] ([fdo#109271]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-apl1/igt@i915_pm_lpsp@screens-disabled.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-apl8/igt@i915_pm_lpsp@screens-disabled.html
    - shard-glk:          [SKIP][55] ([fdo#109271]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-glk6/igt@i915_pm_lpsp@screens-disabled.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-glk6/igt@i915_pm_lpsp@screens-disabled.html
    - shard-iclb:         [SKIP][57] ([fdo#109301]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-iclb1/igt@i915_pm_lpsp@screens-disabled.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-iclb3/igt@i915_pm_lpsp@screens-disabled.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen:
    - shard-kbl:          [FAIL][59] ([i915#54] / [i915#93] / [i915#95]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x42-random:
    - shard-skl:          [FAIL][61] ([i915#54]) -> [PASS][62] +1 similar issue
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-128x42-random.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-skl3/igt@kms_cursor_crc@pipe-a-cursor-128x42-random.html

  * igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen:
    - shard-kbl:          [FAIL][63] ([i915#54]) -> [PASS][64] +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html
    - shard-apl:          [FAIL][65] ([i915#54]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-apl4/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-apl2/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html

  * igt@kms_draw_crc@draw-method-rgb565-render-ytiled:
    - shard-glk:          [FAIL][67] ([i915#52] / [i915#54]) -> [PASS][68] +4 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-glk8/igt@kms_draw_crc@draw-method-rgb565-render-ytiled.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-glk3/igt@kms_draw_crc@draw-method-rgb565-render-ytiled.html

  * igt@kms_psr@psr2_suspend:
    - shard-iclb:         [SKIP][69] ([fdo#109441]) -> [PASS][70] +2 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-iclb7/igt@kms_psr@psr2_suspend.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-iclb2/igt@kms_psr@psr2_suspend.html

  * igt@kms_setmode@basic:
    - shard-glk:          [FAIL][71] ([i915#31]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-glk9/igt@kms_setmode@basic.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-glk2/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [DMESG-WARN][73] ([i915#180]) -> [PASS][74] +2 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  
#### Warnings ####

  * igt@kms_fbcon_fbt@fbc:
    - shard-kbl:          [FAIL][75] ([i915#64]) -> [FAIL][76] ([i915#93] / [i915#95])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl1/igt@kms_fbcon_fbt@fbc.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl4/igt@kms_fbcon_fbt@fbc.html
    - shard-apl:          [FAIL][77] ([i915#1525]) -> [FAIL][78] ([i915#95])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-apl4/igt@kms_fbcon_fbt@fbc.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-apl4/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [FAIL][79] ([i915#95]) -> [FAIL][80] ([i915#1525])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-apl4/igt@kms_fbcon_fbt@fbc-suspend.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-apl2/igt@kms_fbcon_fbt@fbc-suspend.html
    - shard-kbl:          [FAIL][81] ([i915#93] / [i915#95]) -> [FAIL][82] ([i915#64])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-kbl6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-apl:          [FAIL][83] ([fdo#108145] / [i915#265]) -> [FAIL][84] ([fdo#108145] / [i915#265] / [i915#95])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8281/shard-apl3/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/shard-apl7/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html

  
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109301]: https://bugs.freedesktop.org/show_bug.cgi?id=109301
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [i915#1066]: https://gitlab.freedesktop.org/drm/intel/issues/1066
  [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
  [i915#1297]: https://gitlab.freedesktop.org/drm/intel/issues/1297
  [i915#1525]: https://gitlab.freedesktop.org/drm/intel/issues/1525
  [i915#1528]: https://gitlab.freedesktop.org/drm/intel/issues/1528
  [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
  [i915#1559]: https://gitlab.freedesktop.org/drm/intel/issues/1559
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#64]: https://gitlab.freedesktop.org/drm/intel/issues/64
  [i915#699]: https://gitlab.freedesktop.org/drm/intel/issues/699
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5581 -> IGTPW_4438
  * Linux: CI_DRM_8281 -> Patchwork_17264

  CI-20190529: 20190529
  CI_DRM_8281: 4d6c69198d6840226f92f2c4645e2c8260ca3e83 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4438: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4438/index.html
  IGT_5581: ab0620e555119ec55f12ba9ab9e6e9246d407648 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_17264: 314d3d56f22db613bee1306e86f1a3bf2a41edee @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17264/index.html
_______________________________________________
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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH v4 1/4] drm/i915: Power well id for ICL PG3
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 1/4] drm/i915: Power well id for ICL PG3 Anshuman Gupta
@ 2020-04-14 14:22   ` Manna, Animesh
  0 siblings, 0 replies; 13+ messages in thread
From: Manna, Animesh @ 2020-04-14 14:22 UTC (permalink / raw)
  To: Anshuman Gupta, intel-gfx; +Cc: jani.nikula, ankit.k.nautiyal

On 09-04-2020 11:36, Anshuman Gupta wrote:
> Gen11 onwards PG3 is contains functions for pipe B,
> external displays, and VGA. It make sense to add
> a power well id with name ICL_DISP_PW_3 rather then
> TGL_DISP_PW_3, Also PG3 power well id requires to
> know if lpsp is enabled.
>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>

Looks good to me.
Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>   drivers/gpu/drm/i915/display/intel_display_power.c | 6 +++---
>   drivers/gpu/drm/i915/display/intel_display_power.h | 2 +-
>   2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 433e5a81dd4d..3672c00be94a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -943,7 +943,7 @@ static void assert_can_enable_dc5(struct drm_i915_private *dev_priv)
>   
>   	/* Power wells at this level and above must be disabled for DC5 entry */
>   	if (INTEL_GEN(dev_priv) >= 12)
> -		high_pg = TGL_DISP_PW_3;
> +		high_pg = ICL_DISP_PW_3;
>   	else
>   		high_pg = SKL_DISP_PW_2;
>   
> @@ -3571,7 +3571,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
>   		.name = "power well 3",
>   		.domains = ICL_PW_3_POWER_DOMAINS,
>   		.ops = &hsw_power_well_ops,
> -		.id = DISP_PW_ID_NONE,
> +		.id = ICL_DISP_PW_3,
>   		{
>   			.hsw.regs = &hsw_power_well_regs,
>   			.hsw.idx = ICL_PW_CTL_IDX_PW_3,
> @@ -3949,7 +3949,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
>   		.name = "power well 3",
>   		.domains = TGL_PW_3_POWER_DOMAINS,
>   		.ops = &hsw_power_well_ops,
> -		.id = TGL_DISP_PW_3,
> +		.id = ICL_DISP_PW_3,
>   		{
>   			.hsw.regs = &hsw_power_well_regs,
>   			.hsw.idx = ICL_PW_CTL_IDX_PW_3,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index da64a5edae7a..56cbae6327b7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -100,7 +100,7 @@ enum i915_power_well_id {
>   	SKL_DISP_PW_MISC_IO,
>   	SKL_DISP_PW_1,
>   	SKL_DISP_PW_2,
> -	TGL_DISP_PW_3,
> +	ICL_DISP_PW_3,
>   	SKL_DISP_DC_OFF,
>   };
>   
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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH v4 2/4] drm/i915: Add i915_lpsp_capability debugfs
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 2/4] drm/i915: Add i915_lpsp_capability debugfs Anshuman Gupta
@ 2020-04-14 15:46   ` Manna, Animesh
  2020-04-14 16:42     ` Anshuman Gupta
  2020-04-15 12:50   ` Anshuman Gupta
  1 sibling, 1 reply; 13+ messages in thread
From: Manna, Animesh @ 2020-04-14 15:46 UTC (permalink / raw)
  To: Anshuman Gupta, intel-gfx; +Cc: jani.nikula, ankit.k.nautiyal


On 09-04-2020 11:36, Anshuman Gupta wrote:
> New i915_pm_lpsp igt solution approach relies on connector specific
> debugfs attribute i915_lpsp_capability, it exposes whether an output is
> capable of driving lpsp.
>
> v2:
> - CI fixup.
> v3:
> - register i915_lpsp_info only for supported connector. [Jani]
> - use intel_display_power_well_is_enabled() instead of looking
>    inside power_well count. [Jani]
> - fixes the lpsp capable conditional logic. [Jani]
> - combined the lpsp capable and enable info. [Jani]
> v4:
> - Separate out connector based debugfs i915_lpsp_capability
>    lpsp enable status would be exposes by different entry. [Animesh]
>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>   .../drm/i915/display/intel_display_debugfs.c  | 63 +++++++++++++++++++
>   1 file changed, 63 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index bdeea2e02642..402b89daff62 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -611,6 +611,28 @@ static void intel_hdcp_info(struct seq_file *m,
>   	seq_puts(m, "\n");
>   }
>   
> +#define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
> +				seq_puts(m, "LPSP: incapable\n"))
> +
> +static bool intel_have_edp_dsi_panel(struct drm_connector *connector)
> +{
> +	return connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
> +		connector->connector_type == DRM_MODE_CONNECTOR_eDP;
> +}
> +
> +static bool intel_have_dp_edp_dsi_panel(struct drm_connector *connector)
> +{
> +	return intel_have_edp_dsi_panel(connector) ||
> +		connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort;
> +}
> +
> +static bool intel_have_hdmi_dp_edp_dsi_panel(struct drm_connector *connector)
> +{
> +	return intel_have_dp_edp_dsi_panel(connector) ||
> +		connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
> +		connector->connector_type == DRM_MODE_CONNECTOR_HDMIB;
> +}
> +
>   static void intel_dp_info(struct seq_file *m,
>   			  struct intel_connector *intel_connector)
>   {
> @@ -1991,6 +2013,42 @@ static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
>   }
>   DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
>   
> +static int i915_lpsp_capability_show(struct seq_file *m, void *data)
> +{
> +	struct drm_connector *connector = m->private;
> +	struct intel_encoder *encoder =
> +			intel_attached_encoder(to_intel_connector(connector));
> +	struct drm_i915_private *i915 = to_i915(connector->dev);
> +
> +	if (connector->status != connector_status_connected)
> +		return -ENODEV;
> +
> +	switch (INTEL_GEN(i915)) {
> +	case 12:
> +		/*
> +		 * Actually TGL can drive LPSP on port till DDI_C
> +		 * but there is no physical connected DDI_C on TGL sku's,
> +		 * even driver is not initilizing DDI_C port for gen12.
> +		 */
> +		LPSP_CAPABLE(encoder->port <= PORT_B);
> +		break;
> +	case 11:
> +		LPSP_CAPABLE(intel_have_edp_dsi_panel(connector));
> +		break;
> +	case 10:
> +	case 9:
> +		LPSP_CAPABLE(encoder->port == PORT_A &&
> +			     intel_have_dp_edp_dsi_panel(connector));
> +		break;
> +	default:
> +		if (IS_HASWELL(i915) || IS_BROADWELL(i915))
> +			LPSP_CAPABLE(connector->connector_type == DRM_MODE_CONNECTOR_eDP);
> +	}
> +
> +	return 0;
> +}
> +DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
> +
>   static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
>   {
>   	struct drm_connector *connector = m->private;
> @@ -2134,5 +2192,10 @@ int intel_connector_debugfs_add(struct drm_connector *connector)
>   		debugfs_create_file("i915_dsc_fec_support", S_IRUGO, root,
>   				    connector, &i915_dsc_fec_support_fops);
>   
> +	/* Legacy panels doesn't lpsp on any platform */
> +	if (intel_have_hdmi_dp_edp_dsi_panel(connector))
> +		debugfs_create_file("i915_lpsp_capability", 0444, root,
> +				    connector, &i915_lpsp_capability_fops);

Need a condition check of INTEL_GEN(dev_priv), for older platform the entry will get created and later in i915_lpsp_capability_show() will not print anything.
With the above fix, Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Nitpick: imo adding function for different combination of connector type check maybe overdoing. In i915_lpsp_capability_show(), can have <gen>_lpsp_cap_check() for different generation.

Regards,
Animesh

> +
>   	return 0;
>   }
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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH v4 4/4] drm/i915: Add i915_lpsp_status debugfs attribute
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 4/4] drm/i915: Add i915_lpsp_status debugfs attribute Anshuman Gupta
@ 2020-04-14 16:13   ` Manna, Animesh
  0 siblings, 0 replies; 13+ messages in thread
From: Manna, Animesh @ 2020-04-14 16:13 UTC (permalink / raw)
  To: Anshuman Gupta, intel-gfx; +Cc: jani.nikula, ankit.k.nautiyal


[-- Attachment #1.1: Type: text/plain, Size: 4107 bytes --]

On 09-04-2020 11:36, Anshuman Gupta wrote:
> It requires a separate debugfs attribute to expose lpsp
> status to user space, as there may be display less configuration
> without any valid connected output, those configuration will not be
> able to test lpsp status, if lpsp status exposed from a connector
> based debugfs attribute.
>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>

Looks good to me.
Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>   .../drm/i915/display/intel_display_debugfs.c  | 46 +++++++++++++++++++
>   .../drm/i915/display/intel_display_power.h    |  2 +
>   2 files changed, 48 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 402b89daff62..9a5b7f1cbe07 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -9,6 +9,7 @@
>   #include "i915_debugfs.h"
>   #include "intel_csr.h"
>   #include "intel_display_debugfs.h"
> +#include "intel_display_power.h"
>   #include "intel_display_types.h"
>   #include "intel_dp.h"
>   #include "intel_fbc.h"
> @@ -613,6 +614,8 @@ static void intel_hdcp_info(struct seq_file *m,
>   
>   #define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
>   				seq_puts(m, "LPSP: incapable\n"))
> +#define LPSP_STATUS(COND) (COND ? seq_puts(m, "LPSP: enabled\n") : \
> +				seq_puts(m, "LPSP: disabled\n"))
>   
>   static bool intel_have_edp_dsi_panel(struct drm_connector *connector)
>   {
> @@ -1165,6 +1168,48 @@ static int i915_drrs_status(struct seq_file *m, void *unused)
>   	return 0;
>   }
>   
> +static bool
> +intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
> +			      enum i915_power_well_id power_well_id)
> +{
> +	intel_wakeref_t wakeref;
> +	bool is_enabled;
> +
> +	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> +	is_enabled = intel_display_power_well_is_enabled(i915,
> +							 power_well_id);
> +	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> +
> +	return is_enabled;
> +}
> +
> +static int i915_lpsp_status(struct seq_file *m, void *unused)
> +{
> +	struct drm_i915_private *i915 = node_to_i915(m->private);
> +
> +	switch (INTEL_GEN(i915)) {
> +	case 12:
> +	case 11:
> +		LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3));
> +		break;
> +	case 10:
> +	case 9:
> +		LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2));
> +		break;
> +	default:
> +		/*
> +		 * Apart from HASWELL/BROADWELL other legacy platform doesn't
> +		 * support lpsp.
> +		 */
> +		if (IS_HASWELL(i915) || IS_BROADWELL(i915))
> +			LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL));
> +		else
> +			seq_puts(m, "LPSP: not supported\n");
> +	}
> +
> +	return 0;
> +}
> +
>   static int i915_dp_mst_info(struct seq_file *m, void *unused)
>   {
>   	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> @@ -1932,6 +1977,7 @@ static const struct drm_info_list intel_display_debugfs_list[] = {
>   	{"i915_dp_mst_info", i915_dp_mst_info, 0},
>   	{"i915_ddb_info", i915_ddb_info, 0},
>   	{"i915_drrs_status", i915_drrs_status, 0},
> +	{"i915_lpsp_status", i915_lpsp_status, 0},
>   };
>   
>   static const struct {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index 56cbae6327b7..14c5ad20287f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -266,6 +266,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain);
>   
>   bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
>   				    enum intel_display_power_domain domain);
> +bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
> +					 enum i915_power_well_id power_well_id);
>   bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
>   				      enum intel_display_power_domain domain);
>   intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,

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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH v4 2/4] drm/i915: Add i915_lpsp_capability debugfs
  2020-04-14 15:46   ` Manna, Animesh
@ 2020-04-14 16:42     ` Anshuman Gupta
  0 siblings, 0 replies; 13+ messages in thread
From: Anshuman Gupta @ 2020-04-14 16:42 UTC (permalink / raw)
  To: Manna, Animesh; +Cc: jani.nikula, intel-gfx, ankit.k.nautiyal

On 2020-04-14 at 21:16:00 +0530, Manna, Animesh wrote:
> 
> On 09-04-2020 11:36, Anshuman Gupta wrote:
> >New i915_pm_lpsp igt solution approach relies on connector specific
> >debugfs attribute i915_lpsp_capability, it exposes whether an output is
> >capable of driving lpsp.
> >
> >v2:
> >- CI fixup.
> >v3:
> >- register i915_lpsp_info only for supported connector. [Jani]
> >- use intel_display_power_well_is_enabled() instead of looking
> >   inside power_well count. [Jani]
> >- fixes the lpsp capable conditional logic. [Jani]
> >- combined the lpsp capable and enable info. [Jani]
> >v4:
> >- Separate out connector based debugfs i915_lpsp_capability
> >   lpsp enable status would be exposes by different entry. [Animesh]
> >
> >Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> >---
> >  .../drm/i915/display/intel_display_debugfs.c  | 63 +++++++++++++++++++
> >  1 file changed, 63 insertions(+)
> >
> >diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> >index bdeea2e02642..402b89daff62 100644
> >--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> >+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> >@@ -611,6 +611,28 @@ static void intel_hdcp_info(struct seq_file *m,
> >  	seq_puts(m, "\n");
> >  }
> >+#define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
> >+				seq_puts(m, "LPSP: incapable\n"))
> >+
> >+static bool intel_have_edp_dsi_panel(struct drm_connector *connector)
> >+{
> >+	return connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
> >+		connector->connector_type == DRM_MODE_CONNECTOR_eDP;
> >+}
> >+
> >+static bool intel_have_dp_edp_dsi_panel(struct drm_connector *connector)
> >+{
> >+	return intel_have_edp_dsi_panel(connector) ||
> >+		connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort;
> >+}
> >+
> >+static bool intel_have_hdmi_dp_edp_dsi_panel(struct drm_connector *connector)
> >+{
> >+	return intel_have_dp_edp_dsi_panel(connector) ||
> >+		connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
> >+		connector->connector_type == DRM_MODE_CONNECTOR_HDMIB;
> >+}
> >+
> >  static void intel_dp_info(struct seq_file *m,
> >  			  struct intel_connector *intel_connector)
> >  {
> >@@ -1991,6 +2013,42 @@ static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
> >  }
> >  DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
> >+static int i915_lpsp_capability_show(struct seq_file *m, void *data)
> >+{
> >+	struct drm_connector *connector = m->private;
> >+	struct intel_encoder *encoder =
> >+			intel_attached_encoder(to_intel_connector(connector));
> >+	struct drm_i915_private *i915 = to_i915(connector->dev);
> >+
> >+	if (connector->status != connector_status_connected)
> >+		return -ENODEV;
> >+
> >+	switch (INTEL_GEN(i915)) {
> >+	case 12:
> >+		/*
> >+		 * Actually TGL can drive LPSP on port till DDI_C
> >+		 * but there is no physical connected DDI_C on TGL sku's,
> >+		 * even driver is not initilizing DDI_C port for gen12.
> >+		 */
> >+		LPSP_CAPABLE(encoder->port <= PORT_B);
> >+		break;
> >+	case 11:
> >+		LPSP_CAPABLE(intel_have_edp_dsi_panel(connector));
> >+		break;
> >+	case 10:
> >+	case 9:
> >+		LPSP_CAPABLE(encoder->port == PORT_A &&
> >+			     intel_have_dp_edp_dsi_panel(connector));
> >+		break;
> >+	default:
> >+		if (IS_HASWELL(i915) || IS_BROADWELL(i915))
> >+			LPSP_CAPABLE(connector->connector_type == DRM_MODE_CONNECTOR_eDP);
> >+	}
> >+
> >+	return 0;
> >+}
> >+DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
> >+
> >  static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
> >  {
> >  	struct drm_connector *connector = m->private;
> >@@ -2134,5 +2192,10 @@ int intel_connector_debugfs_add(struct drm_connector *connector)
> >  		debugfs_create_file("i915_dsc_fec_support", S_IRUGO, root,
> >  				    connector, &i915_dsc_fec_support_fops);
> >+	/* Legacy panels doesn't lpsp on any platform */
> >+	if (intel_have_hdmi_dp_edp_dsi_panel(connector))
> >+		debugfs_create_file("i915_lpsp_capability", 0444, root,
> >+				    connector, &i915_lpsp_capability_fops);
> 
> Need a condition check of INTEL_GEN(dev_priv), for older platform the entry will get created and later in i915_lpsp_capability_show() will not print anything.
Thanks for review and catching this animesh, i overlooked it with thought that, older gen before HASWELL/BROADWELL won't support eDP/DSI/DP/HDMI connector.
May be a condition INTEL_GEN(dev_priv) > 9 || HASWELL(dev_priv)  || BROADWELL(dev_priv) will do the job.
becuase i am not really sure about the legacy gen number.
> With the above fix, Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> Nitpick: imo adding function for different combination of connector type check maybe overdoing. In i915_lpsp_capability_show(), can have <gen>_lpsp_cap_check() for different generation.
I want to fix this but may be i am not able to understand it, <gen>_lpsp_cap_check will also need to check for connector with respect to gen, like ex on Gen11 only eDP and DSI can drive lpsp, so we would require to check connector  connector->connector_type == eDP || connector->connector_type == DSI.

Thanks,
Anshuman.
> 
> Regards,
> Animesh
> 
> >+
> >  	return 0;
> >  }
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^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH v4 2/4] drm/i915: Add i915_lpsp_capability debugfs
  2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 2/4] drm/i915: Add i915_lpsp_capability debugfs Anshuman Gupta
  2020-04-14 15:46   ` Manna, Animesh
@ 2020-04-15 12:50   ` Anshuman Gupta
  1 sibling, 0 replies; 13+ messages in thread
From: Anshuman Gupta @ 2020-04-15 12:50 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula, ankit.k.nautiyal

New i915_pm_lpsp igt solution approach relies on connector specific
debugfs attribute i915_lpsp_capability, it exposes whether an output is
capable of driving lpsp.

v2:
- CI fixup.
v3:
- register i915_lpsp_info only for supported connector. [Jani]
- use intel_display_power_well_is_enabled() instead of looking
  inside power_well count. [Jani]
- fixes the lpsp capable conditional logic. [Jani]
- combined the lpsp capable and enable info. [Jani]
v4:
- Separate out connector based debugfs i915_lpsp_capability
  lpsp enable status would be exposes by different entry. [Animesh]
v5:
- Add Platform Gen condition to add i915_lpsp_capability
  and some cosmetic nitpick changes. [Animesh]

Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../drm/i915/display/intel_display_debugfs.c  | 53 +++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index bdeea2e02642..ea48de3cac24 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1991,6 +1991,48 @@ static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
 }
 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
 
+#define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
+				seq_puts(m, "LPSP: incapable\n"))
+
+static int i915_lpsp_capability_show(struct seq_file *m, void *data)
+{
+	struct drm_connector *connector = m->private;
+	struct intel_encoder *encoder =
+			intel_attached_encoder(to_intel_connector(connector));
+	struct drm_i915_private *i915 = to_i915(connector->dev);
+
+	if (connector->status != connector_status_connected)
+		return -ENODEV;
+
+	switch (INTEL_GEN(i915)) {
+	case 12:
+		/*
+		 * Actually TGL can drive LPSP on port till DDI_C
+		 * but there is no physical connected DDI_C on TGL sku's,
+		 * even driver is not initilizing DDI_C port for gen12.
+		 */
+		LPSP_CAPABLE(encoder->port <= PORT_B);
+		break;
+	case 11:
+		LPSP_CAPABLE(connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
+			     connector->connector_type == DRM_MODE_CONNECTOR_eDP);
+		break;
+	case 10:
+	case 9:
+		LPSP_CAPABLE(encoder->port == PORT_A &&
+			     (connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
+			     connector->connector_type == DRM_MODE_CONNECTOR_eDP  ||
+			     connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort));
+		break;
+	default:
+		if (IS_HASWELL(i915) || IS_BROADWELL(i915))
+			LPSP_CAPABLE(connector->connector_type == DRM_MODE_CONNECTOR_eDP);
+	}
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
+
 static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
 {
 	struct drm_connector *connector = m->private;
@@ -2134,5 +2176,16 @@ int intel_connector_debugfs_add(struct drm_connector *connector)
 		debugfs_create_file("i915_dsc_fec_support", S_IRUGO, root,
 				    connector, &i915_dsc_fec_support_fops);
 
+	/* Legacy panels doesn't lpsp on any platform */
+	if ((INTEL_GEN(dev_priv) >= 9 || IS_HASWELL(dev_priv) ||
+	     IS_BROADWELL(dev_priv)) &&
+	     (connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
+	     connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
+	     connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
+	     connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
+	     connector->connector_type == DRM_MODE_CONNECTOR_HDMIB))
+		debugfs_create_file("i915_lpsp_capability", 0444, root,
+				    connector, &i915_lpsp_capability_fops);
+
 	return 0;
 }
-- 
2.26.0

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^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915 lpsp support for lpsp igt (rev8)
  2020-04-09  6:06 [Intel-gfx] [PATCH v4 0/4] i915 lpsp support for lpsp igt Anshuman Gupta
                   ` (5 preceding siblings ...)
  2020-04-10  3:33 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2020-04-15 15:15 ` Patchwork
  6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2020-04-15 15:15 UTC (permalink / raw)
  To: Anshuman Gupta; +Cc: intel-gfx

== Series Details ==

Series: i915 lpsp support for lpsp igt (rev8)
URL   : https://patchwork.freedesktop.org/series/74648/
State : failure

== Summary ==

Applying: drm/i915: Power well id for ICL PG3
Applying: drm/i915: Add i915_lpsp_capability debugfs
Applying: drm/i915: Add connector dbgfs for all connectors
Applying: drm/i915: Add i915_lpsp_status debugfs attribute
Using index info to reconstruct a base tree...
M	drivers/gpu/drm/i915/display/intel_display_debugfs.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/display/intel_display_debugfs.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/display/intel_display_debugfs.c
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0004 drm/i915: Add i915_lpsp_status debugfs attribute
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2020-04-15 15:15 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-09  6:06 [Intel-gfx] [PATCH v4 0/4] i915 lpsp support for lpsp igt Anshuman Gupta
2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 1/4] drm/i915: Power well id for ICL PG3 Anshuman Gupta
2020-04-14 14:22   ` Manna, Animesh
2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 2/4] drm/i915: Add i915_lpsp_capability debugfs Anshuman Gupta
2020-04-14 15:46   ` Manna, Animesh
2020-04-14 16:42     ` Anshuman Gupta
2020-04-15 12:50   ` Anshuman Gupta
2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 3/4] drm/i915: Add connector dbgfs for all connectors Anshuman Gupta
2020-04-09  6:06 ` [Intel-gfx] [PATCH v4 4/4] drm/i915: Add i915_lpsp_status debugfs attribute Anshuman Gupta
2020-04-14 16:13   ` Manna, Animesh
2020-04-09  7:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success for i915 lpsp support for lpsp igt (rev7) Patchwork
2020-04-10  3:33 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-04-15 15:15 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915 lpsp support for lpsp igt (rev8) Patchwork

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