Re: [PULL 00/34] target-arm queue

[no-reply@patchew.org]

Patchew URL: https://patchew.org/QEMU/20200511133405.5275-1-peter.maydell@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20200511133405.5275-1-peter.maydell@linaro.org
Subject: [PULL 00/34] target-arm queue
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/20200508230823.22956-1-walling@linux.ibm.com -> patchew/20200508230823.22956-1-walling@linux.ibm.com
Switched to a new branch 'test'
9dfe2c2 target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed)
cfaddf9 target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLA
7b2835e hw/arm/musicpal: Map the UART devices unconditionally
25a82de target/arm: Restrict TCG cpus to TCG accel
ea192eb target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUs
155a4fc target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[]
ae7d2bb target/arm: Make set_feature() available for other files
3580056 target/arm/kvm: Inline set_feature() calls
e1812d5 target/arm: Remove sve_memopidx
4c62164 target/arm: Reuse sve_probe_page for gather loads
a9d5f8c target/arm: Reuse sve_probe_page for scatter stores
f189a3c target/arm: Reuse sve_probe_page for gather first-fault loads
0036b73 target/arm: Use SVEContLdSt for contiguous stores
14753d7 target/arm: Update contiguous first-fault and no-fault loads
7e60f45 target/arm: Use SVEContLdSt for multi-register contiguous loads
bb5288a target/arm: Handle watchpoints in sve_ld1_r
ad4a669 target/arm: Use SVEContLdSt in sve_ld1_r
e5540d6 target/arm: Adjust interface of sve_ld1_host_fn
7feb92f target/arm: Add sve infrastructure for page lookup
9efa4b5 target/arm: Drop manual handling of set/clear_helper_retaddr
d9b5d7d target/arm: Use cpu_*_data_ra for sve_ldst_tlb_fn
4f7c0fe accel/tcg: Add endian-specific cpu_{ld, st}* operations
224ecf5 accel/tcg: Add probe_access_flags
c10fe3e accel/tcg: Adjust probe_access call to page_check_range
614fa6a accel/tcg: Add block comment for probe_access
e0d5231 exec: Fix cpu_watchpoint_address_matches address length
242ddfc exec: Add block comments for watchpoint routines
3991eff hw/timer/nrf51_timer: Add trace event of counter value update
1ab8730 hw/timer/nrf51_timer: Display timer ID in trace events
7cdf7df hw/arm/nrf51: Add NRF51_PERIPHERAL_SIZE definition
cdfa878 aspeed: sdmc: Implement AST2600 locking behaviour
188b075 aspeed: Support AST2600A1 silicon revision
39850d0 target/arm: Drop access_el3_aa32ns_aa64any()
cfdf77b aspeed: Add boot stub for smp booting

=== OUTPUT BEGIN ===
1/34 Checking commit cfdf77bca19f (aspeed: Add boot stub for smp booting)
2/34 Checking commit 39850d0702c1 (target/arm: Drop access_el3_aa32ns_aa64any())
3/34 Checking commit 188b075af0c6 (aspeed: Support AST2600A1 silicon revision)
4/34 Checking commit cdfa8784a707 (aspeed: sdmc: Implement AST2600 locking behaviour)
WARNING: line over 80 characters
#55: FILE: hw/misc/aspeed_sdmc.c:319:
+        s->regs[reg] = (data == PROT_KEY_UNLOCK) ? PROT_UNLOCKED : PROT_SOFTLOCKED;

WARNING: line over 80 characters
#72: FILE: hw/misc/aspeed_sdmc.c:377:
+        s->regs[reg] = (data == PROT_KEY_UNLOCK) ? PROT_UNLOCKED : PROT_SOFTLOCKED;

WARNING: line over 80 characters
#89: FILE: hw/misc/aspeed_sdmc.c:443:
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: SDMC is locked until system reset!\n",

total: 0 errors, 3 warnings, 87 lines checked

Patch 4/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/34 Checking commit 7cdf7df779d5 (hw/arm/nrf51: Add NRF51_PERIPHERAL_SIZE definition)
6/34 Checking commit 1ab873079bf9 (hw/timer/nrf51_timer: Display timer ID in trace events)
7/34 Checking commit 3991effa9b6b (hw/timer/nrf51_timer: Add trace event of counter value update)
8/34 Checking commit 242ddfc7ed54 (exec: Add block comments for watchpoint routines)
9/34 Checking commit e0d523194cd2 (exec: Fix cpu_watchpoint_address_matches address length)
10/34 Checking commit 614fa6a6fae8 (accel/tcg: Add block comment for probe_access)
11/34 Checking commit c10fe3ec0a64 (accel/tcg: Adjust probe_access call to page_check_range)
12/34 Checking commit 224ecf552a2b (accel/tcg: Add probe_access_flags)
13/34 Checking commit 4f7c0fe71952 (accel/tcg: Add endian-specific cpu_{ld, st}* operations)
14/34 Checking commit d9b5d7d5be19 (target/arm: Use cpu_*_data_ra for sve_ldst_tlb_fn)
ERROR: spaces required around that '*' (ctx:VxV)
#65: FILE: target/arm/sve_helper.c:4029:
+    TLB(env, addr, (TYPEM)*(TYPEE *)(vd + H(reg_off)), ra);                 \
                           ^

ERROR: spaces required around that '*' (ctx:WxV)
#155: FILE: target/arm/sve_helper.c:4162:
+                      sve_ldst1_tlb_fn *tlb_fn)
                                        ^

total: 2 errors, 0 warnings, 455 lines checked

Patch 14/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/34 Checking commit 9efa4b5ee7d6 (target/arm: Drop manual handling of set/clear_helper_retaddr)
16/34 Checking commit 7feb92f0d11c (target/arm: Add sve infrastructure for page lookup)
WARNING: Block comments use a leading /* on a separate line
#34: FILE: target/arm/sve_helper.c:1633:
+/* Big-endian hosts need to frob the byte indices.  If the copy

total: 0 errors, 1 warnings, 281 lines checked

Patch 16/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/34 Checking commit e5540d612369 (target/arm: Adjust interface of sve_ld1_host_fn)
18/34 Checking commit ad4a669635e4 (target/arm: Use SVEContLdSt in sve_ld1_r)
19/34 Checking commit bb5288aedcee (target/arm: Handle watchpoints in sve_ld1_r)
20/34 Checking commit 7e60f45c72a9 (target/arm: Use SVEContLdSt for multi-register contiguous loads)
21/34 Checking commit 14753d799ca0 (target/arm: Update contiguous first-fault and no-fault loads)
22/34 Checking commit 0036b7386e67 (target/arm: Use SVEContLdSt for contiguous stores)
23/34 Checking commit f189a3cb6bb4 (target/arm: Reuse sve_probe_page for gather first-fault loads)
24/34 Checking commit a9d5f8cc29ab (target/arm: Reuse sve_probe_page for scatter stores)
25/34 Checking commit 4c621648b45c (target/arm: Reuse sve_probe_page for gather loads)
26/34 Checking commit e1812d5c4e69 (target/arm: Remove sve_memopidx)
27/34 Checking commit 35800561704a (target/arm/kvm: Inline set_feature() calls)
28/34 Checking commit ae7d2bb1441d (target/arm: Make set_feature() available for other files)
29/34 Checking commit 155a4fc01861 (target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[])
30/34 Checking commit ea192ebb3a2a (target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUs)
31/34 Checking commit 25a82de56c7f (target/arm: Restrict TCG cpus to TCG accel)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#698: 
new file mode 100644

total: 0 errors, 1 warnings, 1333 lines checked

Patch 31/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
32/34 Checking commit 7b2835e18978 (hw/arm/musicpal: Map the UART devices unconditionally)
33/34 Checking commit cfaddf9fd5e1 (target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLA)
34/34 Checking commit 9dfe2c2a2aec (target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed))
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200511133405.5275-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
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