From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> To: Bjorn Helgaas <bhelgaas@google.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Jingoo Han <jingoohan1@gmail.com>, Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Rob Herring <robh+dt@kernel.org>, Masahiro Yamada <yamada.masahiro@socionext.com> Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu <masami.hiramatsu@linaro.org>, Jassi Brar <jaswinder.singh@linaro.org>, Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Subject: [PATCH 1/5] PCI: dwc: Add msi_host_isr() callback Date: Fri, 15 May 2020 13:48:21 +0900 [thread overview] Message-ID: <1589518105-18368-2-git-send-email-hayashi.kunihiko@socionext.com> (raw) In-Reply-To: <1589518105-18368-1-git-send-email-hayashi.kunihiko@socionext.com> This adds msi_host_isr() callback function support to describe SoC-dependent service triggered by MSI. For example, when AER interrupt is triggered by MSI, the callback function reads SoC-dependent registers and detects that the interrupt is from AER, and invoke AER interrupts related to MSI. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++---- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 0f36a92..491b7a8 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -110,13 +110,13 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) static void dw_chained_msi_isr(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); - struct pcie_port *pp; + struct pcie_port *pp = irq_desc_get_handler_data(desc); - chained_irq_enter(chip, desc); + if (pp->ops->msi_host_isr) + pp->ops->msi_host_isr(pp); - pp = irq_desc_get_handler_data(desc); + chained_irq_enter(chip, desc); dw_handle_msi_irq(pp); - chained_irq_exit(chip, desc); } diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 5a18e94..27fee10 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -160,6 +160,7 @@ struct dw_pcie_host_ops { void (*scan_bus)(struct pcie_port *pp); void (*set_num_vectors)(struct pcie_port *pp); int (*msi_host_init)(struct pcie_port *pp); + void (*msi_host_isr)(struct pcie_port *pp); }; struct pcie_port { -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> To: Bjorn Helgaas <bhelgaas@google.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Jingoo Han <jingoohan1@gmail.com>, Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Rob Herring <robh+dt@kernel.org>, Masahiro Yamada <yamada.masahiro@socionext.com> Cc: devicetree@vger.kernel.org, Kunihiko Hayashi <hayashi.kunihiko@socionext.com>, Masami Hiramatsu <masami.hiramatsu@linaro.org>, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Jassi Brar <jaswinder.singh@linaro.org>, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/5] PCI: dwc: Add msi_host_isr() callback Date: Fri, 15 May 2020 13:48:21 +0900 [thread overview] Message-ID: <1589518105-18368-2-git-send-email-hayashi.kunihiko@socionext.com> (raw) In-Reply-To: <1589518105-18368-1-git-send-email-hayashi.kunihiko@socionext.com> This adds msi_host_isr() callback function support to describe SoC-dependent service triggered by MSI. For example, when AER interrupt is triggered by MSI, the callback function reads SoC-dependent registers and detects that the interrupt is from AER, and invoke AER interrupts related to MSI. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++---- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 0f36a92..491b7a8 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -110,13 +110,13 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) static void dw_chained_msi_isr(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); - struct pcie_port *pp; + struct pcie_port *pp = irq_desc_get_handler_data(desc); - chained_irq_enter(chip, desc); + if (pp->ops->msi_host_isr) + pp->ops->msi_host_isr(pp); - pp = irq_desc_get_handler_data(desc); + chained_irq_enter(chip, desc); dw_handle_msi_irq(pp); - chained_irq_exit(chip, desc); } diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 5a18e94..27fee10 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -160,6 +160,7 @@ struct dw_pcie_host_ops { void (*scan_bus)(struct pcie_port *pp); void (*set_num_vectors)(struct pcie_port *pp); int (*msi_host_init)(struct pcie_port *pp); + void (*msi_host_isr)(struct pcie_port *pp); }; struct pcie_port { -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-05-15 4:48 UTC|newest] Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-15 4:48 [PATCH 0/5] PCI: uniphier: Add features for UniPhier PCIe host controller Kunihiko Hayashi 2020-05-15 4:48 ` Kunihiko Hayashi 2020-05-15 4:48 ` Kunihiko Hayashi [this message] 2020-05-15 4:48 ` [PATCH 1/5] PCI: dwc: Add msi_host_isr() callback Kunihiko Hayashi 2020-05-15 4:48 ` [PATCH 2/5] PCI: uniphier: Add misc interrupt handler to invoke PME and AER Kunihiko Hayashi 2020-05-15 4:48 ` Kunihiko Hayashi 2020-05-15 4:48 ` [PATCH 3/5] dt-bindings: PCI: uniphier: Add iATU register description Kunihiko Hayashi 2020-05-15 4:48 ` Kunihiko Hayashi 2020-05-15 4:48 ` [PATCH 4/5] PCI: uniphier: Add iATU register support Kunihiko Hayashi 2020-05-15 4:48 ` Kunihiko Hayashi 2020-05-15 4:48 ` [PATCH 5/5] PCI: uniphier: Add error message when failed to get phy Kunihiko Hayashi 2020-05-15 4:48 ` Kunihiko Hayashi 2020-05-15 6:51 ` kbuild test robot 2020-05-15 6:51 ` kbuild test robot 2020-05-15 6:51 ` kbuild test robot 2020-05-15 9:28 ` Kunihiko Hayashi 2020-05-15 9:28 ` Kunihiko Hayashi
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1589518105-18368-2-git-send-email-hayashi.kunihiko@socionext.com \ --to=hayashi.kunihiko@socionext.com \ --cc=bhelgaas@google.com \ --cc=devicetree@vger.kernel.org \ --cc=gustavo.pimentel@synopsys.com \ --cc=jaswinder.singh@linaro.org \ --cc=jingoohan1@gmail.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-pci@vger.kernel.org \ --cc=lorenzo.pieralisi@arm.com \ --cc=masami.hiramatsu@linaro.org \ --cc=robh+dt@kernel.org \ --cc=yamada.masahiro@socionext.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.