* [Intel-gfx] [CI] drm/i915/selftests: Measure CS_TIMESTAMP
@ 2020-05-20 7:34 Chris Wilson
2020-05-20 8:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Measure CS_TIMESTAMP (rev4) Patchwork
2020-05-20 8:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
0 siblings, 2 replies; 3+ messages in thread
From: Chris Wilson @ 2020-05-20 7:34 UTC (permalink / raw)
To: intel-gfx
Count the number of CS_TIMESTAMP ticks and check that it matches our
expectations.
v2: Double read the TIMESTAMP as there is a tendency for it to stick on
older HW.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 115 +++++++++++++++++++++++
1 file changed, 115 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
index 242181a5214c..9860efe97b31 100644
--- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
@@ -5,10 +5,124 @@
* Copyright © 2019 Intel Corporation
*/
+#include <linux/sort.h>
+
+#include "intel_gt_clock_utils.h"
+
#include "selftest_llc.h"
#include "selftest_rc6.h"
#include "selftest_rps.h"
+static int cmp_u64(const void *A, const void *B)
+{
+ const u64 *a = A, *b = B;
+
+ if (a < b)
+ return -1;
+ else if (a > b)
+ return 1;
+ else
+ return 0;
+}
+
+static int cmp_u32(const void *A, const void *B)
+{
+ const u32 *a = A, *b = B;
+
+ if (a < b)
+ return -1;
+ else if (a > b)
+ return 1;
+ else
+ return 0;
+}
+
+static void measure_clocks(struct intel_engine_cs *engine,
+ u32 *out_cycles, ktime_t *out_dt)
+{
+ ktime_t dt[5];
+ u32 cycles[5];
+ int i;
+
+ for (i = 0; i < 5; i++) {
+ preempt_disable();
+ ENGINE_POSTING_READ(engine, RING_TIMESTAMP);
+ cycles[i] = -ENGINE_READ_FW(engine, RING_TIMESTAMP);
+ dt[i] = ktime_get();
+
+ udelay(1000);
+
+ dt[i] = ktime_sub(ktime_get(), dt[i]);
+ ENGINE_POSTING_READ(engine, RING_TIMESTAMP);
+ cycles[i] += ENGINE_READ_FW(engine, RING_TIMESTAMP);
+ preempt_enable();
+ }
+
+ /* Use the median of both cycle/dt; close enough */
+ sort(cycles, 5, sizeof(*cycles), cmp_u32, NULL);
+ *out_cycles = (cycles[1] + 2 * cycles[2] + cycles[3]) / 4;
+
+ sort(dt, 5, sizeof(*dt), cmp_u64, NULL);
+ *out_dt = div_u64(dt[1] + 2 * dt[2] + dt[3], 4);
+}
+
+static int live_gt_clocks(void *arg)
+{
+ struct intel_gt *gt = arg;
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+ int err = 0;
+
+ if (!RUNTIME_INFO(gt->i915)->cs_timestamp_frequency_hz) { /* unknown */
+ pr_info("CS_TIMESTAMP frequency unknown\n");
+ return 0;
+ }
+
+ if (INTEL_GEN(gt->i915) < 4) /* Any CS_TIMESTAMP? */
+ return 0;
+
+ intel_gt_pm_get(gt);
+ intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
+
+ for_each_engine(engine, gt, id) {
+ u32 cycles;
+ u32 expected;
+ u64 time;
+ u64 dt;
+
+ if (INTEL_GEN(engine->i915) < 7 && engine->id != RCS0)
+ continue;
+
+ measure_clocks(engine, &cycles, &dt);
+
+ time = i915_cs_timestamp_ticks_to_ns(engine->i915, cycles);
+ expected = i915_cs_timestamp_ns_to_ticks(engine->i915, dt);
+
+ pr_info("%s: TIMESTAMP %d cycles [%lldns] in %lldns [%d cycles], using CS clock frequency of %uKHz\n",
+ engine->name, cycles, time, dt, expected,
+ RUNTIME_INFO(engine->i915)->cs_timestamp_frequency_hz / 1000);
+
+ if (9 * time < 8 * dt || 8 * time > 9 * dt) {
+ pr_err("%s: CS ticks did not match walltime!\n",
+ engine->name);
+ err = -EINVAL;
+ break;
+ }
+
+ if (9 * expected < 8 * cycles || 8 * expected > 9 * cycles) {
+ pr_err("%s: walltime did not match CS ticks!\n",
+ engine->name);
+ err = -EINVAL;
+ break;
+ }
+ }
+
+ intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
+ intel_gt_pm_put(gt);
+
+ return err;
+}
+
static int live_gt_resume(void *arg)
{
struct intel_gt *gt = arg;
@@ -52,6 +166,7 @@ static int live_gt_resume(void *arg)
int intel_gt_pm_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
+ SUBTEST(live_gt_clocks),
SUBTEST(live_rc6_manual),
SUBTEST(live_rps_clock_interval),
SUBTEST(live_rps_control),
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Measure CS_TIMESTAMP (rev4)
2020-05-20 7:34 [Intel-gfx] [CI] drm/i915/selftests: Measure CS_TIMESTAMP Chris Wilson
@ 2020-05-20 8:10 ` Patchwork
2020-05-20 8:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2020-05-20 8:10 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Measure CS_TIMESTAMP (rev4)
URL : https://patchwork.freedesktop.org/series/77320/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d4d9394cab86 drm/i915/selftests: Measure CS_TIMESTAMP
-:72: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst
#72: FILE: drivers/gpu/drm/i915/gt/selftest_gt_pm.c:53:
+ udelay(1000);
total: 0 errors, 0 warnings, 1 checks, 131 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: Measure CS_TIMESTAMP (rev4)
2020-05-20 7:34 [Intel-gfx] [CI] drm/i915/selftests: Measure CS_TIMESTAMP Chris Wilson
2020-05-20 8:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Measure CS_TIMESTAMP (rev4) Patchwork
@ 2020-05-20 8:33 ` Patchwork
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2020-05-20 8:33 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Measure CS_TIMESTAMP (rev4)
URL : https://patchwork.freedesktop.org/series/77320/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8509 -> Patchwork_17723
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_17723 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_17723, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17723/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_17723:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@gt_pm:
- fi-elk-e7500: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8509/fi-elk-e7500/igt@i915_selftest@live@gt_pm.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17723/fi-elk-e7500/igt@i915_selftest@live@gt_pm.html
- fi-ilk-650: [PASS][3] -> [DMESG-FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8509/fi-ilk-650/igt@i915_selftest@live@gt_pm.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17723/fi-ilk-650/igt@i915_selftest@live@gt_pm.html
- fi-bwr-2160: [PASS][5] -> [DMESG-FAIL][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8509/fi-bwr-2160/igt@i915_selftest@live@gt_pm.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17723/fi-bwr-2160/igt@i915_selftest@live@gt_pm.html
Known issues
------------
Here are the changes found in Patchwork_17723 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@i915_selftest@live@execlists:
- {fi-tgl-dsi}: [INCOMPLETE][7] ([i915#1803]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8509/fi-tgl-dsi/igt@i915_selftest@live@execlists.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17723/fi-tgl-dsi/igt@i915_selftest@live@execlists.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1803]: https://gitlab.freedesktop.org/drm/intel/issues/1803
Participating hosts (48 -> 44)
------------------------------
Additional (1): fi-kbl-7560u
Missing (5): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_8509 -> Patchwork_17723
CI-20190529: 20190529
CI_DRM_8509: ea6a2729d3d286137415319de4161042b0337e87 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5662: e79462659e0f45cd3f4f766f58cb792303c6bf9b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17723: d4d9394cab8620332c8680a8b9a4ccba4dcdd898 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d4d9394cab86 drm/i915/selftests: Measure CS_TIMESTAMP
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17723/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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2020-05-20 7:34 [Intel-gfx] [CI] drm/i915/selftests: Measure CS_TIMESTAMP Chris Wilson
2020-05-20 8:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Measure CS_TIMESTAMP (rev4) Patchwork
2020-05-20 8:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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