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* [PATCH] x86/cpu: Add Sapphire Rapids CPU model number
@ 2020-06-03 17:33 Tony Luck
  2020-06-03 18:06 ` [tip: x86/urgent] " tip-bot2 for Tony Luck
  0 siblings, 1 reply; 2+ messages in thread
From: Tony Luck @ 2020-06-03 17:33 UTC (permalink / raw)
  To: Borislav Petkov; +Cc: Tony Luck, x86, linux-kernel

Latest edition (039) of "Intel Architecture Instruction Set Extensions
and Future Features Programming Reference" includes three new CPU model
numbers. Linux already has the two Ice Lake server ones. Add the new
model number for Sapphire Rapids.

Signed-off-by: Tony Luck <tony.luck@intel.com>
---
I'd appreciate this being merged to Linus, even though it wasn't posted
before the merge window opened. It will avoid it being a dependency for
other patch series (perf, edac, ...)

FYI: ISE039 is here today (not included in commit message because the URL
isn't long term stable).

https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf

 arch/x86/include/asm/intel-family.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 8f1e94f29a16..a338a6deb950 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -89,6 +89,8 @@
 #define INTEL_FAM6_COMETLAKE		0xA5
 #define INTEL_FAM6_COMETLAKE_L		0xA6
 
+#define INTEL_FAM6_SAPPHIRERAPIDS_X	0x8F
+
 /* "Small Core" Processors (Atom) */
 
 #define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */
-- 
2.21.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* [tip: x86/urgent] x86/cpu: Add Sapphire Rapids CPU model number
  2020-06-03 17:33 [PATCH] x86/cpu: Add Sapphire Rapids CPU model number Tony Luck
@ 2020-06-03 18:06 ` tip-bot2 for Tony Luck
  0 siblings, 0 replies; 2+ messages in thread
From: tip-bot2 for Tony Luck @ 2020-06-03 18:06 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: Tony Luck, Borislav Petkov, x86, LKML

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     be25d1b5ea6a3a3ecbb5474e2ae8e32d2ba055ea
Gitweb:        https://git.kernel.org/tip/be25d1b5ea6a3a3ecbb5474e2ae8e32d2ba055ea
Author:        Tony Luck <tony.luck@intel.com>
AuthorDate:    Wed, 03 Jun 2020 10:33:52 -07:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Wed, 03 Jun 2020 19:53:41 +02:00

x86/cpu: Add Sapphire Rapids CPU model number

Latest edition (039) of "Intel Architecture Instruction Set Extensions
and Future Features Programming Reference" includes three new CPU model
numbers. Linux already has the two Ice Lake server ones. Add the new
model number for Sapphire Rapids.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200603173352.15506-1-tony.luck@intel.com
---
 arch/x86/include/asm/intel-family.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 8f1e94f..a338a6d 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -89,6 +89,8 @@
 #define INTEL_FAM6_COMETLAKE		0xA5
 #define INTEL_FAM6_COMETLAKE_L		0xA6
 
+#define INTEL_FAM6_SAPPHIRERAPIDS_X	0x8F
+
 /* "Small Core" Processors (Atom) */
 
 #define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */

^ permalink raw reply related	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2020-06-03 18:06 UTC | newest]

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2020-06-03 17:33 [PATCH] x86/cpu: Add Sapphire Rapids CPU model number Tony Luck
2020-06-03 18:06 ` [tip: x86/urgent] " tip-bot2 for Tony Luck

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