* [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
@ 2020-06-16 8:29 Shaofeng Tang
2020-06-16 16:34 ` kernel test robot
` (2 more replies)
0 siblings, 3 replies; 12+ messages in thread
From: Shaofeng Tang @ 2020-06-16 8:29 UTC (permalink / raw)
To: intel-gfx; +Cc: Shaofeng Tang
[Why]
Query if vgpu is active, it is useful to the user.
Currently, only the primary plane is usable when vgpu is active.
The value of vgpu active is useful for user to determine
how many planes can be used. also useful for user to
determine different behaviors according to vgpu is active or not.
[How]
Add a switch-case in the IOCTL 'i915_getparam_ioctl' to
return 'intel_vgpu_active'
Signed-off-by: Shaofeng Tang <shaofeng.tang@intel.com>
---
drivers/gpu/drm/i915/i915_getparam.c | 3 +++
include/uapi/drm/i915_drm.h | 6 ++++++
tools/include/uapi/drm/i915_drm.h | 6 ++++++
3 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index d042644..c50555b 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -161,6 +161,9 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
case I915_PARAM_PERF_REVISION:
value = i915_perf_ioctl_version();
break;
+ case I915_PARAM_IS_GVT:
+ value = intel_vgpu_active(i915);
+ break;
default:
DRM_DEBUG("Unknown parameter %d\n", param->param);
return -EINVAL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 14b67cd..74f06e2 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -619,6 +619,12 @@ enum drm_i915_pmu_engine_sample {
*/
#define I915_PARAM_PERF_REVISION 54
+/*
+ * Query whether GVT is active. The value returned helps userspace application
+ * to determine what KMS resources are workable.
+ */
+#define I915_PARAM_IS_GVT 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
diff --git a/tools/include/uapi/drm/i915_drm.h b/tools/include/uapi/drm/i915_drm.h
index 2813e57..ecaad82 100644
--- a/tools/include/uapi/drm/i915_drm.h
+++ b/tools/include/uapi/drm/i915_drm.h
@@ -619,6 +619,12 @@ enum drm_i915_pmu_engine_sample {
*/
#define I915_PARAM_PERF_REVISION 54
+/*
+ * Query whether GVT is active. The value returned helps userspace application
+ * to determine what KMS resources are workable.
+ */
+#define I915_PARAM_IS_GVT 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
2020-06-16 8:29 [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL Shaofeng Tang
@ 2020-06-16 16:34 ` kernel test robot
2020-06-16 17:58 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
2020-06-16 18:47 ` [Intel-gfx] [PATCH] " Chris Wilson
2 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2020-06-16 16:34 UTC (permalink / raw)
To: Shaofeng Tang, intel-gfx; +Cc: Shaofeng Tang, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 7189 bytes --]
Hi Shaofeng,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip linus/master v5.8-rc1 next-20200616]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Shaofeng-Tang/drm-i915-gvt-query-if-vgpu-is-active-via-GETPARAM-IOCTL/20200616-162408
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-debian-10.3 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-13) 9.3.0
reproduce (this is a W=1 build):
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>, old ones prefixed by <<):
drivers/gpu/drm/i915/i915_getparam.c: In function 'i915_getparam_ioctl':
>> drivers/gpu/drm/i915/i915_getparam.c:165:11: error: implicit declaration of function 'intel_vgpu_active'; did you mean 'intel_vtd_active'? [-Werror=implicit-function-declaration]
165 | value = intel_vgpu_active(i915);
| ^~~~~~~~~~~~~~~~~
| intel_vtd_active
cc1: some warnings being treated as errors
vim +165 drivers/gpu/drm/i915/i915_getparam.c
10
11 int i915_getparam_ioctl(struct drm_device *dev, void *data,
12 struct drm_file *file_priv)
13 {
14 struct drm_i915_private *i915 = to_i915(dev);
15 const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
16 drm_i915_getparam_t *param = data;
17 int value;
18
19 switch (param->param) {
20 case I915_PARAM_IRQ_ACTIVE:
21 case I915_PARAM_ALLOW_BATCHBUFFER:
22 case I915_PARAM_LAST_DISPATCH:
23 case I915_PARAM_HAS_EXEC_CONSTANTS:
24 /* Reject all old ums/dri params. */
25 return -ENODEV;
26 case I915_PARAM_CHIPSET_ID:
27 value = i915->drm.pdev->device;
28 break;
29 case I915_PARAM_REVISION:
30 value = i915->drm.pdev->revision;
31 break;
32 case I915_PARAM_NUM_FENCES_AVAIL:
33 value = i915->ggtt.num_fences;
34 break;
35 case I915_PARAM_HAS_OVERLAY:
36 value = !!i915->overlay;
37 break;
38 case I915_PARAM_HAS_BSD:
39 value = !!intel_engine_lookup_user(i915,
40 I915_ENGINE_CLASS_VIDEO, 0);
41 break;
42 case I915_PARAM_HAS_BLT:
43 value = !!intel_engine_lookup_user(i915,
44 I915_ENGINE_CLASS_COPY, 0);
45 break;
46 case I915_PARAM_HAS_VEBOX:
47 value = !!intel_engine_lookup_user(i915,
48 I915_ENGINE_CLASS_VIDEO_ENHANCE, 0);
49 break;
50 case I915_PARAM_HAS_BSD2:
51 value = !!intel_engine_lookup_user(i915,
52 I915_ENGINE_CLASS_VIDEO, 1);
53 break;
54 case I915_PARAM_HAS_LLC:
55 value = HAS_LLC(i915);
56 break;
57 case I915_PARAM_HAS_WT:
58 value = HAS_WT(i915);
59 break;
60 case I915_PARAM_HAS_ALIASING_PPGTT:
61 value = INTEL_PPGTT(i915);
62 break;
63 case I915_PARAM_HAS_SEMAPHORES:
64 value = !!(i915->caps.scheduler & I915_SCHEDULER_CAP_SEMAPHORES);
65 break;
66 case I915_PARAM_HAS_SECURE_BATCHES:
67 value = HAS_SECURE_BATCHES(i915) && capable(CAP_SYS_ADMIN);
68 break;
69 case I915_PARAM_CMD_PARSER_VERSION:
70 value = i915_cmd_parser_get_version(i915);
71 break;
72 case I915_PARAM_SUBSLICE_TOTAL:
73 value = intel_sseu_subslice_total(sseu);
74 if (!value)
75 return -ENODEV;
76 break;
77 case I915_PARAM_EU_TOTAL:
78 value = sseu->eu_total;
79 if (!value)
80 return -ENODEV;
81 break;
82 case I915_PARAM_HAS_GPU_RESET:
83 value = i915_modparams.enable_hangcheck &&
84 intel_has_gpu_reset(&i915->gt);
85 if (value && intel_has_reset_engine(&i915->gt))
86 value = 2;
87 break;
88 case I915_PARAM_HAS_RESOURCE_STREAMER:
89 value = 0;
90 break;
91 case I915_PARAM_HAS_POOLED_EU:
92 value = HAS_POOLED_EU(i915);
93 break;
94 case I915_PARAM_MIN_EU_IN_POOL:
95 value = sseu->min_eu_in_pool;
96 break;
97 case I915_PARAM_HUC_STATUS:
98 value = intel_huc_check_status(&i915->gt.uc.huc);
99 if (value < 0)
100 return value;
101 break;
102 case I915_PARAM_MMAP_GTT_VERSION:
103 /* Though we've started our numbering from 1, and so class all
104 * earlier versions as 0, in effect their value is undefined as
105 * the ioctl will report EINVAL for the unknown param!
106 */
107 value = i915_gem_mmap_gtt_version();
108 break;
109 case I915_PARAM_HAS_SCHEDULER:
110 value = i915->caps.scheduler;
111 break;
112
113 case I915_PARAM_MMAP_VERSION:
114 /* Remember to bump this if the version changes! */
115 case I915_PARAM_HAS_GEM:
116 case I915_PARAM_HAS_PAGEFLIPPING:
117 case I915_PARAM_HAS_EXECBUF2: /* depends on GEM */
118 case I915_PARAM_HAS_RELAXED_FENCING:
119 case I915_PARAM_HAS_COHERENT_RINGS:
120 case I915_PARAM_HAS_RELAXED_DELTA:
121 case I915_PARAM_HAS_GEN7_SOL_RESET:
122 case I915_PARAM_HAS_WAIT_TIMEOUT:
123 case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
124 case I915_PARAM_HAS_PINNED_BATCHES:
125 case I915_PARAM_HAS_EXEC_NO_RELOC:
126 case I915_PARAM_HAS_EXEC_HANDLE_LUT:
127 case I915_PARAM_HAS_COHERENT_PHYS_GTT:
128 case I915_PARAM_HAS_EXEC_SOFTPIN:
129 case I915_PARAM_HAS_EXEC_ASYNC:
130 case I915_PARAM_HAS_EXEC_FENCE:
131 case I915_PARAM_HAS_EXEC_CAPTURE:
132 case I915_PARAM_HAS_EXEC_BATCH_FIRST:
133 case I915_PARAM_HAS_EXEC_FENCE_ARRAY:
134 case I915_PARAM_HAS_EXEC_SUBMIT_FENCE:
135 /* For the time being all of these are always true;
136 * if some supported hardware does not have one of these
137 * features this value needs to be provided from
138 * INTEL_INFO(), a feature macro, or similar.
139 */
140 value = 1;
141 break;
142 case I915_PARAM_HAS_CONTEXT_ISOLATION:
143 value = intel_engines_has_context_isolation(i915);
144 break;
145 case I915_PARAM_SLICE_MASK:
146 value = sseu->slice_mask;
147 if (!value)
148 return -ENODEV;
149 break;
150 case I915_PARAM_SUBSLICE_MASK:
151 value = sseu->subslice_mask[0];
152 if (!value)
153 return -ENODEV;
154 break;
155 case I915_PARAM_CS_TIMESTAMP_FREQUENCY:
156 value = RUNTIME_INFO(i915)->cs_timestamp_frequency_hz;
157 break;
158 case I915_PARAM_MMAP_GTT_COHERENT:
159 value = INTEL_INFO(i915)->has_coherent_ggtt;
160 break;
161 case I915_PARAM_PERF_REVISION:
162 value = i915_perf_ioctl_version();
163 break;
164 case I915_PARAM_IS_GVT:
> 165 value = intel_vgpu_active(i915);
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 34625 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
@ 2020-06-16 16:34 ` kernel test robot
0 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2020-06-16 16:34 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 7383 bytes --]
Hi Shaofeng,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip linus/master v5.8-rc1 next-20200616]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Shaofeng-Tang/drm-i915-gvt-query-if-vgpu-is-active-via-GETPARAM-IOCTL/20200616-162408
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-debian-10.3 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-13) 9.3.0
reproduce (this is a W=1 build):
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>, old ones prefixed by <<):
drivers/gpu/drm/i915/i915_getparam.c: In function 'i915_getparam_ioctl':
>> drivers/gpu/drm/i915/i915_getparam.c:165:11: error: implicit declaration of function 'intel_vgpu_active'; did you mean 'intel_vtd_active'? [-Werror=implicit-function-declaration]
165 | value = intel_vgpu_active(i915);
| ^~~~~~~~~~~~~~~~~
| intel_vtd_active
cc1: some warnings being treated as errors
vim +165 drivers/gpu/drm/i915/i915_getparam.c
10
11 int i915_getparam_ioctl(struct drm_device *dev, void *data,
12 struct drm_file *file_priv)
13 {
14 struct drm_i915_private *i915 = to_i915(dev);
15 const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
16 drm_i915_getparam_t *param = data;
17 int value;
18
19 switch (param->param) {
20 case I915_PARAM_IRQ_ACTIVE:
21 case I915_PARAM_ALLOW_BATCHBUFFER:
22 case I915_PARAM_LAST_DISPATCH:
23 case I915_PARAM_HAS_EXEC_CONSTANTS:
24 /* Reject all old ums/dri params. */
25 return -ENODEV;
26 case I915_PARAM_CHIPSET_ID:
27 value = i915->drm.pdev->device;
28 break;
29 case I915_PARAM_REVISION:
30 value = i915->drm.pdev->revision;
31 break;
32 case I915_PARAM_NUM_FENCES_AVAIL:
33 value = i915->ggtt.num_fences;
34 break;
35 case I915_PARAM_HAS_OVERLAY:
36 value = !!i915->overlay;
37 break;
38 case I915_PARAM_HAS_BSD:
39 value = !!intel_engine_lookup_user(i915,
40 I915_ENGINE_CLASS_VIDEO, 0);
41 break;
42 case I915_PARAM_HAS_BLT:
43 value = !!intel_engine_lookup_user(i915,
44 I915_ENGINE_CLASS_COPY, 0);
45 break;
46 case I915_PARAM_HAS_VEBOX:
47 value = !!intel_engine_lookup_user(i915,
48 I915_ENGINE_CLASS_VIDEO_ENHANCE, 0);
49 break;
50 case I915_PARAM_HAS_BSD2:
51 value = !!intel_engine_lookup_user(i915,
52 I915_ENGINE_CLASS_VIDEO, 1);
53 break;
54 case I915_PARAM_HAS_LLC:
55 value = HAS_LLC(i915);
56 break;
57 case I915_PARAM_HAS_WT:
58 value = HAS_WT(i915);
59 break;
60 case I915_PARAM_HAS_ALIASING_PPGTT:
61 value = INTEL_PPGTT(i915);
62 break;
63 case I915_PARAM_HAS_SEMAPHORES:
64 value = !!(i915->caps.scheduler & I915_SCHEDULER_CAP_SEMAPHORES);
65 break;
66 case I915_PARAM_HAS_SECURE_BATCHES:
67 value = HAS_SECURE_BATCHES(i915) && capable(CAP_SYS_ADMIN);
68 break;
69 case I915_PARAM_CMD_PARSER_VERSION:
70 value = i915_cmd_parser_get_version(i915);
71 break;
72 case I915_PARAM_SUBSLICE_TOTAL:
73 value = intel_sseu_subslice_total(sseu);
74 if (!value)
75 return -ENODEV;
76 break;
77 case I915_PARAM_EU_TOTAL:
78 value = sseu->eu_total;
79 if (!value)
80 return -ENODEV;
81 break;
82 case I915_PARAM_HAS_GPU_RESET:
83 value = i915_modparams.enable_hangcheck &&
84 intel_has_gpu_reset(&i915->gt);
85 if (value && intel_has_reset_engine(&i915->gt))
86 value = 2;
87 break;
88 case I915_PARAM_HAS_RESOURCE_STREAMER:
89 value = 0;
90 break;
91 case I915_PARAM_HAS_POOLED_EU:
92 value = HAS_POOLED_EU(i915);
93 break;
94 case I915_PARAM_MIN_EU_IN_POOL:
95 value = sseu->min_eu_in_pool;
96 break;
97 case I915_PARAM_HUC_STATUS:
98 value = intel_huc_check_status(&i915->gt.uc.huc);
99 if (value < 0)
100 return value;
101 break;
102 case I915_PARAM_MMAP_GTT_VERSION:
103 /* Though we've started our numbering from 1, and so class all
104 * earlier versions as 0, in effect their value is undefined as
105 * the ioctl will report EINVAL for the unknown param!
106 */
107 value = i915_gem_mmap_gtt_version();
108 break;
109 case I915_PARAM_HAS_SCHEDULER:
110 value = i915->caps.scheduler;
111 break;
112
113 case I915_PARAM_MMAP_VERSION:
114 /* Remember to bump this if the version changes! */
115 case I915_PARAM_HAS_GEM:
116 case I915_PARAM_HAS_PAGEFLIPPING:
117 case I915_PARAM_HAS_EXECBUF2: /* depends on GEM */
118 case I915_PARAM_HAS_RELAXED_FENCING:
119 case I915_PARAM_HAS_COHERENT_RINGS:
120 case I915_PARAM_HAS_RELAXED_DELTA:
121 case I915_PARAM_HAS_GEN7_SOL_RESET:
122 case I915_PARAM_HAS_WAIT_TIMEOUT:
123 case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
124 case I915_PARAM_HAS_PINNED_BATCHES:
125 case I915_PARAM_HAS_EXEC_NO_RELOC:
126 case I915_PARAM_HAS_EXEC_HANDLE_LUT:
127 case I915_PARAM_HAS_COHERENT_PHYS_GTT:
128 case I915_PARAM_HAS_EXEC_SOFTPIN:
129 case I915_PARAM_HAS_EXEC_ASYNC:
130 case I915_PARAM_HAS_EXEC_FENCE:
131 case I915_PARAM_HAS_EXEC_CAPTURE:
132 case I915_PARAM_HAS_EXEC_BATCH_FIRST:
133 case I915_PARAM_HAS_EXEC_FENCE_ARRAY:
134 case I915_PARAM_HAS_EXEC_SUBMIT_FENCE:
135 /* For the time being all of these are always true;
136 * if some supported hardware does not have one of these
137 * features this value needs to be provided from
138 * INTEL_INFO(), a feature macro, or similar.
139 */
140 value = 1;
141 break;
142 case I915_PARAM_HAS_CONTEXT_ISOLATION:
143 value = intel_engines_has_context_isolation(i915);
144 break;
145 case I915_PARAM_SLICE_MASK:
146 value = sseu->slice_mask;
147 if (!value)
148 return -ENODEV;
149 break;
150 case I915_PARAM_SUBSLICE_MASK:
151 value = sseu->subslice_mask[0];
152 if (!value)
153 return -ENODEV;
154 break;
155 case I915_PARAM_CS_TIMESTAMP_FREQUENCY:
156 value = RUNTIME_INFO(i915)->cs_timestamp_frequency_hz;
157 break;
158 case I915_PARAM_MMAP_GTT_COHERENT:
159 value = INTEL_INFO(i915)->has_coherent_ggtt;
160 break;
161 case I915_PARAM_PERF_REVISION:
162 value = i915_perf_ioctl_version();
163 break;
164 case I915_PARAM_IS_GVT:
> 165 value = intel_vgpu_active(i915);
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 34625 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
2020-06-16 8:29 [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL Shaofeng Tang
2020-06-16 16:34 ` kernel test robot
@ 2020-06-16 17:58 ` Patchwork
2020-06-16 18:47 ` [Intel-gfx] [PATCH] " Chris Wilson
2 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-06-16 17:58 UTC (permalink / raw)
To: Shaofeng Tang; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
URL : https://patchwork.freedesktop.org/series/78409/
State : failure
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/i915_getparam.o
drivers/gpu/drm/i915/i915_getparam.c: In function ‘i915_getparam_ioctl’:
drivers/gpu/drm/i915/i915_getparam.c:165:11: error: implicit declaration of function ‘intel_vgpu_active’; did you mean ‘intel_vtd_active’? [-Werror=implicit-function-declaration]
value = intel_vgpu_active(i915);
^~~~~~~~~~~~~~~~~
intel_vtd_active
cc1: all warnings being treated as errors
scripts/Makefile.build:280: recipe for target 'drivers/gpu/drm/i915/i915_getparam.o' failed
make[4]: *** [drivers/gpu/drm/i915/i915_getparam.o] Error 1
scripts/Makefile.build:497: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:497: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:497: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1764: recipe for target 'drivers' failed
make: *** [drivers] Error 2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
2020-06-16 8:29 [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL Shaofeng Tang
2020-06-16 16:34 ` kernel test robot
2020-06-16 17:58 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
@ 2020-06-16 18:47 ` Chris Wilson
2020-06-22 8:23 ` Zhenyu Wang
2 siblings, 1 reply; 12+ messages in thread
From: Chris Wilson @ 2020-06-16 18:47 UTC (permalink / raw)
To: Shaofeng Tang, intel-gfx; +Cc: Shaofeng Tang
Quoting Shaofeng Tang (2020-06-16 09:29:20)
> [Why]
> Query if vgpu is active, it is useful to the user.
> Currently, only the primary plane is usable when vgpu is active.
> The value of vgpu active is useful for user to determine
> how many planes can be used. also useful for user to
> determine different behaviors according to vgpu is active or not.
The number of planes must be queried via kms, and all such kernel
capabilities should be declared via the appropriate interface.
I am not saying that there is not potentially good reason to let the
user to know it's a virtual gpu, but hardcoding api limits in the client
based on the parameter is a bad idea.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
2020-06-16 18:47 ` [Intel-gfx] [PATCH] " Chris Wilson
@ 2020-06-22 8:23 ` Zhenyu Wang
2020-06-23 3:46 ` Tang, Shaofeng
0 siblings, 1 reply; 12+ messages in thread
From: Zhenyu Wang @ 2020-06-22 8:23 UTC (permalink / raw)
To: Chris Wilson; +Cc: Shaofeng Tang, intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 985 bytes --]
On 2020.06.16 19:47:20 +0100, Chris Wilson wrote:
> Quoting Shaofeng Tang (2020-06-16 09:29:20)
> > [Why]
> > Query if vgpu is active, it is useful to the user.
> > Currently, only the primary plane is usable when vgpu is active.
> > The value of vgpu active is useful for user to determine
> > how many planes can be used. also useful for user to
> > determine different behaviors according to vgpu is active or not.
>
> The number of planes must be queried via kms, and all such kernel
> capabilities should be declared via the appropriate interface.
>
> I am not saying that there is not potentially good reason to let the
> user to know it's a virtual gpu, but hardcoding api limits in the client
> based on the parameter is a bad idea.
Yeah, as I replied for internal before, guest shouldn't detect via
this kind of interface, which also doesn't reflect any gvt host capability
change. For any current gap, let's fix gvt or vgpu handling instead.
Thanks.
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_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
2020-06-23 3:46 ` Tang, Shaofeng
@ 2020-06-23 3:44 ` Zhenyu Wang
2020-06-23 6:41 ` Tang, Shaofeng
0 siblings, 1 reply; 12+ messages in thread
From: Zhenyu Wang @ 2020-06-23 3:44 UTC (permalink / raw)
To: Tang, Shaofeng; +Cc: intel-gfx, Lv, Zhiyuan, Chris Wilson
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On 2020.06.23 03:46:55 +0000, Tang, Shaofeng wrote:
> Hi Zhenyu and Chris,
>
> Yes, I agree with you.
> It must be better if only the workable planes/overlays are returned from KMS.
> but currently, KMS still return all planes. and User did not know if it is a virtual GPU
> or a native GPU. Do you know if there is a plan to fix or implement it? or any roadmap for sharing.
We should expose this info via PV to let guest expose correct config from KMS.
I've asked Zhiyuan to add todo for the fix. Better include you to be clear on
the issue and requirement.
> If KMS does not work in this way, we have to customized our image for this issue.
> 2 possible solutions,
> first, provide 2 customized image, 1 for VM, and 1 for Native or bare-metal.
> and hard-code to only use 1 plane in the VM image.
> Second, only provide 1 image, and hard-code to only use 1 plane for both VM and native.
> None of them looks good to us.
> We don't hope to hardcode the plane usage in user-space either, so this API is really helpful before KMS work as expected.
>
> As you mentioned there is a potentially good reason to let the user
> know if it is a virtual GPU or not. it is not a hardcoding api limits.
> I suppose it is a ability to support developer for optimizing the performance on VM
> Including choose an appropriate renderer for better performance on VM.
>
But simply expose virtual GPU flag doesn't give you reliable indicator
for performance e.g it doesn't tell you what's rendering is preferred.
Or either you do some runtime profiling or try to detect either it's
passthrough or mediated device e.g from gpu resource size, etc. That's
your guest application's choice.
> BR, Shaofeng
>
> -----Original Message-----
> From: Zhenyu Wang <zhenyuw@linux.intel.com>
> Sent: Monday, June 22, 2020 4:23 PM
> To: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tang, Shaofeng <shaofeng.tang@intel.com>; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
>
> On 2020.06.16 19:47:20 +0100, Chris Wilson wrote:
> > Quoting Shaofeng Tang (2020-06-16 09:29:20)
> > > [Why]
> > > Query if vgpu is active, it is useful to the user.
> > > Currently, only the primary plane is usable when vgpu is active.
> > > The value of vgpu active is useful for user to determine how many
> > > planes can be used. also useful for user to determine different
> > > behaviors according to vgpu is active or not.
> >
> > The number of planes must be queried via kms, and all such kernel
> > capabilities should be declared via the appropriate interface.
> >
> > I am not saying that there is not potentially good reason to let the
> > user to know it's a virtual gpu, but hardcoding api limits in the
> > client based on the parameter is a bad idea.
>
> Yeah, as I replied for internal before, guest shouldn't detect via this kind of interface, which also doesn't reflect any gvt host capability change. For any current gap, let's fix gvt or vgpu handling instead.
>
> Thanks.
--
Open Source Technology Center, Intel ltd.
$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
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_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
2020-06-22 8:23 ` Zhenyu Wang
@ 2020-06-23 3:46 ` Tang, Shaofeng
2020-06-23 3:44 ` Zhenyu Wang
0 siblings, 1 reply; 12+ messages in thread
From: Tang, Shaofeng @ 2020-06-23 3:46 UTC (permalink / raw)
To: Zhenyu Wang, Chris Wilson; +Cc: intel-gfx
Hi Zhenyu and Chris,
Yes, I agree with you.
It must be better if only the workable planes/overlays are returned from KMS.
but currently, KMS still return all planes. and User did not know if it is a virtual GPU
or a native GPU. Do you know if there is a plan to fix or implement it? or any roadmap for sharing.
If KMS does not work in this way, we have to customized our image for this issue.
2 possible solutions,
first, provide 2 customized image, 1 for VM, and 1 for Native or bare-metal.
and hard-code to only use 1 plane in the VM image.
Second, only provide 1 image, and hard-code to only use 1 plane for both VM and native.
None of them looks good to us.
We don't hope to hardcode the plane usage in user-space either, so this API is really helpful before KMS work as expected.
As you mentioned there is a potentially good reason to let the user
know if it is a virtual GPU or not. it is not a hardcoding api limits.
I suppose it is a ability to support developer for optimizing the performance on VM
Including choose an appropriate renderer for better performance on VM.
BR, Shaofeng
-----Original Message-----
From: Zhenyu Wang <zhenyuw@linux.intel.com>
Sent: Monday, June 22, 2020 4:23 PM
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tang, Shaofeng <shaofeng.tang@intel.com>; intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
On 2020.06.16 19:47:20 +0100, Chris Wilson wrote:
> Quoting Shaofeng Tang (2020-06-16 09:29:20)
> > [Why]
> > Query if vgpu is active, it is useful to the user.
> > Currently, only the primary plane is usable when vgpu is active.
> > The value of vgpu active is useful for user to determine how many
> > planes can be used. also useful for user to determine different
> > behaviors according to vgpu is active or not.
>
> The number of planes must be queried via kms, and all such kernel
> capabilities should be declared via the appropriate interface.
>
> I am not saying that there is not potentially good reason to let the
> user to know it's a virtual gpu, but hardcoding api limits in the
> client based on the parameter is a bad idea.
Yeah, as I replied for internal before, guest shouldn't detect via this kind of interface, which also doesn't reflect any gvt host capability change. For any current gap, let's fix gvt or vgpu handling instead.
Thanks.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
2020-06-23 3:44 ` Zhenyu Wang
@ 2020-06-23 6:41 ` Tang, Shaofeng
0 siblings, 0 replies; 12+ messages in thread
From: Tang, Shaofeng @ 2020-06-23 6:41 UTC (permalink / raw)
To: Zhenyu Wang, Lv, Zhiyuan; +Cc: intel-gfx, Huang, Yuanjun, Chris Wilson
Hi Zhenyu, and Zhiyuan
Thanks a lot for your comments. and glad to know it is in the TODO list.
We really need this feature to make our released image workable on both GVT-g and GVT-d/native.
Multiple plane/overlay are important to us for meeting the Graphics performance target.
Do you have an estimate when the feature will be available?
and what version of this kernel will provide it, or do you have a back-porting plan for Kernel 5.4?
BR, Shaofeng
-----Original Message-----
From: Zhenyu Wang <zhenyuw@linux.intel.com>
Sent: Tuesday, June 23, 2020 11:45 AM
To: Tang, Shaofeng <shaofeng.tang@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>; intel-gfx@lists.freedesktop.org; Lv, Zhiyuan <zhiyuan.lv@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
On 2020.06.23 03:46:55 +0000, Tang, Shaofeng wrote:
> Hi Zhenyu and Chris,
>
> Yes, I agree with you.
> It must be better if only the workable planes/overlays are returned from KMS.
> but currently, KMS still return all planes. and User did not know if
> it is a virtual GPU or a native GPU. Do you know if there is a plan to fix or implement it? or any roadmap for sharing.
We should expose this info via PV to let guest expose correct config from KMS.
I've asked Zhiyuan to add todo for the fix. Better include you to be clear on the issue and requirement.
> If KMS does not work in this way, we have to customized our image for this issue.
> 2 possible solutions,
> first, provide 2 customized image, 1 for VM, and 1 for Native or bare-metal.
> and hard-code to only use 1 plane in the VM image.
> Second, only provide 1 image, and hard-code to only use 1 plane for both VM and native.
> None of them looks good to us.
> We don't hope to hardcode the plane usage in user-space either, so this API is really helpful before KMS work as expected.
>
> As you mentioned there is a potentially good reason to let the user
> know if it is a virtual GPU or not. it is not a hardcoding api limits.
> I suppose it is a ability to support developer for optimizing the
> performance on VM Including choose an appropriate renderer for better performance on VM.
>
But simply expose virtual GPU flag doesn't give you reliable indicator for performance e.g it doesn't tell you what's rendering is preferred.
Or either you do some runtime profiling or try to detect either it's passthrough or mediated device e.g from gpu resource size, etc. That's your guest application's choice.
> BR, Shaofeng
>
> -----Original Message-----
> From: Zhenyu Wang <zhenyuw@linux.intel.com>
> Sent: Monday, June 22, 2020 4:23 PM
> To: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tang, Shaofeng <shaofeng.tang@intel.com>;
> intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active
> via GETPARAM IOCTL
>
> On 2020.06.16 19:47:20 +0100, Chris Wilson wrote:
> > Quoting Shaofeng Tang (2020-06-16 09:29:20)
> > > [Why]
> > > Query if vgpu is active, it is useful to the user.
> > > Currently, only the primary plane is usable when vgpu is active.
> > > The value of vgpu active is useful for user to determine how many
> > > planes can be used. also useful for user to determine different
> > > behaviors according to vgpu is active or not.
> >
> > The number of planes must be queried via kms, and all such kernel
> > capabilities should be declared via the appropriate interface.
> >
> > I am not saying that there is not potentially good reason to let the
> > user to know it's a virtual gpu, but hardcoding api limits in the
> > client based on the parameter is a bad idea.
>
> Yeah, as I replied for internal before, guest shouldn't detect via this kind of interface, which also doesn't reflect any gvt host capability change. For any current gap, let's fix gvt or vgpu handling instead.
>
> Thanks.
--
Open Source Technology Center, Intel ltd.
$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
[not found] <otc-external>
2020-06-17 5:51 ` Shaofeng Tang
2020-06-17 7:41 ` Shaofeng Tang
@ 2020-06-17 7:54 ` Shaofeng Tang
2 siblings, 0 replies; 12+ messages in thread
From: Shaofeng Tang @ 2020-06-17 7:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Shaofeng Tang
[Why]
Query if vgpu is active, it is useful to the user.
Currently, only the primary plane is usable when vgpu is active.
The value of vgpu active is useful for user to determine
how many planes can be used. also useful for user to
determine different behaviors according to vgpu is active or not.
[How]
Add a switch-case in the IOCTL 'i915_getparam_ioctl' to
return 'intel_vgpu_active'
Signed-off-by: Shaofeng Tang <shaofeng.tang@intel.com>
---
drivers/gpu/drm/i915/i915_getparam.c | 4 ++++
include/uapi/drm/i915_drm.h | 6 ++++++
tools/include/uapi/drm/i915_drm.h | 6 ++++++
3 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index d042644..6d9a0b9 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -7,6 +7,7 @@
#include "i915_drv.h"
#include "i915_perf.h"
+#include "i915_vgpu.h"
int i915_getparam_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
@@ -161,6 +162,9 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
case I915_PARAM_PERF_REVISION:
value = i915_perf_ioctl_version();
break;
+ case I915_PARAM_IS_GVT:
+ value = intel_vgpu_active(i915);
+ break;
default:
DRM_DEBUG("Unknown parameter %d\n", param->param);
return -EINVAL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 14b67cd..74f06e2 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -619,6 +619,12 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_PERF_REVISION 54
+/*
+ * Query whether GVT is active. The value returned helps userspace application
+ * to determine what KMS resources are workable.
+ */
+#define I915_PARAM_IS_GVT 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
diff --git a/tools/include/uapi/drm/i915_drm.h b/tools/include/uapi/drm/i915_drm.h
index 2813e57..ecaad82 100644
--- a/tools/include/uapi/drm/i915_drm.h
+++ b/tools/include/uapi/drm/i915_drm.h
@@ -619,6 +619,12 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_PERF_REVISION 54
+/*
+ * Query whether GVT is active. The value returned helps userspace application
+ * to determine what KMS resources are workable.
+ */
+#define I915_PARAM_IS_GVT 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
--
2.9.2
base-commit: 999bc17a2471df17a3af3001d094cf6d5d4849b0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
[not found] <otc-external>
2020-06-17 5:51 ` Shaofeng Tang
@ 2020-06-17 7:41 ` Shaofeng Tang
2020-06-17 7:54 ` Shaofeng Tang
2 siblings, 0 replies; 12+ messages in thread
From: Shaofeng Tang @ 2020-06-17 7:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Shaofeng Tang
[Why]
Query if vgpu is active, it is useful to the user.
Currently, only the primary plane is usable when vgpu is active.
The value of vgpu active is useful for user to determine
how many planes can be used. also useful for user to
determine different behaviors according to vgpu is active or not.
[How]
Add a switch-case in the IOCTL 'i915_getparam_ioctl' to
return 'intel_vgpu_active'
Signed-off-by: Shaofeng Tang <shaofeng.tang@intel.com>
---
drivers/gpu/drm/i915/i915_getparam.c | 4 ++++
include/uapi/drm/i915_drm.h | 6 ++++++
tools/include/uapi/drm/i915_drm.h | 6 ++++++
3 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index d042644..6d9a0b9 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -7,6 +7,7 @@
#include "i915_drv.h"
#include "i915_perf.h"
+#include "i915_vgpu.h"
int i915_getparam_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
@@ -161,6 +162,9 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
case I915_PARAM_PERF_REVISION:
value = i915_perf_ioctl_version();
break;
+ case I915_PARAM_IS_GVT:
+ value = intel_vgpu_active(i915);
+ break;
default:
DRM_DEBUG("Unknown parameter %d\n", param->param);
return -EINVAL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 14b67cd..74f06e2 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -619,6 +619,12 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_PERF_REVISION 54
+/*
+ * Query whether GVT is active. The value returned helps userspace application
+ * to determine what KMS resources are workable.
+ */
+#define I915_PARAM_IS_GVT 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
diff --git a/tools/include/uapi/drm/i915_drm.h b/tools/include/uapi/drm/i915_drm.h
index 2813e57..ecaad82 100644
--- a/tools/include/uapi/drm/i915_drm.h
+++ b/tools/include/uapi/drm/i915_drm.h
@@ -619,6 +619,12 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_PERF_REVISION 54
+/*
+ * Query whether GVT is active. The value returned helps userspace application
+ * to determine what KMS resources are workable.
+ */
+#define I915_PARAM_IS_GVT 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
--
2.9.2
base-commit: a4136c4aa44855a8301f32fd4db5bde84ebb8e89
prerequisite-patch-id: 7ee5af51de7b25a7f547e64696dc813062e2299b
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
[not found] <otc-external>
@ 2020-06-17 5:51 ` Shaofeng Tang
2020-06-17 7:41 ` Shaofeng Tang
2020-06-17 7:54 ` Shaofeng Tang
2 siblings, 0 replies; 12+ messages in thread
From: Shaofeng Tang @ 2020-06-17 5:51 UTC (permalink / raw)
To: intel-gfx; +Cc: Shaofeng Tang
[Why]
Query if vgpu is active, it is useful to the user.
Currently, only the primary plane is usable when vgpu is active.
The value of vgpu active is useful for user to determine
how many planes can be used. also useful for user to
determine different behaviors according to vgpu is active or not.
[How]
Add a switch-case in the IOCTL 'i915_getparam_ioctl' to
return 'intel_vgpu_active'
Signed-off-by: Shaofeng Tang <shaofeng.tang@intel.com>
---
drivers/gpu/drm/i915/i915_getparam.c | 3 +++
include/uapi/drm/i915_drm.h | 6 ++++++
tools/include/uapi/drm/i915_drm.h | 6 ++++++
3 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index d042644..c50555b 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -161,6 +161,9 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
case I915_PARAM_PERF_REVISION:
value = i915_perf_ioctl_version();
break;
+ case I915_PARAM_IS_GVT:
+ value = intel_vgpu_active(i915);
+ break;
default:
DRM_DEBUG("Unknown parameter %d\n", param->param);
return -EINVAL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 14b67cd..74f06e2 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -619,6 +619,12 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_PERF_REVISION 54
+/*
+ * Query whether GVT is active. The value returned helps userspace application
+ * to determine what KMS resources are workable.
+ */
+#define I915_PARAM_IS_GVT 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
diff --git a/tools/include/uapi/drm/i915_drm.h b/tools/include/uapi/drm/i915_drm.h
index 2813e57..ecaad82 100644
--- a/tools/include/uapi/drm/i915_drm.h
+++ b/tools/include/uapi/drm/i915_drm.h
@@ -619,6 +619,12 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_PERF_REVISION 54
+/*
+ * Query whether GVT is active. The value returned helps userspace application
+ * to determine what KMS resources are workable.
+ */
+#define I915_PARAM_IS_GVT 55
+
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
--
2.9.2
base-commit: 999bc17a2471df17a3af3001d094cf6d5d4849b0
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^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-06-23 6:41 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-16 8:29 [Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL Shaofeng Tang
2020-06-16 16:34 ` kernel test robot
2020-06-16 16:34 ` kernel test robot
2020-06-16 17:58 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
2020-06-16 18:47 ` [Intel-gfx] [PATCH] " Chris Wilson
2020-06-22 8:23 ` Zhenyu Wang
2020-06-23 3:46 ` Tang, Shaofeng
2020-06-23 3:44 ` Zhenyu Wang
2020-06-23 6:41 ` Tang, Shaofeng
[not found] <otc-external>
2020-06-17 5:51 ` Shaofeng Tang
2020-06-17 7:41 ` Shaofeng Tang
2020-06-17 7:54 ` Shaofeng Tang
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