From: Sowjanya Komatineni <skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> To: skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, frankc-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, hverkuil-qWit8jRvyhVmR6Xm/wNWPw@public.gmane.org, sakari.ailus-X3B1VOXEql0@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, helen.koike-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org Cc: digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: [RFC PATCH v3 11/18] dt-bindings: tegra: Update VI and CSI bindings with port info Date: Tue, 14 Jul 2020 21:20:48 -0700 [thread overview] Message-ID: <1594786855-26506-12-git-send-email-skomatineni@nvidia.com> (raw) In-Reply-To: <1594786855-26506-1-git-send-email-skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Update VI and CSI bindings to add port and endpoint nodes as per media video-interfaces DT binding document. Signed-off-by: Sowjanya Komatineni <skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- .../display/tegra/nvidia,tegra20-host1x.txt | 92 +++++++++++++++++++++- 1 file changed, 90 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index 4731921..ac63ae4a 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -51,8 +51,16 @@ of the following host1x client modules: - vi - Tegra210: - power-domains: Must include venc powergate node as vi is in VE partition. - - Tegra210 has CSI part of VI sharing same host interface and register space. - So, VI device node should have CSI child node. + + ports (optional node) + vi can have optional ports node and max 6 ports are supported. Each port + should have single 'endpoint' child node. All port nodes are grouped under + ports node. Please refer to the bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt + + csi (required node) + Tegra210 has CSI part of VI sharing same host interface and register space. + So, VI device node should have CSI child node. - csi: mipi csi interface to vi @@ -65,6 +73,46 @@ of the following host1x client modules: - power-domains: Must include sor powergate node as csicil is in SOR partition. + channel (optional nodes) + Maximum 6 channels are supported with each csi brick as either x4 or x2 + based on hw connectivity to sensor. + + Required properties: + - reg: csi port number. Valid port numbers are 0 through 5. + - nvidia,mipi-calibrate: Should contain a phandle and a specifier + specifying which pads are used by this CSI port and need to be + calibrated. See also ../display/tegra/nvidia,tegra114-mipi.txt. + + Each channel node must contain 2 port nodes which can be grouped + under 'ports' node and each port should have a single child 'endpoint' + node. + + ports node + Please refer to the bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt + + ports node must contain below 2 port nodes. + port@0 with single child 'endpoint' node always a sink. + port@1 with single child 'endpoint' node always a source. + + port@0 (required node) + Required properties: + - reg: 0 + + endpoint (required node) + Required properties: + - data-lanes: an array of data lane from 1 to 4. Valid array + lengths are 1/2/4. + - remote-endpoint: phandle to sensor 'endpoint' node. + + port@1 (required node) + Required properties: + - reg: 1 + + endpoint (required node) + Required properties: + - remote-endpoint: phandle to vi port 'endpoint' node. + - epp: encoder pre-processor Required properties: @@ -340,6 +388,18 @@ Example: ranges = <0x0 0x0 0x54080000 0x2000>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + imx219_vi_in0: endpoint { + remote-endpoint = <&imx219_csi_out0>; + }; + }; + }; + csi@838 { compatible = "nvidia,tegra210-csi"; reg = <0x838 0x1300>; @@ -362,6 +422,34 @@ Example: <&tegra_car TEGRA210_CLK_CSI_TPG>; clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg"; power-domains = <&pd_sor>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + nvidia,mipi-calibrate = <&mipi 0x001>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + imx219_csi_in0: endpoint { + data-lanes = <1 2>; + remote-endpoint = <&imx219_out0>; + }; + }; + + port@1 { + reg = <1>; + imx219_csi_out0: endpoint { + remote-endpoint = <&imx219_vi_in0>; + }; + }; + }; + }; }; }; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Sowjanya Komatineni <skomatineni@nvidia.com> To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>, <frankc@nvidia.com>, <hverkuil@xs4all.nl>, <sakari.ailus@iki.fi>, <robh+dt@kernel.org>, <helen.koike@collabora.com> Cc: <digetx@gmail.com>, <sboyd@kernel.org>, <gregkh@linuxfoundation.org>, <linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org> Subject: [RFC PATCH v3 11/18] dt-bindings: tegra: Update VI and CSI bindings with port info Date: Tue, 14 Jul 2020 21:20:48 -0700 [thread overview] Message-ID: <1594786855-26506-12-git-send-email-skomatineni@nvidia.com> (raw) In-Reply-To: <1594786855-26506-1-git-send-email-skomatineni@nvidia.com> Update VI and CSI bindings to add port and endpoint nodes as per media video-interfaces DT binding document. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- .../display/tegra/nvidia,tegra20-host1x.txt | 92 +++++++++++++++++++++- 1 file changed, 90 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index 4731921..ac63ae4a 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -51,8 +51,16 @@ of the following host1x client modules: - vi - Tegra210: - power-domains: Must include venc powergate node as vi is in VE partition. - - Tegra210 has CSI part of VI sharing same host interface and register space. - So, VI device node should have CSI child node. + + ports (optional node) + vi can have optional ports node and max 6 ports are supported. Each port + should have single 'endpoint' child node. All port nodes are grouped under + ports node. Please refer to the bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt + + csi (required node) + Tegra210 has CSI part of VI sharing same host interface and register space. + So, VI device node should have CSI child node. - csi: mipi csi interface to vi @@ -65,6 +73,46 @@ of the following host1x client modules: - power-domains: Must include sor powergate node as csicil is in SOR partition. + channel (optional nodes) + Maximum 6 channels are supported with each csi brick as either x4 or x2 + based on hw connectivity to sensor. + + Required properties: + - reg: csi port number. Valid port numbers are 0 through 5. + - nvidia,mipi-calibrate: Should contain a phandle and a specifier + specifying which pads are used by this CSI port and need to be + calibrated. See also ../display/tegra/nvidia,tegra114-mipi.txt. + + Each channel node must contain 2 port nodes which can be grouped + under 'ports' node and each port should have a single child 'endpoint' + node. + + ports node + Please refer to the bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt + + ports node must contain below 2 port nodes. + port@0 with single child 'endpoint' node always a sink. + port@1 with single child 'endpoint' node always a source. + + port@0 (required node) + Required properties: + - reg: 0 + + endpoint (required node) + Required properties: + - data-lanes: an array of data lane from 1 to 4. Valid array + lengths are 1/2/4. + - remote-endpoint: phandle to sensor 'endpoint' node. + + port@1 (required node) + Required properties: + - reg: 1 + + endpoint (required node) + Required properties: + - remote-endpoint: phandle to vi port 'endpoint' node. + - epp: encoder pre-processor Required properties: @@ -340,6 +388,18 @@ Example: ranges = <0x0 0x0 0x54080000 0x2000>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + imx219_vi_in0: endpoint { + remote-endpoint = <&imx219_csi_out0>; + }; + }; + }; + csi@838 { compatible = "nvidia,tegra210-csi"; reg = <0x838 0x1300>; @@ -362,6 +422,34 @@ Example: <&tegra_car TEGRA210_CLK_CSI_TPG>; clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg"; power-domains = <&pd_sor>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + nvidia,mipi-calibrate = <&mipi 0x001>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + imx219_csi_in0: endpoint { + data-lanes = <1 2>; + remote-endpoint = <&imx219_out0>; + }; + }; + + port@1 { + reg = <1>; + imx219_csi_out0: endpoint { + remote-endpoint = <&imx219_vi_in0>; + }; + }; + }; + }; }; }; -- 2.7.4
next prev parent reply other threads:[~2020-07-15 4:20 UTC|newest] Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-15 4:20 [RFC PATCH v3 00/18] Support for Tegra video capture from external sensor Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 02/18] arm64: tegra: Add missing clocks and power-domains to Tegra210 VI I2C Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni [not found] ` <1594786855-26506-3-git-send-email-skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-16 13:25 ` Thierry Reding 2020-07-16 13:25 ` Thierry Reding 2020-07-15 4:20 ` [RFC PATCH v3 04/18] i2c: tegra: Remove NULL pointer check before clk_enable/disable/prepare/unprepare Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-16 20:25 ` Dmitry Osipenko 2020-07-15 4:20 ` [RFC PATCH v3 05/18] i2c: tegra: Fix the error path in tegra_i2c_runtime_resume Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 07/18] i2c: tegra: Avoid tegra_i2c_init_dma() for Tegra210 vi i2c Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 09/18] media: tegra-video: Enable TPG based on kernel config Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 12/18] media: tegra-video: Add support for external sensor capture Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 13/18] media: tegra-video: Add support for selection ioctl ops Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 14/18] gpu: host1x: mipi: Update tegra_mipi_request() to be node based Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni [not found] ` <1594786855-26506-15-git-send-email-skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-16 20:26 ` Dmitry Osipenko 2020-07-16 20:26 ` Dmitry Osipenko 2020-07-15 4:20 ` [RFC PATCH v3 15/18] gpu: host1x: mipi: Use readl_relaxed_poll_timeout in tegra_mipi_wait Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 16/18] gpu: host1x: mipi: Split tegra_mipi_calibrate and tegra_mipi_wait Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni [not found] ` <1594786855-26506-17-git-send-email-skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-16 20:38 ` Dmitry Osipenko 2020-07-16 20:38 ` Dmitry Osipenko [not found] ` <a06dec8f-7042-767b-545b-048685a7683d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-07-16 21:09 ` Sowjanya Komatineni 2020-07-16 21:09 ` Sowjanya Komatineni [not found] ` <20d63eca-4b2b-584e-a391-a4fb64a16b40-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-16 21:18 ` Dmitry Osipenko 2020-07-16 21:18 ` Dmitry Osipenko 2020-07-16 22:49 ` Sowjanya Komatineni 2020-07-16 22:49 ` Sowjanya Komatineni 2020-07-16 23:01 ` Dmitry Osipenko 2020-07-16 23:06 ` Sowjanya Komatineni 2020-07-16 23:06 ` Sowjanya Komatineni [not found] ` <4690e682-8495-2327-87c7-c2f06a7a479d-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-16 23:09 ` Sowjanya Komatineni 2020-07-16 23:09 ` Sowjanya Komatineni [not found] ` <66812127-38cf-2af3-51c0-50edbe446e73-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-16 23:47 ` Dmitry Osipenko 2020-07-16 23:47 ` Dmitry Osipenko 2020-07-17 0:16 ` Sowjanya Komatineni 2020-07-17 0:16 ` Sowjanya Komatineni [not found] ` <550f1796-67ca-5856-223d-c68360243954-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-17 4:46 ` Sowjanya Komatineni 2020-07-17 4:46 ` Sowjanya Komatineni 2020-07-17 15:01 ` Dmitry Osipenko [not found] ` <080b30c7-1dce-dd2f-dd96-40f6e25da4d6-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-07-17 15:41 ` Sowjanya Komatineni 2020-07-17 15:41 ` Sowjanya Komatineni [not found] ` <b125deab-7900-6266-d405-4d7f029089b4-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-17 20:14 ` Dmitry Osipenko 2020-07-17 20:14 ` Dmitry Osipenko [not found] ` <1594786855-26506-1-git-send-email-skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-15 4:20 ` [RFC PATCH v3 01/18] dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni [not found] ` <1594786855-26506-2-git-send-email-skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-16 13:25 ` Thierry Reding 2020-07-16 13:25 ` Thierry Reding 2020-07-15 4:20 ` [RFC PATCH v3 03/18] i2c: tegra: Don't mark VI I2C as IRQ safe runtime PM Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 06/18] i2c: tegra: Fix runtime resume to re-init VI I2C Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 08/18] media: tegra-video: Fix channel format alignment Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 10/18] media: tegra-video: Update format lookup to offset based Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni [this message] 2020-07-15 4:20 ` [RFC PATCH v3 11/18] dt-bindings: tegra: Update VI and CSI bindings with port info Sowjanya Komatineni [not found] ` <1594786855-26506-12-git-send-email-skomatineni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-16 19:09 ` Rob Herring 2020-07-16 19:09 ` Rob Herring 2020-07-15 4:20 ` [RFC PATCH v3 17/18] media: tegra-video: Add CSI MIPI pads calibration Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-15 4:20 ` [RFC PATCH v3 18/18] media: tegra-video: Compute settle times based on the clock rate Sowjanya Komatineni 2020-07-15 4:20 ` Sowjanya Komatineni 2020-07-17 10:54 ` [RFC PATCH v3 00/18] Support for Tegra video capture from external sensor Hans Verkuil 2020-07-17 10:54 ` Hans Verkuil [not found] ` <f03bdb89-df7c-e9e8-1512-d57e5d2332bf-qWit8jRvyhVmR6Xm/wNWPw@public.gmane.org> 2020-07-17 16:34 ` Sowjanya Komatineni 2020-07-17 16:34 ` Sowjanya Komatineni 2020-07-17 17:08 ` Hans Verkuil 2020-07-17 17:23 ` Sowjanya Komatineni 2020-07-17 17:23 ` Sowjanya Komatineni [not found] ` <5694f74a-be8e-7a95-1739-0a5fc9820597-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-17 17:38 ` Sowjanya Komatineni 2020-07-17 17:38 ` Sowjanya Komatineni [not found] ` <9aa8be89-d181-2dca-36ca-ea118bd5b0a7-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-17 17:48 ` Sowjanya Komatineni 2020-07-17 17:48 ` Sowjanya Komatineni [not found] ` <2f9ecba7-3d05-8a68-f2ad-546470780642-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2020-07-20 4:41 ` Sowjanya Komatineni 2020-07-20 4:41 ` Sowjanya Komatineni
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