* [PATCH v4] PCI: loongson: Use DECLARE_PCI_FIXUP_EARLY for bridge_class_quirk()
@ 2020-07-18 8:37 Tiezhu Yang
2020-07-18 8:44 ` Sergei Shtylyov
0 siblings, 1 reply; 2+ messages in thread
From: Tiezhu Yang @ 2020-07-18 8:37 UTC (permalink / raw)
To: Lorenzo Pieralisi, Rob Herring, Bjorn Helgaas,
Thomas Bogendoerfer, Huacai Chen, Jiaxun Yang
Cc: linux-mips, linux-pci, linux-kernel, Xuefeng Li
According to the datasheet of Loongson LS7A bridge chip, the old version
of Loongson LS7A PCIE port has a wrong value about PCI class which is
0x060000, the correct value should be 0x060400, this bug can be fixed by
"dev->class = PCI_CLASS_BRIDGE_PCI << 8;" at the software level. As far
as I know, the latest version of LS7A has already fixed the value at the
hardware level.
In order to maintain downward compatibility, use DECLARE_PCI_FIXUP_EARLY
instead of DECLARE_PCI_FIXUP_HEADER for bridge_class_quirk() to fix it as
early as possible.
Otherwise, in the function pci_setup_device(), the related code about
"dev->class" such as "class = dev->class >> 8;" and "dev->transparent
= ((dev->class & 0xff) == 1);" maybe get wrong value due to without
EARLY fixup.
Fixes: 1f58cca5cf2b ("PCI: Add Loongson PCI Controller support")
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
v2: Modify the patch subject used with lower case "loongson"
v3: Update the commit message
v4: Update the commit message
drivers/pci/controller/pci-loongson.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c
index 459009c..58b862a 100644
--- a/drivers/pci/controller/pci-loongson.c
+++ b/drivers/pci/controller/pci-loongson.c
@@ -37,11 +37,11 @@ static void bridge_class_quirk(struct pci_dev *dev)
{
dev->class = PCI_CLASS_BRIDGE_PCI << 8;
}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LOONGSON,
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
DEV_PCIE_PORT_0, bridge_class_quirk);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LOONGSON,
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
DEV_PCIE_PORT_1, bridge_class_quirk);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LOONGSON,
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
DEV_PCIE_PORT_2, bridge_class_quirk);
static void system_bus_quirk(struct pci_dev *pdev)
--
2.1.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v4] PCI: loongson: Use DECLARE_PCI_FIXUP_EARLY for bridge_class_quirk()
2020-07-18 8:37 [PATCH v4] PCI: loongson: Use DECLARE_PCI_FIXUP_EARLY for bridge_class_quirk() Tiezhu Yang
@ 2020-07-18 8:44 ` Sergei Shtylyov
0 siblings, 0 replies; 2+ messages in thread
From: Sergei Shtylyov @ 2020-07-18 8:44 UTC (permalink / raw)
To: Tiezhu Yang, Lorenzo Pieralisi, Rob Herring, Bjorn Helgaas,
Thomas Bogendoerfer, Huacai Chen, Jiaxun Yang
Cc: linux-mips, linux-pci, linux-kernel, Xuefeng Li
On 18.07.2020 11:37, Tiezhu Yang wrote:
> According to the datasheet of Loongson LS7A bridge chip, the old version
> of Loongson LS7A PCIE port has a wrong value about PCI class which is
> 0x060000, the correct value should be 0x060400, this bug can be fixed by
> "dev->class = PCI_CLASS_BRIDGE_PCI << 8;" at the software level. As far
> as I know, the latest version of LS7A has already fixed the value at the
> hardware level.
>
> In order to maintain downward compatibility, use DECLARE_PCI_FIXUP_EARLY
> instead of DECLARE_PCI_FIXUP_HEADER for bridge_class_quirk() to fix it as
> early as possible.
>
> Otherwise, in the function pci_setup_device(), the related code about
> "dev->class" such as "class = dev->class >> 8;" and "dev->transparent
> = ((dev->class & 0xff) == 1);" maybe get wrong value due to without
"Due to" not needed there.
> EARLY fixup.
>
> Fixes: 1f58cca5cf2b ("PCI: Add Loongson PCI Controller support")
> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
[...]
MBR, Sergei
^ permalink raw reply [flat|nested] 2+ messages in thread
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2020-07-18 8:37 [PATCH v4] PCI: loongson: Use DECLARE_PCI_FIXUP_EARLY for bridge_class_quirk() Tiezhu Yang
2020-07-18 8:44 ` Sergei Shtylyov
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