* [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms
@ 2020-07-20 17:09 José Roberto de Souza
2020-07-20 17:09 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add new voltage swing table José Roberto de Souza
` (5 more replies)
0 siblings, 6 replies; 10+ messages in thread
From: José Roberto de Souza @ 2020-07-20 17:09 UTC (permalink / raw)
To: intel-gfx
There is no way to differentiate TGL-U from TGL-Y by the PCI ids as
some ids are available in both SKUs.
So here using the root device id in the PCI bus that iGPU is in
to differentiate between U and Y.
BSpec: 44455
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 6 ++++++
drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
drivers/gpu/drm/i915/intel_device_info.c | 19 +++++++++++++++++++
3 files changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 56dfc6d98caa..a59f64821920 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1497,6 +1497,12 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_ICL_WITH_PORT_F(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF)
+#define IS_TGL_U(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULT)
+
+#define IS_TGL_Y(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULX)
+
#define SKL_REVID_A0 0x0
#define SKL_REVID_B0 0x1
#define SKL_REVID_C0 0x2
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a0d31f3bf634..6a0768cb01f6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -12363,4 +12363,10 @@ enum skl_power_gate {
#define DSB_ENABLE (1 << 31)
#define DSB_STATUS (1 << 0)
+#define TGL_ROOT_DEVICE_ID 0x9A00
+#define TGL_ROOT_DEVICE_MASK 0xFF00
+#define TGL_ROOT_DEVICE_SKU_MASK 0xF
+#define TGL_ROOT_DEVICE_SKU_ULX 0x2
+#define TGL_ROOT_DEVICE_SKU_ULT 0x4
+
#endif /* _I915_REG_H_ */
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 40c590db3c76..e2aa5bc3a6e0 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -346,6 +346,25 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915)
mask = BIT(INTEL_SUBPLATFORM_PORTF);
}
+ if (IS_TIGERLAKE(i915)) {
+ struct pci_dev *root, *pdev = i915->drm.pdev;
+
+ root = list_first_entry(&pdev->bus->devices, typeof(*root), bus_list);
+
+ drm_WARN_ON(&i915->drm, mask);
+ drm_WARN_ON(&i915->drm, (root->device & TGL_ROOT_DEVICE_MASK) !=
+ TGL_ROOT_DEVICE_ID);
+
+ switch (root->device & TGL_ROOT_DEVICE_SKU_MASK) {
+ case TGL_ROOT_DEVICE_SKU_ULX:
+ mask = BIT(INTEL_SUBPLATFORM_ULX);
+ break;
+ case TGL_ROOT_DEVICE_SKU_ULT:
+ mask = BIT(INTEL_SUBPLATFORM_ULT);
+ break;
+ }
+ }
+
GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_BITS);
RUNTIME_INFO(i915)->platform_mask[pi] |= mask;
--
2.27.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add new voltage swing table 2020-07-20 17:09 [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms José Roberto de Souza @ 2020-07-20 17:09 ` José Roberto de Souza 2020-07-20 23:54 ` Almahallawy, Khaled 2020-07-20 17:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/tgl: Set subplatforms Patchwork ` (4 subsequent siblings) 5 siblings, 1 reply; 10+ messages in thread From: José Roberto de Souza @ 2020-07-20 17:09 UTC (permalink / raw) To: intel-gfx This new HBR2 table for TGL-U and TGL-Y is required to pass DisplayPort compliance. BSpec: 49291 Cc: Khaled Almahallawy <khaled.almahallawy@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 714b2bc96f23..de5b216561d8 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -706,6 +706,20 @@ static const struct cnl_ddi_buf_trans tgl_combo_phy_ddi_translations_dp_hbr2[] = { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ }; +static const struct cnl_ddi_buf_trans tgl_uy_combo_phy_ddi_translations_dp_hbr2[] = { + /* NT mV Trans mV db */ + { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ + { 0xA, 0x4F, 0x36, 0x00, 0x09 }, /* 350 500 3.1 */ + { 0xC, 0x60, 0x32, 0x00, 0x0D }, /* 350 700 6.0 */ + { 0xC, 0x7F, 0x2D, 0x00, 0x12 }, /* 350 900 8.2 */ + { 0xC, 0x47, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ + { 0xC, 0x6F, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ + { 0x6, 0x7D, 0x32, 0x00, 0x0D }, /* 500 900 5.1 */ + { 0x6, 0x60, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ + { 0x6, 0x7F, 0x34, 0x00, 0x0B }, /* 600 900 3.5 */ + { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ +}; + /* * Cloned the HOBL entry to comply with the voltage and pre-emphasis entries * that DisplayPort specification requires @@ -1087,6 +1101,11 @@ tgl_get_combo_buf_trans(struct intel_encoder *encoder, int type, int rate, if (type == INTEL_OUTPUT_HDMI || type == INTEL_OUTPUT_EDP) { return icl_get_combo_buf_trans(encoder, type, rate, n_entries); } else if (rate > 270000) { + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) { + *n_entries = ARRAY_SIZE(tgl_uy_combo_phy_ddi_translations_dp_hbr2); + return tgl_uy_combo_phy_ddi_translations_dp_hbr2; + } + *n_entries = ARRAY_SIZE(tgl_combo_phy_ddi_translations_dp_hbr2); return tgl_combo_phy_ddi_translations_dp_hbr2; } -- 2.27.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add new voltage swing table 2020-07-20 17:09 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add new voltage swing table José Roberto de Souza @ 2020-07-20 23:54 ` Almahallawy, Khaled 0 siblings, 0 replies; 10+ messages in thread From: Almahallawy, Khaled @ 2020-07-20 23:54 UTC (permalink / raw) To: intel-gfx, Souza, Jose On Mon, 2020-07-20 at 10:09 -0700, José Roberto de Souza wrote: > This new HBR2 table for TGL-U and TGL-Y is required to pass > DisplayPort compliance. > > BSpec: 49291 > Cc: Khaled Almahallawy <khaled.almahallawy@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index 714b2bc96f23..de5b216561d8 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -706,6 +706,20 @@ static const struct cnl_ddi_buf_trans > tgl_combo_phy_ddi_translations_dp_hbr2[] = > { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > }; > > +static const struct cnl_ddi_buf_trans > tgl_uy_combo_phy_ddi_translations_dp_hbr2[] = { > + /* NT mV Trans mV > db */ > + { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > + { 0xA, 0x4F, 0x36, 0x00, 0x09 }, /* 350 500 3.1 */ > + { 0xC, 0x60, 0x32, 0x00, 0x0D }, /* 350 700 6.0 */ > + { 0xC, 0x7F, 0x2D, 0x00, 0x12 }, /* 350 900 8.2 */ > + { 0xC, 0x47, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > + { 0xC, 0x6F, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ > + { 0x6, 0x7D, 0x32, 0x00, 0x0D }, /* 500 900 5.1 */ > + { 0x6, 0x60, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ > + { 0x6, 0x7F, 0x34, 0x00, 0x0B }, /* 600 900 3.5 */ > + { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > +}; > + > /* > * Cloned the HOBL entry to comply with the voltage and pre-emphasis > entries > * that DisplayPort specification requires > @@ -1087,6 +1101,11 @@ tgl_get_combo_buf_trans(struct intel_encoder > *encoder, int type, int rate, > if (type == INTEL_OUTPUT_HDMI || type == INTEL_OUTPUT_EDP) { > return icl_get_combo_buf_trans(encoder, type, rate, > n_entries); > } else if (rate > 270000) { > + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) { > + *n_entries = > ARRAY_SIZE(tgl_uy_combo_phy_ddi_translations_dp_hbr2); > + return > tgl_uy_combo_phy_ddi_translations_dp_hbr2; > + } > + > *n_entries = > ARRAY_SIZE(tgl_combo_phy_ddi_translations_dp_hbr2); > return tgl_combo_phy_ddi_translations_dp_hbr2; > } Match bspecs Reviewed-by: Khaled Almahallawy<khaled.almahallawy@intel.com> _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/tgl: Set subplatforms 2020-07-20 17:09 [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms José Roberto de Souza 2020-07-20 17:09 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add new voltage swing table José Roberto de Souza @ 2020-07-20 17:17 ` Patchwork 2020-07-20 17:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork ` (3 subsequent siblings) 5 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2020-07-20 17:17 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/tgl: Set subplatforms URL : https://patchwork.freedesktop.org/series/79681/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately. _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/tgl: Set subplatforms 2020-07-20 17:09 [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms José Roberto de Souza 2020-07-20 17:09 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add new voltage swing table José Roberto de Souza 2020-07-20 17:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/tgl: Set subplatforms Patchwork @ 2020-07-20 17:37 ` Patchwork 2020-07-20 18:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2020-07-20 17:37 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 6314 bytes --] == Series Details == Series: series starting with [1/2] drm/i915/tgl: Set subplatforms URL : https://patchwork.freedesktop.org/series/79681/ State : success == Summary == CI Bug Log - changes from CI_DRM_8766 -> Patchwork_18213 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/index.html Known issues ------------ Here are the changes found in Patchwork_18213 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s3: - fi-tgl-u2: [PASS][1] -> [FAIL][2] ([i915#1888]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html * igt@gem_flink_basic@flink-lifetime: - fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-tgl-y/igt@gem_flink_basic@flink-lifetime.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-tgl-y/igt@gem_flink_basic@flink-lifetime.html * igt@i915_module_load@reload: - fi-tgl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#402]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-tgl-u2/igt@i915_module_load@reload.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-tgl-u2/igt@i915_module_load@reload.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-byt-j1900: [PASS][7] -> [DMESG-WARN][8] ([i915#1982]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size: - fi-cml-s: [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-cml-s/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-cml-s/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html #### Possible fixes #### * igt@gem_exec_suspend@basic-s0: - fi-tgl-u2: [FAIL][11] ([i915#1888]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html * igt@i915_pm_rpm@basic-pci-d3-state: - {fi-tgl-dsi}: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14] +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-tgl-dsi/igt@i915_pm_rpm@basic-pci-d3-state.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-tgl-dsi/igt@i915_pm_rpm@basic-pci-d3-state.html - fi-tgl-y: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-tgl-y/igt@i915_pm_rpm@basic-pci-d3-state.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-tgl-y/igt@i915_pm_rpm@basic-pci-d3-state.html * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: - fi-tgl-u2: [DMESG-WARN][17] ([i915#402]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html * igt@vgem_basic@sysfs: - fi-tgl-y: [DMESG-WARN][19] ([i915#402]) -> [PASS][20] +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-tgl-y/igt@vgem_basic@sysfs.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-tgl-y/igt@vgem_basic@sysfs.html #### Warnings #### * igt@gem_exec_suspend@basic-s0: - fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92]) -> [DMESG-WARN][22] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html * igt@kms_flip@basic-flip-vs-modeset@a-dp1: - fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][24] ([i915#62] / [i915#92]) +3 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (47 -> 40) ------------------------------ Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * Linux: CI_DRM_8766 -> Patchwork_18213 CI-20190529: 20190529 CI_DRM_8766: 947ce595ea05b4baaea060a7e018cc3f49eaf413 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5740: 6663e3ab5f77add7077711c2b649caf2bd7903c4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18213: 64e2c5b498bc03a2e8fb82095c083af2c15d1d83 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 64e2c5b498bc drm/i915/tgl: Add new voltage swing table 5e7fcc028e53 drm/i915/tgl: Set subplatforms == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/index.html [-- Attachment #1.2: Type: text/html, Size: 8144 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/tgl: Set subplatforms 2020-07-20 17:09 [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms José Roberto de Souza ` (2 preceding siblings ...) 2020-07-20 17:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2020-07-20 18:40 ` Patchwork 2020-08-07 2:02 ` [Intel-gfx] [PATCH 1/2] " Dhanavanthri, Swathi 2020-08-07 2:19 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/tgl: Set subplatforms (rev2) Patchwork 5 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2020-07-20 18:40 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 16693 bytes --] == Series Details == Series: series starting with [1/2] drm/i915/tgl: Set subplatforms URL : https://patchwork.freedesktop.org/series/79681/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8766_full -> Patchwork_18213_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_18213_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18213_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_18213_full: ### IGT changes ### #### Possible regressions #### * igt@kms_cursor_legacy@cursor-vs-flip-toggle: - shard-glk: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-glk2/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-glk5/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-skl: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-skl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-skl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html Known issues ------------ Here are the changes found in Patchwork_18213_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_persistence@engines-mixed-process@rcs0: - shard-kbl: [PASS][5] -> [FAIL][6] ([i915#1528]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-kbl2/igt@gem_ctx_persistence@engines-mixed-process@rcs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-kbl6/igt@gem_ctx_persistence@engines-mixed-process@rcs0.html * igt@gem_exec_reloc@basic-concurrent0: - shard-glk: [PASS][7] -> [FAIL][8] ([i915#1930]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-glk2/igt@gem_exec_reloc@basic-concurrent0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-glk5/igt@gem_exec_reloc@basic-concurrent0.html * igt@gem_exec_whisper@basic-contexts-forked: - shard-glk: [PASS][9] -> [DMESG-WARN][10] ([i915#118] / [i915#95]) +2 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-glk5/igt@gem_exec_whisper@basic-contexts-forked.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-glk8/igt@gem_exec_whisper@basic-contexts-forked.html * igt@i915_module_load@reload: - shard-tglb: [PASS][11] -> [DMESG-WARN][12] ([i915#402]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-tglb3/igt@i915_module_load@reload.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-tglb8/igt@i915_module_load@reload.html * igt@i915_pm_rpm@i2c: - shard-skl: [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) +6 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-skl1/igt@i915_pm_rpm@i2c.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-skl3/igt@i915_pm_rpm@i2c.html * igt@i915_selftest@mock@requests: - shard-apl: [PASS][15] -> [INCOMPLETE][16] ([i915#1635] / [i915#2110]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-apl3/igt@i915_selftest@mock@requests.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-apl2/igt@i915_selftest@mock@requests.html * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-untiled: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#177] / [i915#52] / [i915#54]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-skl9/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-untiled.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-skl2/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-untiled.html * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ac-hdmi-a1-hdmi-a2: - shard-glk: [PASS][19] -> [FAIL][20] ([i915#2122]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-glk2/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ac-hdmi-a1-hdmi-a2.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-glk2/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ac-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-expired-vblank@b-edp1: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#79]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1: - shard-skl: [PASS][23] -> [FAIL][24] ([i915#2122]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt: - shard-iclb: [PASS][25] -> [DMESG-WARN][26] ([i915#1982]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: - shard-kbl: [PASS][27] -> [DMESG-WARN][28] ([i915#1982]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte: - shard-tglb: [PASS][29] -> [DMESG-WARN][30] ([i915#1982]) +1 similar issue [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-kbl: [PASS][31] -> [DMESG-WARN][32] ([i915#180]) +2 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109441]) +4 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-iclb1/igt@kms_psr@psr2_sprite_plane_move.html * igt@kms_setmode@basic: - shard-kbl: [PASS][35] -> [FAIL][36] ([i915#31]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-kbl1/igt@kms_setmode@basic.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-kbl6/igt@kms_setmode@basic.html * igt@kms_vblank@pipe-b-query-forked-busy: - shard-apl: [PASS][37] -> [DMESG-WARN][38] ([i915#1635] / [i915#1982]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-apl3/igt@kms_vblank@pipe-b-query-forked-busy.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-apl2/igt@kms_vblank@pipe-b-query-forked-busy.html * igt@perf_pmu@semaphore-busy@rcs0: - shard-kbl: [PASS][39] -> [FAIL][40] ([i915#1820]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-kbl4/igt@perf_pmu@semaphore-busy@rcs0.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-kbl4/igt@perf_pmu@semaphore-busy@rcs0.html #### Possible fixes #### * igt@i915_pm_dc@dc6-psr: - shard-iclb: [FAIL][41] ([i915#454]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-iclb8/igt@i915_pm_dc@dc6-psr.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-iclb7/igt@i915_pm_dc@dc6-psr.html * igt@kms_cursor_edge_walk@pipe-a-256x256-right-edge: - shard-skl: [DMESG-WARN][43] ([i915#1982]) -> [PASS][44] +7 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-skl2/igt@kms_cursor_edge_walk@pipe-a-256x256-right-edge.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-skl5/igt@kms_cursor_edge_walk@pipe-a-256x256-right-edge.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [FAIL][45] ([i915#72]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: - shard-hsw: [FAIL][47] ([i915#57]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-hsw2/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [DMESG-WARN][49] ([i915#180]) -> [PASS][50] +7 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-render: - shard-tglb: [DMESG-WARN][51] ([i915#1982]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-render.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-render.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [FAIL][53] ([i915#1188]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [FAIL][55] ([fdo#108145] / [i915#265]) -> [PASS][56] +1 similar issue [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html * igt@kms_psr@psr2_cursor_blt: - shard-iclb: [SKIP][57] ([fdo#109441]) -> [PASS][58] +3 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-iclb5/igt@kms_psr@psr2_cursor_blt.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html * igt@perf@polling-parameterized: - shard-tglb: [FAIL][59] ([i915#1542]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-tglb7/igt@perf@polling-parameterized.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-tglb5/igt@perf@polling-parameterized.html * igt@perf_pmu@module-unload: - shard-apl: [DMESG-WARN][61] ([i915#1635] / [i915#1982]) -> [PASS][62] +1 similar issue [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-apl1/igt@perf_pmu@module-unload.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-apl7/igt@perf_pmu@module-unload.html #### Warnings #### * igt@kms_color@pipe-a-ctm-max: - shard-skl: [DMESG-FAIL][63] ([i915#1982]) -> [FAIL][64] ([i915#168]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-skl9/igt@kms_color@pipe-a-ctm-max.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-skl2/igt@kms_color@pipe-a-ctm-max.html * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: [DMESG-WARN][65] ([i915#1226]) -> [SKIP][66] ([fdo#109349]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-iclb1/igt@kms_dp_dsc@basic-dsc-enable-edp.html * igt@runner@aborted: - shard-apl: [FAIL][67] ([i915#1610] / [i915#1635] / [i915#2110]) -> ([FAIL][68], [FAIL][69]) ([fdo#109271] / [i915#1635] / [i915#2110] / [i915#716]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8766/shard-apl6/igt@runner@aborted.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-apl2/igt@runner@aborted.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/shard-apl2/igt@runner@aborted.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226 [i915#1528]: https://gitlab.freedesktop.org/drm/intel/issues/1528 [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542 [i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610 [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635 [i915#168]: https://gitlab.freedesktop.org/drm/intel/issues/168 [i915#177]: https://gitlab.freedesktop.org/drm/intel/issues/177 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1820]: https://gitlab.freedesktop.org/drm/intel/issues/1820 [i915#1930]: https://gitlab.freedesktop.org/drm/intel/issues/1930 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2110]: https://gitlab.freedesktop.org/drm/intel/issues/2110 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#57]: https://gitlab.freedesktop.org/drm/intel/issues/57 [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716 [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_8766 -> Patchwork_18213 CI-20190529: 20190529 CI_DRM_8766: 947ce595ea05b4baaea060a7e018cc3f49eaf413 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5740: 6663e3ab5f77add7077711c2b649caf2bd7903c4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18213: 64e2c5b498bc03a2e8fb82095c083af2c15d1d83 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18213/index.html [-- Attachment #1.2: Type: text/html, Size: 19224 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms 2020-07-20 17:09 [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms José Roberto de Souza ` (3 preceding siblings ...) 2020-07-20 18:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork @ 2020-08-07 2:02 ` Dhanavanthri, Swathi 2020-08-07 17:32 ` Souza, Jose 2020-08-07 2:19 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/tgl: Set subplatforms (rev2) Patchwork 5 siblings, 1 reply; 10+ messages in thread From: Dhanavanthri, Swathi @ 2020-08-07 2:02 UTC (permalink / raw) To: Souza, Jose, intel-gfx It might be helpful to add a default case in the switch statement for unsupported cases. -----Original Message----- From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of José Roberto de Souza Sent: Monday, July 20, 2020 10:10 AM To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms There is no way to differentiate TGL-U from TGL-Y by the PCI ids as some ids are available in both SKUs. So here using the root device id in the PCI bus that iGPU is in to differentiate between U and Y. BSpec: 44455 Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 6 ++++++ drivers/gpu/drm/i915/i915_reg.h | 6 ++++++ drivers/gpu/drm/i915/intel_device_info.c | 19 +++++++++++++++++++ 3 files changed, 31 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 56dfc6d98caa..a59f64821920 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1497,6 +1497,12 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define IS_ICL_WITH_PORT_F(dev_priv) \ IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF) +#define IS_TGL_U(dev_priv) \ + IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULT) + +#define IS_TGL_Y(dev_priv) \ + IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULX) + #define SKL_REVID_A0 0x0 #define SKL_REVID_B0 0x1 #define SKL_REVID_C0 0x2 diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a0d31f3bf634..6a0768cb01f6 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -12363,4 +12363,10 @@ enum skl_power_gate { #define DSB_ENABLE (1 << 31) #define DSB_STATUS (1 << 0) +#define TGL_ROOT_DEVICE_ID 0x9A00 +#define TGL_ROOT_DEVICE_MASK 0xFF00 +#define TGL_ROOT_DEVICE_SKU_MASK 0xF +#define TGL_ROOT_DEVICE_SKU_ULX 0x2 +#define TGL_ROOT_DEVICE_SKU_ULT 0x4 + #endif /* _I915_REG_H_ */ diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 40c590db3c76..e2aa5bc3a6e0 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -346,6 +346,25 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915) mask = BIT(INTEL_SUBPLATFORM_PORTF); } + if (IS_TIGERLAKE(i915)) { + struct pci_dev *root, *pdev = i915->drm.pdev; + + root = list_first_entry(&pdev->bus->devices, typeof(*root), +bus_list); + + drm_WARN_ON(&i915->drm, mask); + drm_WARN_ON(&i915->drm, (root->device & TGL_ROOT_DEVICE_MASK) != + TGL_ROOT_DEVICE_ID); + + switch (root->device & TGL_ROOT_DEVICE_SKU_MASK) { + case TGL_ROOT_DEVICE_SKU_ULX: + mask = BIT(INTEL_SUBPLATFORM_ULX); + break; + case TGL_ROOT_DEVICE_SKU_ULT: + mask = BIT(INTEL_SUBPLATFORM_ULT); + break; + } + } + GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_BITS); RUNTIME_INFO(i915)->platform_mask[pi] |= mask; -- 2.27.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms 2020-08-07 2:02 ` [Intel-gfx] [PATCH 1/2] " Dhanavanthri, Swathi @ 2020-08-07 17:32 ` Souza, Jose 2020-08-07 17:51 ` Dhanavanthri, Swathi 0 siblings, 1 reply; 10+ messages in thread From: Souza, Jose @ 2020-08-07 17:32 UTC (permalink / raw) To: Dhanavanthri, Swathi, intel-gfx The default case would do nothing. On Thu, 2020-08-06 at 19:02 -0700, Dhanavanthri, Swathi wrote: > It might be helpful to add a default case in the switch statement for unsupported cases. > > -----Original Message----- > From: Intel-gfx < > intel-gfx-bounces@lists.freedesktop.org > > On Behalf Of José Roberto de Souza > Sent: Monday, July 20, 2020 10:10 AM > To: > intel-gfx@lists.freedesktop.org > > Subject: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms > > There is no way to differentiate TGL-U from TGL-Y by the PCI ids as some ids are available in both SKUs. > So here using the root device id in the PCI bus that iGPU is in to differentiate between U and Y. > > BSpec: 44455 > Signed-off-by: José Roberto de Souza < > jose.souza@intel.com > > > --- > drivers/gpu/drm/i915/i915_drv.h | 6 ++++++ > drivers/gpu/drm/i915/i915_reg.h | 6 ++++++ > drivers/gpu/drm/i915/intel_device_info.c | 19 +++++++++++++++++++ > 3 files changed, 31 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 56dfc6d98caa..a59f64821920 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1497,6 +1497,12 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define IS_ICL_WITH_PORT_F(dev_priv) \ > IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF) > > +#define IS_TGL_U(dev_priv) \ > + IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULT) > + > +#define IS_TGL_Y(dev_priv) \ > + IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULX) > + > #define SKL_REVID_A0 0x0 > #define SKL_REVID_B0 0x1 > #define SKL_REVID_C0 0x2 > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a0d31f3bf634..6a0768cb01f6 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -12363,4 +12363,10 @@ enum skl_power_gate { > #define DSB_ENABLE (1 << 31) > #define DSB_STATUS (1 << 0) > > +#define TGL_ROOT_DEVICE_ID 0x9A00 > +#define TGL_ROOT_DEVICE_MASK 0xFF00 > +#define TGL_ROOT_DEVICE_SKU_MASK 0xF > +#define TGL_ROOT_DEVICE_SKU_ULX 0x2 > +#define TGL_ROOT_DEVICE_SKU_ULT 0x4 > + > #endif /* _I915_REG_H_ */ > diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c > index 40c590db3c76..e2aa5bc3a6e0 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.c > +++ b/drivers/gpu/drm/i915/intel_device_info.c > @@ -346,6 +346,25 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915) > mask = BIT(INTEL_SUBPLATFORM_PORTF); > } > > + if (IS_TIGERLAKE(i915)) { > + struct pci_dev *root, *pdev = i915->drm.pdev; > + > + root = list_first_entry(&pdev->bus->devices, typeof(*root), > +bus_list); > + > + drm_WARN_ON(&i915->drm, mask); > + drm_WARN_ON(&i915->drm, (root->device & TGL_ROOT_DEVICE_MASK) != > + TGL_ROOT_DEVICE_ID); > + > + switch (root->device & TGL_ROOT_DEVICE_SKU_MASK) { > + case TGL_ROOT_DEVICE_SKU_ULX: > + mask = BIT(INTEL_SUBPLATFORM_ULX); > + break; > + case TGL_ROOT_DEVICE_SKU_ULT: > + mask = BIT(INTEL_SUBPLATFORM_ULT); > + break; > + } > + } > + > GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_BITS); > > RUNTIME_INFO(i915)->platform_mask[pi] |= mask; > -- > 2.27.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms 2020-08-07 17:32 ` Souza, Jose @ 2020-08-07 17:51 ` Dhanavanthri, Swathi 0 siblings, 0 replies; 10+ messages in thread From: Dhanavanthri, Swathi @ 2020-08-07 17:51 UTC (permalink / raw) To: Souza, Jose, intel-gfx Reviewed-by: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com> -----Original Message----- From: Souza, Jose <jose.souza@intel.com> Sent: Friday, August 07, 2020 10:32 AM To: Dhanavanthri, Swathi <swathi.dhanavanthri@intel.com>; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms The default case would do nothing. On Thu, 2020-08-06 at 19:02 -0700, Dhanavanthri, Swathi wrote: > It might be helpful to add a default case in the switch statement for unsupported cases. > > -----Original Message----- > From: Intel-gfx < > intel-gfx-bounces@lists.freedesktop.org > > On Behalf Of José Roberto de Souza > Sent: Monday, July 20, 2020 10:10 AM > To: > intel-gfx@lists.freedesktop.org > > Subject: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms > > There is no way to differentiate TGL-U from TGL-Y by the PCI ids as some ids are available in both SKUs. > So here using the root device id in the PCI bus that iGPU is in to differentiate between U and Y. > > BSpec: 44455 > Signed-off-by: José Roberto de Souza < jose.souza@intel.com > > > --- > drivers/gpu/drm/i915/i915_drv.h | 6 ++++++ > drivers/gpu/drm/i915/i915_reg.h | 6 ++++++ > drivers/gpu/drm/i915/intel_device_info.c | 19 +++++++++++++++++++ > 3 files changed, 31 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > b/drivers/gpu/drm/i915/i915_drv.h index 56dfc6d98caa..a59f64821920 > 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1497,6 +1497,12 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define IS_ICL_WITH_PORT_F(dev_priv) \ > IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF) > > +#define IS_TGL_U(dev_priv) \ > + IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULT) > + > +#define IS_TGL_Y(dev_priv) \ > + IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULX) > + > #define SKL_REVID_A0 0x0 > #define SKL_REVID_B0 0x1 > #define SKL_REVID_C0 0x2 > diff --git a/drivers/gpu/drm/i915/i915_reg.h > b/drivers/gpu/drm/i915/i915_reg.h index a0d31f3bf634..6a0768cb01f6 > 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -12363,4 +12363,10 @@ enum skl_power_gate { > #define DSB_ENABLE (1 << 31) > #define DSB_STATUS (1 << 0) > > +#define TGL_ROOT_DEVICE_ID 0x9A00 > +#define TGL_ROOT_DEVICE_MASK 0xFF00 > +#define TGL_ROOT_DEVICE_SKU_MASK 0xF > +#define TGL_ROOT_DEVICE_SKU_ULX 0x2 > +#define TGL_ROOT_DEVICE_SKU_ULT 0x4 > + > #endif /* _I915_REG_H_ */ > diff --git a/drivers/gpu/drm/i915/intel_device_info.c > b/drivers/gpu/drm/i915/intel_device_info.c > index 40c590db3c76..e2aa5bc3a6e0 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.c > +++ b/drivers/gpu/drm/i915/intel_device_info.c > @@ -346,6 +346,25 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915) > mask = BIT(INTEL_SUBPLATFORM_PORTF); > } > > + if (IS_TIGERLAKE(i915)) { > + struct pci_dev *root, *pdev = i915->drm.pdev; > + > + root = list_first_entry(&pdev->bus->devices, typeof(*root), > +bus_list); > + > + drm_WARN_ON(&i915->drm, mask); > + drm_WARN_ON(&i915->drm, (root->device & TGL_ROOT_DEVICE_MASK) != > + TGL_ROOT_DEVICE_ID); > + > + switch (root->device & TGL_ROOT_DEVICE_SKU_MASK) { > + case TGL_ROOT_DEVICE_SKU_ULX: > + mask = BIT(INTEL_SUBPLATFORM_ULX); > + break; > + case TGL_ROOT_DEVICE_SKU_ULT: > + mask = BIT(INTEL_SUBPLATFORM_ULT); > + break; > + } > + } > + > GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_BITS); > > RUNTIME_INFO(i915)->platform_mask[pi] |= mask; > -- > 2.27.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/tgl: Set subplatforms (rev2) 2020-07-20 17:09 [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms José Roberto de Souza ` (4 preceding siblings ...) 2020-08-07 2:02 ` [Intel-gfx] [PATCH 1/2] " Dhanavanthri, Swathi @ 2020-08-07 2:19 ` Patchwork 5 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2020-08-07 2:19 UTC (permalink / raw) To: Dhanavanthri, Swathi; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/tgl: Set subplatforms (rev2) URL : https://patchwork.freedesktop.org/series/79681/ State : failure == Summary == Applying: drm/i915/tgl: Set subplatforms error: corrupt patch at line 30 error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/i915/tgl: Set subplatforms When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-08-07 17:52 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-07-20 17:09 [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms José Roberto de Souza 2020-07-20 17:09 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add new voltage swing table José Roberto de Souza 2020-07-20 23:54 ` Almahallawy, Khaled 2020-07-20 17:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/tgl: Set subplatforms Patchwork 2020-07-20 17:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-07-20 18:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2020-08-07 2:02 ` [Intel-gfx] [PATCH 1/2] " Dhanavanthri, Swathi 2020-08-07 17:32 ` Souza, Jose 2020-08-07 17:51 ` Dhanavanthri, Swathi 2020-08-07 2:19 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/tgl: Set subplatforms (rev2) Patchwork
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