From: Claudiu Beznea <claudiu.beznea@microchip.com> To: <mturquette@baylibre.com>, <sboyd@kernel.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <ludovic.desroches@microchip.com> Cc: <bbrezillon@kernel.org>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, "Claudiu Beznea" <claudiu.beznea@microchip.com> Subject: [PATCH v2 08/18] clk: at91: sckc: register slow_rc with accuracy option Date: Wed, 22 Jul 2020 10:38:16 +0300 [thread overview] Message-ID: <1595403506-8209-9-git-send-email-claudiu.beznea@microchip.com> (raw) In-Reply-To: <1595403506-8209-1-git-send-email-claudiu.beznea@microchip.com> Chapter 57.7.5 of SAM9X60 datasheet specifies that the maximum drift of this oscillator is +- 3KHz. Use that value and the formula at [1] or the calculator at [2] to compute the PPB value. [1] https://www.everythingrf.com/rf-calculators/ppm-to-hz-calculator [2] https://www.changpuak.ch/electronics/ppm_to_Hz_converter.php Fixes: 04bcc4275e601 ("clk: at91: sckc: add support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- drivers/clk/at91/sckc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 15dc4cd86d76..2d65770d8665 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -471,8 +471,9 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np) if (!regbase) return; - slow_rc = clk_hw_register_fixed_rate(NULL, parent_names[0], NULL, 0, - 32768); + slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, parent_names[0], + NULL, 0, 32768, + 93750000); if (IS_ERR(slow_rc)) return; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Claudiu Beznea <claudiu.beznea@microchip.com> To: <mturquette@baylibre.com>, <sboyd@kernel.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <ludovic.desroches@microchip.com> Cc: Claudiu Beznea <claudiu.beznea@microchip.com>, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bbrezillon@kernel.org Subject: [PATCH v2 08/18] clk: at91: sckc: register slow_rc with accuracy option Date: Wed, 22 Jul 2020 10:38:16 +0300 [thread overview] Message-ID: <1595403506-8209-9-git-send-email-claudiu.beznea@microchip.com> (raw) In-Reply-To: <1595403506-8209-1-git-send-email-claudiu.beznea@microchip.com> Chapter 57.7.5 of SAM9X60 datasheet specifies that the maximum drift of this oscillator is +- 3KHz. Use that value and the formula at [1] or the calculator at [2] to compute the PPB value. [1] https://www.everythingrf.com/rf-calculators/ppm-to-hz-calculator [2] https://www.changpuak.ch/electronics/ppm_to_Hz_converter.php Fixes: 04bcc4275e601 ("clk: at91: sckc: add support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- drivers/clk/at91/sckc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 15dc4cd86d76..2d65770d8665 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -471,8 +471,9 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np) if (!regbase) return; - slow_rc = clk_hw_register_fixed_rate(NULL, parent_names[0], NULL, 0, - 32768); + slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, parent_names[0], + NULL, 0, 32768, + 93750000); if (IS_ERR(slow_rc)) return; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-22 7:39 UTC|newest] Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-22 7:38 [PATCH v2 00/18] clk: at91: add sama7g5 clock support Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-22 7:38 ` [PATCH v2 01/18] clk: at91: clk-generated: continue if __clk_determine_rate() returns error Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:20 ` Stephen Boyd 2020-07-24 9:20 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 02/18] clk: at91: clk-generated: check best_rate against ranges Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:20 ` Stephen Boyd 2020-07-24 9:20 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 03/18] clk: at91: clk-sam9x60-pll: fix mul mask Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:20 ` Stephen Boyd 2020-07-24 9:20 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 04/18] clk: at91: sam9x60-pll: use logical or for range check Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:20 ` Stephen Boyd 2020-07-24 9:20 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 05/18] clk: at91: sam9x60-pll: check fcore against ranges Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:20 ` Stephen Boyd 2020-07-24 9:20 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 06/18] clk: at91: sam9x60-pll: use frac when setting frequency Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 07/18] clk: at91: sam9x60: fix main rc oscillator frequency Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` Claudiu Beznea [this message] 2020-07-22 7:38 ` [PATCH v2 08/18] clk: at91: sckc: register slow_rc with accuracy option Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 09/18] clk: at91: replace conditional operator with double logical not Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 10/18] clk: at91: clk-generated: pass the id of changeable parent at registration Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 11/18] clk: at91: clk-generated: add mux_table option Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 12/18] clk: at91: clk-master: add master clock support for SAMA7G5 Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 13/18] clk: at91: clk-peripheral: add support for changeable parent rate Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 14/18] clk: at91: clk-programmable: add mux_table option Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 15/18] clk: at91: add macro for pll ids mask Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:21 ` Stephen Boyd 2020-07-24 9:21 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 16/18] clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputs Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:22 ` Stephen Boyd 2020-07-24 9:22 ` Stephen Boyd 2020-07-24 9:22 ` Stephen Boyd 2020-07-24 9:22 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 17/18] clk: at91: clk-utmi: add utmi support for sama7g5 Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:22 ` Stephen Boyd 2020-07-24 9:22 ` Stephen Boyd 2020-07-22 7:38 ` [PATCH v2 18/18] clk: at91: sama7g5: add clock " Claudiu Beznea 2020-07-22 7:38 ` Claudiu Beznea 2020-07-24 9:22 ` Stephen Boyd 2020-07-24 9:22 ` Stephen Boyd
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