* [PATCH 1/2] drm/amdgpu/jpeg3.0: remove extra asic type check
@ 2020-07-23 16:10 James Zhu
2020-07-23 16:10 ` [PATCH 2/2] drm/amdgpu/vcn3.0: " James Zhu
0 siblings, 1 reply; 4+ messages in thread
From: James Zhu @ 2020-07-23 16:10 UTC (permalink / raw)
To: amd-gfx; +Cc: jamesz
jpeg ip block is already selected based on ASIC type during set_ip_blocks.
Signed-off-by: James Zhu <James.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
index 42f1a51..c41e559 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
@@ -49,12 +49,11 @@ static int jpeg_v3_0_set_powergating_state(void *handle,
static int jpeg_v3_0_early_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- if (adev->asic_type == CHIP_SIENNA_CICHLID) {
- u32 harvest = RREG32_SOC15(JPEG, 0, mmCC_UVD_HARVESTING);
+ u32 harvest = RREG32_SOC15(JPEG, 0, mmCC_UVD_HARVESTING);
+
+ if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
+ return -ENOENT;
- if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
- return -ENOENT;
- }
adev->jpeg.num_jpeg_inst = 1;
jpeg_v3_0_set_dec_ring_funcs(adev);
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] drm/amdgpu/vcn3.0: remove extra asic type check
2020-07-23 16:10 [PATCH 1/2] drm/amdgpu/jpeg3.0: remove extra asic type check James Zhu
@ 2020-07-23 16:10 ` James Zhu
2020-07-23 19:28 ` Liu, Leo
0 siblings, 1 reply; 4+ messages in thread
From: James Zhu @ 2020-07-23 16:10 UTC (permalink / raw)
To: amd-gfx; +Cc: jamesz
vcn ip block is already selected based on ASIC type during set_ip_blocks.
Signed-off-by: James Zhu <James.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 29 +++++++++++++----------------
1 file changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 910a4a3..4edd5c4 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -88,23 +88,20 @@ static int vcn_v3_0_early_init(void *handle)
adev->vcn.num_enc_rings = 1;
} else {
- if (adev->asic_type == CHIP_SIENNA_CICHLID) {
- u32 harvest;
- int i;
-
- adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID;
- for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
- harvest = RREG32_SOC15(VCN, i, mmCC_UVD_HARVESTING);
- if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
- adev->vcn.harvest_config |= 1 << i;
- }
+ u32 harvest;
+ int i;
+
+ adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID;
+ for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
+ harvest = RREG32_SOC15(VCN, i, mmCC_UVD_HARVESTING);
+ if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
+ adev->vcn.harvest_config |= 1 << i;
+ }
- if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 |
- AMDGPU_VCN_HARVEST_VCN1))
- /* both instances are harvested, disable the block */
- return -ENOENT;
- } else
- adev->vcn.num_vcn_inst = 1;
+ if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 |
+ AMDGPU_VCN_HARVEST_VCN1))
+ /* both instances are harvested, disable the block */
+ return -ENOENT;
adev->vcn.num_enc_rings = 2;
}
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* RE: [PATCH 2/2] drm/amdgpu/vcn3.0: remove extra asic type check
2020-07-23 16:10 ` [PATCH 2/2] drm/amdgpu/vcn3.0: " James Zhu
@ 2020-07-23 19:28 ` Liu, Leo
2020-07-24 7:19 ` Christian König
0 siblings, 1 reply; 4+ messages in thread
From: Liu, Leo @ 2020-07-23 19:28 UTC (permalink / raw)
To: Zhu, James, amd-gfx; +Cc: Zhu, James
These 2 patches are:
Reviewed-by: Leo Liu <leo.liu@amd.com>
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of James Zhu
Sent: July 23, 2020 12:10 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, James <James.Zhu@amd.com>
Subject: [PATCH 2/2] drm/amdgpu/vcn3.0: remove extra asic type check
vcn ip block is already selected based on ASIC type during set_ip_blocks.
Signed-off-by: James Zhu <James.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 29 +++++++++++++----------------
1 file changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 910a4a3..4edd5c4 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -88,23 +88,20 @@ static int vcn_v3_0_early_init(void *handle)
adev->vcn.num_enc_rings = 1;
} else {
- if (adev->asic_type == CHIP_SIENNA_CICHLID) {
- u32 harvest;
- int i;
-
- adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID;
- for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
- harvest = RREG32_SOC15(VCN, i, mmCC_UVD_HARVESTING);
- if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
- adev->vcn.harvest_config |= 1 << i;
- }
+ u32 harvest;
+ int i;
+
+ adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID;
+ for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
+ harvest = RREG32_SOC15(VCN, i, mmCC_UVD_HARVESTING);
+ if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
+ adev->vcn.harvest_config |= 1 << i;
+ }
- if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 |
- AMDGPU_VCN_HARVEST_VCN1))
- /* both instances are harvested, disable the block */
- return -ENOENT;
- } else
- adev->vcn.num_vcn_inst = 1;
+ if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 |
+ AMDGPU_VCN_HARVEST_VCN1))
+ /* both instances are harvested, disable the block */
+ return -ENOENT;
adev->vcn.num_enc_rings = 2;
}
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu/vcn3.0: remove extra asic type check
2020-07-23 19:28 ` Liu, Leo
@ 2020-07-24 7:19 ` Christian König
0 siblings, 0 replies; 4+ messages in thread
From: Christian König @ 2020-07-24 7:19 UTC (permalink / raw)
To: Liu, Leo, Zhu, James, amd-gfx
Acked-by: Christian König <christian.koenig@amd.com> for both.
Am 23.07.20 um 21:28 schrieb Liu, Leo:
> These 2 patches are:
>
> Reviewed-by: Leo Liu <leo.liu@amd.com>
>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of James Zhu
> Sent: July 23, 2020 12:10 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, James <James.Zhu@amd.com>
> Subject: [PATCH 2/2] drm/amdgpu/vcn3.0: remove extra asic type check
>
> vcn ip block is already selected based on ASIC type during set_ip_blocks.
>
> Signed-off-by: James Zhu <James.Zhu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 29 +++++++++++++----------------
> 1 file changed, 13 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> index 910a4a3..4edd5c4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> @@ -88,23 +88,20 @@ static int vcn_v3_0_early_init(void *handle)
> adev->vcn.num_enc_rings = 1;
>
> } else {
> - if (adev->asic_type == CHIP_SIENNA_CICHLID) {
> - u32 harvest;
> - int i;
> -
> - adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID;
> - for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
> - harvest = RREG32_SOC15(VCN, i, mmCC_UVD_HARVESTING);
> - if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
> - adev->vcn.harvest_config |= 1 << i;
> - }
> + u32 harvest;
> + int i;
> +
> + adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID;
> + for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
> + harvest = RREG32_SOC15(VCN, i, mmCC_UVD_HARVESTING);
> + if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
> + adev->vcn.harvest_config |= 1 << i;
> + }
>
> - if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 |
> - AMDGPU_VCN_HARVEST_VCN1))
> - /* both instances are harvested, disable the block */
> - return -ENOENT;
> - } else
> - adev->vcn.num_vcn_inst = 1;
> + if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 |
> + AMDGPU_VCN_HARVEST_VCN1))
> + /* both instances are harvested, disable the block */
> + return -ENOENT;
>
> adev->vcn.num_enc_rings = 2;
> }
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^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-07-24 7:19 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2020-07-23 16:10 [PATCH 1/2] drm/amdgpu/jpeg3.0: remove extra asic type check James Zhu
2020-07-23 16:10 ` [PATCH 2/2] drm/amdgpu/vcn3.0: " James Zhu
2020-07-23 19:28 ` Liu, Leo
2020-07-24 7:19 ` Christian König
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