[PATCH v1 0/7] PHY: Prepare Cadence Torrent PHY driver to support multilink configurations

[PATCH v1 0/7] PHY: Prepare Cadence Torrent PHY driver to support multilink configurations

[Swapnil Jakhade]

Cadence Torrent PHY is a multiprotocol PHY supporting different multilink
PHY configurations including DisplayPort, PCIe, USB, SGMII, QSGMII etc.
Existing Torrent PHY driver supports only DisplayPort. This patch series
prepares Torrent PHY driver so that different multilink configurations can
be supported. It also updates DT bindings accordingly.

Support for different multilink configurations with register sequences for
protocols above will be added in a separate patch series.

This patch series is dependent on PHY patch series [1].

[1] https://lkml.org/lkml/2020/7/17/158

Swapnil Jakhade (7):
  phy: cadence-torrent: Use of_device_get_match_data() to get driver
    data
  phy: cadence-torrent: Use devm_platform_ioremap_resource() to get reg
    addresses
  phy: cadence-torrent: Enable support for multiple subnodes
  phy: cadence-torrent: Add separate regmap functions for torrent and DP
  phy: cadence-torrent: Check total lane count for all subnodes is
    within limit
  dt-bindings: phy: cadence-torrent: Add binding to specify SSC mode
  dt-bindings: phy: cadence-torrent: Update Torrent PHY bindings for
    generic use

 .../bindings/phy/phy-cadence-torrent.yaml     |  85 +++++++---
 drivers/phy/cadence/phy-cadence-torrent.c     | 146 ++++++++++--------
 include/dt-bindings/phy/phy-cadence-torrent.h |  13 ++
 3 files changed, 164 insertions(+), 80 deletions(-)
 create mode 100644 include/dt-bindings/phy/phy-cadence-torrent.h

-- 
2.26.1

[PATCH v1 1/7] phy: cadence-torrent: Use of_device_get_match_data() to get driver data

[Swapnil Jakhade]

Use of_device_get_match_data() to get driver data instead of boilerplate
code.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
---
 drivers/phy/cadence/phy-cadence-torrent.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
index af81707ff0c6..50c30d49300e 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -183,8 +183,6 @@ static const struct reg_field phy_pma_pll_raw_ctrl =
 static const struct reg_field phy_reset_ctrl =
 				REG_FIELD(PHY_RESET, 8, 8);
 
-static const struct of_device_id cdns_torrent_phy_of_match[];
-
 struct cdns_torrent_inst {
 	struct phy *phy;
 	u32 mlane;
@@ -203,6 +201,7 @@ struct cdns_torrent_phy {
 	unsigned long ref_clk_rate;
 	struct cdns_torrent_inst phys[MAX_NUM_LANES];
 	int nsubnodes;
+	const struct cdns_torrent_data *init_data;
 	struct regmap *regmap;
 	struct regmap *regmap_common_cdb;
 	struct regmap *regmap_phy_pcs_common_cdb;
@@ -1711,24 +1710,22 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	struct phy_provider *phy_provider;
 	struct phy_attrs torrent_attr;
-	const struct of_device_id *match;
-	struct cdns_torrent_data *data;
+	const struct cdns_torrent_data *data;
 	struct device_node *child;
 	int ret, subnodes, node = 0, i;
 
 	/* Get init data for this PHY */
-	match = of_match_device(cdns_torrent_phy_of_match, dev);
-	if (!match)
+	data = of_device_get_match_data(dev);
+	if (!data)
 		return -EINVAL;
 
-	data = (struct cdns_torrent_data *)match->data;
-
 	cdns_phy = devm_kzalloc(dev, sizeof(*cdns_phy), GFP_KERNEL);
 	if (!cdns_phy)
 		return -ENOMEM;
 
 	dev_set_drvdata(dev, cdns_phy);
 	cdns_phy->dev = dev;
+	cdns_phy->init_data = data;
 
 	cdns_phy->phy_rst = devm_reset_control_get_exclusive_by_index(dev, 0);
 	if (IS_ERR(cdns_phy->phy_rst)) {
-- 
2.26.1

[PATCH v1 2/7] phy: cadence-torrent: Use devm_platform_ioremap_resource() to get reg addresses

[Swapnil Jakhade]

Use devm_platform_ioremap_resource() to get register addresses instead of
boilerplate code.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
---
 drivers/phy/cadence/phy-cadence-torrent.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
index 50c30d49300e..177120afcc35 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1705,7 +1705,6 @@ static int cdns_regmap_init_torrent_dp(struct cdns_torrent_phy *cdns_phy,
 
 static int cdns_torrent_phy_probe(struct platform_device *pdev)
 {
-	struct resource *regs;
 	struct cdns_torrent_phy *cdns_phy;
 	struct device *dev = &pdev->dev;
 	struct phy_provider *phy_provider;
@@ -1740,8 +1739,7 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 		return PTR_ERR(cdns_phy->clk);
 	}
 
-	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	cdns_phy->sd_base = devm_ioremap_resource(&pdev->dev, regs);
+	cdns_phy->sd_base = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(cdns_phy->sd_base))
 		return PTR_ERR(cdns_phy->sd_base);
 
@@ -1831,9 +1829,7 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 			}
 
 			/* DPTX registers */
-			regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-			cdns_phy->base = devm_ioremap_resource(&pdev->dev,
-							       regs);
+			cdns_phy->base = devm_platform_ioremap_resource(pdev, 1);
 			if (IS_ERR(cdns_phy->base)) {
 				ret = PTR_ERR(cdns_phy->base);
 				goto put_child;
-- 
2.26.1

[PATCH v1 3/7] phy: cadence-torrent: Enable support for multiple subnodes

[Swapnil Jakhade]

Enable support for multiple subnodes in torrent PHY to
include multi-link combinations.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
---
 drivers/phy/cadence/phy-cadence-torrent.c | 15 ---------------
 1 file changed, 15 deletions(-)

diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
index 177120afcc35..8ef97af7308d 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1747,9 +1747,6 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 	if (subnodes == 0) {
 		dev_err(dev, "No available link subnodes found\n");
 		return -EINVAL;
-	} else if (subnodes != 1) {
-		dev_err(dev, "Driver supports only one link subnode.\n");
-		return -EINVAL;
 	}
 
 	for_each_available_child_of_node(dev->of_node, child) {
@@ -1772,14 +1769,6 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 			goto put_child;
 		}
 
-		if (cdns_phy->phys[node].mlane != 0) {
-			dev_err(dev,
-				"%s: Driver supports only lane-0 as master lane.\n",
-				child->full_name);
-			ret = -EINVAL;
-			goto put_child;
-		}
-
 		if (of_property_read_u32(child, "cdns,phy-type",
 					 &cdns_phy->phys[node].phy_type)) {
 			dev_err(dev, "%s: No \"cdns,phy-type\"-property.\n",
@@ -1852,10 +1841,6 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 			torrent_attr.mode = PHY_MODE_DP;
 
 			phy_set_attrs(gphy, torrent_attr);
-		} else {
-			dev_err(dev, "Driver supports only PHY_TYPE_DP\n");
-			ret = -ENOTSUPP;
-			goto put_child;
 		}
 		cdns_phy->phys[node].phy = gphy;
 		phy_set_drvdata(gphy, &cdns_phy->phys[node]);
-- 
2.26.1

[PATCH v1 4/7] phy: cadence-torrent: Add separate regmap functions for torrent and DP

[Swapnil Jakhade]

Added separate functions for regmap initialization of torrent PHY
generic registers and DP specific registers.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
---
 drivers/phy/cadence/phy-cadence-torrent.c | 99 +++++++++++++++--------
 1 file changed, 66 insertions(+), 33 deletions(-)

diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
index 8ef97af7308d..aff85e55348f 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -1584,7 +1584,24 @@ static struct regmap *cdns_regmap_init(struct device *dev, void __iomem *base,
 	return devm_regmap_init(dev, NULL, ctx, config);
 }
 
-static int cdns_regfield_init(struct cdns_torrent_phy *cdns_phy)
+static int cdns_torrent_dp_regfield_init(struct cdns_torrent_phy *cdns_phy)
+{
+	struct device *dev = cdns_phy->dev;
+	struct regmap_field *field;
+	struct regmap *regmap;
+
+	regmap = cdns_phy->regmap_dptx_phy_reg;
+	field = devm_regmap_field_alloc(dev, regmap, phy_reset_ctrl);
+	if (IS_ERR(field)) {
+		dev_err(dev, "PHY_RESET reg field init failed\n");
+		return PTR_ERR(field);
+	}
+	cdns_phy->phy_reset_ctrl = field;
+
+	return 0;
+}
+
+static int cdns_torrent_regfield_init(struct cdns_torrent_phy *cdns_phy)
 {
 	struct device *dev = cdns_phy->dev;
 	struct regmap_field *field;
@@ -1614,28 +1631,44 @@ static int cdns_regfield_init(struct cdns_torrent_phy *cdns_phy)
 	}
 	cdns_phy->phy_pma_pll_raw_ctrl = field;
 
-	regmap = cdns_phy->regmap_dptx_phy_reg;
-	field = devm_regmap_field_alloc(dev, regmap, phy_reset_ctrl);
-	if (IS_ERR(field)) {
-		dev_err(dev, "PHY_RESET reg field init failed\n");
-		return PTR_ERR(field);
+	return 0;
+}
+
+static int cdns_torrent_dp_regmap_init(struct cdns_torrent_phy *cdns_phy)
+{
+	void __iomem *base = cdns_phy->base;
+	struct device *dev = cdns_phy->dev;
+	struct regmap *regmap;
+	u8 reg_offset_shift;
+	u32 block_offset;
+
+	reg_offset_shift = cdns_phy->init_data->reg_offset_shift;
+
+	block_offset = TORRENT_DPTX_PHY_OFFSET;
+	regmap = cdns_regmap_init(dev, base, block_offset,
+				  reg_offset_shift,
+				  &cdns_torrent_dptx_phy_config);
+	if (IS_ERR(regmap)) {
+		dev_err(dev, "Failed to init DPTX PHY regmap\n");
+		return PTR_ERR(regmap);
 	}
-	cdns_phy->phy_reset_ctrl = field;
+	cdns_phy->regmap_dptx_phy_reg = regmap;
 
 	return 0;
 }
 
-static int cdns_regmap_init_torrent_dp(struct cdns_torrent_phy *cdns_phy,
-				       void __iomem *sd_base,
-				       void __iomem *base,
-				       u8 block_offset_shift,
-				       u8 reg_offset_shift)
+static int cdns_torrent_regmap_init(struct cdns_torrent_phy *cdns_phy)
 {
+	void __iomem *sd_base = cdns_phy->sd_base;
+	u8 block_offset_shift, reg_offset_shift;
 	struct device *dev = cdns_phy->dev;
 	struct regmap *regmap;
 	u32 block_offset;
 	int i;
 
+	block_offset_shift = cdns_phy->init_data->block_offset_shift;
+	reg_offset_shift = cdns_phy->init_data->reg_offset_shift;
+
 	for (i = 0; i < MAX_NUM_LANES; i++) {
 		block_offset = TORRENT_TX_LANE_CDB_OFFSET(i, block_offset_shift,
 							  reg_offset_shift);
@@ -1690,16 +1723,6 @@ static int cdns_regmap_init_torrent_dp(struct cdns_torrent_phy *cdns_phy,
 	}
 	cdns_phy->regmap_phy_pma_common_cdb = regmap;
 
-	block_offset = TORRENT_DPTX_PHY_OFFSET;
-	regmap = cdns_regmap_init(dev, base, block_offset,
-				  reg_offset_shift,
-				  &cdns_torrent_dptx_phy_config);
-	if (IS_ERR(regmap)) {
-		dev_err(dev, "Failed to init DPTX PHY regmap\n");
-		return PTR_ERR(regmap);
-	}
-	cdns_phy->regmap_dptx_phy_reg = regmap;
-
 	return 0;
 }
 
@@ -1712,6 +1735,7 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 	const struct cdns_torrent_data *data;
 	struct device_node *child;
 	int ret, subnodes, node = 0, i;
+	u8 init_dp_regmap = 0;
 
 	/* Get init data for this PHY */
 	data = of_device_get_match_data(dev);
@@ -1749,6 +1773,14 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
+	ret = cdns_torrent_regmap_init(cdns_phy);
+	if (ret)
+		return ret;
+
+	ret = cdns_torrent_regfield_init(cdns_phy);
+	if (ret)
+		return ret;
+
 	for_each_available_child_of_node(dev->of_node, child) {
 		struct phy *gphy;
 
@@ -1831,6 +1863,18 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 				goto put_child;
 			}
 
+			if (!init_dp_regmap) {
+				ret = cdns_torrent_dp_regmap_init(cdns_phy);
+				if (ret)
+					goto put_child;
+
+				ret = cdns_torrent_dp_regfield_init(cdns_phy);
+				if (ret)
+					goto put_child;
+
+				init_dp_regmap++;
+			}
+
 			dev_info(dev, "%d lanes, max bit rate %d.%03d Gbps\n",
 				 cdns_phy->phys[node].num_lanes,
 				 cdns_phy->max_bit_rate / 1000,
@@ -1849,17 +1893,6 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 	}
 	cdns_phy->nsubnodes = node;
 
-	ret = cdns_regmap_init_torrent_dp(cdns_phy, cdns_phy->sd_base,
-					  cdns_phy->base,
-					  data->block_offset_shift,
-					  data->reg_offset_shift);
-	if (ret)
-		goto put_lnk_rst;
-
-	ret = cdns_regfield_init(cdns_phy);
-	if (ret)
-		goto put_lnk_rst;
-
 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
 	if (IS_ERR(phy_provider)) {
 		ret = PTR_ERR(phy_provider);
-- 
2.26.1

[PATCH v1 5/7] phy: cadence-torrent: Check total lane count for all subnodes is within limit

[Swapnil Jakhade]

Add checking if total number of lanes for all subnodes is not greater than
number of lanes supported by PHY.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
---
 drivers/phy/cadence/phy-cadence-torrent.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
index aff85e55348f..82f48ca5dcc6 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -25,7 +25,6 @@
 #define REF_CLK_19_2MHz		19200000
 #define REF_CLK_25MHz		25000000
 
-#define DEFAULT_NUM_LANES	4
 #define MAX_NUM_LANES		4
 #define DEFAULT_MAX_BIT_RATE	8100 /* in Mbps */
 
@@ -1735,6 +1734,7 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 	const struct cdns_torrent_data *data;
 	struct device_node *child;
 	int ret, subnodes, node = 0, i;
+	u32 total_num_lanes = 0;
 	u8 init_dp_regmap = 0;
 
 	/* Get init data for this PHY */
@@ -1809,9 +1809,15 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 			goto put_child;
 		}
 
-		cdns_phy->phys[node].num_lanes = DEFAULT_NUM_LANES;
-		of_property_read_u32(child, "cdns,num-lanes",
-				     &cdns_phy->phys[node].num_lanes);
+		if (of_property_read_u32(child, "cdns,num-lanes",
+					 &cdns_phy->phys[node].num_lanes)) {
+			dev_err(dev, "%s: No \"cdns,num-lanes\"-property.\n",
+				child->full_name);
+			ret = -EINVAL;
+			goto put_child;
+		}
+
+		total_num_lanes += cdns_phy->phys[node].num_lanes;
 
 		if (cdns_phy->phys[node].phy_type == PHY_TYPE_DP) {
 			switch (cdns_phy->phys[node].num_lanes) {
@@ -1893,6 +1899,11 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 	}
 	cdns_phy->nsubnodes = node;
 
+	if (total_num_lanes > MAX_NUM_LANES) {
+		dev_err(dev, "Invalid lane configuration\n");
+		goto put_lnk_rst;
+	}
+
 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
 	if (IS_ERR(phy_provider)) {
 		ret = PTR_ERR(phy_provider);
-- 
2.26.1

[PATCH v1 6/7] dt-bindings: phy: cadence-torrent: Add binding to specify SSC mode

[Swapnil Jakhade]

Add binding to specify Spread Spectrum Clocking mode used.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
---
 .../bindings/phy/phy-cadence-torrent.yaml           |  9 +++++++++
 include/dt-bindings/phy/phy-cadence-torrent.h       | 13 +++++++++++++
 2 files changed, 22 insertions(+)
 create mode 100644 include/dt-bindings/phy/phy-cadence-torrent.h

diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
index 4071438be2ba..a7ee19d27c19 100644
--- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
@@ -87,6 +87,15 @@ patternProperties:
         enum: [1, 2, 4]
         default: 4
 
+      cdns,ssc-mode:
+        description:
+          Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC,
+          EXTERNAL_SSC or INTERNAL_SSC.
+          Refer include/dt-bindings/phy/phy-cadence-torrent.h for the constants to be used.
+        $ref: /schemas/types.yaml#/definitions/uint32
+        enum: [0, 1, 2]
+        default: 0
+
       cdns,max-bit-rate:
         description:
           Maximum DisplayPort link bit rate to use, in Mbps
diff --git a/include/dt-bindings/phy/phy-cadence-torrent.h b/include/dt-bindings/phy/phy-cadence-torrent.h
new file mode 100644
index 000000000000..e387b6a95741
--- /dev/null
+++ b/include/dt-bindings/phy/phy-cadence-torrent.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * This header provides constants for Cadence Torrent SERDES.
+ */
+
+#ifndef _DT_BINDINGS_TORRENT_SERDES_H
+#define _DT_BINDINGS_TORRENT_SERDES_H
+
+#define TORRENT_SERDES_NO_SSC		0
+#define TORRENT_SERDES_EXTERNAL_SSC	1
+#define TORRENT_SERDES_INTERNAL_SSC	2
+
+#endif /* _DT_BINDINGS_TORRENT_SERDES_H */
-- 
2.26.1

Re: [PATCH v1 6/7] dt-bindings: phy: cadence-torrent: Add binding to specify SSC mode

[Rob Herring]

On Fri, 07 Aug 2020 12:12:44 +0200, Swapnil Jakhade wrote:
> Add binding to specify Spread Spectrum Clocking mode used.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> ---
>  .../bindings/phy/phy-cadence-torrent.yaml           |  9 +++++++++
>  include/dt-bindings/phy/phy-cadence-torrent.h       | 13 +++++++++++++
>  2 files changed, 22 insertions(+)
>  create mode 100644 include/dt-bindings/phy/phy-cadence-torrent.h
> 

Reviewed-by: Rob Herring <robh@kernel.org>

[PATCH v1 7/7] dt-bindings: phy: cadence-torrent: Update Torrent PHY bindings for generic use

[Swapnil Jakhade]

Torrent PHY can be used in different multi-link multi-protocol
configurations including protocols other than DisplayPort also,
such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have
support for these configurations.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
---
 .../bindings/phy/phy-cadence-torrent.yaml     | 76 ++++++++++++++-----
 1 file changed, 58 insertions(+), 18 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
index a7ee19d27c19..b2275712363d 100644
--- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
@@ -4,11 +4,13 @@
 $id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"
 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
 
-title: Cadence Torrent SD0801 PHY binding for DisplayPort
+title: Cadence Torrent SD0801 PHY binding
 
 description:
   This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
-  hardware included with the Cadence MHDP DisplayPort controller.
+  hardware included with the Cadence MHDP DisplayPort controller. Torrent
+  PHY also supports multilink multiprotocol combinations including protocols
+  such as PCIe, USB, SGMII, QSGMII etc.
 
 maintainers:
   - Swapnil Jakhade <sjakhade@cadence.com>
@@ -49,13 +51,14 @@ properties:
       - const: dptx_phy
 
   resets:
-    maxItems: 1
-    description:
-      Torrent PHY reset.
-      See Documentation/devicetree/bindings/reset/reset.txt
+    minItems: 1
+    maxItems: 2
+    items:
+      - description: Torrent PHY reset.
+      - description: Torrent APB reset. This is optional.
 
 patternProperties:
-  '^phy@[0-7]+$':
+  '^link@[0-7]+$':
     type: object
     description:
       Each group of PHY lanes with a single master lane should be represented as a sub-node.
@@ -78,13 +81,13 @@ patternProperties:
           Specifies the type of PHY for which the group of PHY lanes is used.
           Refer include/dt-bindings/phy/phy.h. Constants from the header should be used.
         $ref: /schemas/types.yaml#/definitions/uint32
-        enum: [1, 2, 3, 4, 5, 6]
+        enum: [1, 2, 3, 4, 5, 6, 7, 8, 9]
 
       cdns,num-lanes:
         description:
-          Number of DisplayPort lanes.
+          Number of lanes.
         $ref: /schemas/types.yaml#/definitions/uint32
-        enum: [1, 2, 4]
+        enum: [1, 2, 3, 4]
         default: 4
 
       cdns,ssc-mode:
@@ -108,6 +111,7 @@ patternProperties:
       - resets
       - "#phy-cells"
       - cdns,phy-type
+      - cdns,num-lanes
 
     additionalProperties: false
 
@@ -141,15 +145,51 @@ examples:
             clock-names = "refclk";
             #address-cells = <1>;
             #size-cells = <0>;
-            phy@0 {
-                      reg = <0>;
-                      resets = <&phyrst 1>, <&phyrst 2>,
-                               <&phyrst 3>, <&phyrst 4>;
-                      #phy-cells = <0>;
-                      cdns,phy-type = <PHY_TYPE_DP>;
-                      cdns,num-lanes = <4>;
-                      cdns,max-bit-rate = <8100>;
+            link@0 {
+                reg = <0>;
+                resets = <&phyrst 1>, <&phyrst 2>,
+                         <&phyrst 3>, <&phyrst 4>;
+                #phy-cells = <0>;
+                cdns,phy-type = <PHY_TYPE_DP>;
+                cdns,num-lanes = <4>;
+                cdns,max-bit-rate = <8100>;
+            };
+        };
+    };
+  - |
+    #include <dt-bindings/phy/phy.h>
+    #include <dt-bindings/phy/phy-cadence-torrent.h>
+
+    bus {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        torrent-phy@f0fb500000 {
+            compatible = "cdns,torrent-phy";
+            reg = <0xf0 0xfb500000 0x0 0x00100000>;
+            reg-names = "torrent_phy";
+            resets = <&phyrst 0>, <&phyrst 1>;
+            clocks = <&ref_clk>;
+            clock-names = "refclk";
+            #address-cells = <1>;
+            #size-cells = <0>;
+            link@0 {
+                reg = <0>;
+                resets = <&phyrst 2>, <&phyrst 3>;
+                #phy-cells = <0>;
+                cdns,phy-type = <PHY_TYPE_PCIE>;
+                cdns,num-lanes = <2>;
+                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
             };
+
+            link@2 {
+                reg = <2>;
+                resets = <&phyrst 4>;
+                #phy-cells = <0>;
+                cdns,phy-type = <PHY_TYPE_SGMII>;
+                cdns,num-lanes = <1>;
+                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
+           };
         };
     };
 ...
-- 
2.26.1

Re: [PATCH v1 7/7] dt-bindings: phy: cadence-torrent: Update Torrent PHY bindings for generic use

[Kishon Vijay Abraham I]

Hi Swapnil,

On 8/7/2020 3:42 PM, Swapnil Jakhade wrote:
> Torrent PHY can be used in different multi-link multi-protocol
> configurations including protocols other than DisplayPort also,
> such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have
> support for these configurations.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> ---
>  .../bindings/phy/phy-cadence-torrent.yaml     | 76 ++++++++++++++-----
>  1 file changed, 58 insertions(+), 18 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> index a7ee19d27c19..b2275712363d 100644
> --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> @@ -4,11 +4,13 @@
>  $id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"
>  $schema: "http://devicetree.org/meta-schemas/core.yaml#"
>  
> -title: Cadence Torrent SD0801 PHY binding for DisplayPort
> +title: Cadence Torrent SD0801 PHY binding
>  
>  description:
>    This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
> -  hardware included with the Cadence MHDP DisplayPort controller.
> +  hardware included with the Cadence MHDP DisplayPort controller. Torrent
> +  PHY also supports multilink multiprotocol combinations including protocols
> +  such as PCIe, USB, SGMII, QSGMII etc.
>  
>  maintainers:
>    - Swapnil Jakhade <sjakhade@cadence.com>
> @@ -49,13 +51,14 @@ properties:
>        - const: dptx_phy
>  
>    resets:
> -    maxItems: 1
> -    description:
> -      Torrent PHY reset.
> -      See Documentation/devicetree/bindings/reset/reset.txt
> +    minItems: 1
> +    maxItems: 2
> +    items:
> +      - description: Torrent PHY reset.
> +      - description: Torrent APB reset. This is optional.
>  
>  patternProperties:
> -  '^phy@[0-7]+$':
> +  '^link@[0-7]+$':

Wouldn't this break older device tree binding? Or are there no upstream DT
nodes with phy sub-node?

Thanks
Kishon

>      type: object
>      description:
>        Each group of PHY lanes with a single master lane should be represented as a sub-node.
> @@ -78,13 +81,13 @@ patternProperties:
>            Specifies the type of PHY for which the group of PHY lanes is used.
>            Refer include/dt-bindings/phy/phy.h. Constants from the header should be used.
>          $ref: /schemas/types.yaml#/definitions/uint32
> -        enum: [1, 2, 3, 4, 5, 6]
> +        enum: [1, 2, 3, 4, 5, 6, 7, 8, 9]
>  
>        cdns,num-lanes:
>          description:
> -          Number of DisplayPort lanes.
> +          Number of lanes.
>          $ref: /schemas/types.yaml#/definitions/uint32
> -        enum: [1, 2, 4]
> +        enum: [1, 2, 3, 4]
>          default: 4
>  
>        cdns,ssc-mode:
> @@ -108,6 +111,7 @@ patternProperties:
>        - resets
>        - "#phy-cells"
>        - cdns,phy-type
> +      - cdns,num-lanes
>  
>      additionalProperties: false
>  
> @@ -141,15 +145,51 @@ examples:
>              clock-names = "refclk";
>              #address-cells = <1>;
>              #size-cells = <0>;
> -            phy@0 {
> -                      reg = <0>;
> -                      resets = <&phyrst 1>, <&phyrst 2>,
> -                               <&phyrst 3>, <&phyrst 4>;
> -                      #phy-cells = <0>;
> -                      cdns,phy-type = <PHY_TYPE_DP>;
> -                      cdns,num-lanes = <4>;
> -                      cdns,max-bit-rate = <8100>;
> +            link@0 {
> +                reg = <0>;
> +                resets = <&phyrst 1>, <&phyrst 2>,
> +                         <&phyrst 3>, <&phyrst 4>;
> +                #phy-cells = <0>;
> +                cdns,phy-type = <PHY_TYPE_DP>;
> +                cdns,num-lanes = <4>;
> +                cdns,max-bit-rate = <8100>;
> +            };
> +        };
> +    };
> +  - |
> +    #include <dt-bindings/phy/phy.h>
> +    #include <dt-bindings/phy/phy-cadence-torrent.h>
> +
> +    bus {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        torrent-phy@f0fb500000 {
> +            compatible = "cdns,torrent-phy";
> +            reg = <0xf0 0xfb500000 0x0 0x00100000>;
> +            reg-names = "torrent_phy";
> +            resets = <&phyrst 0>, <&phyrst 1>;
> +            clocks = <&ref_clk>;
> +            clock-names = "refclk";
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            link@0 {
> +                reg = <0>;
> +                resets = <&phyrst 2>, <&phyrst 3>;
> +                #phy-cells = <0>;
> +                cdns,phy-type = <PHY_TYPE_PCIE>;
> +                cdns,num-lanes = <2>;
> +                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
>              };
> +
> +            link@2 {
> +                reg = <2>;
> +                resets = <&phyrst 4>;
> +                #phy-cells = <0>;
> +                cdns,phy-type = <PHY_TYPE_SGMII>;
> +                cdns,num-lanes = <1>;
> +                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
> +           };
>          };
>      };
>  ...
> 

RE: [PATCH v1 7/7] dt-bindings: phy: cadence-torrent: Update Torrent PHY bindings for generic use

[Swapnil Kashinath Jakhade]

Hi Kishon,

> -----Original Message-----
> From: Kishon Vijay Abraham I <kishon@ti.com>
> Sent: Wednesday, August 12, 2020 3:41 PM
> To: Swapnil Kashinath Jakhade <sjakhade@cadence.com>;
> vkoul@kernel.org; robh+dt@kernel.org; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org
> Cc: Milind Parab <mparab@cadence.com>; Yuti Suresh Amonkar
> <yamonkar@cadence.com>; tomi.valkeinen@ti.com; jsarha@ti.com;
> nsekhar@ti.com
> Subject: Re: [PATCH v1 7/7] dt-bindings: phy: cadence-torrent: Update
> Torrent PHY bindings for generic use
> 
> EXTERNAL MAIL
> 
> 
> Hi Swapnil,
> 
> On 8/7/2020 3:42 PM, Swapnil Jakhade wrote:
> > Torrent PHY can be used in different multi-link multi-protocol
> > configurations including protocols other than DisplayPort also, such
> > as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have support
> > for these configurations.
> >
> > Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> > ---
> >  .../bindings/phy/phy-cadence-torrent.yaml     | 76 ++++++++++++++-----
> >  1 file changed, 58 insertions(+), 18 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> > b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> > index a7ee19d27c19..b2275712363d 100644
> > --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> > +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> > @@ -4,11 +4,13 @@
> >  $id:
> "https://urldefense.com/v3/__http://devicetree.org/schemas/phy/phy-
> cadence-
> torrent.yaml*__;Iw!!EHscmS1ygiU1lA!Wq5zaq3IY8sduOmiJrpiWODn2JYPNEB
> r4cTnMX74Dxz5OBWGpayFjI1OQDYFP8g$ "
> >  $schema: "https://urldefense.com/v3/__http://devicetree.org/meta-
> schemas/core.yaml*__;Iw!!EHscmS1ygiU1lA!Wq5zaq3IY8sduOmiJrpiWODn2
> JYPNEBr4cTnMX74Dxz5OBWGpayFjI1O14G-GJw$ "
> >
> > -title: Cadence Torrent SD0801 PHY binding for DisplayPort
> > +title: Cadence Torrent SD0801 PHY binding
> >
> >  description:
> >    This binding describes the Cadence SD0801 PHY (also known as
> > Torrent PHY)
> > -  hardware included with the Cadence MHDP DisplayPort controller.
> > +  hardware included with the Cadence MHDP DisplayPort controller.
> > + Torrent  PHY also supports multilink multiprotocol combinations
> > + including protocols  such as PCIe, USB, SGMII, QSGMII etc.
> >
> >  maintainers:
> >    - Swapnil Jakhade <sjakhade@cadence.com> @@ -49,13 +51,14 @@
> > properties:
> >        - const: dptx_phy
> >
> >    resets:
> > -    maxItems: 1
> > -    description:
> > -      Torrent PHY reset.
> > -      See Documentation/devicetree/bindings/reset/reset.txt
> > +    minItems: 1
> > +    maxItems: 2
> > +    items:
> > +      - description: Torrent PHY reset.
> > +      - description: Torrent APB reset. This is optional.
> >
> >  patternProperties:
> > -  '^phy@[0-7]+$':
> > +  '^link@[0-7]+$':
> 
> Wouldn't this break older device tree binding? Or are there no upstream DT
> nodes with phy sub-node?

Torrent PHY driver has never been functional, and therefore do not exist in any
active use case, so this should not break the binding as there are no DT nodes
in upstream using the torrent PHY.

Thanks,
Swapnil

> 
> Thanks
> Kishon
> 
> >      type: object
> >      description:
> >        Each group of PHY lanes with a single master lane should be
> represented as a sub-node.
> > @@ -78,13 +81,13 @@ patternProperties:
> >            Specifies the type of PHY for which the group of PHY lanes is used.
> >            Refer include/dt-bindings/phy/phy.h. Constants from the header
> should be used.
> >          $ref: /schemas/types.yaml#/definitions/uint32
> > -        enum: [1, 2, 3, 4, 5, 6]
> > +        enum: [1, 2, 3, 4, 5, 6, 7, 8, 9]
> >
> >        cdns,num-lanes:
> >          description:
> > -          Number of DisplayPort lanes.
> > +          Number of lanes.
> >          $ref: /schemas/types.yaml#/definitions/uint32
> > -        enum: [1, 2, 4]
> > +        enum: [1, 2, 3, 4]
> >          default: 4
> >
> >        cdns,ssc-mode:
> > @@ -108,6 +111,7 @@ patternProperties:
> >        - resets
> >        - "#phy-cells"
> >        - cdns,phy-type
> > +      - cdns,num-lanes
> >
> >      additionalProperties: false
> >
> > @@ -141,15 +145,51 @@ examples:
> >              clock-names = "refclk";
> >              #address-cells = <1>;
> >              #size-cells = <0>;
> > -            phy@0 {
> > -                      reg = <0>;
> > -                      resets = <&phyrst 1>, <&phyrst 2>,
> > -                               <&phyrst 3>, <&phyrst 4>;
> > -                      #phy-cells = <0>;
> > -                      cdns,phy-type = <PHY_TYPE_DP>;
> > -                      cdns,num-lanes = <4>;
> > -                      cdns,max-bit-rate = <8100>;
> > +            link@0 {
> > +                reg = <0>;
> > +                resets = <&phyrst 1>, <&phyrst 2>,
> > +                         <&phyrst 3>, <&phyrst 4>;
> > +                #phy-cells = <0>;
> > +                cdns,phy-type = <PHY_TYPE_DP>;
> > +                cdns,num-lanes = <4>;
> > +                cdns,max-bit-rate = <8100>;
> > +            };
> > +        };
> > +    };
> > +  - |
> > +    #include <dt-bindings/phy/phy.h>
> > +    #include <dt-bindings/phy/phy-cadence-torrent.h>
> > +
> > +    bus {
> > +        #address-cells = <2>;
> > +        #size-cells = <2>;
> > +
> > +        torrent-phy@f0fb500000 {
> > +            compatible = "cdns,torrent-phy";
> > +            reg = <0xf0 0xfb500000 0x0 0x00100000>;
> > +            reg-names = "torrent_phy";
> > +            resets = <&phyrst 0>, <&phyrst 1>;
> > +            clocks = <&ref_clk>;
> > +            clock-names = "refclk";
> > +            #address-cells = <1>;
> > +            #size-cells = <0>;
> > +            link@0 {
> > +                reg = <0>;
> > +                resets = <&phyrst 2>, <&phyrst 3>;
> > +                #phy-cells = <0>;
> > +                cdns,phy-type = <PHY_TYPE_PCIE>;
> > +                cdns,num-lanes = <2>;
> > +                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
> >              };
> > +
> > +            link@2 {
> > +                reg = <2>;
> > +                resets = <&phyrst 4>;
> > +                #phy-cells = <0>;
> > +                cdns,phy-type = <PHY_TYPE_SGMII>;
> > +                cdns,num-lanes = <1>;
> > +                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
> > +           };
> >          };
> >      };
> >  ...
> >

Re: [PATCH v1 7/7] dt-bindings: phy: cadence-torrent: Update Torrent PHY bindings for generic use

[Rob Herring]

On Fri, 07 Aug 2020 12:12:45 +0200, Swapnil Jakhade wrote:
> Torrent PHY can be used in different multi-link multi-protocol
> configurations including protocols other than DisplayPort also,
> such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have
> support for these configurations.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> ---
>  .../bindings/phy/phy-cadence-torrent.yaml     | 76 ++++++++++++++-----
>  1 file changed, 58 insertions(+), 18 deletions(-)
> 


My bot found errors running 'make dt_binding_check' on your patch:

Error: Documentation/devicetree/bindings/phy/phy-cadence-torrent.example.dts:93.38-39 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:330: Documentation/devicetree/bindings/phy/phy-cadence-torrent.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1334: dt_binding_check] Error 2


See https://patchwork.ozlabs.org/patch/1342193

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade

Please check and re-submit.

RE: [PATCH v1 7/7] dt-bindings: phy: cadence-torrent: Update Torrent PHY bindings for generic use

[Swapnil Kashinath Jakhade]

Hi Rob,

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Wednesday, August 12, 2020 9:57 PM
> To: Swapnil Kashinath Jakhade <sjakhade@cadence.com>
> Cc: kishon@ti.com; jsarha@ti.com; vkoul@kernel.org;
> tomi.valkeinen@ti.com; Yuti Suresh Amonkar <yamonkar@cadence.com>;
> Milind Parab <mparab@cadence.com>; robh+dt@kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; nsekhar@ti.com
> Subject: Re: [PATCH v1 7/7] dt-bindings: phy: cadence-torrent: Update
> Torrent PHY bindings for generic use
> 
> EXTERNAL MAIL
> 
> 
> On Fri, 07 Aug 2020 12:12:45 +0200, Swapnil Jakhade wrote:
> > Torrent PHY can be used in different multi-link multi-protocol
> > configurations including protocols other than DisplayPort also, such
> > as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have support
> > for these configurations.
> >
> > Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> > ---
> >  .../bindings/phy/phy-cadence-torrent.yaml     | 76 ++++++++++++++-----
> >  1 file changed, 58 insertions(+), 18 deletions(-)
> >
> 
> 
> My bot found errors running 'make dt_binding_check' on your patch:
> 
> Error: Documentation/devicetree/bindings/phy/phy-cadence-
> torrent.example.dts:93.38-39 syntax error FATAL ERROR: Unable to parse
> input tree
> make[1]: *** [scripts/Makefile.lib:330:
> Documentation/devicetree/bindings/phy/phy-cadence-
> torrent.example.dt.yaml] Error 1
> make[1]: *** Waiting for unfinished jobs....
> make: *** [Makefile:1334: dt_binding_check] Error 2
> 
> 
> See
> https://urldefense.com/v3/__https://patchwork.ozlabs.org/patch/1342193_
> _;!!EHscmS1ygiU1lA!SVJ6n249DhrJY-
> i_QSvywciTmAiJRcn9zUnmEeSR5UI4tt9jxEzzj9r5Rz1ZiOY$
> 
> If you already ran 'make dt_binding_check' and didn't see the above error(s),
> then make sure dt-schema is up to date:
> 
> pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --
> upgrade
> 
> Please check and re-submit.

This patch and the series requires the macro definition for PHY_TYPE_SGMII in
file include/dt-bindings/phy/phy.h
This error is because of missing this macro definition. It has been newly added
and present in kernel v5.9-rc1
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/diff/include/dt-bindings/phy/phy.h?id=v5.9-rc1&id2=v5.8
So latest version should not get this error.

Thanks,
Swapnil