* [PATCH 1/2] clk: imx: Correct the root clk of media ldb on imx8mp
@ 2020-08-24 7:37 Jacky Bai
2020-08-24 7:37 ` [PATCH 2/2] clk: imx: Correct the memrepair clock " Jacky Bai
2020-08-31 2:29 ` [PATCH 1/2] clk: imx: Correct the root clk of media ldb " Shawn Guo
0 siblings, 2 replies; 3+ messages in thread
From: Jacky Bai @ 2020-08-24 7:37 UTC (permalink / raw)
To: sboyd, mturquette, shawnguo, s.hauer
Cc: kernel, festevam, robh+dt, linux-imx, linux-clk
The root clock slice at 0xbf00 is media_ldb clock,
not csi_phy2_ref, so correct it.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
---
drivers/clk/imx/clk-imx8mp.c | 10 +++++-----
include/dt-bindings/clock/imx8mp-clock.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index ca747712400f..9574ab1aff45 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -375,10 +375,10 @@ static const char * const imx8mp_media_cam2_pix_sels[] = {"osc_24m", "sys_pll1_2
"sys_pll3_out", "audio_pll2_out",
"video_pll1_out", };
-static const char * const imx8mp_media_mipi_phy2_ref_sels[] = {"osc_24m", "sys_pll2_333m", "sys_pll2_100m",
- "sys_pll1_800m", "sys_pll2_1000m",
- "clk_ext2", "audio_pll2_out",
- "video_pll1_out", };
+static const char * const imx8mp_media_ldb_sels[] = {"osc_24m", "sys_pll2_333m", "sys_pll2_100m",
+ "sys_pll1_800m", "sys_pll2_1000m",
+ "clk_ext2", "audio_pll2_out",
+ "video_pll1_out", };
static const char * const imx8mp_media_mipi_csi2_esc_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_80m",
"sys_pll1_800m", "sys_pll2_1000m",
@@ -647,7 +647,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_MEDIA_MIPI_PHY1_REF] = imx8m_clk_hw_composite("media_mipi_phy1_ref", imx8mp_media_mipi_phy1_ref_sels, ccm_base + 0xbd80);
hws[IMX8MP_CLK_MEDIA_DISP1_PIX] = imx8m_clk_hw_composite("media_disp1_pix", imx8mp_media_disp1_pix_sels, ccm_base + 0xbe00);
hws[IMX8MP_CLK_MEDIA_CAM2_PIX] = imx8m_clk_hw_composite("media_cam2_pix", imx8mp_media_cam2_pix_sels, ccm_base + 0xbe80);
- hws[IMX8MP_CLK_MEDIA_MIPI_PHY2_REF] = imx8m_clk_hw_composite("media_mipi_phy2_ref", imx8mp_media_mipi_phy2_ref_sels, ccm_base + 0xbf00);
+ hws[IMX8MP_CLK_MEDIA_LDB] = imx8m_clk_hw_composite("media_ldb", imx8mp_media_ldb_sels, ccm_base + 0xbf00);
hws[IMX8MP_CLK_MEDIA_MIPI_CSI2_ESC] = imx8m_clk_hw_composite("media_mipi_csi2_esc", imx8mp_media_mipi_csi2_esc_sels, ccm_base + 0xbf80);
hws[IMX8MP_CLK_PCIE2_CTRL] = imx8m_clk_hw_composite("pcie2_ctrl", imx8mp_pcie2_ctrl_sels, ccm_base + 0xc000);
hws[IMX8MP_CLK_PCIE2_PHY] = imx8m_clk_hw_composite("pcie2_phy", imx8mp_pcie2_phy_sels, ccm_base + 0xc080);
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index 7a23f289b27f..e8d68fbb6e3f 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -180,7 +180,7 @@
#define IMX8MP_CLK_MEDIA_MIPI_PHY1_REF 171
#define IMX8MP_CLK_MEDIA_DISP1_PIX 172
#define IMX8MP_CLK_MEDIA_CAM2_PIX 173
-#define IMX8MP_CLK_MEDIA_MIPI_PHY2_REF 174
+#define IMX8MP_CLK_MEDIA_LDB 174
#define IMX8MP_CLK_MEDIA_MIPI_CSI2_ESC 175
#define IMX8MP_CLK_PCIE2_CTRL 176
#define IMX8MP_CLK_PCIE2_PHY 177
--
2.26.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] clk: imx: Correct the memrepair clock on imx8mp
2020-08-24 7:37 [PATCH 1/2] clk: imx: Correct the root clk of media ldb on imx8mp Jacky Bai
@ 2020-08-24 7:37 ` Jacky Bai
2020-08-31 2:29 ` [PATCH 1/2] clk: imx: Correct the root clk of media ldb " Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Jacky Bai @ 2020-08-24 7:37 UTC (permalink / raw)
To: sboyd, mturquette, shawnguo, s.hauer
Cc: kernel, festevam, robh+dt, linux-imx, linux-clk
The root clock slice at offset 0xbf80 should be memrepair
clock, so correct it. And this clock should be always on
to make sure the memory repair function can works well.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
---
drivers/clk/imx/clk-imx8mp.c | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 9574ab1aff45..d03811e9cf42 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -152,10 +152,6 @@ static const char * const imx8mp_can2_sels[] = {"osc_24m", "sys_pll2_200m", "sys
"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
"sys_pll2_250m", "audio_pll2_out", };
-static const char * const imx8mp_memrepair_sels[] = {"osc_24m", "sys_pll1_160m", "sys_pll2_50m",
- "sys_pll3_out", "audio_pll1_out", "video_pll1_out",
- "audio_pll2_out", "sys_pll1_133m", };
-
static const char * const imx8mp_pcie_phy_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll2_500m",
"clk_ext1", "clk_ext2", "clk_ext3",
"clk_ext4", "sys_pll1_400m", };
@@ -380,10 +376,9 @@ static const char * const imx8mp_media_ldb_sels[] = {"osc_24m", "sys_pll2_333m",
"clk_ext2", "audio_pll2_out",
"video_pll1_out", };
-static const char * const imx8mp_media_mipi_csi2_esc_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_80m",
- "sys_pll1_800m", "sys_pll2_1000m",
- "sys_pll3_out", "clk_ext3",
- "audio_pll2_out", };
+static const char * const imx8mp_memrepair_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_80m",
+ "sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out",
+ "clk_ext3", "audio_pll2_out", };
static const char * const imx8mp_pcie2_ctrl_sels[] = {"osc_24m", "sys_pll2_250m", "sys_pll2_200m",
"sys_pll1_266m", "sys_pll1_800m", "sys_pll2_500m",
@@ -590,7 +585,6 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_VPU_G2] = imx8m_clk_hw_composite("vpu_g2", imx8mp_vpu_g2_sels, ccm_base + 0xa180);
hws[IMX8MP_CLK_CAN1] = imx8m_clk_hw_composite("can1", imx8mp_can1_sels, ccm_base + 0xa200);
hws[IMX8MP_CLK_CAN2] = imx8m_clk_hw_composite("can2", imx8mp_can2_sels, ccm_base + 0xa280);
- hws[IMX8MP_CLK_MEMREPAIR] = imx8m_clk_hw_composite("memrepair", imx8mp_memrepair_sels, ccm_base + 0xa300);
hws[IMX8MP_CLK_PCIE_PHY] = imx8m_clk_hw_composite("pcie_phy", imx8mp_pcie_phy_sels, ccm_base + 0xa380);
hws[IMX8MP_CLK_PCIE_AUX] = imx8m_clk_hw_composite("pcie_aux", imx8mp_pcie_aux_sels, ccm_base + 0xa400);
hws[IMX8MP_CLK_I2C5] = imx8m_clk_hw_composite("i2c5", imx8mp_i2c5_sels, ccm_base + 0xa480);
@@ -648,7 +642,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_MEDIA_DISP1_PIX] = imx8m_clk_hw_composite("media_disp1_pix", imx8mp_media_disp1_pix_sels, ccm_base + 0xbe00);
hws[IMX8MP_CLK_MEDIA_CAM2_PIX] = imx8m_clk_hw_composite("media_cam2_pix", imx8mp_media_cam2_pix_sels, ccm_base + 0xbe80);
hws[IMX8MP_CLK_MEDIA_LDB] = imx8m_clk_hw_composite("media_ldb", imx8mp_media_ldb_sels, ccm_base + 0xbf00);
- hws[IMX8MP_CLK_MEDIA_MIPI_CSI2_ESC] = imx8m_clk_hw_composite("media_mipi_csi2_esc", imx8mp_media_mipi_csi2_esc_sels, ccm_base + 0xbf80);
+ hws[IMX8MP_CLK_MEMREPAIR] = imx8m_clk_hw_composite_critical("mem_repair", imx8mp_memrepair_sels, ccm_base + 0xbf80);
hws[IMX8MP_CLK_PCIE2_CTRL] = imx8m_clk_hw_composite("pcie2_ctrl", imx8mp_pcie2_ctrl_sels, ccm_base + 0xc000);
hws[IMX8MP_CLK_PCIE2_PHY] = imx8m_clk_hw_composite("pcie2_phy", imx8mp_pcie2_phy_sels, ccm_base + 0xc080);
hws[IMX8MP_CLK_MEDIA_MIPI_TEST_BYTE] = imx8m_clk_hw_composite("media_mipi_test_byte", imx8mp_media_mipi_test_byte_sels, ccm_base + 0xc100);
--
2.26.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] clk: imx: Correct the root clk of media ldb on imx8mp
2020-08-24 7:37 [PATCH 1/2] clk: imx: Correct the root clk of media ldb on imx8mp Jacky Bai
2020-08-24 7:37 ` [PATCH 2/2] clk: imx: Correct the memrepair clock " Jacky Bai
@ 2020-08-31 2:29 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Shawn Guo @ 2020-08-31 2:29 UTC (permalink / raw)
To: Jacky Bai
Cc: sboyd, mturquette, s.hauer, kernel, festevam, robh+dt, linux-imx,
linux-clk
On Mon, Aug 24, 2020 at 03:37:01PM +0800, Jacky Bai wrote:
> The root clock slice at 0xbf00 is media_ldb clock,
> not csi_phy2_ref, so correct it.
>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Applied both, thanks.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-08-31 2:29 UTC | newest]
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2020-08-24 7:37 [PATCH 1/2] clk: imx: Correct the root clk of media ldb on imx8mp Jacky Bai
2020-08-24 7:37 ` [PATCH 2/2] clk: imx: Correct the memrepair clock " Jacky Bai
2020-08-31 2:29 ` [PATCH 1/2] clk: imx: Correct the root clk of media ldb " Shawn Guo
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