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From: Wasim Khan <wasim.khan@oss.nxp.com>
To: shawnguo@kernel.org, leoyang.li@nxp.com, robh+dt@kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, V.sethi@nxp.com
Cc: Wasim Khan <wasim.khan@nxp.com>
Subject: [PATCH 3/6] arm64: dts: ls1043a: Add label to pcie nodes
Date: Wed,  9 Sep 2020 19:14:33 +0530	[thread overview]
Message-ID: <1599659076-28121-4-git-send-email-wasim.khan@oss.nxp.com> (raw)
In-Reply-To: <1599659076-28121-1-git-send-email-wasim.khan@oss.nxp.com>

From: Wasim Khan <wasim.khan@nxp.com>

Add label to pcie nodes

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 5c2e370..0464b8a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -1,9 +1,9 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ * Device Tree Include file for NXP Layerscape-1043A family SoC.
  *
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018, 2020 NXP
  *
  * Mingkai Hu <Mingkai.hu@freescale.com>
  */
@@ -814,7 +814,7 @@
 			interrupts = <0 160 0x4>;
 		};
 
-		pcie@3400000 {
+		pcie1: pcie@3400000 {
 			compatible = "fsl,ls1043a-pcie";
 			reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
 			       0x40 0x00000000 0x0 0x00002000>; /* configuration space */
@@ -840,7 +840,7 @@
 			status = "disabled";
 		};
 
-		pcie@3500000 {
+		pcie2: pcie@3500000 {
 			compatible = "fsl,ls1043a-pcie";
 			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
 			       0x48 0x00000000 0x0 0x00002000>; /* configuration space */
@@ -866,7 +866,7 @@
 			status = "disabled";
 		};
 
-		pcie@3600000 {
+		pcie3: pcie@3600000 {
 			compatible = "fsl,ls1043a-pcie";
 			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
 			       0x50 0x00000000 0x0 0x00002000>; /* configuration space */
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: Wasim Khan <wasim.khan@oss.nxp.com>
To: shawnguo@kernel.org, leoyang.li@nxp.com, robh+dt@kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, V.sethi@nxp.com
Cc: Wasim Khan <wasim.khan@nxp.com>
Subject: [PATCH 3/6] arm64: dts: ls1043a: Add label to pcie nodes
Date: Wed,  9 Sep 2020 19:14:33 +0530	[thread overview]
Message-ID: <1599659076-28121-4-git-send-email-wasim.khan@oss.nxp.com> (raw)
In-Reply-To: <1599659076-28121-1-git-send-email-wasim.khan@oss.nxp.com>

From: Wasim Khan <wasim.khan@nxp.com>

Add label to pcie nodes

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 5c2e370..0464b8a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -1,9 +1,9 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ * Device Tree Include file for NXP Layerscape-1043A family SoC.
  *
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018, 2020 NXP
  *
  * Mingkai Hu <Mingkai.hu@freescale.com>
  */
@@ -814,7 +814,7 @@
 			interrupts = <0 160 0x4>;
 		};
 
-		pcie@3400000 {
+		pcie1: pcie@3400000 {
 			compatible = "fsl,ls1043a-pcie";
 			reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
 			       0x40 0x00000000 0x0 0x00002000>; /* configuration space */
@@ -840,7 +840,7 @@
 			status = "disabled";
 		};
 
-		pcie@3500000 {
+		pcie2: pcie@3500000 {
 			compatible = "fsl,ls1043a-pcie";
 			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
 			       0x48 0x00000000 0x0 0x00002000>; /* configuration space */
@@ -866,7 +866,7 @@
 			status = "disabled";
 		};
 
-		pcie@3600000 {
+		pcie3: pcie@3600000 {
 			compatible = "fsl,ls1043a-pcie";
 			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
 			       0x50 0x00000000 0x0 0x00002000>; /* configuration space */
-- 
2.7.4


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  parent reply	other threads:[~2020-09-09 16:49 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-09 13:44 [PATCH 0/6] arch: arm64: Add label to pcie nodes Wasim Khan
2020-09-09 13:44 ` Wasim Khan
2020-09-09 13:44 ` [PATCH 1/6] arm64: dts: lx2160a: " Wasim Khan
2020-09-09 13:44   ` Wasim Khan
2020-09-09 13:44 ` [PATCH 2/6] arm64: dts: ls1012a: " Wasim Khan
2020-09-09 13:44   ` Wasim Khan
2020-09-09 13:44 ` Wasim Khan [this message]
2020-09-09 13:44   ` [PATCH 3/6] arm64: dts: ls1043a: " Wasim Khan
2020-09-09 13:44 ` [PATCH 4/6] arm64: dts: ls1046a: " Wasim Khan
2020-09-09 13:44   ` Wasim Khan
2020-09-09 13:44 ` [PATCH 5/6] arm64: dts: ls1028a: " Wasim Khan
2020-09-09 13:44   ` Wasim Khan
2020-09-09 13:44 ` [PATCH 6/6] arm64: dts: ls1088a: " Wasim Khan
2020-09-09 13:44   ` Wasim Khan
2020-09-13  1:53 ` [PATCH 0/6] arch: arm64: " Shawn Guo
2020-09-13  1:53   ` Shawn Guo

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