[Qemu-devel] [Bug 1478376] [NEW] PL050 KMIDATA register does not reset

[Qemu-devel] [Bug 1478376] [NEW] PL050 KMIDATA register does not reset

[T-T Yu]

Public bug reported:

static uint32_t pl050_read(void *opaque, target_phys_addr_t offset){
  ...
   case 2: /* KMIDATA */
        if (s->pending)
            s->last = ps2_read_data(s->dev);
        return s->last;
}

When the receive queue is empty (s->pending is false), is the KMIDATA
register supposed to be reset to 0x00? In the current implementation,
the  KMIDATA  does not reverse its value after interrupt is lowered.

** Affects: qemu
     Importance: Undecided
         Status: New

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Title:
  PL050 KMIDATA register does not reset

Status in QEMU:
  New

Bug description:
  static uint32_t pl050_read(void *opaque, target_phys_addr_t offset){
    ...
     case 2: /* KMIDATA */
          if (s->pending)
              s->last = ps2_read_data(s->dev);
          return s->last;
  }

  When the receive queue is empty (s->pending is false), is the KMIDATA
  register supposed to be reset to 0x00? In the current implementation,
  the  KMIDATA  does not reverse its value after interrupt is lowered.

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Re: [Qemu-devel] [Bug 1478376] [NEW] PL050 KMIDATA register does not reset

[Peter Maydell]

On 26 July 2015 at 19:16, T-T Yu <tingting703@gmail.com> wrote:
> Public bug reported:
>
> static uint32_t pl050_read(void *opaque, target_phys_addr_t offset){
>   ...
>    case 2: /* KMIDATA */
>         if (s->pending)
>             s->last = ps2_read_data(s->dev);
>         return s->last;
> }
>
> When the receive queue is empty (s->pending is false), is the KMIDATA
> register supposed to be reset to 0x00? In the current implementation,
> the  KMIDATA  does not reverse its value after interrupt is lowered.

The documentation for the PL050:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0143c/i1014040.html

just says that when KMIDATA is read you get the value in the
receive data register. The implication is that if you read
it multiple times you'll just continue to read the same
value it holds until the keyboard sends further data to be
clocked into the register.

Are you saying that real hardware behaves differently?

thanks
-- PMM

[Qemu-devel] [Bug 1478376] Re: PL050 KMIDATA register does not reset

[T-T Yu]

Yes. In our pl050 keyboard controller, the KMIDATA is reset once the
receive queue is empty.

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Title:
  PL050 KMIDATA register does not reset

Status in QEMU:
  New

Bug description:
  static uint32_t pl050_read(void *opaque, target_phys_addr_t offset){
    ...
     case 2: /* KMIDATA */
          if (s->pending)
              s->last = ps2_read_data(s->dev);
          return s->last;
  }

  When the receive queue is empty (s->pending is false), is the KMIDATA
  register supposed to be reset to 0x00? In the current implementation,
  the  KMIDATA  does not reverse its value after interrupt is lowered.

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[Bug 1478376] Re: PL050 KMIDATA register does not reset

[Thomas Huth]

Looking through old bug tickets... is this still an issue with the
latest version of QEMU? Or could we close this ticket nowadays?


** Changed in: qemu
       Status: New => Incomplete

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Title:
  PL050 KMIDATA register does not reset

Status in QEMU:
  Incomplete

Bug description:
  static uint32_t pl050_read(void *opaque, target_phys_addr_t offset){
    ...
     case 2: /* KMIDATA */
          if (s->pending)
              s->last = ps2_read_data(s->dev);
          return s->last;
  }

  When the receive queue is empty (s->pending is false), is the KMIDATA
  register supposed to be reset to 0x00? In the current implementation,
  the  KMIDATA  does not reverse its value after interrupt is lowered.

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[Bug 1478376] Re: PL050 KMIDATA register does not reset

[Launchpad Bug Tracker]

[Expired for QEMU because there has been no activity for 60 days.]

** Changed in: qemu
       Status: Incomplete => Expired

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Title:
  PL050 KMIDATA register does not reset

Status in QEMU:
  Expired

Bug description:
  static uint32_t pl050_read(void *opaque, target_phys_addr_t offset){
    ...
     case 2: /* KMIDATA */
          if (s->pending)
              s->last = ps2_read_data(s->dev);
          return s->last;
  }

  When the receive queue is empty (s->pending is false), is the KMIDATA
  register supposed to be reset to 0x00? In the current implementation,
  the  KMIDATA  does not reverse its value after interrupt is lowered.

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1478376/+subscriptions