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* [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
@ 2020-10-28 19:15 ` Jason Gunthorpe
  0 siblings, 0 replies; 13+ messages in thread
From: Jason Gunthorpe @ 2020-10-28 19:15 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, dri-devel, intel-gfx, Jani Nikula,
	Joonas Lahtinen, VMware Graphics, Maarten Lankhorst,
	Maxime Ripard, Rodrigo Vivi, Christoph Hellwig,
	Roland Scheidegger, Thomas Zimmermann
  Cc: Daniel Vetter, Thomas Hellstrom, Qian Cai, Gerd Hoffmann,
	Ursulin, Tvrtko

Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
does not have to be any special value. The new algorithm will always
create something less than what the user provides. Thus eliminate this
confusing constant.

- vmwgfx should use the HW capability, not mix in the OS page size for
  calling dma_set_max_seg_size()

- i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
  and for some open coded sgl construction. This doesn't change the value
  since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT

- drm_prime_pages_to_sg uses it as a default if max_segment is zero,
  UINT_MAX is fine to use directly.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Thomas Hellstrom <thellstrom@vmware.com>
Cc: Qian Cai <cai@lca.pw>
Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
Suggested-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
---
 drivers/gpu/drm/drm_prime.c             | 4 ++--
 drivers/gpu/drm/i915/i915_scatterlist.h | 2 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_drv.c     | 3 +--
 include/linux/scatterlist.h             | 6 ------
 tools/testing/scatterlist/main.c        | 2 +-
 5 files changed, 5 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index d6808f678db541..c3693e5e8b74b0 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -816,8 +816,8 @@ struct sg_table *drm_prime_pages_to_sg(struct drm_device *dev,
 
 	if (dev)
 		max_segment = dma_max_mapping_size(dev->dev);
-	if (max_segment == 0 || max_segment > SCATTERLIST_MAX_SEGMENT)
-		max_segment = SCATTERLIST_MAX_SEGMENT;
+	if (max_segment == 0)
+		max_segment = UINT_MAX;
 	sge = __sg_alloc_table_from_pages(sg, pages, nr_pages, 0,
 					  nr_pages << PAGE_SHIFT,
 					  max_segment,
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h b/drivers/gpu/drm/i915/i915_scatterlist.h
index b7b59328cb76ab..883dd8d09d6bf2 100644
--- a/drivers/gpu/drm/i915/i915_scatterlist.h
+++ b/drivers/gpu/drm/i915/i915_scatterlist.h
@@ -112,7 +112,7 @@ static inline unsigned int i915_sg_segment_size(void)
 	unsigned int size = swiotlb_max_segment();
 
 	if (size == 0)
-		return SCATTERLIST_MAX_SEGMENT;
+		size = UINT_MAX;
 
 	size = rounddown(size, PAGE_SIZE);
 	/* swiotlb_max_segment_size can return 1 byte when it means one page. */
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 31e3e5c9f36223..c1817f1a3006e0 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -792,8 +792,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 	if (unlikely(ret != 0))
 		goto out_err0;
 
-	dma_set_max_seg_size(dev->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
-					     SCATTERLIST_MAX_SEGMENT));
+	dma_set_max_seg_size(dev->dev, U32_MAX);
 
 	if (dev_priv->capabilities & SVGA_CAP_GMR2) {
 		DRM_INFO("Max GMR ids is %u\n",
diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h
index 36c47e7e66a203..6f70572b2938be 100644
--- a/include/linux/scatterlist.h
+++ b/include/linux/scatterlist.h
@@ -18,12 +18,6 @@ struct scatterlist {
 #endif
 };
 
-/*
- * Since the above length field is an unsigned int, below we define the maximum
- * length in bytes that can be stored in one scatterlist entry.
- */
-#define SCATTERLIST_MAX_SEGMENT (UINT_MAX & PAGE_MASK)
-
 /*
  * These macros should be used after a dma_map_sg call has been done
  * to get bus addresses of each of the SG entries and their lengths.
diff --git a/tools/testing/scatterlist/main.c b/tools/testing/scatterlist/main.c
index b2c7e9f7b8d3dc..d264bf853034bd 100644
--- a/tools/testing/scatterlist/main.c
+++ b/tools/testing/scatterlist/main.c
@@ -50,7 +50,7 @@ static void fail(struct test *test, struct sg_table *st, const char *cond)
 
 int main(void)
 {
-	const unsigned int sgmax = SCATTERLIST_MAX_SEGMENT;
+	const unsigned int sgmax = UINT_MAX;
 	struct test *test, tests[] = {
 		{ -EINVAL, 1, pfn(0), PAGE_SIZE, PAGE_SIZE + 1, 1 },
 		{ -EINVAL, 1, pfn(0), PAGE_SIZE, 0, 1 },
-- 
2.28.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
@ 2020-10-28 19:15 ` Jason Gunthorpe
  0 siblings, 0 replies; 13+ messages in thread
From: Jason Gunthorpe @ 2020-10-28 19:15 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, dri-devel, intel-gfx, Jani Nikula,
	Joonas Lahtinen, VMware Graphics, Maarten Lankhorst,
	Maxime Ripard, Rodrigo Vivi, Christoph Hellwig,
	Roland Scheidegger, Thomas Zimmermann
  Cc: Daniel Vetter, Thomas Hellstrom, Qian Cai, Gerd Hoffmann

Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
does not have to be any special value. The new algorithm will always
create something less than what the user provides. Thus eliminate this
confusing constant.

- vmwgfx should use the HW capability, not mix in the OS page size for
  calling dma_set_max_seg_size()

- i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
  and for some open coded sgl construction. This doesn't change the value
  since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT

- drm_prime_pages_to_sg uses it as a default if max_segment is zero,
  UINT_MAX is fine to use directly.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Thomas Hellstrom <thellstrom@vmware.com>
Cc: Qian Cai <cai@lca.pw>
Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
Suggested-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
---
 drivers/gpu/drm/drm_prime.c             | 4 ++--
 drivers/gpu/drm/i915/i915_scatterlist.h | 2 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_drv.c     | 3 +--
 include/linux/scatterlist.h             | 6 ------
 tools/testing/scatterlist/main.c        | 2 +-
 5 files changed, 5 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index d6808f678db541..c3693e5e8b74b0 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -816,8 +816,8 @@ struct sg_table *drm_prime_pages_to_sg(struct drm_device *dev,
 
 	if (dev)
 		max_segment = dma_max_mapping_size(dev->dev);
-	if (max_segment == 0 || max_segment > SCATTERLIST_MAX_SEGMENT)
-		max_segment = SCATTERLIST_MAX_SEGMENT;
+	if (max_segment == 0)
+		max_segment = UINT_MAX;
 	sge = __sg_alloc_table_from_pages(sg, pages, nr_pages, 0,
 					  nr_pages << PAGE_SHIFT,
 					  max_segment,
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h b/drivers/gpu/drm/i915/i915_scatterlist.h
index b7b59328cb76ab..883dd8d09d6bf2 100644
--- a/drivers/gpu/drm/i915/i915_scatterlist.h
+++ b/drivers/gpu/drm/i915/i915_scatterlist.h
@@ -112,7 +112,7 @@ static inline unsigned int i915_sg_segment_size(void)
 	unsigned int size = swiotlb_max_segment();
 
 	if (size == 0)
-		return SCATTERLIST_MAX_SEGMENT;
+		size = UINT_MAX;
 
 	size = rounddown(size, PAGE_SIZE);
 	/* swiotlb_max_segment_size can return 1 byte when it means one page. */
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 31e3e5c9f36223..c1817f1a3006e0 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -792,8 +792,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 	if (unlikely(ret != 0))
 		goto out_err0;
 
-	dma_set_max_seg_size(dev->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
-					     SCATTERLIST_MAX_SEGMENT));
+	dma_set_max_seg_size(dev->dev, U32_MAX);
 
 	if (dev_priv->capabilities & SVGA_CAP_GMR2) {
 		DRM_INFO("Max GMR ids is %u\n",
diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h
index 36c47e7e66a203..6f70572b2938be 100644
--- a/include/linux/scatterlist.h
+++ b/include/linux/scatterlist.h
@@ -18,12 +18,6 @@ struct scatterlist {
 #endif
 };
 
-/*
- * Since the above length field is an unsigned int, below we define the maximum
- * length in bytes that can be stored in one scatterlist entry.
- */
-#define SCATTERLIST_MAX_SEGMENT (UINT_MAX & PAGE_MASK)
-
 /*
  * These macros should be used after a dma_map_sg call has been done
  * to get bus addresses of each of the SG entries and their lengths.
diff --git a/tools/testing/scatterlist/main.c b/tools/testing/scatterlist/main.c
index b2c7e9f7b8d3dc..d264bf853034bd 100644
--- a/tools/testing/scatterlist/main.c
+++ b/tools/testing/scatterlist/main.c
@@ -50,7 +50,7 @@ static void fail(struct test *test, struct sg_table *st, const char *cond)
 
 int main(void)
 {
-	const unsigned int sgmax = SCATTERLIST_MAX_SEGMENT;
+	const unsigned int sgmax = UINT_MAX;
 	struct test *test, tests[] = {
 		{ -EINVAL, 1, pfn(0), PAGE_SIZE, PAGE_SIZE + 1, 1 },
 		{ -EINVAL, 1, pfn(0), PAGE_SIZE, 0, 1 },
-- 
2.28.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* Re: [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
  2020-10-28 19:15 ` [Intel-gfx] " Jason Gunthorpe
@ 2020-10-28 19:49   ` Daniel Vetter
  -1 siblings, 0 replies; 13+ messages in thread
From: Daniel Vetter @ 2020-10-28 19:49 UTC (permalink / raw)
  To: Jason Gunthorpe
  Cc: Thomas Hellstrom, Thomas Zimmermann, Ursulin, Tvrtko,
	David Airlie, Roland Scheidegger, intel-gfx, Daniel Vetter,
	VMware Graphics, dri-devel, Rodrigo Vivi, Qian Cai,
	Christoph Hellwig, Gerd Hoffmann

On Wed, Oct 28, 2020 at 04:15:26PM -0300, Jason Gunthorpe wrote:
> Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
> PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
> does not have to be any special value. The new algorithm will always
> create something less than what the user provides. Thus eliminate this
> confusing constant.
> 
> - vmwgfx should use the HW capability, not mix in the OS page size for
>   calling dma_set_max_seg_size()
> 
> - i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
>   and for some open coded sgl construction. This doesn't change the value
>   since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT
> 
> - drm_prime_pages_to_sg uses it as a default if max_segment is zero,
>   UINT_MAX is fine to use directly.
> 
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Thomas Hellstrom <thellstrom@vmware.com>
> Cc: Qian Cai <cai@lca.pw>
> Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
> Suggested-by: Christoph Hellwig <hch@lst.de>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

lgtm. Do you want to push this through some other queue, or should I put
this into drm trees? Prefer 5.10 or 5.11?

If you want to merge this Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Daniel

> ---
>  drivers/gpu/drm/drm_prime.c             | 4 ++--
>  drivers/gpu/drm/i915/i915_scatterlist.h | 2 +-
>  drivers/gpu/drm/vmwgfx/vmwgfx_drv.c     | 3 +--
>  include/linux/scatterlist.h             | 6 ------
>  tools/testing/scatterlist/main.c        | 2 +-
>  5 files changed, 5 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
> index d6808f678db541..c3693e5e8b74b0 100644
> --- a/drivers/gpu/drm/drm_prime.c
> +++ b/drivers/gpu/drm/drm_prime.c
> @@ -816,8 +816,8 @@ struct sg_table *drm_prime_pages_to_sg(struct drm_device *dev,
>  
>  	if (dev)
>  		max_segment = dma_max_mapping_size(dev->dev);
> -	if (max_segment == 0 || max_segment > SCATTERLIST_MAX_SEGMENT)
> -		max_segment = SCATTERLIST_MAX_SEGMENT;
> +	if (max_segment == 0)
> +		max_segment = UINT_MAX;
>  	sge = __sg_alloc_table_from_pages(sg, pages, nr_pages, 0,
>  					  nr_pages << PAGE_SHIFT,
>  					  max_segment,
> diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h b/drivers/gpu/drm/i915/i915_scatterlist.h
> index b7b59328cb76ab..883dd8d09d6bf2 100644
> --- a/drivers/gpu/drm/i915/i915_scatterlist.h
> +++ b/drivers/gpu/drm/i915/i915_scatterlist.h
> @@ -112,7 +112,7 @@ static inline unsigned int i915_sg_segment_size(void)
>  	unsigned int size = swiotlb_max_segment();
>  
>  	if (size == 0)
> -		return SCATTERLIST_MAX_SEGMENT;
> +		size = UINT_MAX;
>  
>  	size = rounddown(size, PAGE_SIZE);
>  	/* swiotlb_max_segment_size can return 1 byte when it means one page. */
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> index 31e3e5c9f36223..c1817f1a3006e0 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> @@ -792,8 +792,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
>  	if (unlikely(ret != 0))
>  		goto out_err0;
>  
> -	dma_set_max_seg_size(dev->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
> -					     SCATTERLIST_MAX_SEGMENT));
> +	dma_set_max_seg_size(dev->dev, U32_MAX);
>  
>  	if (dev_priv->capabilities & SVGA_CAP_GMR2) {
>  		DRM_INFO("Max GMR ids is %u\n",
> diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h
> index 36c47e7e66a203..6f70572b2938be 100644
> --- a/include/linux/scatterlist.h
> +++ b/include/linux/scatterlist.h
> @@ -18,12 +18,6 @@ struct scatterlist {
>  #endif
>  };
>  
> -/*
> - * Since the above length field is an unsigned int, below we define the maximum
> - * length in bytes that can be stored in one scatterlist entry.
> - */
> -#define SCATTERLIST_MAX_SEGMENT (UINT_MAX & PAGE_MASK)
> -
>  /*
>   * These macros should be used after a dma_map_sg call has been done
>   * to get bus addresses of each of the SG entries and their lengths.
> diff --git a/tools/testing/scatterlist/main.c b/tools/testing/scatterlist/main.c
> index b2c7e9f7b8d3dc..d264bf853034bd 100644
> --- a/tools/testing/scatterlist/main.c
> +++ b/tools/testing/scatterlist/main.c
> @@ -50,7 +50,7 @@ static void fail(struct test *test, struct sg_table *st, const char *cond)
>  
>  int main(void)
>  {
> -	const unsigned int sgmax = SCATTERLIST_MAX_SEGMENT;
> +	const unsigned int sgmax = UINT_MAX;
>  	struct test *test, tests[] = {
>  		{ -EINVAL, 1, pfn(0), PAGE_SIZE, PAGE_SIZE + 1, 1 },
>  		{ -EINVAL, 1, pfn(0), PAGE_SIZE, 0, 1 },
> -- 
> 2.28.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
@ 2020-10-28 19:49   ` Daniel Vetter
  0 siblings, 0 replies; 13+ messages in thread
From: Daniel Vetter @ 2020-10-28 19:49 UTC (permalink / raw)
  To: Jason Gunthorpe
  Cc: Maxime Ripard, Thomas Hellstrom, Thomas Zimmermann, David Airlie,
	Roland Scheidegger, intel-gfx, Daniel Vetter, VMware Graphics,
	dri-devel, Qian Cai, Christoph Hellwig, Gerd Hoffmann

On Wed, Oct 28, 2020 at 04:15:26PM -0300, Jason Gunthorpe wrote:
> Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
> PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
> does not have to be any special value. The new algorithm will always
> create something less than what the user provides. Thus eliminate this
> confusing constant.
> 
> - vmwgfx should use the HW capability, not mix in the OS page size for
>   calling dma_set_max_seg_size()
> 
> - i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
>   and for some open coded sgl construction. This doesn't change the value
>   since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT
> 
> - drm_prime_pages_to_sg uses it as a default if max_segment is zero,
>   UINT_MAX is fine to use directly.
> 
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Thomas Hellstrom <thellstrom@vmware.com>
> Cc: Qian Cai <cai@lca.pw>
> Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
> Suggested-by: Christoph Hellwig <hch@lst.de>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

lgtm. Do you want to push this through some other queue, or should I put
this into drm trees? Prefer 5.10 or 5.11?

If you want to merge this Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Daniel

> ---
>  drivers/gpu/drm/drm_prime.c             | 4 ++--
>  drivers/gpu/drm/i915/i915_scatterlist.h | 2 +-
>  drivers/gpu/drm/vmwgfx/vmwgfx_drv.c     | 3 +--
>  include/linux/scatterlist.h             | 6 ------
>  tools/testing/scatterlist/main.c        | 2 +-
>  5 files changed, 5 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
> index d6808f678db541..c3693e5e8b74b0 100644
> --- a/drivers/gpu/drm/drm_prime.c
> +++ b/drivers/gpu/drm/drm_prime.c
> @@ -816,8 +816,8 @@ struct sg_table *drm_prime_pages_to_sg(struct drm_device *dev,
>  
>  	if (dev)
>  		max_segment = dma_max_mapping_size(dev->dev);
> -	if (max_segment == 0 || max_segment > SCATTERLIST_MAX_SEGMENT)
> -		max_segment = SCATTERLIST_MAX_SEGMENT;
> +	if (max_segment == 0)
> +		max_segment = UINT_MAX;
>  	sge = __sg_alloc_table_from_pages(sg, pages, nr_pages, 0,
>  					  nr_pages << PAGE_SHIFT,
>  					  max_segment,
> diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h b/drivers/gpu/drm/i915/i915_scatterlist.h
> index b7b59328cb76ab..883dd8d09d6bf2 100644
> --- a/drivers/gpu/drm/i915/i915_scatterlist.h
> +++ b/drivers/gpu/drm/i915/i915_scatterlist.h
> @@ -112,7 +112,7 @@ static inline unsigned int i915_sg_segment_size(void)
>  	unsigned int size = swiotlb_max_segment();
>  
>  	if (size == 0)
> -		return SCATTERLIST_MAX_SEGMENT;
> +		size = UINT_MAX;
>  
>  	size = rounddown(size, PAGE_SIZE);
>  	/* swiotlb_max_segment_size can return 1 byte when it means one page. */
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> index 31e3e5c9f36223..c1817f1a3006e0 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> @@ -792,8 +792,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
>  	if (unlikely(ret != 0))
>  		goto out_err0;
>  
> -	dma_set_max_seg_size(dev->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
> -					     SCATTERLIST_MAX_SEGMENT));
> +	dma_set_max_seg_size(dev->dev, U32_MAX);
>  
>  	if (dev_priv->capabilities & SVGA_CAP_GMR2) {
>  		DRM_INFO("Max GMR ids is %u\n",
> diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h
> index 36c47e7e66a203..6f70572b2938be 100644
> --- a/include/linux/scatterlist.h
> +++ b/include/linux/scatterlist.h
> @@ -18,12 +18,6 @@ struct scatterlist {
>  #endif
>  };
>  
> -/*
> - * Since the above length field is an unsigned int, below we define the maximum
> - * length in bytes that can be stored in one scatterlist entry.
> - */
> -#define SCATTERLIST_MAX_SEGMENT (UINT_MAX & PAGE_MASK)
> -
>  /*
>   * These macros should be used after a dma_map_sg call has been done
>   * to get bus addresses of each of the SG entries and their lengths.
> diff --git a/tools/testing/scatterlist/main.c b/tools/testing/scatterlist/main.c
> index b2c7e9f7b8d3dc..d264bf853034bd 100644
> --- a/tools/testing/scatterlist/main.c
> +++ b/tools/testing/scatterlist/main.c
> @@ -50,7 +50,7 @@ static void fail(struct test *test, struct sg_table *st, const char *cond)
>  
>  int main(void)
>  {
> -	const unsigned int sgmax = SCATTERLIST_MAX_SEGMENT;
> +	const unsigned int sgmax = UINT_MAX;
>  	struct test *test, tests[] = {
>  		{ -EINVAL, 1, pfn(0), PAGE_SIZE, PAGE_SIZE + 1, 1 },
>  		{ -EINVAL, 1, pfn(0), PAGE_SIZE, 0, 1 },
> -- 
> 2.28.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Remove SCATTERLIST_MAX_SEGMENT
  2020-10-28 19:15 ` [Intel-gfx] " Jason Gunthorpe
  (?)
  (?)
@ 2020-10-29 17:02 ` Patchwork
  -1 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2020-10-29 17:02 UTC (permalink / raw)
  To: Jason Gunthorpe; +Cc: intel-gfx

== Series Details ==

Series: drm: Remove SCATTERLIST_MAX_SEGMENT
URL   : https://patchwork.freedesktop.org/series/83203/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
66f5f63cc749 drm: Remove SCATTERLIST_MAX_SEGMENT
-:101: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address mismatch: 'From: Jason Gunthorpe <jgg@ziepe.ca>' != 'Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>'

total: 0 errors, 1 warnings, 0 checks, 47 lines checked


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm: Remove SCATTERLIST_MAX_SEGMENT
  2020-10-28 19:15 ` [Intel-gfx] " Jason Gunthorpe
                   ` (2 preceding siblings ...)
  (?)
@ 2020-10-29 17:31 ` Patchwork
  -1 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2020-10-29 17:31 UTC (permalink / raw)
  To: Jason Gunthorpe; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 6067 bytes --]

== Series Details ==

Series: drm: Remove SCATTERLIST_MAX_SEGMENT
URL   : https://patchwork.freedesktop.org/series/83203/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9220 -> Patchwork_18807
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/index.html

New tests
---------

  New tests have been introduced between CI_DRM_9220 and Patchwork_18807:

### New CI tests (1) ###

  * boot:
    - Statuses : 41 pass(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_18807 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_flink_basic@flink-lifetime:
    - fi-tgl-y:           [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +2 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-tgl-y/igt@gem_flink_basic@flink-lifetime.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-tgl-y/igt@gem_flink_basic@flink-lifetime.html

  * igt@i915_module_load@reload:
    - fi-byt-j1900:       [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-byt-j1900/igt@i915_module_load@reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-byt-j1900/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-bsw-kefka:       [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@kms_busy@basic@flip:
    - fi-tgl-y:           [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-tgl-y/igt@kms_busy@basic@flip.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-tgl-y/igt@kms_busy@basic@flip.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-kbl-7500u:       [PASS][9] -> [DMESG-WARN][10] ([i915#2203])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html

  * igt@vgem_basic@unload:
    - fi-skl-guc:         [PASS][11] -> [DMESG-WARN][12] ([i915#2203])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-skl-guc/igt@vgem_basic@unload.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-skl-guc/igt@vgem_basic@unload.html

  
#### Possible fixes ####

  * igt@i915_hangman@error-state-basic:
    - fi-tgl-y:           [DMESG-WARN][13] ([i915#402]) -> [PASS][14] +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-tgl-y/igt@i915_hangman@error-state-basic.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-tgl-y/igt@i915_hangman@error-state-basic.html

  * igt@i915_selftest@live@gt_pm:
    - {fi-kbl-7560u}:     [DMESG-FAIL][15] ([i915#2524]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-kbl-7560u/igt@i915_selftest@live@gt_pm.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-kbl-7560u/igt@i915_selftest@live@gt_pm.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-kbl-7500u:       [DMESG-WARN][17] ([i915#1982]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
    - fi-icl-u2:          [DMESG-WARN][19] ([i915#1982]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-a:
    - fi-tgl-y:           [DMESG-WARN][21] ([i915#1982]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-tgl-y/igt@kms_pipe_crc_basic@read-crc-pipe-a.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-tgl-y/igt@kms_pipe_crc_basic@read-crc-pipe-a.html

  
#### Warnings ####

  * igt@core_hotunplug@unbind-rebind:
    - fi-icl-u2:          [DMESG-WARN][23] ([i915#289]) -> [DMESG-WARN][24] ([i915#1982] / [i915#289])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/fi-icl-u2/igt@core_hotunplug@unbind-rebind.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/fi-icl-u2/igt@core_hotunplug@unbind-rebind.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
  [i915#2524]: https://gitlab.freedesktop.org/drm/intel/issues/2524
  [i915#289]: https://gitlab.freedesktop.org/drm/intel/issues/289
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402


Participating hosts (42 -> 41)
------------------------------

  Missing    (1): fi-bsw-cyan 


Build changes
-------------

  * Linux: CI_DRM_9220 -> Patchwork_18807

  CI-20190529: 20190529
  CI_DRM_9220: e7f237a791834671ed85395734fb33bbca8ef7b1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5828: db972bdaab8ada43b742bc9621bb0fc9d56a6fc6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18807: 66f5f63cc7495d4b9f63df6f5fb5c4363a57f416 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

66f5f63cc749 drm: Remove SCATTERLIST_MAX_SEGMENT

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/index.html

[-- Attachment #1.2: Type: text/html, Size: 7606 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
  2020-10-28 19:49   ` [Intel-gfx] " Daniel Vetter
@ 2020-10-29 18:20     ` Jason Gunthorpe
  -1 siblings, 0 replies; 13+ messages in thread
From: Jason Gunthorpe @ 2020-10-29 18:20 UTC (permalink / raw)
  To: Daniel Vetter
  Cc: Thomas Hellstrom, Ursulin, Tvrtko, David Airlie,
	Roland Scheidegger, intel-gfx, Daniel Vetter, VMware Graphics,
	dri-devel, Thomas Zimmermann, Rodrigo Vivi, Qian Cai,
	Christoph Hellwig, Gerd Hoffmann

On Wed, Oct 28, 2020 at 08:49:11PM +0100, Daniel Vetter wrote:
> On Wed, Oct 28, 2020 at 04:15:26PM -0300, Jason Gunthorpe wrote:
> > Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
> > PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
> > does not have to be any special value. The new algorithm will always
> > create something less than what the user provides. Thus eliminate this
> > confusing constant.
> > 
> > - vmwgfx should use the HW capability, not mix in the OS page size for
> >   calling dma_set_max_seg_size()
> > 
> > - i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
> >   and for some open coded sgl construction. This doesn't change the value
> >   since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT
> > 
> > - drm_prime_pages_to_sg uses it as a default if max_segment is zero,
> >   UINT_MAX is fine to use directly.
> > 
> > Cc: Gerd Hoffmann <kraxel@redhat.com>
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > Cc: Thomas Hellstrom <thellstrom@vmware.com>
> > Cc: Qian Cai <cai@lca.pw>
> > Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
> > Suggested-by: Christoph Hellwig <hch@lst.de>
> > Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> 
> lgtm. Do you want to push this through some other queue, or should I put
> this into drm trees? Prefer 5.10 or 5.11?

I think DRM tree is best

Thanks,
Jason
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
@ 2020-10-29 18:20     ` Jason Gunthorpe
  0 siblings, 0 replies; 13+ messages in thread
From: Jason Gunthorpe @ 2020-10-29 18:20 UTC (permalink / raw)
  To: Daniel Vetter
  Cc: Maxime Ripard, Thomas Hellstrom, David Airlie,
	Roland Scheidegger, intel-gfx, Daniel Vetter, VMware Graphics,
	dri-devel, Thomas Zimmermann, Qian Cai, Christoph Hellwig,
	Gerd Hoffmann

On Wed, Oct 28, 2020 at 08:49:11PM +0100, Daniel Vetter wrote:
> On Wed, Oct 28, 2020 at 04:15:26PM -0300, Jason Gunthorpe wrote:
> > Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
> > PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
> > does not have to be any special value. The new algorithm will always
> > create something less than what the user provides. Thus eliminate this
> > confusing constant.
> > 
> > - vmwgfx should use the HW capability, not mix in the OS page size for
> >   calling dma_set_max_seg_size()
> > 
> > - i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
> >   and for some open coded sgl construction. This doesn't change the value
> >   since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT
> > 
> > - drm_prime_pages_to_sg uses it as a default if max_segment is zero,
> >   UINT_MAX is fine to use directly.
> > 
> > Cc: Gerd Hoffmann <kraxel@redhat.com>
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > Cc: Thomas Hellstrom <thellstrom@vmware.com>
> > Cc: Qian Cai <cai@lca.pw>
> > Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
> > Suggested-by: Christoph Hellwig <hch@lst.de>
> > Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> 
> lgtm. Do you want to push this through some other queue, or should I put
> this into drm trees? Prefer 5.10 or 5.11?

I think DRM tree is best

Thanks,
Jason
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
  2020-10-29 18:20     ` [Intel-gfx] " Jason Gunthorpe
@ 2020-10-29 18:29       ` Daniel Vetter
  -1 siblings, 0 replies; 13+ messages in thread
From: Daniel Vetter @ 2020-10-29 18:29 UTC (permalink / raw)
  To: Jason Gunthorpe
  Cc: Thomas Hellstrom, Ursulin, Tvrtko, David Airlie,
	Roland Scheidegger, intel-gfx, VMware Graphics, dri-devel,
	Thomas Zimmermann, Rodrigo Vivi, Qian Cai, Christoph Hellwig,
	Gerd Hoffmann

On Thu, Oct 29, 2020 at 7:20 PM Jason Gunthorpe <jgg@nvidia.com> wrote:
>
> On Wed, Oct 28, 2020 at 08:49:11PM +0100, Daniel Vetter wrote:
> > On Wed, Oct 28, 2020 at 04:15:26PM -0300, Jason Gunthorpe wrote:
> > > Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
> > > PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
> > > does not have to be any special value. The new algorithm will always
> > > create something less than what the user provides. Thus eliminate this
> > > confusing constant.
> > >
> > > - vmwgfx should use the HW capability, not mix in the OS page size for
> > >   calling dma_set_max_seg_size()
> > >
> > > - i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
> > >   and for some open coded sgl construction. This doesn't change the value
> > >   since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT
> > >
> > > - drm_prime_pages_to_sg uses it as a default if max_segment is zero,
> > >   UINT_MAX is fine to use directly.
> > >
> > > Cc: Gerd Hoffmann <kraxel@redhat.com>
> > > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > > Cc: Thomas Hellstrom <thellstrom@vmware.com>
> > > Cc: Qian Cai <cai@lca.pw>
> > > Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
> > > Suggested-by: Christoph Hellwig <hch@lst.de>
> > > Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> >
> > lgtm. Do you want to push this through some other queue, or should I put
> > this into drm trees? Prefer 5.10 or 5.11?
>
> I think DRM tree is best

Ok, I'll try to remember and apply this to -next after -rc2. -rc1 is
supremely busted for us, I want to wait with pulling the merge window
into the -next pile until that's settled. Please ping if your patch
isn't in linux-next within a week in case I forget.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
@ 2020-10-29 18:29       ` Daniel Vetter
  0 siblings, 0 replies; 13+ messages in thread
From: Daniel Vetter @ 2020-10-29 18:29 UTC (permalink / raw)
  To: Jason Gunthorpe
  Cc: Maxime Ripard, Thomas Hellstrom, David Airlie,
	Roland Scheidegger, intel-gfx, VMware Graphics, dri-devel,
	Thomas Zimmermann, Qian Cai, Christoph Hellwig, Gerd Hoffmann

On Thu, Oct 29, 2020 at 7:20 PM Jason Gunthorpe <jgg@nvidia.com> wrote:
>
> On Wed, Oct 28, 2020 at 08:49:11PM +0100, Daniel Vetter wrote:
> > On Wed, Oct 28, 2020 at 04:15:26PM -0300, Jason Gunthorpe wrote:
> > > Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
> > > PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
> > > does not have to be any special value. The new algorithm will always
> > > create something less than what the user provides. Thus eliminate this
> > > confusing constant.
> > >
> > > - vmwgfx should use the HW capability, not mix in the OS page size for
> > >   calling dma_set_max_seg_size()
> > >
> > > - i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
> > >   and for some open coded sgl construction. This doesn't change the value
> > >   since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT
> > >
> > > - drm_prime_pages_to_sg uses it as a default if max_segment is zero,
> > >   UINT_MAX is fine to use directly.
> > >
> > > Cc: Gerd Hoffmann <kraxel@redhat.com>
> > > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > > Cc: Thomas Hellstrom <thellstrom@vmware.com>
> > > Cc: Qian Cai <cai@lca.pw>
> > > Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
> > > Suggested-by: Christoph Hellwig <hch@lst.de>
> > > Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> >
> > lgtm. Do you want to push this through some other queue, or should I put
> > this into drm trees? Prefer 5.10 or 5.11?
>
> I think DRM tree is best

Ok, I'll try to remember and apply this to -next after -rc2. -rc1 is
supremely busted for us, I want to wait with pulling the merge window
into the -next pile until that's settled. Please ping if your patch
isn't in linux-next within a week in case I forget.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Remove SCATTERLIST_MAX_SEGMENT
  2020-10-28 19:15 ` [Intel-gfx] " Jason Gunthorpe
                   ` (3 preceding siblings ...)
  (?)
@ 2020-10-29 21:31 ` Patchwork
  -1 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2020-10-29 21:31 UTC (permalink / raw)
  To: Jason Gunthorpe; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 19255 bytes --]

== Series Details ==

Series: drm: Remove SCATTERLIST_MAX_SEGMENT
URL   : https://patchwork.freedesktop.org/series/83203/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9220_full -> Patchwork_18807_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_18807_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_18807_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18807_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@gt_heartbeat:
    - shard-glk:          [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-glk5/igt@i915_selftest@live@gt_heartbeat.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-glk7/igt@i915_selftest@live@gt_heartbeat.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile}:
    - shard-skl:          NOTRUN -> [FAIL][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile.html

  
New tests
---------

  New tests have been introduced between CI_DRM_9220_full and Patchwork_18807_full:

### New CI tests (1) ###

  * boot:
    - Statuses : 174 pass(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_18807_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_blits@basic:
    - shard-glk:          [PASS][4] -> [DMESG-WARN][5] ([i915#118] / [i915#95])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-glk3/igt@gem_blits@basic.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-glk4/igt@gem_blits@basic.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglb:         [PASS][6] -> [SKIP][7] ([i915#2190])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-tglb2/igt@gem_huc_copy@huc-copy.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-tglb6/igt@gem_huc_copy@huc-copy.html

  * igt@i915_pm_rpm@fences-dpms:
    - shard-kbl:          [PASS][8] -> [DMESG-WARN][9] ([i915#1982]) +1 similar issue
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-kbl2/igt@i915_pm_rpm@fences-dpms.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-kbl6/igt@i915_pm_rpm@fences-dpms.html

  * igt@kms_cursor_crc@pipe-c-cursor-64x64-sliding:
    - shard-skl:          [PASS][10] -> [FAIL][11] ([i915#54]) +2 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl2/igt@kms_cursor_crc@pipe-c-cursor-64x64-sliding.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-64x64-sliding.html

  * igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge:
    - shard-tglb:         [PASS][12] -> [DMESG-WARN][13] ([i915#1982]) +2 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-tglb6/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-tglb8/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
    - shard-apl:          [PASS][14] -> [DMESG-WARN][15] ([i915#1635] / [i915#1982]) +2 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-apl4/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-apl7/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
    - shard-glk:          [PASS][16] -> [DMESG-WARN][17] ([i915#1982]) +2 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-glk4/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-glk5/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1:
    - shard-apl:          [PASS][18] -> [FAIL][19] ([i915#1635] / [i915#79])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-apl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-apl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-skl:          [PASS][20] -> [DMESG-FAIL][21] ([i915#1982])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-skl:          [PASS][22] -> [FAIL][23] ([i915#79])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
    - shard-glk:          [PASS][24] -> [FAIL][25] ([i915#79])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-glk8/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-glk9/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html

  * igt@kms_flip@flip-vs-panning-interruptible@a-edp1:
    - shard-skl:          [PASS][26] -> [DMESG-WARN][27] ([i915#1982]) +8 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl9/igt@kms_flip@flip-vs-panning-interruptible@a-edp1.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl6/igt@kms_flip@flip-vs-panning-interruptible@a-edp1.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-skl:          [PASS][28] -> [FAIL][29] ([i915#1188])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl7/igt@kms_hdr@bpc-switch-suspend.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl7/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
    - shard-skl:          [PASS][30] -> [FAIL][31] ([i915#1036])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][32] -> [FAIL][33] ([fdo#108145] / [i915#265]) +1 similar issue
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [PASS][34] -> [SKIP][35] ([fdo#109441]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@sysfs_heartbeat_interval@mixed@bcs0:
    - shard-skl:          [PASS][36] -> [FAIL][37] ([i915#1731])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl4/igt@sysfs_heartbeat_interval@mixed@bcs0.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl2/igt@sysfs_heartbeat_interval@mixed@bcs0.html

  
#### Possible fixes ####

  * igt@core_hotunplug@hotrebind-lateclose:
    - shard-snb:          [INCOMPLETE][38] ([i915#82]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-snb6/igt@core_hotunplug@hotrebind-lateclose.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-snb5/igt@core_hotunplug@hotrebind-lateclose.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-skl:          [INCOMPLETE][40] ([i915#198]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl10/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl9/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_eio@suspend:
    - shard-iclb:         [INCOMPLETE][42] ([i915#1185] / [i915#2483]) -> [PASS][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-iclb3/igt@gem_eio@suspend.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-iclb7/igt@gem_eio@suspend.html

  * igt@gem_madvise@dontneed-before-mmap:
    - shard-iclb:         [DMESG-WARN][44] ([i915#1982]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-iclb5/igt@gem_madvise@dontneed-before-mmap.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-iclb5/igt@gem_madvise@dontneed-before-mmap.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [DMESG-WARN][46] ([i915#1436] / [i915#716]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl9/igt@gen9_exec_parse@allowed-single.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl6/igt@gen9_exec_parse@allowed-single.html

  * {igt@kms_async_flips@alternate-sync-async-flip}:
    - shard-apl:          [DMESG-WARN][48] ([i915#1635] / [i915#1982]) -> [PASS][49]
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-apl6/igt@kms_async_flips@alternate-sync-async-flip.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-apl2/igt@kms_async_flips@alternate-sync-async-flip.html

  * {igt@kms_async_flips@async-flip-with-page-flip-events}:
    - shard-kbl:          [FAIL][50] ([i915#2521]) -> [PASS][51]
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-kbl7/igt@kms_async_flips@async-flip-with-page-flip-events.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-kbl2/igt@kms_async_flips@async-flip-with-page-flip-events.html
    - shard-tglb:         [FAIL][52] ([i915#2521]) -> [PASS][53]
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-tglb1/igt@kms_async_flips@async-flip-with-page-flip-events.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-tglb7/igt@kms_async_flips@async-flip-with-page-flip-events.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-180:
    - shard-glk:          [INCOMPLETE][54] -> [PASS][55]
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-glk7/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-glk9/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html

  * igt@kms_cursor_crc@pipe-b-cursor-128x128-random:
    - shard-skl:          [FAIL][56] ([i915#54]) -> [PASS][57] +3 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-128x128-random.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-128x128-random.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-glk:          [FAIL][58] ([i915#72]) -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-glk1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-tglb:         [FAIL][60] ([i915#2346]) -> [PASS][61]
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-tglb6/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-tglb8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
    - shard-skl:          [FAIL][62] ([i915#2346]) -> [PASS][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@short-flip-before-cursor-toggle:
    - shard-glk:          [DMESG-WARN][64] ([i915#1982]) -> [PASS][65] +1 similar issue
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-glk1/igt@kms_cursor_legacy@short-flip-before-cursor-toggle.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-glk8/igt@kms_cursor_legacy@short-flip-before-cursor-toggle.html

  * igt@kms_flip@flip-vs-suspend-interruptible@b-vga1:
    - shard-snb:          [DMESG-WARN][66] ([i915#42]) -> [PASS][67]
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-snb2/igt@kms_flip@flip-vs-suspend-interruptible@b-vga1.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-snb5/igt@kms_flip@flip-vs-suspend-interruptible@b-vga1.html

  * igt@kms_hdr@bpc-switch:
    - shard-skl:          [FAIL][68] ([i915#1188]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl9/igt@kms_hdr@bpc-switch.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl1/igt@kms_hdr@bpc-switch.html

  * igt@kms_plane_cursor@pipe-a-overlay-size-256:
    - shard-skl:          [DMESG-WARN][70] ([i915#1982]) -> [PASS][71] +4 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl3/igt@kms_plane_cursor@pipe-a-overlay-size-256.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl2/igt@kms_plane_cursor@pipe-a-overlay-size-256.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [SKIP][72] ([fdo#109441]) -> [PASS][73] +1 similar issue
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-iclb8/igt@kms_psr@psr2_sprite_blt.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html

  * igt@sysfs_timeslice_duration@timeout@bcs0:
    - shard-skl:          [FAIL][74] ([i915#1732]) -> [PASS][75]
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl3/igt@sysfs_timeslice_duration@timeout@bcs0.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl4/igt@sysfs_timeslice_duration@timeout@bcs0.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [DMESG-WARN][76] ([i915#1982]) -> [DMESG-FAIL][77] ([i915#1982])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-skl:          [INCOMPLETE][78] ([i915#198]) -> [DMESG-WARN][79] ([i915#1982])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl1/igt@kms_fbcon_fbt@psr-suspend.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl3/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_setmode@basic:
    - shard-skl:          [FAIL][80] ([i915#31]) -> [DMESG-WARN][81] ([i915#1982])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl9/igt@kms_setmode@basic.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl6/igt@kms_setmode@basic.html

  * igt@runner@aborted:
    - shard-skl:          [FAIL][82] ([i915#1436]) -> [FAIL][83] ([i915#1611] / [i915#1814] / [i915#2029])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9220/shard-skl9/igt@runner@aborted.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/shard-skl3/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [i915#1036]: https://gitlab.freedesktop.org/drm/intel/issues/1036
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1185]: https://gitlab.freedesktop.org/drm/intel/issues/1185
  [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1611]: https://gitlab.freedesktop.org/drm/intel/issues/1611
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#1731]: https://gitlab.freedesktop.org/drm/intel/issues/1731
  [i915#1732]: https://gitlab.freedesktop.org/drm/intel/issues/1732
  [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2483]: https://gitlab.freedesktop.org/drm/intel/issues/2483
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#42]: https://gitlab.freedesktop.org/drm/intel/issues/42
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_9220 -> Patchwork_18807

  CI-20190529: 20190529
  CI_DRM_9220: e7f237a791834671ed85395734fb33bbca8ef7b1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5828: db972bdaab8ada43b742bc9621bb0fc9d56a6fc6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18807: 66f5f63cc7495d4b9f63df6f5fb5c4363a57f416 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18807/index.html

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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
  2020-10-28 19:15 ` [Intel-gfx] " Jason Gunthorpe
@ 2020-11-02 14:49   ` Daniel Vetter
  -1 siblings, 0 replies; 13+ messages in thread
From: Daniel Vetter @ 2020-11-02 14:49 UTC (permalink / raw)
  To: Jason Gunthorpe
  Cc: Thomas Hellstrom, Thomas Zimmermann, Ursulin, Tvrtko,
	David Airlie, Roland Scheidegger, intel-gfx, Daniel Vetter,
	VMware Graphics, dri-devel, Rodrigo Vivi, Qian Cai,
	Christoph Hellwig, Gerd Hoffmann

On Wed, Oct 28, 2020 at 04:15:26PM -0300, Jason Gunthorpe wrote:
> Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
> PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
> does not have to be any special value. The new algorithm will always
> create something less than what the user provides. Thus eliminate this
> confusing constant.
> 
> - vmwgfx should use the HW capability, not mix in the OS page size for
>   calling dma_set_max_seg_size()
> 
> - i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
>   and for some open coded sgl construction. This doesn't change the value
>   since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT
> 
> - drm_prime_pages_to_sg uses it as a default if max_segment is zero,
>   UINT_MAX is fine to use directly.
> 
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Thomas Hellstrom <thellstrom@vmware.com>
> Cc: Qian Cai <cai@lca.pw>
> Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
> Suggested-by: Christoph Hellwig <hch@lst.de>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

Merged to drm-misc-next, thanks for your patch.
-Daniel

> ---
>  drivers/gpu/drm/drm_prime.c             | 4 ++--
>  drivers/gpu/drm/i915/i915_scatterlist.h | 2 +-
>  drivers/gpu/drm/vmwgfx/vmwgfx_drv.c     | 3 +--
>  include/linux/scatterlist.h             | 6 ------
>  tools/testing/scatterlist/main.c        | 2 +-
>  5 files changed, 5 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
> index d6808f678db541..c3693e5e8b74b0 100644
> --- a/drivers/gpu/drm/drm_prime.c
> +++ b/drivers/gpu/drm/drm_prime.c
> @@ -816,8 +816,8 @@ struct sg_table *drm_prime_pages_to_sg(struct drm_device *dev,
>  
>  	if (dev)
>  		max_segment = dma_max_mapping_size(dev->dev);
> -	if (max_segment == 0 || max_segment > SCATTERLIST_MAX_SEGMENT)
> -		max_segment = SCATTERLIST_MAX_SEGMENT;
> +	if (max_segment == 0)
> +		max_segment = UINT_MAX;
>  	sge = __sg_alloc_table_from_pages(sg, pages, nr_pages, 0,
>  					  nr_pages << PAGE_SHIFT,
>  					  max_segment,
> diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h b/drivers/gpu/drm/i915/i915_scatterlist.h
> index b7b59328cb76ab..883dd8d09d6bf2 100644
> --- a/drivers/gpu/drm/i915/i915_scatterlist.h
> +++ b/drivers/gpu/drm/i915/i915_scatterlist.h
> @@ -112,7 +112,7 @@ static inline unsigned int i915_sg_segment_size(void)
>  	unsigned int size = swiotlb_max_segment();
>  
>  	if (size == 0)
> -		return SCATTERLIST_MAX_SEGMENT;
> +		size = UINT_MAX;
>  
>  	size = rounddown(size, PAGE_SIZE);
>  	/* swiotlb_max_segment_size can return 1 byte when it means one page. */
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> index 31e3e5c9f36223..c1817f1a3006e0 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> @@ -792,8 +792,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
>  	if (unlikely(ret != 0))
>  		goto out_err0;
>  
> -	dma_set_max_seg_size(dev->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
> -					     SCATTERLIST_MAX_SEGMENT));
> +	dma_set_max_seg_size(dev->dev, U32_MAX);
>  
>  	if (dev_priv->capabilities & SVGA_CAP_GMR2) {
>  		DRM_INFO("Max GMR ids is %u\n",
> diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h
> index 36c47e7e66a203..6f70572b2938be 100644
> --- a/include/linux/scatterlist.h
> +++ b/include/linux/scatterlist.h
> @@ -18,12 +18,6 @@ struct scatterlist {
>  #endif
>  };
>  
> -/*
> - * Since the above length field is an unsigned int, below we define the maximum
> - * length in bytes that can be stored in one scatterlist entry.
> - */
> -#define SCATTERLIST_MAX_SEGMENT (UINT_MAX & PAGE_MASK)
> -
>  /*
>   * These macros should be used after a dma_map_sg call has been done
>   * to get bus addresses of each of the SG entries and their lengths.
> diff --git a/tools/testing/scatterlist/main.c b/tools/testing/scatterlist/main.c
> index b2c7e9f7b8d3dc..d264bf853034bd 100644
> --- a/tools/testing/scatterlist/main.c
> +++ b/tools/testing/scatterlist/main.c
> @@ -50,7 +50,7 @@ static void fail(struct test *test, struct sg_table *st, const char *cond)
>  
>  int main(void)
>  {
> -	const unsigned int sgmax = SCATTERLIST_MAX_SEGMENT;
> +	const unsigned int sgmax = UINT_MAX;
>  	struct test *test, tests[] = {
>  		{ -EINVAL, 1, pfn(0), PAGE_SIZE, PAGE_SIZE + 1, 1 },
>  		{ -EINVAL, 1, pfn(0), PAGE_SIZE, 0, 1 },
> -- 
> 2.28.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT
@ 2020-11-02 14:49   ` Daniel Vetter
  0 siblings, 0 replies; 13+ messages in thread
From: Daniel Vetter @ 2020-11-02 14:49 UTC (permalink / raw)
  To: Jason Gunthorpe
  Cc: Maxime Ripard, Thomas Hellstrom, Thomas Zimmermann, David Airlie,
	Roland Scheidegger, intel-gfx, Daniel Vetter, VMware Graphics,
	dri-devel, Qian Cai, Christoph Hellwig, Gerd Hoffmann

On Wed, Oct 28, 2020 at 04:15:26PM -0300, Jason Gunthorpe wrote:
> Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to
> PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages()
> does not have to be any special value. The new algorithm will always
> create something less than what the user provides. Thus eliminate this
> confusing constant.
> 
> - vmwgfx should use the HW capability, not mix in the OS page size for
>   calling dma_set_max_seg_size()
> 
> - i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages
>   and for some open coded sgl construction. This doesn't change the value
>   since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT
> 
> - drm_prime_pages_to_sg uses it as a default if max_segment is zero,
>   UINT_MAX is fine to use directly.
> 
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Thomas Hellstrom <thellstrom@vmware.com>
> Cc: Qian Cai <cai@lca.pw>
> Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com>
> Suggested-by: Christoph Hellwig <hch@lst.de>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

Merged to drm-misc-next, thanks for your patch.
-Daniel

> ---
>  drivers/gpu/drm/drm_prime.c             | 4 ++--
>  drivers/gpu/drm/i915/i915_scatterlist.h | 2 +-
>  drivers/gpu/drm/vmwgfx/vmwgfx_drv.c     | 3 +--
>  include/linux/scatterlist.h             | 6 ------
>  tools/testing/scatterlist/main.c        | 2 +-
>  5 files changed, 5 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
> index d6808f678db541..c3693e5e8b74b0 100644
> --- a/drivers/gpu/drm/drm_prime.c
> +++ b/drivers/gpu/drm/drm_prime.c
> @@ -816,8 +816,8 @@ struct sg_table *drm_prime_pages_to_sg(struct drm_device *dev,
>  
>  	if (dev)
>  		max_segment = dma_max_mapping_size(dev->dev);
> -	if (max_segment == 0 || max_segment > SCATTERLIST_MAX_SEGMENT)
> -		max_segment = SCATTERLIST_MAX_SEGMENT;
> +	if (max_segment == 0)
> +		max_segment = UINT_MAX;
>  	sge = __sg_alloc_table_from_pages(sg, pages, nr_pages, 0,
>  					  nr_pages << PAGE_SHIFT,
>  					  max_segment,
> diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h b/drivers/gpu/drm/i915/i915_scatterlist.h
> index b7b59328cb76ab..883dd8d09d6bf2 100644
> --- a/drivers/gpu/drm/i915/i915_scatterlist.h
> +++ b/drivers/gpu/drm/i915/i915_scatterlist.h
> @@ -112,7 +112,7 @@ static inline unsigned int i915_sg_segment_size(void)
>  	unsigned int size = swiotlb_max_segment();
>  
>  	if (size == 0)
> -		return SCATTERLIST_MAX_SEGMENT;
> +		size = UINT_MAX;
>  
>  	size = rounddown(size, PAGE_SIZE);
>  	/* swiotlb_max_segment_size can return 1 byte when it means one page. */
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> index 31e3e5c9f36223..c1817f1a3006e0 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
> @@ -792,8 +792,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
>  	if (unlikely(ret != 0))
>  		goto out_err0;
>  
> -	dma_set_max_seg_size(dev->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
> -					     SCATTERLIST_MAX_SEGMENT));
> +	dma_set_max_seg_size(dev->dev, U32_MAX);
>  
>  	if (dev_priv->capabilities & SVGA_CAP_GMR2) {
>  		DRM_INFO("Max GMR ids is %u\n",
> diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h
> index 36c47e7e66a203..6f70572b2938be 100644
> --- a/include/linux/scatterlist.h
> +++ b/include/linux/scatterlist.h
> @@ -18,12 +18,6 @@ struct scatterlist {
>  #endif
>  };
>  
> -/*
> - * Since the above length field is an unsigned int, below we define the maximum
> - * length in bytes that can be stored in one scatterlist entry.
> - */
> -#define SCATTERLIST_MAX_SEGMENT (UINT_MAX & PAGE_MASK)
> -
>  /*
>   * These macros should be used after a dma_map_sg call has been done
>   * to get bus addresses of each of the SG entries and their lengths.
> diff --git a/tools/testing/scatterlist/main.c b/tools/testing/scatterlist/main.c
> index b2c7e9f7b8d3dc..d264bf853034bd 100644
> --- a/tools/testing/scatterlist/main.c
> +++ b/tools/testing/scatterlist/main.c
> @@ -50,7 +50,7 @@ static void fail(struct test *test, struct sg_table *st, const char *cond)
>  
>  int main(void)
>  {
> -	const unsigned int sgmax = SCATTERLIST_MAX_SEGMENT;
> +	const unsigned int sgmax = UINT_MAX;
>  	struct test *test, tests[] = {
>  		{ -EINVAL, 1, pfn(0), PAGE_SIZE, PAGE_SIZE + 1, 1 },
>  		{ -EINVAL, 1, pfn(0), PAGE_SIZE, 0, 1 },
> -- 
> 2.28.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2020-11-02 14:49 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-28 19:15 [PATCH] drm: Remove SCATTERLIST_MAX_SEGMENT Jason Gunthorpe
2020-10-28 19:15 ` [Intel-gfx] " Jason Gunthorpe
2020-10-28 19:49 ` Daniel Vetter
2020-10-28 19:49   ` [Intel-gfx] " Daniel Vetter
2020-10-29 18:20   ` Jason Gunthorpe
2020-10-29 18:20     ` [Intel-gfx] " Jason Gunthorpe
2020-10-29 18:29     ` Daniel Vetter
2020-10-29 18:29       ` [Intel-gfx] " Daniel Vetter
2020-10-29 17:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2020-10-29 17:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-29 21:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-11-02 14:49 ` [PATCH] " Daniel Vetter
2020-11-02 14:49   ` [Intel-gfx] " Daniel Vetter

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