* [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series
@ 2020-11-13 22:03 Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 01/23] drm/i915: Copy the plane hw state directly for Y planes Ville Syrjala
` (26 more replies)
0 siblings, 27 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
This should have everything we need to enable bigjoiner.
Got rid of the plane linking stuff, and fixed bunch of
issues all over. Smoke tested on tgl by hacking dsc+bigjoiner
on even when they shouldn't be needed/possible.
The wm stuff should be pretty much ready to merge but CI
is taking its sweet time so I'm including it all here for
the time being.
Entire thing (+ test hacks) is here:
git://github.com/vsyrjala/linux.git bigjoiner_3
Maarten Lankhorst (4):
drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.
drm/i915: Try to make bigjoiner work in atomic check
drm/i915: Add bigjoiner aware plane clipping checks
drm/i915: Add debugfs dumping for bigjoiner, v3.
Manasi Navare (5):
drm/i915: Pass intel_atomic_state instead of drm_atomic_state
drm/i915/dp: Add from_crtc_state to copy color blobs
drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave
drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner
drm/i915: HW state readout for Bigjoiner case
Ville Syrjälä (14):
drm/i915: Copy the plane hw state directly for Y planes
drm/i915: Pass intel_atomic_state around
drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from
skl+ wm code
drm/i915: Pimp the watermark documentation a bit
drm/i915: Precompute can_sagv for each wm level
drm/i915: Store plane relative data rate in crtc_state
drm/i915: Remove skl_adjusted_plane_pixel_rate()
drm/i915: Add crtcs affected by bigjoiner to the state
drm/i915: Add planes affected by bigjoiner to the state
drm/i915: Get the uapi state from the correct plane when bigjoiner is
used
drm/i915: Disable legacy cursor fastpath for bigjoiner
drm/i915: Fix cursor src/dst rectangle with bigjoiner
drm/i915: Add bigjoiner state dump
drm/i915: Enable bigjoiner
drivers/gpu/drm/i915/display/icl_dsi.c | 2 -
drivers/gpu/drm/i915/display/intel_atomic.c | 9 +-
drivers/gpu/drm/i915/display/intel_atomic.h | 3 +-
.../gpu/drm/i915/display/intel_atomic_plane.c | 131 +++-
.../gpu/drm/i915/display/intel_atomic_plane.h | 9 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 69 +-
drivers/gpu/drm/i915/display/intel_display.c | 722 ++++++++++++++----
drivers/gpu/drm/i915/display/intel_display.h | 3 +-
.../drm/i915/display/intel_display_debugfs.c | 25 +-
.../drm/i915/display/intel_display_types.h | 63 +-
drivers/gpu/drm/i915/display/intel_dp.c | 100 ++-
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 21 +-
drivers/gpu/drm/i915/display/intel_vdsc.c | 197 ++---
drivers/gpu/drm/i915/display/intel_vdsc.h | 6 +-
drivers/gpu/drm/i915/intel_pm.c | 196 +++--
19 files changed, 1099 insertions(+), 464 deletions(-)
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 01/23] drm/i915: Copy the plane hw state directly for Y planes
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 9:19 ` Lisovskiy, Stanislav
2020-11-13 22:03 ` [Intel-gfx] [PATCH 02/23] drm/i915: Pass intel_atomic_state around Ville Syrjala
` (25 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
When doing the plane state copy from the UV plane to the Y plane
let's just copy the hw state directly instead of using the original
uapi state. The UV plane has already had its uapi state copied into
its hw state, so this extra detour via the uapi state for the Y plane
is pointless.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 12 ++++++++++++
drivers/gpu/drm/i915/display/intel_atomic_plane.h | 2 ++
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 3334ff253600..f47558efb3c2 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -265,6 +265,18 @@ void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
plane_state->hw.scaling_filter = from_plane_state->uapi.scaling_filter;
}
+void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
+ const struct intel_plane_state *from_plane_state)
+{
+ intel_plane_clear_hw_state(plane_state);
+
+ memcpy(&plane_state->hw, &from_plane_state->hw,
+ sizeof(plane_state->hw));
+
+ if (plane_state->hw.fb)
+ drm_framebuffer_get(plane_state->hw.fb);
+}
+
void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 59dd1fbb02ea..24a3a148aa62 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -25,6 +25,8 @@ unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state);
void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
const struct intel_plane_state *from_plane_state);
+void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
+ const struct intel_plane_state *from_plane_state);
void intel_update_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 03577ee5d9b7..62d96e6946e6 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12754,7 +12754,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
memcpy(linked_state->color_plane, plane_state->color_plane,
sizeof(linked_state->color_plane));
- intel_plane_copy_uapi_to_hw_state(linked_state, plane_state);
+ intel_plane_copy_hw_state(linked_state, plane_state);
linked_state->uapi.src = plane_state->uapi.src;
linked_state->uapi.dst = plane_state->uapi.dst;
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 02/23] drm/i915: Pass intel_atomic_state around
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 01/23] drm/i915: Copy the plane hw state directly for Y planes Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 03/23] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
` (24 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pass the whole intel_atomic_state to skl_build_pipe_wm()
and skl_allocate_pipe_ddb() so we can start to iterate
stuff containerd in the commit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 24 +++++++++++++-----------
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4d9c69ae039b..24813bd3847e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4791,9 +4791,11 @@ skl_plane_wm_level(const struct intel_crtc_state *crtc_state,
}
static int
-skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state)
+skl_allocate_pipe_ddb(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct skl_ddb_entry *alloc = &crtc_state->wm.skl.ddb;
u16 alloc_size, start = 0;
@@ -5583,9 +5585,12 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
return 0;
}
-static int skl_build_pipe_wm(struct intel_crtc_state *crtc_state)
+static int skl_build_pipe_wm(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
struct intel_plane *plane;
const struct intel_plane_state *plane_state;
@@ -5794,7 +5799,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
- ret = skl_allocate_pipe_ddb(new_crtc_state);
+ ret = skl_allocate_pipe_ddb(state, crtc);
if (ret)
return ret;
@@ -6092,7 +6097,6 @@ skl_compute_wm(struct intel_atomic_state *state)
{
struct intel_crtc *crtc;
struct intel_crtc_state *new_crtc_state;
- struct intel_crtc_state *old_crtc_state;
int ret, i;
ret = skl_ddb_add_affected_pipes(state);
@@ -6104,9 +6108,8 @@ skl_compute_wm(struct intel_atomic_state *state)
* Note that skl_ddb_add_affected_pipes may have added more CRTC's that
* weren't otherwise being modified if pipe allocations had to change.
*/
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
- ret = skl_build_pipe_wm(new_crtc_state);
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ ret = skl_build_pipe_wm(state, crtc);
if (ret)
return ret;
}
@@ -6124,8 +6127,7 @@ skl_compute_wm(struct intel_atomic_state *state)
* based on how much ddb is available. Now we can actually
* check if the final watermarks changed.
*/
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
ret = skl_wm_add_affected_planes(state, crtc);
if (ret)
return ret;
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 03/23] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 01/23] drm/i915: Copy the plane hw state directly for Y planes Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 02/23] drm/i915: Pass intel_atomic_state around Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 04/23] drm/i915: Pimp the watermark documentation a bit Ville Syrjala
` (23 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
intel_atomic_crtc_state_for_each_plane_state() peeks at the
plane's current state without holding the plane's mutex, trusting
that the crtc's mutex will protect it. In practice that does work
since our planes can't move between pipes, but it sets a bad
example. intel_atomic_crtc_state_for_each_plane_state() also
relies on crtc_state.uapi.plane_mask which may be full of lies
when it comes to the bigjoiner stuff, so soon we can't use it as
is anyway. So best to just get rid of it entirely. Which we can
easily do by switching to the g4x/vlv "raw" watermark approach.
Later on we should even be able to move the "raw" watermark
computation into the normal .plane_check() code, leaving only
the merging/clamping of the final watermarks to the later
stages. But that will require adjusting the ilk+ wm code
similarly as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/intel_display_types.h | 2 +
drivers/gpu/drm/i915/intel_pm.c | 41 +++++++++++--------
2 files changed, 27 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 35ab5944a3f7..3d91b116aadc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -755,6 +755,8 @@ struct intel_crtc_wm_state {
} ilk;
struct {
+ /* "raw" watermarks */
+ struct skl_pipe_wm raw;
/* gen9+ only needs 1-step wm programming */
struct skl_pipe_wm optimal;
struct skl_ddb_entry ddb;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 24813bd3847e..5a04be58e0b9 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5480,7 +5480,7 @@ static int skl_build_plane_wm_single(struct intel_crtc_state *crtc_state,
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct skl_plane_wm *wm = &crtc_state->wm.skl.optimal.planes[plane_id];
+ struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id];
struct skl_wm_params wm_params;
int ret;
@@ -5503,7 +5503,7 @@ static int skl_build_plane_wm_uv(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state,
enum plane_id plane_id)
{
- struct skl_plane_wm *wm = &crtc_state->wm.skl.optimal.planes[plane_id];
+ struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id];
struct skl_wm_params wm_params;
int ret;
@@ -5524,10 +5524,13 @@ static int skl_build_plane_wm(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- const struct drm_framebuffer *fb = plane_state->hw.fb;
enum plane_id plane_id = plane->id;
+ struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id];
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
int ret;
+ memset(wm, 0, sizeof(*wm));
+
if (!intel_wm_plane_visible(crtc_state, plane_state))
return 0;
@@ -5549,10 +5552,14 @@ static int skl_build_plane_wm(struct intel_crtc_state *crtc_state,
static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- enum plane_id plane_id = to_intel_plane(plane_state->uapi.plane)->id;
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ enum plane_id plane_id = plane->id;
+ struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id];
int ret;
+ memset(wm, 0, sizeof(*wm));
+
/* Watermarks calculated in master */
if (plane_state->planar_slave)
return 0;
@@ -5591,19 +5598,18 @@ static int skl_build_pipe_wm(struct intel_atomic_state *state,
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
- struct intel_plane *plane;
const struct intel_plane_state *plane_state;
- int ret;
+ struct intel_plane *plane;
+ int ret, i;
- /*
- * We'll only calculate watermarks for planes that are actually
- * enabled, so make sure all other planes are set as disabled.
- */
- memset(pipe_wm->planes, 0, sizeof(pipe_wm->planes));
-
- intel_atomic_crtc_state_for_each_plane_state(plane, plane_state,
- crtc_state) {
+ for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
+ /*
+ * FIXME should perhaps check {old,new}_plane_crtc->hw.crtc
+ * instead but we don't populate that correctly for NV12 Y
+ * planes so for now hack this.
+ */
+ if (plane->pipe != crtc->pipe)
+ continue;
if (INTEL_GEN(dev_priv) >= 11)
ret = icl_build_plane_wm(crtc_state, plane_state);
@@ -5613,6 +5619,8 @@ static int skl_build_pipe_wm(struct intel_atomic_state *state,
return ret;
}
+ crtc_state->wm.skl.optimal = crtc_state->wm.skl.raw;
+
return 0;
}
@@ -6273,6 +6281,7 @@ void skl_wm_get_hw_state(struct drm_i915_private *dev_priv)
crtc_state = to_intel_crtc_state(crtc->base.state);
skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal);
+ crtc_state->wm.skl.raw = crtc_state->wm.skl.optimal;
}
if (dev_priv->active_pipes) {
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 04/23] drm/i915: Pimp the watermark documentation a bit
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (2 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 03/23] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 05/23] drm/i915: Precompute can_sagv for each wm level Ville Syrjala
` (22 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Document what each of the "raw" vs. "optimal" vs. "intermediate"
watermarks do.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/intel_display_types.h | 48 ++++++++++---------
1 file changed, 25 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 3d91b116aadc..0c1df34a0cce 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -737,25 +737,34 @@ struct g4x_wm_state {
struct intel_crtc_wm_state {
union {
+ /*
+ * raw:
+ * The "raw" watermark values produced by the formula
+ * given the plane's current state. They do not consider
+ * how much FIFO is actually allocated for each plane.
+ *
+ * optimal:
+ * The "optimal" watermark values given the current
+ * state of the planes and the amount of FIFO
+ * allocated to each, ignoring any previous state
+ * of the planes.
+ *
+ * intermediate:
+ * The "intermediate" watermark values when transitioning
+ * between the old and new "optimal" values. Used when
+ * the watermark registers are single buffered and hence
+ * their state changes asynchronously with regards to the
+ * actual plane registers. These are essentially the
+ * worst case combination of the old and new "optimal"
+ * watermarks, which are therefore safe to use when the
+ * plane is in either its old or new state.
+ */
struct {
- /*
- * Intermediate watermarks; these can be
- * programmed immediately since they satisfy
- * both the current configuration we're
- * switching away from and the new
- * configuration we're switching to.
- */
struct intel_pipe_wm intermediate;
-
- /*
- * Optimal watermarks, programmed post-vblank
- * when this state is committed.
- */
struct intel_pipe_wm optimal;
} ilk;
struct {
- /* "raw" watermarks */
struct skl_pipe_wm raw;
/* gen9+ only needs 1-step wm programming */
struct skl_pipe_wm optimal;
@@ -765,22 +774,15 @@ struct intel_crtc_wm_state {
} skl;
struct {
- /* "raw" watermarks (not inverted) */
- struct g4x_pipe_wm raw[NUM_VLV_WM_LEVELS];
- /* intermediate watermarks (inverted) */
- struct vlv_wm_state intermediate;
- /* optimal watermarks (inverted) */
- struct vlv_wm_state optimal;
- /* display FIFO split */
+ struct g4x_pipe_wm raw[NUM_VLV_WM_LEVELS]; /* not inverted */
+ struct vlv_wm_state intermediate; /* inverted */
+ struct vlv_wm_state optimal; /* inverted */
struct vlv_fifo_state fifo_state;
} vlv;
struct {
- /* "raw" watermarks */
struct g4x_pipe_wm raw[NUM_G4X_WM_LEVELS];
- /* intermediate watermarks */
struct g4x_wm_state intermediate;
- /* optimal watermarks */
struct g4x_wm_state optimal;
} g4x;
};
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 05/23] drm/i915: Precompute can_sagv for each wm level
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (3 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 04/23] drm/i915: Pimp the watermark documentation a bit Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 06/23] drm/i915: Store plane relative data rate in crtc_state Ville Syrjala
` (21 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
In order to remove intel_atomic_crtc_state_for_each_plane_state()
from skl_crtc_can_enable_sagv() we can simply precompute whether
each wm level can tolerate the SAGV block time latency or not.
This has the nice side benefit that we remove the duplicated
wm level latency calculation. In fact the copy of that code
we had in skl_crtc_can_enable_sagv() didn't even handle
WaIncreaseLatencyIPCEnabled/Display WA #1141 whereas the copy
in skl_compute_plane_wm() did. So now we just have the one
copy which handles all the w/as.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 21 +++++++------------
2 files changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0c1df34a0cce..86de89d621d8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -686,6 +686,7 @@ struct skl_wm_level {
u8 plane_res_l;
bool plane_en;
bool ignore_lines;
+ bool can_sagv;
};
struct skl_plane_wm {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 5a04be58e0b9..6e64580a1a8c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3873,9 +3873,7 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct intel_plane *plane;
- const struct intel_plane_state *plane_state;
- int level, latency;
+ enum plane_id plane_id;
if (!intel_has_sagv(dev_priv))
return false;
@@ -3886,9 +3884,10 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
if (crtc_state->hw.pipe_mode.flags & DRM_MODE_FLAG_INTERLACE)
return false;
- intel_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) {
+ for_each_plane_id_on_crtc(crtc, plane_id) {
const struct skl_plane_wm *wm =
- &crtc_state->wm.skl.optimal.planes[plane->id];
+ &crtc_state->wm.skl.optimal.planes[plane_id];
+ int level;
/* Skip this plane if it's not enabled */
if (!wm->wm[0].plane_en)
@@ -3899,19 +3898,12 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
!wm->wm[level].plane_en; --level)
{ }
- latency = dev_priv->wm.skl_latency[level];
-
- if (skl_needs_memory_bw_wa(dev_priv) &&
- plane_state->uapi.fb->modifier ==
- I915_FORMAT_MOD_X_TILED)
- latency += 15;
-
/*
* If any of the planes on this pipe don't enable wm levels that
* incur memory latencies higher than sagv_block_time_us we
* can't enable SAGV.
*/
- if (latency < dev_priv->sagv_block_time_us)
+ if (!wm->wm[level].can_sagv)
return false;
}
@@ -5375,6 +5367,9 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
/* Bspec says: value >= plane ddb allocation -> invalid, hence the +1 here */
result->min_ddb_alloc = max(min_ddb_alloc, res_blocks) + 1;
result->plane_en = true;
+
+ if (INTEL_GEN(dev_priv) < 12)
+ result->can_sagv = latency >= dev_priv->sagv_block_time_us;
}
static void
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 06/23] drm/i915: Store plane relative data rate in crtc_state
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (4 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 05/23] drm/i915: Precompute can_sagv for each wm level Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 07/23] drm/i915: Remove skl_adjusted_plane_pixel_rate() Ville Syrjala
` (20 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Store the relative data rate for planes in the crtc state
so that we don't have to use
intel_atomic_crtc_state_for_each_plane_state() to compute
it even for the planes that are no part of the current state.
Should probably just nuke this stuff entirely an use the normal
plane data rate instead. The two are slightly different since this
relative data rate doesn't factor in the actual pixel clock, so
it's a bit odd thing to even call a "data rate". And since the
watermarks are computed based on the actual data rate anyway
I don't really see what the point of this relative data rate
is. But that's for the future...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/intel_display_types.h | 4 +
drivers/gpu/drm/i915/intel_pm.c | 83 ++++++++++---------
2 files changed, 50 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 86de89d621d8..5bb7adc1ff3e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1031,6 +1031,10 @@ struct intel_crtc_state {
u32 data_rate[I915_MAX_PLANES];
+ /* FIXME unify with data_rate[] */
+ u64 plane_data_rate[I915_MAX_PLANES];
+ u64 uv_plane_data_rate[I915_MAX_PLANES];
+
/* Gamma mode programmed on the pipe */
u32 gamma_mode;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6e64580a1a8c..6ccacd07ab94 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4696,50 +4696,63 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *crtc_state,
}
static u64
-skl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state,
- u64 *plane_data_rate,
- u64 *uv_plane_data_rate)
+skl_get_total_relative_data_rate(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
- struct intel_plane *plane;
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_plane_state *plane_state;
+ struct intel_plane *plane;
u64 total_data_rate = 0;
+ enum plane_id plane_id;
+ int i;
/* Calculate and cache data rate for each plane */
- intel_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) {
- enum plane_id plane_id = plane->id;
- u64 rate;
+ for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
+ if (plane->pipe != crtc->pipe)
+ continue;
+
+ plane_id = plane->id;
/* packed/y */
- rate = skl_plane_relative_data_rate(crtc_state, plane_state, 0);
- plane_data_rate[plane_id] = rate;
- total_data_rate += rate;
+ crtc_state->plane_data_rate[plane_id] =
+ skl_plane_relative_data_rate(crtc_state, plane_state, 0);
/* uv-plane */
- rate = skl_plane_relative_data_rate(crtc_state, plane_state, 1);
- uv_plane_data_rate[plane_id] = rate;
- total_data_rate += rate;
+ crtc_state->uv_plane_data_rate[plane_id] =
+ skl_plane_relative_data_rate(crtc_state, plane_state, 1);
+ }
+
+ for_each_plane_id_on_crtc(crtc, plane_id) {
+ total_data_rate += crtc_state->plane_data_rate[plane_id];
+ total_data_rate += crtc_state->uv_plane_data_rate[plane_id];
}
return total_data_rate;
}
static u64
-icl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state,
- u64 *plane_data_rate)
+icl_get_total_relative_data_rate(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
- struct intel_plane *plane;
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_plane_state *plane_state;
+ struct intel_plane *plane;
u64 total_data_rate = 0;
+ enum plane_id plane_id;
+ int i;
/* Calculate and cache data rate for each plane */
- intel_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) {
- enum plane_id plane_id = plane->id;
- u64 rate;
+ for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
+ if (plane->pipe != crtc->pipe)
+ continue;
+
+ plane_id = plane->id;
if (!plane_state->planar_linked_plane) {
- rate = skl_plane_relative_data_rate(crtc_state, plane_state, 0);
- plane_data_rate[plane_id] = rate;
- total_data_rate += rate;
+ crtc_state->plane_data_rate[plane_id] =
+ skl_plane_relative_data_rate(crtc_state, plane_state, 0);
} else {
enum plane_id y_plane_id;
@@ -4754,17 +4767,18 @@ icl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state,
continue;
/* Y plane rate is calculated on the slave */
- rate = skl_plane_relative_data_rate(crtc_state, plane_state, 0);
y_plane_id = plane_state->planar_linked_plane->id;
- plane_data_rate[y_plane_id] = rate;
- total_data_rate += rate;
+ crtc_state->plane_data_rate[y_plane_id] =
+ skl_plane_relative_data_rate(crtc_state, plane_state, 0);
- rate = skl_plane_relative_data_rate(crtc_state, plane_state, 1);
- plane_data_rate[plane_id] = rate;
- total_data_rate += rate;
+ crtc_state->plane_data_rate[plane_id] =
+ skl_plane_relative_data_rate(crtc_state, plane_state, 1);
}
}
+ for_each_plane_id_on_crtc(crtc, plane_id)
+ total_data_rate += crtc_state->plane_data_rate[plane_id];
+
return total_data_rate;
}
@@ -4796,8 +4810,6 @@ skl_allocate_pipe_ddb(struct intel_atomic_state *state,
u64 total_data_rate;
enum plane_id plane_id;
int num_active;
- u64 plane_data_rate[I915_MAX_PLANES] = {};
- u64 uv_plane_data_rate[I915_MAX_PLANES] = {};
u32 blocks;
int level;
int ret;
@@ -4837,13 +4849,10 @@ skl_allocate_pipe_ddb(struct intel_atomic_state *state,
if (INTEL_GEN(dev_priv) >= 11)
total_data_rate =
- icl_get_total_relative_data_rate(crtc_state,
- plane_data_rate);
+ icl_get_total_relative_data_rate(state, crtc);
else
total_data_rate =
- skl_get_total_relative_data_rate(crtc_state,
- plane_data_rate,
- uv_plane_data_rate);
+ skl_get_total_relative_data_rate(state, crtc);
ret = skl_ddb_get_pipe_allocation_limits(dev_priv, crtc_state,
total_data_rate,
@@ -4924,7 +4933,7 @@ skl_allocate_pipe_ddb(struct intel_atomic_state *state,
if (total_data_rate == 0)
break;
- rate = plane_data_rate[plane_id];
+ rate = crtc_state->plane_data_rate[plane_id];
extra = min_t(u16, alloc_size,
DIV64_U64_ROUND_UP(alloc_size * rate,
total_data_rate));
@@ -4935,7 +4944,7 @@ skl_allocate_pipe_ddb(struct intel_atomic_state *state,
if (total_data_rate == 0)
break;
- rate = uv_plane_data_rate[plane_id];
+ rate = crtc_state->uv_plane_data_rate[plane_id];
extra = min_t(u16, alloc_size,
DIV64_U64_ROUND_UP(alloc_size * rate,
total_data_rate));
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 07/23] drm/i915: Remove skl_adjusted_plane_pixel_rate()
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (5 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 06/23] drm/i915: Store plane relative data rate in crtc_state Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 08/23] drm/i915: Pass intel_atomic_state instead of drm_atomic_state Ville Syrjala
` (19 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Replace skl_adjusted_plane_pixel_rate() with the generic
intel_plane_pixel_rate(). The two should produce identical
results.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 27 ++-------------------------
1 file changed, 2 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6ccacd07ab94..a20b5051f18c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -33,6 +33,7 @@
#include <drm/drm_plane_helper.h>
#include "display/intel_atomic.h"
+#include "display/intel_atomic_plane.h"
#include "display/intel_bw.h"
#include "display/intel_display_types.h"
#include "display/intel_fbc.h"
@@ -5102,30 +5103,6 @@ intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
return linetime_us;
}
-static u32
-skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
- const struct intel_plane_state *plane_state)
-{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- u64 adjusted_pixel_rate;
- uint_fixed_16_16_t downscale_amount;
-
- /* Shouldn't reach here on disabled planes... */
- if (drm_WARN_ON(&dev_priv->drm,
- !intel_wm_plane_visible(crtc_state, plane_state)))
- return 0;
-
- /*
- * Adjusted plane pixel rate is just the pipe's adjusted pixel rate
- * with additional adjustments for plane-specific scaling.
- */
- adjusted_pixel_rate = crtc_state->pixel_rate;
- downscale_amount = skl_plane_downscale_amount(crtc_state, plane_state);
-
- return mul_round_up_u32_fixed16(adjusted_pixel_rate,
- downscale_amount);
-}
-
static int
skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
int width, const struct drm_format_info *format,
@@ -5238,7 +5215,7 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *crtc_state,
return skl_compute_wm_params(crtc_state, width,
fb->format, fb->modifier,
plane_state->hw.rotation,
- skl_adjusted_plane_pixel_rate(crtc_state, plane_state),
+ intel_plane_pixel_rate(crtc_state, plane_state),
wp, color_plane);
}
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 08/23] drm/i915: Pass intel_atomic_state instead of drm_atomic_state
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (6 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 07/23] drm/i915: Remove skl_adjusted_plane_pixel_rate() Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 09/23] drm/i915/dp: Add from_crtc_state to copy color blobs Ville Syrjala
` (18 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Manasi Navare <manasi.d.navare@intel.com>
No functional changes, to align with previous cleanups pass
intel_atomic_state instead of drm_atomic_state.
Also pass this intel_atomic_state with crtc_state to
some of the atomic_check functions.
v2:
* Squash some changes from next patch (Ville)
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 32 +++++++++++---------
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 62d96e6946e6..df1f22fc4369 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12630,7 +12630,7 @@ static bool encoders_cloneable(const struct intel_encoder *a,
b->cloneable & (1 << a->type));
}
-static bool check_single_encoder_cloning(struct drm_atomic_state *state,
+static bool check_single_encoder_cloning(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder)
{
@@ -12639,7 +12639,7 @@ static bool check_single_encoder_cloning(struct drm_atomic_state *state,
struct drm_connector_state *connector_state;
int i;
- for_each_new_connector_in_state(state, connector, connector_state, i) {
+ for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
if (connector_state->crtc != &crtc->base)
continue;
@@ -13418,20 +13418,23 @@ static bool check_digital_port_conflicts(struct intel_atomic_state *state)
}
static void
-intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_crtc_state *crtc_state)
+intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state)
{
intel_crtc_copy_color_blobs(crtc_state);
}
static void
-intel_crtc_copy_uapi_to_hw_state(struct intel_crtc_state *crtc_state)
+intel_crtc_copy_uapi_to_hw_state(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state)
{
crtc_state->hw.enable = crtc_state->uapi.enable;
crtc_state->hw.active = crtc_state->uapi.active;
crtc_state->hw.mode = crtc_state->uapi.mode;
crtc_state->hw.adjusted_mode = crtc_state->uapi.adjusted_mode;
crtc_state->hw.scaling_filter = crtc_state->uapi.scaling_filter;
- intel_crtc_copy_uapi_to_hw_state_nomodeset(crtc_state);
+
+ intel_crtc_copy_uapi_to_hw_state_nomodeset(state, crtc_state);
}
static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state)
@@ -13454,7 +13457,8 @@ static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state
}
static int
-intel_crtc_prepare_cleared_state(struct intel_crtc_state *crtc_state)
+intel_crtc_prepare_cleared_state(struct intel_atomic_state *state,
+ struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -13486,16 +13490,16 @@ intel_crtc_prepare_cleared_state(struct intel_crtc_state *crtc_state)
memcpy(crtc_state, saved_state, sizeof(*crtc_state));
kfree(saved_state);
- intel_crtc_copy_uapi_to_hw_state(crtc_state);
+ intel_crtc_copy_uapi_to_hw_state(state, crtc_state);
return 0;
}
static int
-intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
+intel_modeset_pipe_config(struct intel_atomic_state *state,
+ struct intel_crtc_state *pipe_config)
{
struct drm_crtc *crtc = pipe_config->uapi.crtc;
- struct drm_atomic_state *state = pipe_config->uapi.state;
struct drm_i915_private *i915 = to_i915(pipe_config->uapi.crtc->dev);
struct drm_connector *connector;
struct drm_connector_state *connector_state;
@@ -13537,7 +13541,7 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
&pipe_config->pipe_src_w,
&pipe_config->pipe_src_h);
- for_each_new_connector_in_state(state, connector, connector_state, i) {
+ for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
struct intel_encoder *encoder =
to_intel_encoder(connector_state->best_encoder);
@@ -13575,7 +13579,7 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
* adjust it according to limitations or connector properties, and also
* a chance to reject the mode entirely.
*/
- for_each_new_connector_in_state(state, connector, connector_state, i) {
+ for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
struct intel_encoder *encoder =
to_intel_encoder(connector_state->best_encoder);
@@ -15196,19 +15200,19 @@ static int intel_atomic_check(struct drm_device *dev,
new_crtc_state, i) {
if (!needs_modeset(new_crtc_state)) {
/* Light copy */
- intel_crtc_copy_uapi_to_hw_state_nomodeset(new_crtc_state);
+ intel_crtc_copy_uapi_to_hw_state_nomodeset(state, new_crtc_state);
continue;
}
- ret = intel_crtc_prepare_cleared_state(new_crtc_state);
+ ret = intel_crtc_prepare_cleared_state(state, new_crtc_state);
if (ret)
goto fail;
if (!new_crtc_state->hw.enable)
continue;
- ret = intel_modeset_pipe_config(new_crtc_state);
+ ret = intel_modeset_pipe_config(state, new_crtc_state);
if (ret)
goto fail;
}
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 09/23] drm/i915/dp: Add from_crtc_state to copy color blobs
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (7 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 08/23] drm/i915: Pass intel_atomic_state instead of drm_atomic_state Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 10/23] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3 Ville Syrjala
` (17 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Manasi Navare <manasi.d.navare@intel.com>
No functional changes here, just adds a from_crtc_state
as a prep for bigjoiner
v2:
* More prep with intel_atomic_state (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_atomic.c | 9 +++++----
drivers/gpu/drm/i915/display/intel_atomic.h | 3 ++-
drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
3 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index 63d8d6840655..e00fdc47c0eb 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -269,14 +269,15 @@ void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state)
intel_crtc_put_color_blobs(crtc_state);
}
-void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state)
+void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state,
+ const struct intel_crtc_state *from_crtc_state)
{
drm_property_replace_blob(&crtc_state->hw.degamma_lut,
- crtc_state->uapi.degamma_lut);
+ from_crtc_state->uapi.degamma_lut);
drm_property_replace_blob(&crtc_state->hw.gamma_lut,
- crtc_state->uapi.gamma_lut);
+ from_crtc_state->uapi.gamma_lut);
drm_property_replace_blob(&crtc_state->hw.ctm,
- crtc_state->uapi.ctm);
+ from_crtc_state->uapi.ctm);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.h b/drivers/gpu/drm/i915/display/intel_atomic.h
index 285de07011dc..62a3365ed5e6 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic.h
@@ -43,7 +43,8 @@ struct drm_crtc_state *intel_crtc_duplicate_state(struct drm_crtc *crtc);
void intel_crtc_destroy_state(struct drm_crtc *crtc,
struct drm_crtc_state *state);
void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state);
-void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state);
+void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state,
+ const struct intel_crtc_state *from_crtc_state);
struct drm_atomic_state *intel_atomic_state_alloc(struct drm_device *dev);
void intel_atomic_state_free(struct drm_atomic_state *state);
void intel_atomic_state_clear(struct drm_atomic_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index df1f22fc4369..be56fe782b41 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13421,7 +13421,9 @@ static void
intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_atomic_state *state,
struct intel_crtc_state *crtc_state)
{
- intel_crtc_copy_color_blobs(crtc_state);
+ const struct intel_crtc_state *from_crtc_state = crtc_state;
+
+ intel_crtc_copy_color_blobs(crtc_state, from_crtc_state);
}
static void
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 10/23] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (8 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 09/23] drm/i915/dp: Add from_crtc_state to copy color blobs Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 11/23] drm/i915: Try to make bigjoiner work in atomic check Ville Syrjala
` (16 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Small changes to intel_dp_mode_valid(), allow listing modes that
can only be supported in the bigjoiner configuration, which is
not supported yet.
v13:
* Allow bigjoiner if hdisplay >5120
v12:
* slice_count logic simplify (Ville)
* Fix unnecessary changes in downstream_mode_valid (Ville)
v11:
* Make intel_dp_can_bigjoiner non static
so it can be used in intel_display (Manasi)
v10:
* Simplify logic (Ville)
* Allow bigjoiner on edp (Ville)
v9:
* Restric Bigjoiner on PORT A (Ville)
v8:
* use source dotclock for max dotclock (Manasi)
v7:
* Add can_bigjoiner() helper (Ville)
* Pass bigjoiner to plane_size validation (Ville)
v6:
* Rebase after dp_downstream mode valid changes (Manasi)
v5:
* Increase max plane width to support 8K with bigjoiner (Maarten)
v4:
* Rebase (Manasi)
Changes since v1:
- Disallow bigjoiner on eDP.
Changes since v2:
- Rename intel_dp_downstream_max_dotclock to intel_dp_max_dotclock,
and split off the downstream and source checking to its own function.
(Ville)
v3:
* Rebase (Manasi)
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[vsyrjala:
* Keep bigjoiner disabled until everything is ready
* Appease checkpatch]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +-
drivers/gpu/drm/i915/display/intel_display.h | 3 +-
drivers/gpu/drm/i915/display/intel_dp.c | 81 ++++++++++++++++----
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
7 files changed, 76 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index be56fe782b41..004ae95ede19 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17741,7 +17741,8 @@ intel_mode_valid(struct drm_device *dev,
enum drm_mode_status
intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
- const struct drm_display_mode *mode)
+ const struct drm_display_mode *mode,
+ bool bigjoiner)
{
int plane_width_max, plane_height_max;
@@ -17758,7 +17759,7 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
* too big for that.
*/
if (INTEL_GEN(dev_priv) >= 11) {
- plane_width_max = 5120;
+ plane_width_max = 5120 << bigjoiner;
plane_height_max = 4320;
} else {
plane_width_max = 5120;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 6be14e8571aa..5e0d42d82c11 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -513,7 +513,8 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
bool intel_plane_can_remap(const struct intel_plane_state *plane_state);
enum drm_mode_status
intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
- const struct drm_display_mode *mode);
+ const struct drm_display_mode *mode,
+ bool bigjoiner);
enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ec8359f03aaf..5ad59610eb12 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -254,6 +254,20 @@ intel_dp_max_data_rate(int max_link_clock, int max_lanes)
return max_link_clock * max_lanes;
}
+bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct intel_encoder *encoder = &intel_dig_port->base;
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+
+ /* FIXME remove once everything is in place */
+ return false;
+
+ return INTEL_GEN(dev_priv) >= 12 ||
+ (INTEL_GEN(dev_priv) == 11 &&
+ encoder->port != PORT_A);
+}
+
static int cnl_max_source_rate(struct intel_dp *intel_dp)
{
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
@@ -519,7 +533,8 @@ small_joiner_ram_size_bits(struct drm_i915_private *i915)
static u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
u32 link_clock, u32 lane_count,
- u32 mode_clock, u32 mode_hdisplay)
+ u32 mode_clock, u32 mode_hdisplay,
+ bool bigjoiner)
{
u32 bits_per_pixel, max_bpp_small_joiner_ram;
int i;
@@ -537,6 +552,10 @@ static u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
/* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz. width */
max_bpp_small_joiner_ram = small_joiner_ram_size_bits(i915) /
mode_hdisplay;
+
+ if (bigjoiner)
+ max_bpp_small_joiner_ram *= 2;
+
drm_dbg_kms(&i915->drm, "Max small joiner bpp: %u\n",
max_bpp_small_joiner_ram);
@@ -546,6 +565,15 @@ static u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
*/
bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
+ if (bigjoiner) {
+ u32 max_bpp_bigjoiner =
+ i915->max_cdclk_freq * 48 /
+ intel_dp_mode_to_fec_clock(mode_clock);
+
+ DRM_DEBUG_KMS("Max big joiner bpp: %u\n", max_bpp_bigjoiner);
+ bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);
+ }
+
/* Error out if the max bpp is less than smallest allowed valid bpp */
if (bits_per_pixel < valid_dsc_bpp[0]) {
drm_dbg_kms(&i915->drm, "Unsupported BPP %u, min %u\n",
@@ -568,7 +596,8 @@ static u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
}
static u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
- int mode_clock, int mode_hdisplay)
+ int mode_clock, int mode_hdisplay,
+ bool bigjoiner)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
u8 min_slice_count, i;
@@ -595,12 +624,18 @@ static u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
/* Find the closest match to the valid slice count values */
for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) {
- if (valid_dsc_slicecount[i] >
- drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd,
- false))
+ u8 test_slice_count = valid_dsc_slicecount[i] << bigjoiner;
+
+ if (test_slice_count >
+ drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd, false))
break;
- if (min_slice_count <= valid_dsc_slicecount[i])
- return valid_dsc_slicecount[i];
+
+ /* big joiner needs small joiner to be enabled */
+ if (bigjoiner && test_slice_count < 4)
+ continue;
+
+ if (min_slice_count <= test_slice_count)
+ return test_slice_count;
}
drm_dbg_kms(&i915->drm, "Unsupported Slice Count %d\n",
@@ -717,6 +752,7 @@ intel_dp_mode_valid(struct drm_connector *connector,
u16 dsc_max_output_bpp = 0;
u8 dsc_slice_count = 0;
enum drm_mode_status status;
+ bool dsc = false, bigjoiner = false;
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
return MODE_NO_DBLESCAN;
@@ -737,6 +773,14 @@ intel_dp_mode_valid(struct drm_connector *connector,
if (mode->clock < 10000)
return MODE_CLOCK_LOW;
+ if ((target_clock > max_dotclk || mode->hdisplay > 5120) &&
+ intel_dp_can_bigjoiner(intel_dp)) {
+ bigjoiner = true;
+ max_dotclk *= 2;
+ }
+ if (target_clock > max_dotclk)
+ return MODE_CLOCK_HIGH;
+
max_link_clock = intel_dp_max_link_rate(intel_dp);
max_lanes = intel_dp_max_lane_count(intel_dp);
@@ -765,16 +809,23 @@ intel_dp_mode_valid(struct drm_connector *connector,
max_link_clock,
max_lanes,
target_clock,
- mode->hdisplay) >> 4;
+ mode->hdisplay,
+ bigjoiner) >> 4;
dsc_slice_count =
intel_dp_dsc_get_slice_count(intel_dp,
target_clock,
- mode->hdisplay);
+ mode->hdisplay,
+ bigjoiner);
}
+
+ dsc = dsc_max_output_bpp && dsc_slice_count;
}
- if ((mode_rate > max_rate && !(dsc_max_output_bpp && dsc_slice_count)) ||
- target_clock > max_dotclk)
+ /* big joiner configuration needs DSC */
+ if (bigjoiner && !dsc)
+ return MODE_CLOCK_HIGH;
+
+ if (mode_rate > max_rate && !dsc)
return MODE_CLOCK_HIGH;
status = intel_dp_mode_valid_downstream(intel_connector,
@@ -782,7 +833,7 @@ intel_dp_mode_valid(struct drm_connector *connector,
if (status != MODE_OK)
return status;
- return intel_mode_valid_max_plane_size(dev_priv, mode);
+ return intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner);
}
u32 intel_dp_pack_aux(const u8 *src, int src_bytes)
@@ -2351,11 +2402,13 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
pipe_config->port_clock,
pipe_config->lane_count,
adjusted_mode->crtc_clock,
- adjusted_mode->crtc_hdisplay);
+ adjusted_mode->crtc_hdisplay,
+ false);
dsc_dp_slice_count =
intel_dp_dsc_get_slice_count(intel_dp,
adjusted_mode->crtc_clock,
- adjusted_mode->crtc_hdisplay);
+ adjusted_mode->crtc_hdisplay,
+ false);
if (!dsc_max_output_bpp || !dsc_dp_slice_count) {
drm_dbg_kms(&dev_priv->drm,
"Compressed BPP/Slice Count not supported\n");
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 3f862b4fd34f..b871a09b6901 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -106,6 +106,7 @@ bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp);
bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
int intel_dp_link_required(int pixel_clock, int bpp);
int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
+bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index c8fcec4d0788..0c8684634fca 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -714,7 +714,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
return 0;
}
- *status = intel_mode_valid_max_plane_size(dev_priv, mode);
+ *status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c b/drivers/gpu/drm/i915/display/intel_dsi.c
index afa4e6817e8c..f453ceb8d149 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi.c
@@ -75,7 +75,7 @@ enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
return MODE_CLOCK_HIGH;
}
- return intel_mode_valid_max_plane_size(dev_priv, mode);
+ return intel_mode_valid_max_plane_size(dev_priv, mode, false);
}
struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index f90838bc74fb..82674a8853c6 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2274,7 +2274,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
if (status != MODE_OK)
return status;
- return intel_mode_valid_max_plane_size(dev_priv, mode);
+ return intel_mode_valid_max_plane_size(dev_priv, mode, false);
}
bool intel_hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state,
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 11/23] drm/i915: Try to make bigjoiner work in atomic check
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (9 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 10/23] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3 Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 8:28 ` Manna, Animesh
2020-11-13 22:03 ` [Intel-gfx] [PATCH 12/23] drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave Ville Syrjala
` (15 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
When the clock is higher than the dotclock, try with 2 pipes enabled.
If we can enable 2, then we will go into big joiner mode, and steal
the adjacent crtc.
This only links the crtc's in software, no hardware or plane
programming is done yet. Blobs are also copied from the master's
crtc_state, so it doesn't depend at commit time on the other
crtc_state.
v6:
* Enable dSC for any mode->hdisplay > 5120
v5:
* Remove intel_dp_max_dotclock (Manasi)
v4:
* Fixes in intel_crtc_compute_config (Ville)
v3:
* Manual Rebase (Manasi)
Changes since v1:
- Rename pipe timings to transcoder timings, as they are now different.
Changes since v2:
- Rework bigjoiner checks; always disable slave when recalculating
master. No need to have a separate bigjoiner pass any more.
- Use pipe_mode instead of transcoder_mode, to clean up the code.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
[vsyrjala:
* hskew isn't a thing
* Do the dsc compute if bigjoiner is enabled, not the other way around]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 156 +++++++++++++++++-
.../drm/i915/display/intel_display_types.h | 9 +
drivers/gpu/drm/i915/display/intel_dp.c | 20 ++-
3 files changed, 175 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 004ae95ede19..e2baf342a112 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8194,6 +8194,19 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
int clock_limit = dev_priv->max_dotclk_freq;
drm_mode_copy(pipe_mode, &pipe_config->hw.adjusted_mode);
+
+ /* Adjust pipe_mode for bigjoiner, with half the horizontal mode */
+ if (pipe_config->bigjoiner) {
+ pipe_mode->crtc_clock /= 2;
+ pipe_mode->crtc_hdisplay /= 2;
+ pipe_mode->crtc_hblank_start /= 2;
+ pipe_mode->crtc_hblank_end /= 2;
+ pipe_mode->crtc_hsync_start /= 2;
+ pipe_mode->crtc_hsync_end /= 2;
+ pipe_mode->crtc_htotal /= 2;
+ pipe_config->pipe_src_w /= 2;
+ }
+
intel_mode_from_crtc_timings(pipe_mode, pipe_mode);
if (INTEL_GEN(dev_priv) < 4) {
@@ -12879,6 +12892,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
if (mode_changed && crtc_state->hw.enable &&
dev_priv->display.crtc_compute_clock &&
+ !crtc_state->bigjoiner_slave &&
!drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll)) {
ret = dev_priv->display.crtc_compute_clock(crtc, crtc_state);
if (ret)
@@ -13423,6 +13437,15 @@ intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_atomic_state *state,
{
const struct intel_crtc_state *from_crtc_state = crtc_state;
+ if (crtc_state->bigjoiner_slave) {
+ from_crtc_state = intel_atomic_get_new_crtc_state(state,
+ crtc_state->bigjoiner_linked_crtc);
+
+ /* No need to copy state if the master state is unchanged */
+ if (!from_crtc_state)
+ return;
+ }
+
intel_crtc_copy_color_blobs(crtc_state, from_crtc_state);
}
@@ -13458,6 +13481,47 @@ static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state
crtc_state->hw.ctm);
}
+static int
+copy_bigjoiner_crtc_state(struct intel_crtc_state *crtc_state,
+ const struct intel_crtc_state *from_crtc_state)
+{
+ struct intel_crtc_state *saved_state;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+
+ saved_state = kmemdup(from_crtc_state, sizeof(*saved_state), GFP_KERNEL);
+ if (!saved_state)
+ return -ENOMEM;
+
+ saved_state->uapi = crtc_state->uapi;
+ saved_state->scaler_state = crtc_state->scaler_state;
+ saved_state->shared_dpll = crtc_state->shared_dpll;
+ saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
+ saved_state->crc_enabled = crtc_state->crc_enabled;
+
+ intel_crtc_free_hw_state(crtc_state);
+ memcpy(crtc_state, saved_state, sizeof(*crtc_state));
+ kfree(saved_state);
+
+ /* Re-init hw state */
+ memset(&crtc_state->hw, 0, sizeof(saved_state->hw));
+ crtc_state->hw.enable = from_crtc_state->hw.enable;
+ crtc_state->hw.active = from_crtc_state->hw.active;
+ crtc_state->hw.pipe_mode = from_crtc_state->hw.pipe_mode;
+ crtc_state->hw.adjusted_mode = from_crtc_state->hw.adjusted_mode;
+
+ /* Some fixups */
+ crtc_state->uapi.mode_changed = from_crtc_state->uapi.mode_changed;
+ crtc_state->uapi.connectors_changed = from_crtc_state->uapi.connectors_changed;
+ crtc_state->uapi.active_changed = from_crtc_state->uapi.active_changed;
+ crtc_state->nv12_planes = crtc_state->c8_planes = crtc_state->update_planes = 0;
+ crtc_state->bigjoiner_linked_crtc = to_intel_crtc(from_crtc_state->uapi.crtc);
+ crtc_state->bigjoiner_slave = true;
+ crtc_state->cpu_transcoder = (enum transcoder)crtc->pipe;
+ crtc_state->has_audio = false;
+
+ return 0;
+}
+
static int
intel_crtc_prepare_cleared_state(struct intel_atomic_state *state,
struct intel_crtc_state *crtc_state)
@@ -15040,6 +15104,75 @@ static bool intel_cpu_transcoders_need_modeset(struct intel_atomic_state *state,
return false;
}
+static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_crtc_state *old_crtc_state,
+ struct intel_crtc_state *new_crtc_state)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct intel_crtc_state *slave_crtc_state, *master_crtc_state;
+ struct intel_crtc *slave, *master;
+
+ /* slave being enabled, is master is still claiming this crtc? */
+ if (old_crtc_state->bigjoiner_slave) {
+ slave = crtc;
+ master = old_crtc_state->bigjoiner_linked_crtc;
+ master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
+ if (!master_crtc_state || !needs_modeset(master_crtc_state))
+ goto claimed;
+ }
+
+ if (!new_crtc_state->bigjoiner)
+ return 0;
+
+ if (1 + crtc->pipe >= INTEL_NUM_PIPES(dev_priv)) {
+ DRM_DEBUG_KMS("[CRTC:%d:%s] Big joiner configuration requires "
+ "CRTC + 1 to be used, doesn't exist\n",
+ crtc->base.base.id, crtc->base.name);
+ return -EINVAL;
+ }
+
+ slave = new_crtc_state->bigjoiner_linked_crtc =
+ intel_get_crtc_for_pipe(dev_priv, crtc->pipe + 1);
+ slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave);
+ master = crtc;
+ if (IS_ERR(slave_crtc_state))
+ return PTR_ERR(slave_crtc_state);
+
+ /* master being enabled, slave was already configured? */
+ if (slave_crtc_state->uapi.enable)
+ goto claimed;
+
+ DRM_DEBUG_KMS("[CRTC:%d:%s] Used as slave for big joiner\n",
+ slave->base.base.id, slave->base.name);
+
+ return copy_bigjoiner_crtc_state(slave_crtc_state, new_crtc_state);
+
+claimed:
+ DRM_DEBUG_KMS("[CRTC:%d:%s] Slave is enabled as normal CRTC, but "
+ "[CRTC:%d:%s] claiming this CRTC for bigjoiner.\n",
+ slave->base.base.id, slave->base.name,
+ master->base.base.id, master->base.name);
+ return -EINVAL;
+}
+
+static int kill_bigjoiner_slave(struct intel_atomic_state *state,
+ struct intel_crtc_state *master_crtc_state)
+{
+ struct intel_crtc_state *slave_crtc_state =
+ intel_atomic_get_crtc_state(&state->base,
+ master_crtc_state->bigjoiner_linked_crtc);
+
+ if (IS_ERR(slave_crtc_state))
+ return PTR_ERR(slave_crtc_state);
+
+ slave_crtc_state->bigjoiner = master_crtc_state->bigjoiner = false;
+ slave_crtc_state->bigjoiner_slave = master_crtc_state->bigjoiner_slave = false;
+ slave_crtc_state->bigjoiner_linked_crtc = master_crtc_state->bigjoiner_linked_crtc = NULL;
+ intel_crtc_copy_uapi_to_hw_state(state, slave_crtc_state);
+ return 0;
+}
+
/**
* DOC: asynchronous flip implementation
*
@@ -15207,16 +15340,33 @@ static int intel_atomic_check(struct drm_device *dev,
continue;
}
+ /* Kill old bigjoiner link, we may re-establish afterwards */
+ if (old_crtc_state->bigjoiner && !old_crtc_state->bigjoiner_slave) {
+ ret = kill_bigjoiner_slave(state, new_crtc_state);
+ if (ret)
+ goto fail;
+ }
+
+ if (!new_crtc_state->uapi.enable) {
+ if (!new_crtc_state->bigjoiner_slave) {
+ intel_crtc_copy_uapi_to_hw_state(state, new_crtc_state);
+ any_ms = true;
+ }
+ continue;
+ }
+
ret = intel_crtc_prepare_cleared_state(state, new_crtc_state);
if (ret)
goto fail;
- if (!new_crtc_state->hw.enable)
- continue;
-
ret = intel_modeset_pipe_config(state, new_crtc_state);
if (ret)
goto fail;
+
+ ret = intel_atomic_check_bigjoiner(state, crtc, old_crtc_state,
+ new_crtc_state);
+ if (ret)
+ goto fail;
}
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5bb7adc1ff3e..b3d94e6cd7c5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1079,6 +1079,15 @@ struct intel_crtc_state {
/* enable pipe csc? */
bool csc_enable;
+ /* enable pipe big joiner? */
+ bool bigjoiner;
+
+ /* big joiner slave crtc? */
+ bool bigjoiner_slave;
+
+ /* linked crtc for bigjoiner, either slave or master */
+ struct intel_crtc *bigjoiner_linked_crtc;
+
/* Display Stream compression state */
struct {
bool compression_enable;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 5ad59610eb12..9430caf053cd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2403,12 +2403,12 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
pipe_config->lane_count,
adjusted_mode->crtc_clock,
adjusted_mode->crtc_hdisplay,
- false);
+ pipe_config->bigjoiner);
dsc_dp_slice_count =
intel_dp_dsc_get_slice_count(intel_dp,
adjusted_mode->crtc_clock,
adjusted_mode->crtc_hdisplay,
- false);
+ pipe_config->bigjoiner);
if (!dsc_max_output_bpp || !dsc_dp_slice_count) {
drm_dbg_kms(&dev_priv->drm,
"Compressed BPP/Slice Count not supported\n");
@@ -2424,14 +2424,15 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
* is greater than the maximum Cdclock and if slice count is even
* then we need to use 2 VDSC instances.
*/
- if (adjusted_mode->crtc_clock > dev_priv->max_cdclk_freq) {
- if (pipe_config->dsc.slice_count > 1) {
- pipe_config->dsc.dsc_split = true;
- } else {
+ if (adjusted_mode->crtc_clock > dev_priv->max_cdclk_freq ||
+ pipe_config->bigjoiner) {
+ if (pipe_config->dsc.slice_count < 2) {
drm_dbg_kms(&dev_priv->drm,
"Cannot split stream to use 2 VDSC instances\n");
return -EINVAL;
}
+
+ pipe_config->dsc.dsc_split = true;
}
ret = intel_dp_dsc_compute_params(&dig_port->base, pipe_config);
@@ -2502,6 +2503,11 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
intel_dp->common_rates[limits.max_clock],
limits.max_bpp, adjusted_mode->crtc_clock);
+ if ((adjusted_mode->crtc_clock > i915->max_dotclk_freq ||
+ adjusted_mode->crtc_hdisplay > 5120) &&
+ intel_dp_can_bigjoiner(intel_dp))
+ pipe_config->bigjoiner = true;
+
/*
* Optimize for slow and wide. This is the place to add alternative
* optimization policy.
@@ -2510,7 +2516,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
/* enable compression if the mode doesn't fit available BW */
drm_dbg_kms(&i915->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
- if (ret || intel_dp->force_dsc_en) {
+ if (ret || intel_dp->force_dsc_en || pipe_config->bigjoiner) {
ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
conn_state, &limits);
if (ret < 0)
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 12/23] drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (10 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 11/23] drm/i915: Try to make bigjoiner work in atomic check Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 13/23] drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner Ville Syrjala
` (14 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Manasi Navare <manasi.d.navare@intel.com>
Make vdsc work when no output is enabled. The big joiner needs VDSC
on the slave, so enable it and set the appropriate bits.
So remove encoder usage from dsc functions.
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 9 +-
drivers/gpu/drm/i915/display/intel_display.c | 3 +
drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
drivers/gpu/drm/i915/display/intel_vdsc.c | 197 ++++++++++---------
drivers/gpu/drm/i915/display/intel_vdsc.h | 6 +-
6 files changed, 108 insertions(+), 115 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 096652921453..0fecf372be11 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1492,7 +1492,7 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
- intel_dsc_get_config(encoder, pipe_config);
+ intel_dsc_get_config(pipe_config);
/* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */
pipe_config->port_clock = intel_dpll_get_freq(i915,
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index d4b1b73c7aab..439b92710fe6 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2295,13 +2295,6 @@ static void intel_ddi_get_power_domains(struct intel_encoder *encoder,
intel_phy_is_tc(dev_priv, phy))
intel_display_power_get(dev_priv,
intel_ddi_main_link_aux_domain(dig_port));
-
- /*
- * VDSC power is needed when DSC is enabled
- */
- if (crtc_state->dsc.compression_enable)
- intel_display_power_get(dev_priv,
- intel_dsc_power_domain(crtc_state));
}
void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder,
@@ -4576,7 +4569,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
return;
- intel_dsc_get_config(encoder, pipe_config);
+ intel_dsc_get_config(pipe_config);
temp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
if (temp & TRANS_DDI_PHSYNC)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e2baf342a112..aea2ff3ef8c4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7508,6 +7508,9 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state)
if (crtc_state->shared_dpll)
mask |= BIT_ULL(POWER_DOMAIN_DISPLAY_CORE);
+ if (crtc_state->dsc.compression_enable)
+ mask |= BIT_ULL(intel_dsc_power_domain(crtc_state));
+
return mask;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9430caf053cd..857f39779654 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2103,12 +2103,10 @@ static bool intel_dp_supports_fec(struct intel_dp *intel_dp,
static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
- if (!intel_dp_is_edp(intel_dp) && !crtc_state->fec_enable)
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP) && !crtc_state->fec_enable)
return false;
- return intel_dsc_source_support(encoder, crtc_state) &&
+ return intel_dsc_source_support(crtc_state) &&
drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd);
}
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index c5735c365659..e2716a67b281 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -332,11 +332,10 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
return &rc_parameters[row_index][column_index];
}
-bool intel_dsc_source_support(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state)
+bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
{
const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
enum pipe pipe = crtc->pipe;
@@ -490,11 +489,10 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
return POWER_DOMAIN_TRANSCODER_VDSC_PW2;
}
-static void intel_dsc_pps_configure(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state)
+static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
enum pipe pipe = crtc->pipe;
u32 pps_val = 0;
@@ -503,6 +501,9 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
u8 num_vdsc_instances = (crtc_state->dsc.dsc_split) ? 2 : 1;
int i = 0;
+ if (crtc_state->bigjoiner)
+ num_vdsc_instances *= 2;
+
/* Populate PICTURE_PARAMETER_SET_0 registers */
pps_val = DSC_VER_MAJ | vdsc_cfg->dsc_version_minor <<
DSC_VER_MIN_SHIFT |
@@ -973,55 +974,6 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
}
}
-void intel_dsc_get_config(struct intel_encoder *encoder,
- struct intel_crtc_state *crtc_state)
-{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- enum pipe pipe = crtc->pipe;
- enum intel_display_power_domain power_domain;
- intel_wakeref_t wakeref;
- u32 dss_ctl1, dss_ctl2, val;
-
- if (!intel_dsc_source_support(encoder, crtc_state))
- return;
-
- power_domain = intel_dsc_power_domain(crtc_state);
-
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
- if (!wakeref)
- return;
-
- if (!is_pipe_dsc(crtc_state)) {
- dss_ctl1 = intel_de_read(dev_priv, DSS_CTL1);
- dss_ctl2 = intel_de_read(dev_priv, DSS_CTL2);
- } else {
- dss_ctl1 = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
- dss_ctl2 = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL2(pipe));
- }
-
- crtc_state->dsc.compression_enable = dss_ctl2 & LEFT_BRANCH_VDSC_ENABLE;
- if (!crtc_state->dsc.compression_enable)
- goto out;
-
- crtc_state->dsc.dsc_split = (dss_ctl2 & RIGHT_BRANCH_VDSC_ENABLE) &&
- (dss_ctl1 & JOINER_ENABLE);
-
- /* FIXME: add more state readout as needed */
-
- /* PPS1 */
- if (!is_pipe_dsc(crtc_state))
- val = intel_de_read(dev_priv, DSCA_PICTURE_PARAMETER_SET_1);
- else
- val = intel_de_read(dev_priv,
- ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe));
- vdsc_cfg->bits_per_pixel = val;
- crtc_state->dsc.compressed_bpp = vdsc_cfg->bits_per_pixel >> 4;
-out:
- intel_display_power_put(dev_priv, power_domain, wakeref);
-}
-
static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
@@ -1060,77 +1012,126 @@ static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
sizeof(dp_dsc_pps_sdp));
}
+static i915_reg_t dss_ctl1_reg(const struct intel_crtc_state *crtc_state)
+{
+ enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
+
+ if (crtc_state->cpu_transcoder == TRANSCODER_EDP)
+ return DSS_CTL1;
+
+ return ICL_PIPE_DSS_CTL1(pipe);
+}
+
+static i915_reg_t dss_ctl2_reg(const struct intel_crtc_state *crtc_state)
+{
+ enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
+
+ if (crtc_state->cpu_transcoder == TRANSCODER_EDP)
+ return DSS_CTL2;
+
+ return ICL_PIPE_DSS_CTL2(pipe);
+}
+
void intel_dsc_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- enum pipe pipe = crtc->pipe;
- i915_reg_t dss_ctl1_reg, dss_ctl2_reg;
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
u32 dss_ctl1_val = 0;
u32 dss_ctl2_val = 0;
if (!crtc_state->dsc.compression_enable)
return;
- /* Enable Power wells for VDSC/joining */
- intel_display_power_get(dev_priv,
- intel_dsc_power_domain(crtc_state));
+ intel_dsc_pps_configure(crtc_state);
- intel_dsc_pps_configure(encoder, crtc_state);
-
- if (encoder->type == INTEL_OUTPUT_DSI)
- intel_dsc_dsi_pps_write(encoder, crtc_state);
- else
- intel_dsc_dp_pps_write(encoder, crtc_state);
-
- if (!is_pipe_dsc(crtc_state)) {
- dss_ctl1_reg = DSS_CTL1;
- dss_ctl2_reg = DSS_CTL2;
- } else {
- dss_ctl1_reg = ICL_PIPE_DSS_CTL1(pipe);
- dss_ctl2_reg = ICL_PIPE_DSS_CTL2(pipe);
+ if (!crtc_state->bigjoiner_slave) {
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
+ intel_dsc_dsi_pps_write(encoder, crtc_state);
+ else
+ intel_dsc_dp_pps_write(encoder, crtc_state);
}
+
dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE;
if (crtc_state->dsc.dsc_split) {
dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE;
dss_ctl1_val |= JOINER_ENABLE;
}
- intel_de_write(dev_priv, dss_ctl1_reg, dss_ctl1_val);
- intel_de_write(dev_priv, dss_ctl2_reg, dss_ctl2_val);
+ if (crtc_state->bigjoiner) {
+ dss_ctl1_val |= BIG_JOINER_ENABLE;
+ if (!crtc_state->bigjoiner_slave)
+ dss_ctl1_val |= MASTER_BIG_JOINER_ENABLE;
+ }
+ intel_de_write(dev_priv, dss_ctl1_reg(crtc_state), dss_ctl1_val);
+ intel_de_write(dev_priv, dss_ctl2_reg(crtc_state), dss_ctl2_val);
}
void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- enum pipe pipe = crtc->pipe;
- i915_reg_t dss_ctl1_reg, dss_ctl2_reg;
- u32 dss_ctl1_val = 0, dss_ctl2_val = 0;
if (!old_crtc_state->dsc.compression_enable)
return;
- if (!is_pipe_dsc(old_crtc_state)) {
- dss_ctl1_reg = DSS_CTL1;
- dss_ctl2_reg = DSS_CTL2;
- } else {
- dss_ctl1_reg = ICL_PIPE_DSS_CTL1(pipe);
- dss_ctl2_reg = ICL_PIPE_DSS_CTL2(pipe);
+ intel_de_write(dev_priv, dss_ctl1_reg(old_crtc_state), 0);
+ intel_de_write(dev_priv, dss_ctl2_reg(old_crtc_state), 0);
+}
+
+void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
+{
+ struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
+ enum intel_display_power_domain power_domain;
+ intel_wakeref_t wakeref;
+ u32 dss_ctl1, dss_ctl2, val;
+
+ if (!intel_dsc_source_support(crtc_state))
+ return;
+
+ power_domain = intel_dsc_power_domain(crtc_state);
+
+ wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ if (!wakeref)
+ return;
+
+ dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc_state));
+ dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc_state));
+
+ crtc_state->dsc.compression_enable = dss_ctl2 & LEFT_BRANCH_VDSC_ENABLE;
+ if (!crtc_state->dsc.compression_enable)
+ goto out;
+
+ crtc_state->dsc.dsc_split = (dss_ctl2 & RIGHT_BRANCH_VDSC_ENABLE) &&
+ (dss_ctl1 & JOINER_ENABLE);
+
+ if (dss_ctl1 & BIG_JOINER_ENABLE) {
+ crtc_state->bigjoiner = true;
+
+ if (!(dss_ctl1 & MASTER_BIG_JOINER_ENABLE)) {
+ crtc_state->bigjoiner_slave = true;
+ if (!WARN_ON(crtc->pipe == PIPE_A))
+ crtc_state->bigjoiner_linked_crtc =
+ intel_get_crtc_for_pipe(dev_priv, crtc->pipe - 1);
+ } else {
+ if (!WARN_ON(INTEL_NUM_PIPES(dev_priv) == crtc->pipe + 1))
+ crtc_state->bigjoiner_linked_crtc =
+ intel_get_crtc_for_pipe(dev_priv, crtc->pipe + 1);
+ }
}
- dss_ctl1_val = intel_de_read(dev_priv, dss_ctl1_reg);
- if (dss_ctl1_val & JOINER_ENABLE)
- dss_ctl1_val &= ~JOINER_ENABLE;
- intel_de_write(dev_priv, dss_ctl1_reg, dss_ctl1_val);
- dss_ctl2_val = intel_de_read(dev_priv, dss_ctl2_reg);
- if (dss_ctl2_val & LEFT_BRANCH_VDSC_ENABLE ||
- dss_ctl2_val & RIGHT_BRANCH_VDSC_ENABLE)
- dss_ctl2_val &= ~(LEFT_BRANCH_VDSC_ENABLE |
- RIGHT_BRANCH_VDSC_ENABLE);
- intel_de_write(dev_priv, dss_ctl2_reg, dss_ctl2_val);
+ /* FIXME: add more state readout as needed */
- /* Disable Power wells for VDSC/joining */
- intel_display_power_put_unchecked(dev_priv,
- intel_dsc_power_domain(old_crtc_state));
+ /* PPS1 */
+ if (!is_pipe_dsc(crtc_state))
+ val = intel_de_read(dev_priv, DSCA_PICTURE_PARAMETER_SET_1);
+ else
+ val = intel_de_read(dev_priv,
+ ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe));
+ vdsc_cfg->bits_per_pixel = val;
+ crtc_state->dsc.compressed_bpp = vdsc_cfg->bits_per_pixel >> 4;
+out:
+ intel_display_power_put(dev_priv, power_domain, wakeref);
}
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index e56a3254c214..65d301c23580 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -11,15 +11,13 @@
struct intel_encoder;
struct intel_crtc_state;
-bool intel_dsc_source_support(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state);
+bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
void intel_dsc_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
int intel_dsc_compute_params(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config);
-void intel_dsc_get_config(struct intel_encoder *encoder,
- struct intel_crtc_state *crtc_state);
+void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
enum intel_display_power_domain
intel_dsc_power_domain(const struct intel_crtc_state *crtc_state);
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 13/23] drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (11 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 12/23] drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 9:17 ` Manna, Animesh
2020-11-13 22:03 ` [Intel-gfx] [PATCH 14/23] drm/i915: HW state readout for Bigjoiner case Ville Syrjala
` (13 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Manasi Navare <manasi.d.navare@intel.com>
Enabling is done in a special sequence and so should plane updates
be. Ideally the end user never notices the second pipe is used.
This way ideally everything will be tear free, and updates are
really atomic as userspace expects it.
This uses generic modeset_enables() calls like trans port sync
but still has special handling for disable since for slave we
should not disable things like encoder, plls that are not enabled
for slave.
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
[vsyrjala: Appease checkpatch]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 25 +++-
drivers/gpu/drm/i915/display/intel_display.c | 126 +++++++++++++++----
2 files changed, 122 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 439b92710fe6..9c4ad0392025 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -28,6 +28,7 @@
#include <drm/drm_scdc_helper.h>
#include "i915_drv.h"
+#include "i915_trace.h"
#include "intel_audio.h"
#include "intel_combo_phy.h"
#include "intel_connector.h"
@@ -3664,7 +3665,8 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
/* 7.l Configure and enable FEC if needed */
intel_ddi_enable_fec(encoder, crtc_state);
- intel_dsc_enable(encoder, crtc_state);
+ if (!crtc_state->bigjoiner)
+ intel_dsc_enable(encoder, crtc_state);
}
static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -3736,7 +3738,8 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
if (!is_mst)
intel_ddi_enable_pipe_clock(encoder, crtc_state);
- intel_dsc_enable(encoder, crtc_state);
+ if (!crtc_state->bigjoiner)
+ intel_dsc_enable(encoder, crtc_state);
}
static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -3987,6 +3990,21 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
ilk_pfit_disable(old_crtc_state);
}
+ if (old_crtc_state->bigjoiner_linked_crtc) {
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(old_crtc_state->uapi.state);
+ struct intel_crtc *slave =
+ old_crtc_state->bigjoiner_linked_crtc;
+ const struct intel_crtc_state *old_slave_crtc_state =
+ intel_atomic_get_old_crtc_state(state, slave);
+
+ intel_crtc_vblank_off(old_slave_crtc_state);
+ trace_intel_pipe_disable(slave);
+
+ intel_dsc_disable(old_slave_crtc_state);
+ skl_scaler_disable(old_slave_crtc_state);
+ }
+
/*
* When called from DP MST code:
* - old_conn_state will be NULL
@@ -4205,7 +4223,8 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
{
drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);
- intel_ddi_enable_transcoder_func(encoder, crtc_state);
+ if (!crtc_state->bigjoiner_slave)
+ intel_ddi_enable_transcoder_func(encoder, crtc_state);
intel_enable_pipe(crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index aea2ff3ef8c4..60669bef659f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7138,6 +7138,45 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
intel_de_write(dev_priv, reg, val);
}
+static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
+ const struct intel_crtc_state *crtc_state)
+{
+ struct intel_crtc *master = to_intel_crtc(crtc_state->uapi.crtc);
+ struct intel_crtc_state *master_crtc_state;
+ struct drm_connector_state *conn_state;
+ struct drm_connector *conn;
+ struct intel_encoder *encoder = NULL;
+ int i;
+
+ if (crtc_state->bigjoiner_slave)
+ master = crtc_state->bigjoiner_linked_crtc;
+
+ master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
+
+ for_each_new_connector_in_state(&state->base, conn, conn_state, i) {
+ if (conn_state->crtc != &master->base)
+ continue;
+
+ encoder = to_intel_encoder(conn_state->best_encoder);
+ break;
+ }
+
+ if (!crtc_state->bigjoiner_slave) {
+ /* need to enable VDSC, which we skipped in pre-enable */
+ intel_dsc_enable(encoder, crtc_state);
+ } else {
+ /*
+ * Enable sequence steps 1-7 on bigjoiner master
+ */
+ intel_encoders_pre_pll_enable(state, master);
+ intel_enable_shared_dpll(master_crtc_state);
+ intel_encoders_pre_enable(state, master);
+
+ /* and DSC on slave */
+ intel_dsc_enable(NULL, crtc_state);
+ }
+}
+
static void hsw_crtc_enable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
@@ -7151,35 +7190,40 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
if (drm_WARN_ON(&dev_priv->drm, crtc->active))
return;
- intel_encoders_pre_pll_enable(state, crtc);
+ if (!new_crtc_state->bigjoiner) {
+ intel_encoders_pre_pll_enable(state, crtc);
- if (new_crtc_state->shared_dpll)
- intel_enable_shared_dpll(new_crtc_state);
+ if (new_crtc_state->shared_dpll)
+ intel_enable_shared_dpll(new_crtc_state);
- intel_encoders_pre_enable(state, crtc);
-
- if (!transcoder_is_dsi(cpu_transcoder))
- intel_set_transcoder_timings(new_crtc_state);
-
- intel_set_pipe_src_size(new_crtc_state);
-
- if (cpu_transcoder != TRANSCODER_EDP &&
- !transcoder_is_dsi(cpu_transcoder))
- intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder),
- new_crtc_state->pixel_multiplier - 1);
-
- if (new_crtc_state->has_pch_encoder)
- intel_cpu_transcoder_set_m_n(new_crtc_state,
- &new_crtc_state->fdi_m_n, NULL);
-
- if (!transcoder_is_dsi(cpu_transcoder)) {
- hsw_set_frame_start_delay(new_crtc_state);
- hsw_set_pipeconf(new_crtc_state);
+ intel_encoders_pre_enable(state, crtc);
+ } else {
+ icl_ddi_bigjoiner_pre_enable(state, new_crtc_state);
}
+ intel_set_pipe_src_size(new_crtc_state);
if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
bdw_set_pipemisc(new_crtc_state);
+ if (!new_crtc_state->bigjoiner_slave || !transcoder_is_dsi(cpu_transcoder)) {
+ if (!transcoder_is_dsi(cpu_transcoder))
+ intel_set_transcoder_timings(new_crtc_state);
+
+ if (cpu_transcoder != TRANSCODER_EDP &&
+ !transcoder_is_dsi(cpu_transcoder))
+ intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder),
+ new_crtc_state->pixel_multiplier - 1);
+
+ if (new_crtc_state->has_pch_encoder)
+ intel_cpu_transcoder_set_m_n(new_crtc_state,
+ &new_crtc_state->fdi_m_n, NULL);
+
+ hsw_set_frame_start_delay(new_crtc_state);
+ }
+
+ if (!transcoder_is_dsi(cpu_transcoder))
+ hsw_set_pipeconf(new_crtc_state);
+
crtc->active = true;
/* Display WA #1180: WaDisableScalarClockGating: glk, cnl */
@@ -7214,6 +7258,11 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
if (INTEL_GEN(dev_priv) >= 11)
icl_pipe_mbus_enable(crtc);
+ if (new_crtc_state->bigjoiner_slave) {
+ trace_intel_pipe_enable(crtc);
+ intel_crtc_vblank_on(new_crtc_state);
+ }
+
intel_encoders_enable(state, crtc);
if (psl_clkgate_wa) {
@@ -15669,6 +15718,9 @@ static void intel_enable_crtc(struct intel_atomic_state *state,
dev_priv->display.crtc_enable(state, crtc);
+ if (new_crtc_state->bigjoiner_slave)
+ return;
+
/* vblanks work again, re-enable pipe CRC. */
intel_crtc_enable_pipe_crc(crtc);
}
@@ -15731,8 +15783,21 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
+
intel_crtc_disable_planes(state, crtc);
+ /*
+ * We still need special handling for disabling bigjoiner master
+ * and slaves since for slave we do not have encoder or plls
+ * so we dont need to disable those.
+ */
+ if (old_crtc_state->bigjoiner) {
+ intel_crtc_disable_planes(state,
+ old_crtc_state->bigjoiner_linked_crtc);
+ old_crtc_state->bigjoiner_linked_crtc->active = false;
+ }
+
/*
* We need to disable pipe CRC before disabling the pipe,
* or we race against vblank off.
@@ -15761,7 +15826,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
/* Only disable port sync and MST slaves */
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
- if (!needs_modeset(new_crtc_state))
+ if (!needs_modeset(new_crtc_state) || old_crtc_state->bigjoiner)
continue;
if (!old_crtc_state->hw.active)
@@ -15786,10 +15851,18 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
if (!needs_modeset(new_crtc_state) ||
- (handled & BIT(crtc->pipe)))
+ (handled & BIT(crtc->pipe)) ||
+ old_crtc_state->bigjoiner_slave)
continue;
intel_pre_plane_update(state, crtc);
+ if (old_crtc_state->bigjoiner) {
+ struct intel_crtc *slave =
+ old_crtc_state->bigjoiner_linked_crtc;
+
+ intel_pre_plane_update(state, slave);
+ }
+
if (old_crtc_state->hw.active)
intel_old_crtc_state_disables(state, old_crtc_state,
new_crtc_state, crtc);
@@ -15887,7 +15960,8 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
continue;
if (intel_dp_mst_is_slave_trans(new_crtc_state) ||
- is_trans_port_sync_master(new_crtc_state))
+ is_trans_port_sync_master(new_crtc_state) ||
+ (new_crtc_state->bigjoiner && !new_crtc_state->bigjoiner_slave))
continue;
modeset_pipes &= ~BIT(pipe);
@@ -15897,7 +15971,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
/*
* Then we enable all remaining pipes that depend on other
- * pipes: MST slaves and port sync masters.
+ * pipes: MST slaves and port sync masters, big joiner master
*/
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
enum pipe pipe = crtc->pipe;
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 14/23] drm/i915: HW state readout for Bigjoiner case
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (12 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 13/23] drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 9:51 ` Manna, Animesh
2020-11-13 22:03 ` [Intel-gfx] [PATCH 15/23] drm/i915: Add crtcs affected by bigjoiner to the state Ville Syrjala
` (12 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Manasi Navare <manasi.d.navare@intel.com>
Skip iterating over bigjoiner slaves, only the master has the state we
care about.
Add the width of the bigjoiner slave to the reconstructed fb.
Hide the bigjoiner slave to userspace, and double the mode on bigjoiner
master.
And last, disable bigjoiner slave from primary if reconstruction fails.
v3:
* Fix the ddi_get_config slave error (Ankit Nautiyal)
v2:
* Unsupported bigjoiner config for initial fb (Ville)
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
[vsyrjala:
* Don't do any hw->uapi state copy for bigjoiner slave
* We still have hw.mode so no need to pass it in
* Appease checkpatch]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 -
drivers/gpu/drm/i915/display/intel_ddi.c | 37 ++-
drivers/gpu/drm/i915/display/intel_display.c | 291 ++++++++++++------
.../drm/i915/display/intel_display_types.h | 1 +
4 files changed, 230 insertions(+), 101 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 0fecf372be11..104a423e0cd5 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1492,8 +1492,6 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
- intel_dsc_get_config(pipe_config);
-
/* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */
pipe_config->port_clock = intel_dpll_get_freq(i915,
pipe_config->shared_dpll);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9c4ad0392025..aa444c428949 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4576,20 +4576,14 @@ static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
crtc_state->sync_mode_slaves_mask);
}
-void intel_ddi_get_config(struct intel_encoder *encoder,
- struct intel_crtc_state *pipe_config)
+static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
+ struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
u32 temp, flags = 0;
- /* XXX: DSI transcoder paranoia */
- if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
- return;
-
- intel_dsc_get_config(pipe_config);
-
temp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
if (temp & TRANS_DDI_PHSYNC)
flags |= DRM_MODE_FLAG_PHSYNC;
@@ -4683,6 +4677,30 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
default:
break;
}
+}
+
+void intel_ddi_get_config(struct intel_encoder *encoder,
+ struct intel_crtc_state *pipe_config)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
+
+ /* XXX: DSI transcoder paranoia */
+ if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
+ return;
+
+ if (pipe_config->bigjoiner_slave) {
+ /* read out pipe settings from master */
+ enum transcoder save = pipe_config->cpu_transcoder;
+
+ /* Our own transcoder needs to be disabled when reading it in intel_ddi_read_func_ctl() */
+ WARN_ON(pipe_config->output_types);
+ pipe_config->cpu_transcoder = (enum transcoder)pipe_config->bigjoiner_linked_crtc->pipe;
+ intel_ddi_read_func_ctl(encoder, pipe_config);
+ pipe_config->cpu_transcoder = save;
+ } else {
+ intel_ddi_read_func_ctl(encoder, pipe_config);
+ }
pipe_config->has_audio =
intel_ddi_is_audio_enabled(dev_priv, cpu_transcoder);
@@ -4708,7 +4726,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
}
- intel_ddi_clock_get(encoder, pipe_config);
+ if (!pipe_config->bigjoiner_slave)
+ intel_ddi_clock_get(encoder, pipe_config);
if (IS_GEN9_LP(dev_priv))
pipe_config->lane_lat_optim_mask =
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 60669bef659f..07bee5caacfe 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3631,6 +3631,8 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
struct intel_plane *intel_plane = to_intel_plane(primary);
struct intel_plane_state *intel_state =
to_intel_plane_state(plane_state);
+ struct intel_crtc_state *crtc_state =
+ to_intel_crtc_state(intel_crtc->base.state);
struct drm_framebuffer *fb;
struct i915_vma *vma;
@@ -3653,7 +3655,7 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
if (c == &intel_crtc->base)
continue;
- if (!to_intel_crtc(c)->active)
+ if (!to_intel_crtc_state(c->state)->uapi.active)
continue;
state = to_intel_plane_state(c->primary->state);
@@ -3675,6 +3677,11 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
* pretend the BIOS never had it enabled.
*/
intel_plane_disable_noatomic(intel_crtc, intel_plane);
+ if (crtc_state->bigjoiner) {
+ struct intel_crtc *slave =
+ crtc_state->bigjoiner_linked_crtc;
+ intel_plane_disable_noatomic(slave, to_intel_plane(slave->base.primary));
+ }
return;
@@ -8220,13 +8227,27 @@ static void intel_crtc_readout_derived_state(struct intel_crtc_state *crtc_state
drm_mode_copy(pipe_mode, adjusted_mode);
+ if (crtc_state->bigjoiner) {
+ /*
+ * transcoder is programmed to the full mode,
+ * but pipe timings are half of the transcoder mode
+ */
+ pipe_mode->crtc_hdisplay /= 2;
+ pipe_mode->crtc_hblank_start /= 2;
+ pipe_mode->crtc_hblank_end /= 2;
+ pipe_mode->crtc_hsync_start /= 2;
+ pipe_mode->crtc_hsync_end /= 2;
+ pipe_mode->crtc_htotal /= 2;
+ pipe_mode->crtc_clock /= 2;
+ }
+
intel_mode_from_crtc_timings(pipe_mode, pipe_mode);
intel_mode_from_crtc_timings(adjusted_mode, adjusted_mode);
intel_crtc_compute_pixel_rate(crtc_state);
drm_mode_copy(mode, adjusted_mode);
- mode->hdisplay = crtc_state->pipe_src_w;
+ mode->hdisplay = crtc_state->pipe_src_w << crtc_state->bigjoiner;
mode->vdisplay = crtc_state->pipe_src_h;
}
@@ -10698,6 +10719,7 @@ static void
skl_get_initial_plane_config(struct intel_crtc *crtc,
struct intel_initial_plane_config *plane_config)
{
+ struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
@@ -10714,6 +10736,12 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
drm_WARN_ON(dev, pipe != crtc->pipe);
+ if (crtc_state->bigjoiner) {
+ drm_dbg_kms(&dev_priv->drm,
+ "Unsupported bigjoiner configuration for initial FB\n");
+ return;
+ }
+
intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL);
if (!intel_fb) {
drm_dbg_kms(&dev_priv->drm, "failed to alloc fb\n");
@@ -11320,6 +11348,8 @@ static void hsw_get_ddi_port_state(struct intel_crtc *crtc,
} else {
tmp = intel_de_read(dev_priv,
TRANS_DDI_FUNC_CTL(cpu_transcoder));
+ if (!(tmp & TRANS_DDI_FUNC_ENABLE))
+ return;
if (INTEL_GEN(dev_priv) >= 12)
port = TGL_TRANS_DDI_FUNC_CTL_VAL_TO_PORT(tmp);
else
@@ -11395,10 +11425,19 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
active = true;
}
- if (!active)
- goto out;
+ intel_dsc_get_config(pipe_config);
- if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
+ if (!active) {
+ /* bigjoiner slave doesn't enable transcoder */
+ if (!pipe_config->bigjoiner_slave)
+ goto out;
+
+ active = true;
+ pipe_config->pixel_multiplier = 1;
+
+ /* we cannot read out most state, so don't bother.. */
+ pipe_config->quirks |= PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE;
+ } else if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
INTEL_GEN(dev_priv) >= 11) {
hsw_get_ddi_port_state(crtc, pipe_config);
intel_get_transcoder_timings(crtc, pipe_config);
@@ -11473,7 +11512,10 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
}
}
- if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
+ if (pipe_config->bigjoiner_slave) {
+ /* Cannot be read out as a slave, set to 0. */
+ pipe_config->pixel_multiplier = 0;
+ } else if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
!transcoder_is_dsi(pipe_config->cpu_transcoder)) {
pipe_config->pixel_multiplier =
intel_de_read(dev_priv,
@@ -13516,6 +13558,9 @@ intel_crtc_copy_uapi_to_hw_state(struct intel_atomic_state *state,
static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state)
{
+ if (crtc_state->bigjoiner_slave)
+ return;
+
crtc_state->uapi.enable = crtc_state->hw.enable;
crtc_state->uapi.active = crtc_state->hw.active;
drm_WARN_ON(crtc_state->uapi.crtc->dev,
@@ -14157,35 +14202,53 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_X(output_types);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
+ /* FIXME do the readout properly and get rid of this quirk */
+ if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
- PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
+ PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
- PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
+
+ PIPE_CONF_CHECK_I(pixel_multiplier);
+
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_INTERLACE);
+
+ if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_PHSYNC);
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_NHSYNC);
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_PVSYNC);
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_NVSYNC);
+ }
+ }
- PIPE_CONF_CHECK_I(pixel_multiplier);
PIPE_CONF_CHECK_I(output_format);
PIPE_CONF_CHECK_BOOL(has_hdmi_sink);
if ((INTEL_GEN(dev_priv) < 8 && !IS_HASWELL(dev_priv)) ||
@@ -14195,24 +14258,12 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(hdmi_scrambling);
PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);
PIPE_CONF_CHECK_BOOL(has_infoframe);
- PIPE_CONF_CHECK_BOOL(fec_enable);
+ /* FIXME do the readout properly and get rid of this quirk */
+ if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
+ PIPE_CONF_CHECK_BOOL(fec_enable);
PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_INTERLACE);
-
- if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_PHSYNC);
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_NHSYNC);
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_PVSYNC);
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_NVSYNC);
- }
-
PIPE_CONF_CHECK_X(gmch_pfit.control);
/* pfit ratios are autocomputed by the hw on gen4+ */
if (INTEL_GEN(dev_priv) < 4)
@@ -14238,7 +14289,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
}
PIPE_CONF_CHECK_I(scaler_state.scaler_id);
- PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
+ /* FIXME do the readout properly and get rid of this quirk */
+ if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
+ PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
PIPE_CONF_CHECK_X(gamma_mode);
if (IS_CHERRYVIEW(dev_priv))
@@ -14259,49 +14312,53 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(double_wide);
PIPE_CONF_CHECK_P(shared_dpll);
- PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
- PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
- PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
- PIPE_CONF_CHECK_X(dpll_hw_state.fp1);
- PIPE_CONF_CHECK_X(dpll_hw_state.wrpll);
- PIPE_CONF_CHECK_X(dpll_hw_state.spll);
- PIPE_CONF_CHECK_X(dpll_hw_state.ctrl1);
- PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr1);
- PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr2);
- PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr0);
- PIPE_CONF_CHECK_X(dpll_hw_state.ebb0);
- PIPE_CONF_CHECK_X(dpll_hw_state.ebb4);
- PIPE_CONF_CHECK_X(dpll_hw_state.pll0);
- PIPE_CONF_CHECK_X(dpll_hw_state.pll1);
- PIPE_CONF_CHECK_X(dpll_hw_state.pll2);
- PIPE_CONF_CHECK_X(dpll_hw_state.pll3);
- PIPE_CONF_CHECK_X(dpll_hw_state.pll6);
- PIPE_CONF_CHECK_X(dpll_hw_state.pll8);
- PIPE_CONF_CHECK_X(dpll_hw_state.pll9);
- PIPE_CONF_CHECK_X(dpll_hw_state.pll10);
- PIPE_CONF_CHECK_X(dpll_hw_state.pcsdw12);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_refclkin_ctl);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_coreclkctl1);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_hsclkctl);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div0);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div1);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_lf);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_frac_lock);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_ssc);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_bias);
- PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);
- PIPE_CONF_CHECK_X(dsi_pll.ctrl);
- PIPE_CONF_CHECK_X(dsi_pll.div);
+ /* FIXME do the readout properly and get rid of this quirk */
+ if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
+ PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
+ PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
+ PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
+ PIPE_CONF_CHECK_X(dpll_hw_state.fp1);
+ PIPE_CONF_CHECK_X(dpll_hw_state.wrpll);
+ PIPE_CONF_CHECK_X(dpll_hw_state.spll);
+ PIPE_CONF_CHECK_X(dpll_hw_state.ctrl1);
+ PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr1);
+ PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr2);
+ PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr0);
+ PIPE_CONF_CHECK_X(dpll_hw_state.ebb0);
+ PIPE_CONF_CHECK_X(dpll_hw_state.ebb4);
+ PIPE_CONF_CHECK_X(dpll_hw_state.pll0);
+ PIPE_CONF_CHECK_X(dpll_hw_state.pll1);
+ PIPE_CONF_CHECK_X(dpll_hw_state.pll2);
+ PIPE_CONF_CHECK_X(dpll_hw_state.pll3);
+ PIPE_CONF_CHECK_X(dpll_hw_state.pll6);
+ PIPE_CONF_CHECK_X(dpll_hw_state.pll8);
+ PIPE_CONF_CHECK_X(dpll_hw_state.pll9);
+ PIPE_CONF_CHECK_X(dpll_hw_state.pll10);
+ PIPE_CONF_CHECK_X(dpll_hw_state.pcsdw12);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_refclkin_ctl);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_coreclkctl1);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_hsclkctl);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div0);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div1);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_lf);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_frac_lock);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_ssc);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_bias);
+ PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);
- if (IS_G4X(dev_priv) || INTEL_GEN(dev_priv) >= 5)
- PIPE_CONF_CHECK_I(pipe_bpp);
+ PIPE_CONF_CHECK_X(dsi_pll.ctrl);
+ PIPE_CONF_CHECK_X(dsi_pll.div);
- PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
- PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
- PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
+ if (IS_G4X(dev_priv) || INTEL_GEN(dev_priv) >= 5)
+ PIPE_CONF_CHECK_I(pipe_bpp);
- PIPE_CONF_CHECK_I(min_voltage_level);
+ PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
+ PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
+ PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
+
+ PIPE_CONF_CHECK_I(min_voltage_level);
+ }
PIPE_CONF_CHECK_X(infoframes.enable);
PIPE_CONF_CHECK_X(infoframes.gcp);
@@ -14313,6 +14370,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_X(sync_mode_slaves_mask);
PIPE_CONF_CHECK_I(master_transcoder);
+ PIPE_CONF_CHECK_BOOL(bigjoiner);
+ PIPE_CONF_CHECK_BOOL(bigjoiner_slave);
+ PIPE_CONF_CHECK_P(bigjoiner_linked_crtc);
PIPE_CONF_CHECK_I(dsc.compression_enable);
PIPE_CONF_CHECK_I(dsc.dsc_split);
@@ -14584,6 +14644,7 @@ verify_crtc_state(struct intel_crtc *crtc,
struct intel_encoder *encoder;
struct intel_crtc_state *pipe_config = old_crtc_state;
struct drm_atomic_state *state = old_crtc_state->uapi.state;
+ struct intel_crtc *master = crtc;
__drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi);
intel_crtc_free_hw_state(old_crtc_state);
@@ -14611,7 +14672,10 @@ verify_crtc_state(struct intel_crtc *crtc,
"(expected %i, found %i)\n",
new_crtc_state->hw.active, crtc->active);
- for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
+ if (new_crtc_state->bigjoiner_slave)
+ master = new_crtc_state->bigjoiner_linked_crtc;
+
+ for_each_encoder_on_crtc(dev, &master->base, encoder) {
enum pipe pipe;
bool active;
@@ -14621,7 +14685,7 @@ verify_crtc_state(struct intel_crtc *crtc,
encoder->base.base.id, active,
new_crtc_state->hw.active);
- I915_STATE_WARN(active && crtc->pipe != pipe,
+ I915_STATE_WARN(active && master->pipe != pipe,
"Encoder connected to wrong pipe %c\n",
pipe_name(pipe));
@@ -18527,7 +18591,7 @@ int intel_modeset_init_nogem(struct drm_i915_private *i915)
for_each_intel_crtc(dev, crtc) {
struct intel_initial_plane_config plane_config = {};
- if (!crtc->active)
+ if (!to_intel_crtc_state(crtc->base.state)->uapi.active)
continue;
/*
@@ -18838,7 +18902,8 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
/* Adjust the state of the output pipe according to whether we
* have active connectors/encoders. */
- if (crtc_state->hw.active && !intel_crtc_has_encoders(crtc))
+ if (crtc_state->hw.active && !intel_crtc_has_encoders(crtc) &&
+ !crtc_state->bigjoiner_slave)
intel_crtc_disable_noatomic(crtc, ctx);
if (crtc_state->hw.active || HAS_GMCH(dev_priv)) {
@@ -19053,6 +19118,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
intel_encoder_get_config(encoder, crtc_state);
if (encoder->sync_state)
encoder->sync_state(encoder, crtc_state);
+
+ /* read out to slave crtc as well for bigjoiner */
+ if (crtc_state->bigjoiner) {
+ /* encoder should read be linked to bigjoiner master */
+ WARN_ON(crtc_state->bigjoiner_slave);
+
+ crtc = crtc_state->bigjoiner_linked_crtc;
+ crtc_state = to_intel_crtc_state(crtc->base.state);
+ intel_encoder_get_config(encoder, crtc_state);
+ }
} else {
encoder->base.crtc = NULL;
}
@@ -19108,6 +19183,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
struct intel_plane *plane;
int min_cdclk = 0;
+ if (crtc_state->bigjoiner_slave)
+ continue;
+
if (crtc_state->hw.active) {
/*
* The initial mode needs to be set in order to keep
@@ -19168,6 +19246,39 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
intel_bw_crtc_update(bw_state, crtc_state);
intel_pipe_config_sanity_check(dev_priv, crtc_state);
+
+ /* discard our incomplete slave state, copy it from master */
+ if (crtc_state->bigjoiner && crtc_state->hw.active) {
+ struct intel_crtc *slave = crtc_state->bigjoiner_linked_crtc;
+ struct intel_crtc_state *slave_crtc_state =
+ to_intel_crtc_state(slave->base.state);
+
+ copy_bigjoiner_crtc_state(slave_crtc_state, crtc_state);
+ slave->base.mode = crtc->base.mode;
+
+ cdclk_state->min_cdclk[slave->pipe] = min_cdclk;
+ cdclk_state->min_voltage_level[slave->pipe] =
+ crtc_state->min_voltage_level;
+
+ for_each_intel_plane_on_crtc(&dev_priv->drm, slave, plane) {
+ const struct intel_plane_state *plane_state =
+ to_intel_plane_state(plane->base.state);
+
+ /*
+ * FIXME don't have the fb yet, so can't
+ * use intel_plane_data_rate() :(
+ */
+ if (plane_state->uapi.visible)
+ crtc_state->data_rate[plane->id] =
+ 4 * crtc_state->pixel_rate;
+ else
+ crtc_state->data_rate[plane->id] = 0;
+ }
+
+ intel_bw_crtc_update(bw_state, slave_crtc_state);
+ drm_calc_timestamping_constants(&slave->base,
+ &slave_crtc_state->hw.adjusted_mode);
+ }
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index b3d94e6cd7c5..ce82d654d0f2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -850,6 +850,7 @@ struct intel_crtc_state {
* accordingly.
*/
#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
+#define PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE (1<<1) /* bigjoiner slave, partial readout */
unsigned long quirks;
unsigned fb_bits; /* framebuffers to flip */
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 15/23] drm/i915: Add crtcs affected by bigjoiner to the state
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (13 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 14/23] drm/i915: HW state readout for Bigjoiner case Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-16 23:37 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 16/23] drm/i915: Add planes " Ville Syrjala
` (11 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make sure both crtcs participating in the bigjoiner stuff
are in the state.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 25 ++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 07bee5caacfe..465877097582 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15422,6 +15422,27 @@ static int intel_atomic_check_async(struct intel_atomic_state *state)
return 0;
}
+static int intel_bigjoiner_add_affected_crtcs(struct intel_atomic_state *state)
+{
+ const struct intel_crtc_state *crtc_state;
+ struct intel_crtc *crtc;
+ int i;
+
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ struct intel_crtc_state *linked_crtc_state;
+
+ if (!crtc_state->bigjoiner)
+ continue;
+
+ linked_crtc_state = intel_atomic_get_crtc_state(&state->base,
+ crtc_state->bigjoiner_linked_crtc);
+ if (IS_ERR(linked_crtc_state))
+ return PTR_ERR(linked_crtc_state);
+ }
+
+ return 0;
+}
+
/**
* intel_atomic_check - validate state object
* @dev: drm device
@@ -15447,6 +15468,10 @@ static int intel_atomic_check(struct drm_device *dev,
if (ret)
goto fail;
+ ret = intel_bigjoiner_add_affected_crtcs(state);
+ if (ret)
+ goto fail;
+
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
if (!needs_modeset(new_crtc_state)) {
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 16/23] drm/i915: Add planes affected by bigjoiner to the state
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (14 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 15/23] drm/i915: Add crtcs affected by bigjoiner to the state Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 0:09 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 17/23] drm/i915: Get the uapi state from the correct plane when bigjoiner is used Ville Syrjala
` (10 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make sure both the bigjoiner "master" and "slave" plane are
in the state whenever either of them is in the state.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 465877097582..1118ff73c0d4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15069,6 +15069,44 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv)
IS_IVYBRIDGE(dev_priv) || (INTEL_GEN(dev_priv) >= 11);
}
+static int intel_crtc_add_bigjoiner_planes(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_crtc *other)
+{
+ const struct intel_plane_state *plane_state;
+ struct intel_plane *plane;
+ u8 plane_ids = 0;
+ int i;
+
+ for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
+ if (plane->pipe == crtc->pipe)
+ plane_ids |= BIT(plane->id);
+ }
+
+ return intel_crtc_add_planes_to_state(state, other, plane_ids);
+}
+
+static int intel_bigjoiner_add_affected_planes(struct intel_atomic_state *state)
+{
+ const struct intel_crtc_state *crtc_state;
+ struct intel_crtc *crtc;
+ int i;
+
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+ int ret;
+
+ if (!crtc_state->bigjoiner)
+ continue;
+
+ ret = intel_crtc_add_bigjoiner_planes(state, crtc,
+ crtc_state->bigjoiner_linked_crtc);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static int intel_atomic_check_planes(struct intel_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
@@ -15082,6 +15120,10 @@ static int intel_atomic_check_planes(struct intel_atomic_state *state)
if (ret)
return ret;
+ ret = intel_bigjoiner_add_affected_planes(state);
+ if (ret)
+ return ret;
+
for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
ret = intel_plane_atomic_check(state, plane);
if (ret) {
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 17/23] drm/i915: Get the uapi state from the correct plane when bigjoiner is used
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (15 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 16/23] drm/i915: Add planes " Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 0:24 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 18/23] drm/i915: Add bigjoiner aware plane clipping checks Ville Syrjala
` (9 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
When using bigjoiner userspace is only controlling the "master"
plane, so use its uapi state for the "slave" plane as well.
hw.crtc needs a bit of magic since we don't want to copy that from
the uapi state (as it points to the wrong pipe for the "slave
" plane). Instead we pass the right crtc in explicitly but only
assign it when the uapi state indicates the plane to be logically
enabled (ie. uapi.crtc != NULL).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 59 +++++++++++++------
.../gpu/drm/i915/display/intel_atomic_plane.h | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 5 +-
3 files changed, 46 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index f47558efb3c2..7abb0e3d6c0b 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -247,11 +247,19 @@ static void intel_plane_clear_hw_state(struct intel_plane_state *plane_state)
}
void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
- const struct intel_plane_state *from_plane_state)
+ const struct intel_plane_state *from_plane_state,
+ struct intel_crtc *crtc)
{
intel_plane_clear_hw_state(plane_state);
- plane_state->hw.crtc = from_plane_state->uapi.crtc;
+ /*
+ * For the bigjoiner slave uapi.crtc will point at
+ * the master crtc. So we explicitly assign the right
+ * slave crtc to hw.crtc. uapi.crtc!=NULL simply indicates
+ * the plane is logically enabled on the uapi level.
+ */
+ plane_state->hw.crtc = from_plane_state->uapi.crtc ? &crtc->base : NULL;
+
plane_state->hw.fb = from_plane_state->uapi.fb;
if (plane_state->hw.fb)
drm_framebuffer_get(plane_state->hw.fb);
@@ -331,15 +339,16 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
old_plane_state, new_plane_state);
}
-static struct intel_crtc *
-get_crtc_from_states(const struct intel_plane_state *old_plane_state,
- const struct intel_plane_state *new_plane_state)
+static struct intel_plane *
+intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
{
- if (new_plane_state->uapi.crtc)
- return to_intel_crtc(new_plane_state->uapi.crtc);
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_plane *plane;
- if (old_plane_state->uapi.crtc)
- return to_intel_crtc(old_plane_state->uapi.crtc);
+ for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
+ if (plane->id == plane_id)
+ return plane;
+ }
return NULL;
}
@@ -347,23 +356,37 @@ get_crtc_from_states(const struct intel_plane_state *old_plane_state,
int intel_plane_atomic_check(struct intel_atomic_state *state,
struct intel_plane *plane)
{
+ struct drm_i915_private *i915 = to_i915(state->base.dev);
struct intel_plane_state *new_plane_state =
intel_atomic_get_new_plane_state(state, plane);
const struct intel_plane_state *old_plane_state =
intel_atomic_get_old_plane_state(state, plane);
- struct intel_crtc *crtc =
- get_crtc_from_states(old_plane_state, new_plane_state);
- const struct intel_crtc_state *old_crtc_state;
- struct intel_crtc_state *new_crtc_state;
+ const struct intel_plane_state *new_master_plane_state;
+ struct intel_crtc *crtc = intel_get_crtc_for_pipe(i915, plane->pipe);
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+ struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+
+ if (new_crtc_state && new_crtc_state->bigjoiner_slave) {
+ struct intel_plane *master_plane =
+ intel_crtc_get_plane(new_crtc_state->bigjoiner_linked_crtc,
+ plane->id);
+
+ new_master_plane_state =
+ intel_atomic_get_new_plane_state(state, master_plane);
+ } else {
+ new_master_plane_state = new_plane_state;
+ }
+
+ intel_plane_copy_uapi_to_hw_state(new_plane_state,
+ new_master_plane_state,
+ crtc);
- intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state);
new_plane_state->uapi.visible = false;
- if (!crtc)
+ if (!new_crtc_state)
return 0;
- old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);
- new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
-
return intel_plane_atomic_check_with_state(old_crtc_state,
new_crtc_state,
old_plane_state,
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 24a3a148aa62..5cae9db41062 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -24,7 +24,8 @@ unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state);
void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
- const struct intel_plane_state *from_plane_state);
+ const struct intel_plane_state *from_plane_state,
+ struct intel_crtc *crtc);
void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
const struct intel_plane_state *from_plane_state);
void intel_update_plane(struct intel_plane *plane,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1118ff73c0d4..55e0a2f21d98 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3718,7 +3718,8 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
drm_framebuffer_get(fb);
plane_state->crtc = &intel_crtc->base;
- intel_plane_copy_uapi_to_hw_state(intel_state, intel_state);
+ intel_plane_copy_uapi_to_hw_state(intel_state, intel_state,
+ intel_crtc);
intel_frontbuffer_flush(to_intel_frontbuffer(fb), ORIGIN_DIRTYFB);
@@ -16942,7 +16943,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
new_plane_state->uapi.crtc_w = crtc_w;
new_plane_state->uapi.crtc_h = crtc_h;
- intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state);
+ intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state, crtc);
ret = intel_plane_atomic_check_with_state(crtc_state, new_crtc_state,
old_plane_state, new_plane_state);
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 18/23] drm/i915: Add bigjoiner aware plane clipping checks
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (16 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 17/23] drm/i915: Get the uapi state from the correct plane when bigjoiner is used Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 14:54 ` Lisovskiy, Stanislav
2020-11-13 22:03 ` [Intel-gfx] [PATCH 19/23] drm/i915: Add debugfs dumping for bigjoiner, v3 Ville Syrjala
` (8 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
We need to look at hw.fb for the framebuffer, and add the translation
for the slave_plane_state. With these changes we set the correct
rectangle on the bigjoiner slave, and don't set incorrect
src/dst/visibility on the slave plane.
v2:
* Manual rebase (Manasi)
v3:
* hw.rotation instead of uapi.rotation (Ville)
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 60 +++++++++++++++++++
.../gpu/drm/i915/display/intel_atomic_plane.h | 4 ++
drivers/gpu/drm/i915/display/intel_display.c | 19 +++---
drivers/gpu/drm/i915/display/intel_sprite.c | 21 +++----
4 files changed, 80 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 7abb0e3d6c0b..7e9f84b00859 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -271,6 +271,9 @@ void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
plane_state->hw.color_encoding = from_plane_state->uapi.color_encoding;
plane_state->hw.color_range = from_plane_state->uapi.color_range;
plane_state->hw.scaling_filter = from_plane_state->uapi.scaling_filter;
+
+ plane_state->uapi.src = drm_plane_state_src(&from_plane_state->uapi);
+ plane_state->uapi.dst = drm_plane_state_dest(&from_plane_state->uapi);
}
void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
@@ -514,6 +517,63 @@ void i9xx_update_planes_on_crtc(struct intel_atomic_state *state,
}
}
+int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
+ struct intel_crtc_state *crtc_state,
+ int min_scale, int max_scale,
+ bool can_position)
+{
+ struct drm_framebuffer *fb = plane_state->hw.fb;
+ struct drm_rect *src = &plane_state->uapi.src;
+ struct drm_rect *dst = &plane_state->uapi.dst;
+ unsigned int rotation = plane_state->hw.rotation;
+ struct drm_rect clip = {};
+ int hscale, vscale;
+
+ if (!fb) {
+ plane_state->uapi.visible = false;
+ return 0;
+ }
+
+ drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation);
+
+ /* Check scaling */
+ hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale);
+ vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale);
+ if (hscale < 0 || vscale < 0) {
+ DRM_DEBUG_KMS("Invalid scaling of plane\n");
+ drm_rect_debug_print("src: ", src, true);
+ drm_rect_debug_print("dst: ", dst, false);
+ return -ERANGE;
+ }
+
+ if (crtc_state->hw.enable) {
+ clip.x2 = crtc_state->pipe_src_w;
+ clip.y2 = crtc_state->pipe_src_h;
+ }
+
+ /* right side of the image is on the slave crtc, adjust dst to match */
+ if (crtc_state->bigjoiner_slave)
+ drm_rect_translate(dst, -crtc_state->pipe_src_w, 0);
+
+ /*
+ * FIXME: This might need further adjustment for seamless scaling
+ * with phase information, for the 2p2 and 2p1 scenarios.
+ */
+ plane_state->uapi.visible = drm_rect_clip_scaled(src, dst, &clip);
+
+ drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, rotation);
+
+ if (!can_position && plane_state->uapi.visible &&
+ !drm_rect_equals(dst, &clip)) {
+ DRM_DEBUG_KMS("Plane must cover entire CRTC\n");
+ drm_rect_debug_print("dst: ", dst, false);
+ drm_rect_debug_print("clip: ", &clip, false);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
.prepare_fb = intel_prepare_plane_fb,
.cleanup_fb = intel_cleanup_plane_fb,
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 5cae9db41062..5c78a087ed86 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -55,6 +55,10 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
int intel_plane_calc_min_cdclk(struct intel_atomic_state *state,
struct intel_plane *plane,
bool *need_cdclk_calc);
+int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
+ struct intel_crtc_state *crtc_state,
+ int min_scale, int max_scale,
+ bool can_position);
void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 55e0a2f21d98..eeb50413fc8e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4315,12 +4315,10 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state,
if (ret)
return ret;
- ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
- &crtc_state->uapi,
- DRM_PLANE_HELPER_NO_SCALING,
- DRM_PLANE_HELPER_NO_SCALING,
- i9xx_plane_has_windowing(plane),
- true);
+ ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
+ DRM_PLANE_HELPER_NO_SCALING,
+ DRM_PLANE_HELPER_NO_SCALING,
+ i9xx_plane_has_windowing(plane));
if (ret)
return ret;
@@ -11660,11 +11658,10 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
return -EINVAL;
}
- ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
- &crtc_state->uapi,
- DRM_PLANE_HELPER_NO_SCALING,
- DRM_PLANE_HELPER_NO_SCALING,
- true, true);
+ ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
+ DRM_PLANE_HELPER_NO_SCALING,
+ DRM_PLANE_HELPER_NO_SCALING,
+ true);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index a3ab44694118..019a2d6d807a 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2187,10 +2187,8 @@ g4x_sprite_check(struct intel_crtc_state *crtc_state,
}
}
- ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
- &crtc_state->uapi,
- min_scale, max_scale,
- true, true);
+ ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
+ min_scale, max_scale, true);
if (ret)
return ret;
@@ -2245,11 +2243,10 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state,
if (ret)
return ret;
- ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
- &crtc_state->uapi,
- DRM_PLANE_HELPER_NO_SCALING,
- DRM_PLANE_HELPER_NO_SCALING,
- true, true);
+ ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
+ DRM_PLANE_HELPER_NO_SCALING,
+ DRM_PLANE_HELPER_NO_SCALING,
+ true);
if (ret)
return ret;
@@ -2456,10 +2453,8 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state,
max_scale = skl_plane_max_scale(dev_priv, fb);
}
- ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
- &crtc_state->uapi,
- min_scale, max_scale,
- true, true);
+ ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
+ min_scale, max_scale, true);
if (ret)
return ret;
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 19/23] drm/i915: Add debugfs dumping for bigjoiner, v3.
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (17 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 18/23] drm/i915: Add bigjoiner aware plane clipping checks Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 11:07 ` Manna, Animesh
2020-11-13 22:03 ` [Intel-gfx] [PATCH 20/23] drm/i915: Disable legacy cursor fastpath for bigjoiner Ville Syrjala
` (7 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Dump debugfs and planar links as well, this will make it easier to debug
when things go wrong.
v4:
* Rebase
Changes since v1:
- Report planar slaves as such, now that we have the plane_state switch.
Changes since v2:
- Rebase on top of the new plane format dumping
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
.../drm/i915/display/intel_display_debugfs.c | 25 ++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 00b79593bcef..ca41e8c00ad7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -755,6 +755,17 @@ static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
rotation);
}
+static const char *plane_visibility(const struct intel_plane_state *plane_state)
+{
+ if (plane_state->uapi.visible)
+ return "visible";
+
+ if (plane_state->planar_slave)
+ return "planar-slave";
+
+ return "hidden";
+}
+
static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
{
const struct intel_plane_state *plane_state =
@@ -773,13 +784,19 @@ static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
plane_rotation(rot_str, sizeof(rot_str),
plane_state->uapi.rotation);
- seq_printf(m, "\t\tuapi: [FB:%d] %s,0x%llx,%dx%d, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
+ seq_printf(m, "\t\tuapi: [FB:%d] %s,0x%llx,%dx%d, visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
fb ? fb->base.id : 0, fb ? format_name.str : "n/a",
fb ? fb->modifier : 0,
fb ? fb->width : 0, fb ? fb->height : 0,
+ plane_visibility(plane_state),
DRM_RECT_FP_ARG(&src),
DRM_RECT_ARG(&dst),
rot_str);
+
+ if (plane_state->planar_linked_plane)
+ seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
+ plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
+ plane_state->planar_slave ? "slave" : "master");
}
static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
@@ -875,6 +892,12 @@ static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
intel_scaler_info(m, crtc);
}
+ if (crtc_state->bigjoiner)
+ seq_printf(m, "\tLinked to [CRTC:%d:%s] as a %s\n",
+ crtc_state->bigjoiner_linked_crtc->base.base.id,
+ crtc_state->bigjoiner_linked_crtc->base.name,
+ crtc_state->bigjoiner_slave ? "slave" : "master");
+
for_each_intel_encoder_mask(&dev_priv->drm, encoder,
crtc_state->uapi.encoder_mask)
intel_encoder_info(m, crtc, encoder);
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 20/23] drm/i915: Disable legacy cursor fastpath for bigjoiner
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (18 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 19/23] drm/i915: Add debugfs dumping for bigjoiner, v3 Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 0:27 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 21/23] drm/i915: Fix cursor src/dst rectangle with bigjoiner Ville Syrjala
` (6 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The legacy cursor fastpath code doesn't deal with bigjoiner.
Disable the fastpath for now.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index eeb50413fc8e..19e9c3795265 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16892,9 +16892,11 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
/*
* When crtc is inactive or there is a modeset pending,
* wait for it to complete in the slowpath
+ *
+ * FIXME bigjoiner fastpath would be good
*/
if (!crtc_state->hw.active || needs_modeset(crtc_state) ||
- crtc_state->update_pipe)
+ crtc_state->update_pipe || crtc_state->bigjoiner)
goto slow;
/*
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 21/23] drm/i915: Fix cursor src/dst rectangle with bigjoiner
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (19 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 20/23] drm/i915: Disable legacy cursor fastpath for bigjoiner Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 0:33 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 22/23] drm/i915: Add bigjoiner state dump Ville Syrjala
` (5 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We can't call drm_plane_state_src() this late for the slave plane since
it would consult the wrong uapi state. We've alreayd done the correct
uapi->hw copy earlier, so let's just preserve the unclipped src/dst
rects using a temp copy across the intel_atomic_plane_check_clipping()
call.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 19e9c3795265..7607bcd9b7fe 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11651,6 +11651,8 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+ const struct drm_rect src = plane_state->uapi.src;
+ const struct drm_rect dst = plane_state->uapi.dst;
int ret;
if (fb && fb->modifier != DRM_FORMAT_MOD_LINEAR) {
@@ -11666,8 +11668,8 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
return ret;
/* Use the unclipped src/dst rectangles, which we program to hw */
- plane_state->uapi.src = drm_plane_state_src(&plane_state->uapi);
- plane_state->uapi.dst = drm_plane_state_dest(&plane_state->uapi);
+ plane_state->uapi.src = src;
+ plane_state->uapi.dst = dst;
ret = intel_cursor_check_surface(plane_state);
if (ret)
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 22/23] drm/i915: Add bigjoiner state dump
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (20 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 21/23] drm/i915: Fix cursor src/dst rectangle with bigjoiner Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 0:36 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 23/23] drm/i915: Enable bigjoiner Ville Syrjala
` (4 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add a big of bigjoiner information to the state dump.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7607bcd9b7fe..8b51bb096b48 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13345,6 +13345,10 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config,
transcoder_name(pipe_config->master_transcoder),
pipe_config->sync_mode_slaves_mask);
+ drm_dbg_kms(&dev_priv->drm, "bigjoiner: %s\n",
+ pipe_config->bigjoiner_slave ? "slave" :
+ pipe_config->bigjoiner ? "master" : "no");
+
if (pipe_config->has_pch_encoder)
intel_dump_m_n_config(pipe_config, "fdi",
pipe_config->fdi_lanes,
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] [PATCH 23/23] drm/i915: Enable bigjoiner
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (21 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 22/23] drm/i915: Add bigjoiner state dump Ville Syrjala
@ 2020-11-13 22:03 ` Ville Syrjala
2020-11-17 0:36 ` Navare, Manasi
2020-11-14 0:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Big bigjoiner series Patchwork
` (3 subsequent siblings)
26 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjala @ 2020-11-13 22:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Enough plumbing should be in place to throw the bigjoiner switch.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 857f39779654..3896d08c4177 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -260,9 +260,6 @@ bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp)
struct intel_encoder *encoder = &intel_dig_port->base;
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- /* FIXME remove once everything is in place */
- return false;
-
return INTEL_GEN(dev_priv) >= 12 ||
(INTEL_GEN(dev_priv) == 11 &&
encoder->port != PORT_A);
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 47+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Big bigjoiner series
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (22 preceding siblings ...)
2020-11-13 22:03 ` [Intel-gfx] [PATCH 23/23] drm/i915: Enable bigjoiner Ville Syrjala
@ 2020-11-14 0:13 ` Patchwork
2020-11-14 0:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
26 siblings, 0 replies; 47+ messages in thread
From: Patchwork @ 2020-11-14 0:13 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Big bigjoiner series
URL : https://patchwork.freedesktop.org/series/83837/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
787f109da8f7 drm/i915: Copy the plane hw state directly for Y planes
200e8d85a273 drm/i915: Pass intel_atomic_state around
0bf0fbc51029 drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code
76f19438bbac drm/i915: Pimp the watermark documentation a bit
ffa8b5ec12d6 drm/i915: Precompute can_sagv for each wm level
93f51a472bfb drm/i915: Store plane relative data rate in crtc_state
65f73587d676 drm/i915: Remove skl_adjusted_plane_pixel_rate()
49685428c7ed drm/i915: Pass intel_atomic_state instead of drm_atomic_state
52b4804fb66d drm/i915/dp: Add from_crtc_state to copy color blobs
9c8fa6e879fc drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.
7b54f1a8cd69 drm/i915: Try to make bigjoiner work in atomic check
-:78: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#78: FILE: drivers/gpu/drm/i915/display/intel_display.c:13442:
+ crtc_state->bigjoiner_linked_crtc);
-:124: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#124: FILE: drivers/gpu/drm/i915/display/intel_display.c:13516:
+ crtc_state->nv12_planes = crtc_state->c8_planes = crtc_state->update_planes = 0;
-:168: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#168: FILE: drivers/gpu/drm/i915/display/intel_display.c:15135:
+ slave = new_crtc_state->bigjoiner_linked_crtc =
-:202: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#202: FILE: drivers/gpu/drm/i915/display/intel_display.c:15169:
+ slave_crtc_state->bigjoiner = master_crtc_state->bigjoiner = false;
-:203: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#203: FILE: drivers/gpu/drm/i915/display/intel_display.c:15170:
+ slave_crtc_state->bigjoiner_slave = master_crtc_state->bigjoiner_slave = false;
-:204: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#204: FILE: drivers/gpu/drm/i915/display/intel_display.c:15171:
+ slave_crtc_state->bigjoiner_linked_crtc = master_crtc_state->bigjoiner_linked_crtc = NULL;
-:204: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#204: FILE: drivers/gpu/drm/i915/display/intel_display.c:15171:
+ slave_crtc_state->bigjoiner_linked_crtc = master_crtc_state->bigjoiner_linked_crtc = NULL;
total: 0 errors, 2 warnings, 5 checks, 266 lines checked
a88c0f99027f drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave
0dd1ccb66cf4 drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner
3df07ac789a2 drm/i915: HW state readout for Bigjoiner case
-:91: WARNING:LONG_LINE_COMMENT: line length of 106 exceeds 100 columns
#91: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:4696:
+ /* Our own transcoder needs to be disabled when reading it in intel_ddi_read_func_ctl() */
-:93: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#93: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:4698:
+ pipe_config->cpu_transcoder = (enum transcoder)pipe_config->bigjoiner_linked_crtc->pipe;
-:120: WARNING:TABSTOP: Statements should start on a tabstop
#120: FILE: drivers/gpu/drm/i915/display/intel_display.c:3634:
+ struct intel_crtc_state *crtc_state =
-:602: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#602: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:853:
+#define PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE (1<<1) /* bigjoiner slave, partial readout */
^
total: 0 errors, 3 warnings, 1 checks, 531 lines checked
76672e003ef1 drm/i915: Add crtcs affected by bigjoiner to the state
6429c52b56f9 drm/i915: Add planes affected by bigjoiner to the state
777362899f26 drm/i915: Get the uapi state from the correct plane when bigjoiner is used
43eaeb52a244 drm/i915: Add bigjoiner aware plane clipping checks
a63a8532e9c7 drm/i915: Add debugfs dumping for bigjoiner, v3.
-:46: WARNING:LONG_LINE: line length of 132 exceeds 100 columns
#46: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs.c:787:
+ seq_printf(m, "\t\tuapi: [FB:%d] %s,0x%llx,%dx%d, visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
-:57: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#57: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs.c:798:
+ plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
total: 0 errors, 2 warnings, 0 checks, 49 lines checked
c7d08ccf925b drm/i915: Disable legacy cursor fastpath for bigjoiner
79ea1ef5dad1 drm/i915: Fix cursor src/dst rectangle with bigjoiner
ec5f31858af8 drm/i915: Add bigjoiner state dump
7fd1ad48f2a3 drm/i915: Enable bigjoiner
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Big bigjoiner series
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (23 preceding siblings ...)
2020-11-14 0:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Big bigjoiner series Patchwork
@ 2020-11-14 0:14 ` Patchwork
2020-11-14 0:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-14 4:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
26 siblings, 0 replies; 47+ messages in thread
From: Patchwork @ 2020-11-14 0:14 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Big bigjoiner series
URL : https://patchwork.freedesktop.org/series/83837/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_reset.c:1312:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: expected void *in
+drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: expected void const *src
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: warning: incorrect type in argument 2 (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: expected void *in
+drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: expected void const *src
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: warning: incorrect type in argument 2 (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: expected unsigned int [usertype] *s
+drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/gvt/mmio.c:290:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1440:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1494:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/intel_wakeref.c:137:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+./include/linux/seqlock.h:838:24: warning: trying to copy expression type 31
+./include/linux/seqlock.h:838:24: warning: trying to copy expression type 31
+./include/linux/seqlock.h:864:16: warning: trying to copy expression type 31
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Big bigjoiner series
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (24 preceding siblings ...)
2020-11-14 0:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2020-11-14 0:42 ` Patchwork
2020-11-14 4:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
26 siblings, 0 replies; 47+ messages in thread
From: Patchwork @ 2020-11-14 0:42 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 8623 bytes --]
== Series Details ==
Series: drm/i915: Big bigjoiner series
URL : https://patchwork.freedesktop.org/series/83837/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9326 -> Patchwork_18904
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/index.html
New tests
---------
New tests have been introduced between CI_DRM_9326 and Patchwork_18904:
### New CI tests (1) ###
* boot:
- Statuses : 1 fail(s) 37 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_18904 that come from known issues:
### CI changes ###
#### Issues hit ####
* boot (NEW):
- {fi-tgl-dsi}: [PASS][1] -> [FAIL][2] ([i915#2448])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-tgl-dsi/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-tgl-dsi/boot.html
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- fi-tgl-u2: [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_selftest@live@gt_pm:
- fi-byt-j1900: [PASS][7] -> [DMESG-FAIL][8] ([i915#2420])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-byt-j1900/igt@i915_selftest@live@gt_pm.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-byt-j1900/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium@hdmi-crc-fast:
- fi-skl-6700k2: [PASS][9] -> [DMESG-WARN][10] ([i915#1982])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-skl-6700k2/igt@kms_chamelium@hdmi-crc-fast.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-skl-6700k2/igt@kms_chamelium@hdmi-crc-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-snb-2520m: [PASS][11] -> [DMESG-WARN][12] ([i915#1982])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-snb-2520m/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-snb-2520m/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- fi-icl-u2: [PASS][13] -> [DMESG-WARN][14] ([i915#1982])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-tgl-y: [PASS][15] -> [DMESG-WARN][16] ([i915#1982])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-tgl-y/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-tgl-y/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@prime_vgem@basic-gtt:
- fi-tgl-y: [PASS][17] -> [DMESG-WARN][18] ([i915#402]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-tgl-y/igt@prime_vgem@basic-gtt.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-tgl-y/igt@prime_vgem@basic-gtt.html
#### Possible fixes ####
* igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2: [FAIL][19] ([i915#1161] / [i915#262]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-byt-j1900: [DMESG-WARN][21] ([i915#1982]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2: [DMESG-WARN][23] ([i915#1982]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-tgl-y: [DMESG-WARN][25] ([i915#1982]) -> [PASS][26] +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-tgl-y/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-tgl-y/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
* igt@prime_vgem@basic-read:
- fi-tgl-y: [DMESG-WARN][27] ([i915#402]) -> [PASS][28] +2 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/fi-tgl-y/igt@prime_vgem@basic-read.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/fi-tgl-y/igt@prime_vgem@basic-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1161]: https://gitlab.freedesktop.org/drm/intel/issues/1161
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2420]: https://gitlab.freedesktop.org/drm/intel/issues/2420
[i915#2448]: https://gitlab.freedesktop.org/drm/intel/issues/2448
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (46 -> 38)
------------------------------
Missing (8): fi-ilk-m540 fi-bxt-dsi fi-hsw-4200u fi-glk-dsi fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus fi-skl-6600u
Build changes
-------------
* Linux: CI_DRM_9326 -> Patchwork_18904
CI-20190529: 20190529
CI_DRM_9326: 3048c2a1dcf02422e89930148ffad9e91d690499 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5850: 9748a4a0f93d108955d374a866e60cb962da9b5d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18904: 7fd1ad48f2a3e2e2754f83383caf1404ec823d73 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
7fd1ad48f2a3 drm/i915: Enable bigjoiner
ec5f31858af8 drm/i915: Add bigjoiner state dump
79ea1ef5dad1 drm/i915: Fix cursor src/dst rectangle with bigjoiner
c7d08ccf925b drm/i915: Disable legacy cursor fastpath for bigjoiner
a63a8532e9c7 drm/i915: Add debugfs dumping for bigjoiner, v3.
43eaeb52a244 drm/i915: Add bigjoiner aware plane clipping checks
777362899f26 drm/i915: Get the uapi state from the correct plane when bigjoiner is used
6429c52b56f9 drm/i915: Add planes affected by bigjoiner to the state
76672e003ef1 drm/i915: Add crtcs affected by bigjoiner to the state
3df07ac789a2 drm/i915: HW state readout for Bigjoiner case
0dd1ccb66cf4 drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner
a88c0f99027f drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave
7b54f1a8cd69 drm/i915: Try to make bigjoiner work in atomic check
9c8fa6e879fc drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.
52b4804fb66d drm/i915/dp: Add from_crtc_state to copy color blobs
49685428c7ed drm/i915: Pass intel_atomic_state instead of drm_atomic_state
65f73587d676 drm/i915: Remove skl_adjusted_plane_pixel_rate()
93f51a472bfb drm/i915: Store plane relative data rate in crtc_state
ffa8b5ec12d6 drm/i915: Precompute can_sagv for each wm level
76f19438bbac drm/i915: Pimp the watermark documentation a bit
0bf0fbc51029 drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code
200e8d85a273 drm/i915: Pass intel_atomic_state around
787f109da8f7 drm/i915: Copy the plane hw state directly for Y planes
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/index.html
[-- Attachment #1.2: Type: text/html, Size: 10347 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Big bigjoiner series
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
` (25 preceding siblings ...)
2020-11-14 0:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-11-14 4:10 ` Patchwork
26 siblings, 0 replies; 47+ messages in thread
From: Patchwork @ 2020-11-14 4:10 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 14121 bytes --]
== Series Details ==
Series: drm/i915: Big bigjoiner series
URL : https://patchwork.freedesktop.org/series/83837/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9326_full -> Patchwork_18904_full
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_18904_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18904_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_18904_full:
### IGT changes ###
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][1] ([i915#1515]) -> [WARN][2] +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-iclb4/igt@i915_pm_rc6_residency@rc6-fence.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-iclb1/igt@i915_pm_rc6_residency@rc6-fence.html
New tests
---------
New tests have been introduced between CI_DRM_9326_full and Patchwork_18904_full:
### New CI tests (1) ###
* boot:
- Statuses : 175 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_18904_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_whisper@basic-contexts-forked-all:
- shard-glk: [PASS][3] -> [DMESG-WARN][4] ([i915#118] / [i915#95]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-glk8/igt@gem_exec_whisper@basic-contexts-forked-all.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-glk7/igt@gem_exec_whisper@basic-contexts-forked-all.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-apl: [PASS][5] -> [FAIL][6] ([i915#1635] / [i915#54])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-apl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-glk5/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-glk1/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1:
- shard-skl: [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) +4 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-skl3/igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-skl9/igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1.html
* igt@kms_flip@plain-flip-ts-check@a-dp1:
- shard-kbl: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) +4 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-kbl1/igt@kms_flip@plain-flip-ts-check@a-dp1.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-kbl2/igt@kms_flip@plain-flip-ts-check@a-dp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-tglb: [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc:
- shard-skl: [PASS][15] -> [FAIL][16] ([i915#49])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-skl3/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][17] -> [FAIL][18] ([i915#1188])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-skl3/igt@kms_hdr@bpc-switch-suspend.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-skl5/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_psr@psr2_sprite_render:
- shard-iclb: [PASS][19] -> [SKIP][20] ([fdo#109441])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-iclb7/igt@kms_psr@psr2_sprite_render.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-skl: [PASS][21] -> [INCOMPLETE][22] ([i915#198])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-skl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-skl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@kms_vblank@pipe-c-wait-forked-busy:
- shard-apl: [PASS][23] -> [DMESG-WARN][24] ([i915#1635] / [i915#1982]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-apl3/igt@kms_vblank@pipe-c-wait-forked-busy.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-apl6/igt@kms_vblank@pipe-c-wait-forked-busy.html
#### Possible fixes ####
* igt@gem_exec_whisper@basic-queues-priority:
- shard-glk: [DMESG-WARN][25] ([i915#118] / [i915#95]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-glk1/igt@gem_exec_whisper@basic-queues-priority.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-glk1/igt@gem_exec_whisper@basic-queues-priority.html
* igt@i915_module_load@reload:
- shard-iclb: [DMESG-WARN][27] ([i915#1982]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-iclb2/igt@i915_module_load@reload.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-iclb4/igt@i915_module_load@reload.html
* igt@kms_cursor_crc@pipe-b-cursor-64x21-sliding:
- shard-skl: [FAIL][29] ([i915#54]) -> [PASS][30] +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-skl10/igt@kms_cursor_crc@pipe-b-cursor-64x21-sliding.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-skl7/igt@kms_cursor_crc@pipe-b-cursor-64x21-sliding.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
- shard-kbl: [DMESG-WARN][31] ([i915#1982]) -> [PASS][32] +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-kbl1/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-kbl1/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: [INCOMPLETE][33] ([i915#198]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-skl2/igt@kms_fbcon_fbt@psr-suspend.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-skl1/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-skl: [FAIL][35] ([i915#79]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-skl4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [DMESG-FAIL][37] ([fdo#108145] / [i915#1982]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_plane_cursor@pipe-a-viewport-size-128:
- shard-skl: [DMESG-WARN][39] ([i915#1982]) -> [PASS][40] +7 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-skl2/igt@kms_plane_cursor@pipe-a-viewport-size-128.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-skl6/igt@kms_plane_cursor@pipe-a-viewport-size-128.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][41] ([fdo#109441]) -> [PASS][42] +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-iclb5/igt@kms_psr@psr2_primary_mmap_cpu.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_universal_plane@disable-primary-vs-flip-pipe-b:
- shard-apl: [DMESG-WARN][43] ([i915#1635] / [i915#1982]) -> [PASS][44] +4 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-apl6/igt@kms_universal_plane@disable-primary-vs-flip-pipe-b.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-apl1/igt@kms_universal_plane@disable-primary-vs-flip-pipe-b.html
* igt@perf@oa-formats:
- shard-glk: [DMESG-WARN][45] ([i915#1982]) -> [PASS][46] +2 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-glk4/igt@perf@oa-formats.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-glk2/igt@perf@oa-formats.html
#### Warnings ####
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-tglb: [INCOMPLETE][47] ([i915#1436] / [i915#456]) -> [DMESG-WARN][48] ([i915#1436])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-tglb6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-tglb5/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@runner@aborted:
- shard-kbl: [FAIL][49] ([i915#1611] / [i915#2295] / [i915#2439]) -> ([FAIL][50], [FAIL][51], [FAIL][52]) ([i915#1611] / [i915#1814] / [i915#2295] / [i915#2439] / [i915#483])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-kbl7/igt@runner@aborted.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-kbl6/igt@runner@aborted.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-kbl7/igt@runner@aborted.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-kbl7/igt@runner@aborted.html
- shard-glk: ([FAIL][53], [FAIL][54], [FAIL][55]) ([i915#1611] / [i915#1814] / [i915#2295] / [i915#2439] / [i915#86] / [k.org#202321]) -> ([FAIL][56], [FAIL][57], [FAIL][58]) ([i915#1611] / [i915#1814] / [i915#2295] / [i915#2439] / [i915#483] / [i915#86] / [k.org#202321])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-glk8/igt@runner@aborted.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-glk8/igt@runner@aborted.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9326/shard-glk1/igt@runner@aborted.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-glk7/igt@runner@aborted.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-glk7/igt@runner@aborted.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/shard-glk4/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1515]: https://gitlab.freedesktop.org/drm/intel/issues/1515
[i915#1611]: https://gitlab.freedesktop.org/drm/intel/issues/1611
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
[i915#2439]: https://gitlab.freedesktop.org/drm/intel/issues/2439
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456
[i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#86]: https://gitlab.freedesktop.org/drm/intel/issues/86
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Participating hosts (11 -> 10)
------------------------------
Missing (1): pig-icl-1065g7
Build changes
-------------
* Linux: CI_DRM_9326 -> Patchwork_18904
CI-20190529: 20190529
CI_DRM_9326: 3048c2a1dcf02422e89930148ffad9e91d690499 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5850: 9748a4a0f93d108955d374a866e60cb962da9b5d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18904: 7fd1ad48f2a3e2e2754f83383caf1404ec823d73 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18904/index.html
[-- Attachment #1.2: Type: text/html, Size: 17650 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 15/23] drm/i915: Add crtcs affected by bigjoiner to the state
2020-11-13 22:03 ` [Intel-gfx] [PATCH 15/23] drm/i915: Add crtcs affected by bigjoiner to the state Ville Syrjala
@ 2020-11-16 23:37 ` Navare, Manasi
0 siblings, 0 replies; 47+ messages in thread
From: Navare, Manasi @ 2020-11-16 23:37 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Sat, Nov 14, 2020 at 12:03:50AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Make sure both crtcs participating in the bigjoiner stuff
> are in the state.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 25 ++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 07bee5caacfe..465877097582 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15422,6 +15422,27 @@ static int intel_atomic_check_async(struct intel_atomic_state *state)
> return 0;
> }
>
> +static int intel_bigjoiner_add_affected_crtcs(struct intel_atomic_state *state)
> +{
> + const struct intel_crtc_state *crtc_state;
> + struct intel_crtc *crtc;
> + int i;
> +
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + struct intel_crtc_state *linked_crtc_state;
> +
> + if (!crtc_state->bigjoiner)
> + continue;
> +
> + linked_crtc_state = intel_atomic_get_crtc_state(&state->base,
> + crtc_state->bigjoiner_linked_crtc);
> + if (IS_ERR(linked_crtc_state))
> + return PTR_ERR(linked_crtc_state);
> + }
> +
> + return 0;
> +}
> +
> /**
> * intel_atomic_check - validate state object
> * @dev: drm device
> @@ -15447,6 +15468,10 @@ static int intel_atomic_check(struct drm_device *dev,
> if (ret)
> goto fail;
>
> + ret = intel_bigjoiner_add_affected_crtcs(state);
> + if (ret)
> + goto fail;
> +
> for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> new_crtc_state, i) {
> if (!needs_modeset(new_crtc_state)) {
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 16/23] drm/i915: Add planes affected by bigjoiner to the state
2020-11-13 22:03 ` [Intel-gfx] [PATCH 16/23] drm/i915: Add planes " Ville Syrjala
@ 2020-11-17 0:09 ` Navare, Manasi
2020-11-17 15:14 ` Ville Syrjälä
0 siblings, 1 reply; 47+ messages in thread
From: Navare, Manasi @ 2020-11-17 0:09 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Sat, Nov 14, 2020 at 12:03:51AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Make sure both the bigjoiner "master" and "slave" plane are
> in the state whenever either of them is in the state.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 465877097582..1118ff73c0d4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15069,6 +15069,44 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv)
> IS_IVYBRIDGE(dev_priv) || (INTEL_GEN(dev_priv) >= 11);
> }
>
> +static int intel_crtc_add_bigjoiner_planes(struct intel_atomic_state *state,
> + struct intel_crtc *crtc,
> + struct intel_crtc *other)
> +{
> + const struct intel_plane_state *plane_state;
> + struct intel_plane *plane;
> + u8 plane_ids = 0;
> + int i;
> +
> + for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
> + if (plane->pipe == crtc->pipe)
> + plane_ids |= BIT(plane->id);
> + }
> +
> + return intel_crtc_add_planes_to_state(state, other, plane_ids);
We call this function intel_crtc_add_planes_to_state again in intel_atomic_check_planes again at
the end, so arent we adding the planes to state twice for both master and slave?
Do we need some condition to avoid adding it again at the end of intel_atomic_check_planes ?
Manasi
> +}
> +
> +static int intel_bigjoiner_add_affected_planes(struct intel_atomic_state *state)
> +{
> + const struct intel_crtc_state *crtc_state;
> + struct intel_crtc *crtc;
> + int i;
> +
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> + int ret;
> +
> + if (!crtc_state->bigjoiner)
> + continue;
> +
> + ret = intel_crtc_add_bigjoiner_planes(state, crtc,
> + crtc_state->bigjoiner_linked_crtc);
> + if (ret)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int intel_atomic_check_planes(struct intel_atomic_state *state)
> {
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> @@ -15082,6 +15120,10 @@ static int intel_atomic_check_planes(struct intel_atomic_state *state)
> if (ret)
> return ret;
>
> + ret = intel_bigjoiner_add_affected_planes(state);
> + if (ret)
> + return ret;
> +
> for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
> ret = intel_plane_atomic_check(state, plane);
> if (ret) {
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 17/23] drm/i915: Get the uapi state from the correct plane when bigjoiner is used
2020-11-13 22:03 ` [Intel-gfx] [PATCH 17/23] drm/i915: Get the uapi state from the correct plane when bigjoiner is used Ville Syrjala
@ 2020-11-17 0:24 ` Navare, Manasi
2020-11-17 15:17 ` Ville Syrjälä
0 siblings, 1 reply; 47+ messages in thread
From: Navare, Manasi @ 2020-11-17 0:24 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Sat, Nov 14, 2020 at 12:03:52AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> When using bigjoiner userspace is only controlling the "master"
> plane, so use its uapi state for the "slave" plane as well.
>
> hw.crtc needs a bit of magic since we don't want to copy that from
> the uapi state (as it points to the wrong pipe for the "slave
> " plane). Instead we pass the right crtc in explicitly but only
> assign it when the uapi state indicates the plane to be logically
> enabled (ie. uapi.crtc != NULL).
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 59 +++++++++++++------
> .../gpu/drm/i915/display/intel_atomic_plane.h | 3 +-
> drivers/gpu/drm/i915/display/intel_display.c | 5 +-
> 3 files changed, 46 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index f47558efb3c2..7abb0e3d6c0b 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -247,11 +247,19 @@ static void intel_plane_clear_hw_state(struct intel_plane_state *plane_state)
> }
>
> void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
> - const struct intel_plane_state *from_plane_state)
> + const struct intel_plane_state *from_plane_state,
> + struct intel_crtc *crtc)
> {
> intel_plane_clear_hw_state(plane_state);
>
> - plane_state->hw.crtc = from_plane_state->uapi.crtc;
> + /*
> + * For the bigjoiner slave uapi.crtc will point at
> + * the master crtc. So we explicitly assign the right
> + * slave crtc to hw.crtc. uapi.crtc!=NULL simply indicates
> + * the plane is logically enabled on the uapi level.
> + */
> + plane_state->hw.crtc = from_plane_state->uapi.crtc ? &crtc->base : NULL;
But here in case of bigjoiner_slave we actualy compute new_master_plane_state from master_plane which is
obtained from the slaves linked crtc.
So here, even for the slave plane's hw.crtc we are using master's uapi.crtc? Is that what is happening here?
Manasi
> +
> plane_state->hw.fb = from_plane_state->uapi.fb;
> if (plane_state->hw.fb)
> drm_framebuffer_get(plane_state->hw.fb);
> @@ -331,15 +339,16 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
> old_plane_state, new_plane_state);
> }
>
> -static struct intel_crtc *
> -get_crtc_from_states(const struct intel_plane_state *old_plane_state,
> - const struct intel_plane_state *new_plane_state)
> +static struct intel_plane *
> +intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
> {
> - if (new_plane_state->uapi.crtc)
> - return to_intel_crtc(new_plane_state->uapi.crtc);
> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> + struct intel_plane *plane;
>
> - if (old_plane_state->uapi.crtc)
> - return to_intel_crtc(old_plane_state->uapi.crtc);
> + for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
> + if (plane->id == plane_id)
> + return plane;
> + }
>
> return NULL;
> }
> @@ -347,23 +356,37 @@ get_crtc_from_states(const struct intel_plane_state *old_plane_state,
> int intel_plane_atomic_check(struct intel_atomic_state *state,
> struct intel_plane *plane)
> {
> + struct drm_i915_private *i915 = to_i915(state->base.dev);
> struct intel_plane_state *new_plane_state =
> intel_atomic_get_new_plane_state(state, plane);
> const struct intel_plane_state *old_plane_state =
> intel_atomic_get_old_plane_state(state, plane);
> - struct intel_crtc *crtc =
> - get_crtc_from_states(old_plane_state, new_plane_state);
> - const struct intel_crtc_state *old_crtc_state;
> - struct intel_crtc_state *new_crtc_state;
> + const struct intel_plane_state *new_master_plane_state;
> + struct intel_crtc *crtc = intel_get_crtc_for_pipe(i915, plane->pipe);
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> + struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> +
> + if (new_crtc_state && new_crtc_state->bigjoiner_slave) {
> + struct intel_plane *master_plane =
> + intel_crtc_get_plane(new_crtc_state->bigjoiner_linked_crtc,
> + plane->id);
> +
> + new_master_plane_state =
> + intel_atomic_get_new_plane_state(state, master_plane);
> + } else {
> + new_master_plane_state = new_plane_state;
> + }
> +
> + intel_plane_copy_uapi_to_hw_state(new_plane_state,
> + new_master_plane_state,
> + crtc);
>
> - intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state);
> new_plane_state->uapi.visible = false;
> - if (!crtc)
> + if (!new_crtc_state)
> return 0;
>
> - old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);
> - new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
> -
> return intel_plane_atomic_check_with_state(old_crtc_state,
> new_crtc_state,
> old_plane_state,
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index 24a3a148aa62..5cae9db41062 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -24,7 +24,8 @@ unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
> unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state);
> void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
> - const struct intel_plane_state *from_plane_state);
> + const struct intel_plane_state *from_plane_state,
> + struct intel_crtc *crtc);
> void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
> const struct intel_plane_state *from_plane_state);
> void intel_update_plane(struct intel_plane *plane,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 1118ff73c0d4..55e0a2f21d98 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3718,7 +3718,8 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
> drm_framebuffer_get(fb);
>
> plane_state->crtc = &intel_crtc->base;
> - intel_plane_copy_uapi_to_hw_state(intel_state, intel_state);
> + intel_plane_copy_uapi_to_hw_state(intel_state, intel_state,
> + intel_crtc);
>
> intel_frontbuffer_flush(to_intel_frontbuffer(fb), ORIGIN_DIRTYFB);
>
> @@ -16942,7 +16943,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
> new_plane_state->uapi.crtc_w = crtc_w;
> new_plane_state->uapi.crtc_h = crtc_h;
>
> - intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state);
> + intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state, crtc);
>
> ret = intel_plane_atomic_check_with_state(crtc_state, new_crtc_state,
> old_plane_state, new_plane_state);
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 20/23] drm/i915: Disable legacy cursor fastpath for bigjoiner
2020-11-13 22:03 ` [Intel-gfx] [PATCH 20/23] drm/i915: Disable legacy cursor fastpath for bigjoiner Ville Syrjala
@ 2020-11-17 0:27 ` Navare, Manasi
0 siblings, 0 replies; 47+ messages in thread
From: Navare, Manasi @ 2020-11-17 0:27 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Sat, Nov 14, 2020 at 12:03:55AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The legacy cursor fastpath code doesn't deal with bigjoiner.
> Disable the fastpath for now.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index eeb50413fc8e..19e9c3795265 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16892,9 +16892,11 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
> /*
> * When crtc is inactive or there is a modeset pending,
> * wait for it to complete in the slowpath
> + *
> + * FIXME bigjoiner fastpath would be good
> */
> if (!crtc_state->hw.active || needs_modeset(crtc_state) ||
> - crtc_state->update_pipe)
> + crtc_state->update_pipe || crtc_state->bigjoiner)
> goto slow;
>
> /*
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 21/23] drm/i915: Fix cursor src/dst rectangle with bigjoiner
2020-11-13 22:03 ` [Intel-gfx] [PATCH 21/23] drm/i915: Fix cursor src/dst rectangle with bigjoiner Ville Syrjala
@ 2020-11-17 0:33 ` Navare, Manasi
2020-11-17 15:09 ` Ville Syrjälä
0 siblings, 1 reply; 47+ messages in thread
From: Navare, Manasi @ 2020-11-17 0:33 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Sat, Nov 14, 2020 at 12:03:56AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We can't call drm_plane_state_src() this late for the slave plane since
> it would consult the wrong uapi state. We've alreayd done the correct
> uapi->hw copy earlier, so let's just preserve the unclipped src/dst
> rects using a temp copy across the intel_atomic_plane_check_clipping()
> call.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 19e9c3795265..7607bcd9b7fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11651,6 +11651,8 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
> {
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> + const struct drm_rect src = plane_state->uapi.src;
> + const struct drm_rect dst = plane_state->uapi.dst;
> int ret;
>
> if (fb && fb->modifier != DRM_FORMAT_MOD_LINEAR) {
> @@ -11666,8 +11668,8 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
> return ret;
>
> /* Use the unclipped src/dst rectangles, which we program to hw */
> - plane_state->uapi.src = drm_plane_state_src(&plane_state->uapi);
> - plane_state->uapi.dst = drm_plane_state_dest(&plane_state->uapi);
> + plane_state->uapi.src = src;
> + plane_state->uapi.dst = dst;
We get this for both slave and master? No slave condition needed?
Manasi
>
> ret = intel_cursor_check_surface(plane_state);
> if (ret)
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 22/23] drm/i915: Add bigjoiner state dump
2020-11-13 22:03 ` [Intel-gfx] [PATCH 22/23] drm/i915: Add bigjoiner state dump Ville Syrjala
@ 2020-11-17 0:36 ` Navare, Manasi
0 siblings, 0 replies; 47+ messages in thread
From: Navare, Manasi @ 2020-11-17 0:36 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Sat, Nov 14, 2020 at 12:03:57AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a big of bigjoiner information to the state dump.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 7607bcd9b7fe..8b51bb096b48 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -13345,6 +13345,10 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config,
> transcoder_name(pipe_config->master_transcoder),
> pipe_config->sync_mode_slaves_mask);
>
> + drm_dbg_kms(&dev_priv->drm, "bigjoiner: %s\n",
> + pipe_config->bigjoiner_slave ? "slave" :
> + pipe_config->bigjoiner ? "master" : "no");
> +
> if (pipe_config->has_pch_encoder)
> intel_dump_m_n_config(pipe_config, "fdi",
> pipe_config->fdi_lanes,
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 23/23] drm/i915: Enable bigjoiner
2020-11-13 22:03 ` [Intel-gfx] [PATCH 23/23] drm/i915: Enable bigjoiner Ville Syrjala
@ 2020-11-17 0:36 ` Navare, Manasi
0 siblings, 0 replies; 47+ messages in thread
From: Navare, Manasi @ 2020-11-17 0:36 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Sat, Nov 14, 2020 at 12:03:58AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Enough plumbing should be in place to throw the bigjoiner switch.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 857f39779654..3896d08c4177 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -260,9 +260,6 @@ bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp)
> struct intel_encoder *encoder = &intel_dig_port->base;
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>
> - /* FIXME remove once everything is in place */
> - return false;
> -
> return INTEL_GEN(dev_priv) >= 12 ||
> (INTEL_GEN(dev_priv) == 11 &&
> encoder->port != PORT_A);
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 11/23] drm/i915: Try to make bigjoiner work in atomic check
2020-11-13 22:03 ` [Intel-gfx] [PATCH 11/23] drm/i915: Try to make bigjoiner work in atomic check Ville Syrjala
@ 2020-11-17 8:28 ` Manna, Animesh
0 siblings, 0 replies; 47+ messages in thread
From: Manna, Animesh @ 2020-11-17 8:28 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Saturday, November 14, 2020 3:34 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 11/23] drm/i915: Try to make bigjoiner work in
> atomic check
>
> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>
> When the clock is higher than the dotclock, try with 2 pipes enabled.
> If we can enable 2, then we will go into big joiner mode, and steal the adjacent
> crtc.
>
> This only links the crtc's in software, no hardware or plane programming is
> done yet. Blobs are also copied from the master's crtc_state, so it doesn't
> depend at commit time on the other crtc_state.
>
> v6:
> * Enable dSC for any mode->hdisplay > 5120
> v5:
> * Remove intel_dp_max_dotclock (Manasi)
> v4:
> * Fixes in intel_crtc_compute_config (Ville)
> v3:
> * Manual Rebase (Manasi)
> Changes since v1:
> - Rename pipe timings to transcoder timings, as they are now different.
> Changes since v2:
> - Rework bigjoiner checks; always disable slave when recalculating
> master. No need to have a separate bigjoiner pass any more.
> - Use pipe_mode instead of transcoder_mode, to clean up the code.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> [vsyrjala:
> * hskew isn't a thing
> * Do the dsc compute if bigjoiner is enabled, not the other way around]
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Changes looks good to me.
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 156 +++++++++++++++++-
> .../drm/i915/display/intel_display_types.h | 9 +
> drivers/gpu/drm/i915/display/intel_dp.c | 20 ++-
> 3 files changed, 175 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 004ae95ede19..e2baf342a112 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8194,6 +8194,19 @@ static int intel_crtc_compute_config(struct
> intel_crtc *crtc,
> int clock_limit = dev_priv->max_dotclk_freq;
>
> drm_mode_copy(pipe_mode, &pipe_config->hw.adjusted_mode);
> +
> + /* Adjust pipe_mode for bigjoiner, with half the horizontal mode */
> + if (pipe_config->bigjoiner) {
> + pipe_mode->crtc_clock /= 2;
> + pipe_mode->crtc_hdisplay /= 2;
> + pipe_mode->crtc_hblank_start /= 2;
> + pipe_mode->crtc_hblank_end /= 2;
> + pipe_mode->crtc_hsync_start /= 2;
> + pipe_mode->crtc_hsync_end /= 2;
> + pipe_mode->crtc_htotal /= 2;
> + pipe_config->pipe_src_w /= 2;
> + }
> +
> intel_mode_from_crtc_timings(pipe_mode, pipe_mode);
>
> if (INTEL_GEN(dev_priv) < 4) {
> @@ -12879,6 +12892,7 @@ static int intel_crtc_atomic_check(struct
> intel_atomic_state *state,
>
> if (mode_changed && crtc_state->hw.enable &&
> dev_priv->display.crtc_compute_clock &&
> + !crtc_state->bigjoiner_slave &&
> !drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll)) {
> ret = dev_priv->display.crtc_compute_clock(crtc, crtc_state);
> if (ret)
> @@ -13423,6 +13437,15 @@
> intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_atomic_state
> *state, {
> const struct intel_crtc_state *from_crtc_state = crtc_state;
>
> + if (crtc_state->bigjoiner_slave) {
> + from_crtc_state = intel_atomic_get_new_crtc_state(state,
> + crtc_state-
> >bigjoiner_linked_crtc);
> +
> + /* No need to copy state if the master state is unchanged */
> + if (!from_crtc_state)
> + return;
> + }
> +
> intel_crtc_copy_color_blobs(crtc_state, from_crtc_state); }
>
> @@ -13458,6 +13481,47 @@ static void
> intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state
> crtc_state->hw.ctm);
> }
>
> +static int
> +copy_bigjoiner_crtc_state(struct intel_crtc_state *crtc_state,
> + const struct intel_crtc_state *from_crtc_state) {
> + struct intel_crtc_state *saved_state;
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +
> + saved_state = kmemdup(from_crtc_state, sizeof(*saved_state),
> GFP_KERNEL);
> + if (!saved_state)
> + return -ENOMEM;
> +
> + saved_state->uapi = crtc_state->uapi;
> + saved_state->scaler_state = crtc_state->scaler_state;
> + saved_state->shared_dpll = crtc_state->shared_dpll;
> + saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
> + saved_state->crc_enabled = crtc_state->crc_enabled;
> +
> + intel_crtc_free_hw_state(crtc_state);
> + memcpy(crtc_state, saved_state, sizeof(*crtc_state));
> + kfree(saved_state);
> +
> + /* Re-init hw state */
> + memset(&crtc_state->hw, 0, sizeof(saved_state->hw));
> + crtc_state->hw.enable = from_crtc_state->hw.enable;
> + crtc_state->hw.active = from_crtc_state->hw.active;
> + crtc_state->hw.pipe_mode = from_crtc_state->hw.pipe_mode;
> + crtc_state->hw.adjusted_mode = from_crtc_state->hw.adjusted_mode;
> +
> + /* Some fixups */
> + crtc_state->uapi.mode_changed = from_crtc_state-
> >uapi.mode_changed;
> + crtc_state->uapi.connectors_changed = from_crtc_state-
> >uapi.connectors_changed;
> + crtc_state->uapi.active_changed = from_crtc_state-
> >uapi.active_changed;
> + crtc_state->nv12_planes = crtc_state->c8_planes = crtc_state-
> >update_planes = 0;
> + crtc_state->bigjoiner_linked_crtc = to_intel_crtc(from_crtc_state-
> >uapi.crtc);
> + crtc_state->bigjoiner_slave = true;
> + crtc_state->cpu_transcoder = (enum transcoder)crtc->pipe;
> + crtc_state->has_audio = false;
> +
> + return 0;
> +}
> +
> static int
> intel_crtc_prepare_cleared_state(struct intel_atomic_state *state,
> struct intel_crtc_state *crtc_state) @@ -
> 15040,6 +15104,75 @@ static bool intel_cpu_transcoders_need_modeset(struct
> intel_atomic_state *state,
> return false;
> }
>
> +static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
> + struct intel_crtc *crtc,
> + struct intel_crtc_state *old_crtc_state,
> + struct intel_crtc_state
> *new_crtc_state) {
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + struct intel_crtc_state *slave_crtc_state, *master_crtc_state;
> + struct intel_crtc *slave, *master;
> +
> + /* slave being enabled, is master is still claiming this crtc? */
> + if (old_crtc_state->bigjoiner_slave) {
> + slave = crtc;
> + master = old_crtc_state->bigjoiner_linked_crtc;
> + master_crtc_state = intel_atomic_get_new_crtc_state(state,
> master);
> + if (!master_crtc_state || !needs_modeset(master_crtc_state))
> + goto claimed;
> + }
> +
> + if (!new_crtc_state->bigjoiner)
> + return 0;
> +
> + if (1 + crtc->pipe >= INTEL_NUM_PIPES(dev_priv)) {
> + DRM_DEBUG_KMS("[CRTC:%d:%s] Big joiner configuration
> requires "
> + "CRTC + 1 to be used, doesn't exist\n",
> + crtc->base.base.id, crtc->base.name);
> + return -EINVAL;
> + }
> +
> + slave = new_crtc_state->bigjoiner_linked_crtc =
> + intel_get_crtc_for_pipe(dev_priv, crtc->pipe + 1);
> + slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave);
> + master = crtc;
> + if (IS_ERR(slave_crtc_state))
> + return PTR_ERR(slave_crtc_state);
> +
> + /* master being enabled, slave was already configured? */
> + if (slave_crtc_state->uapi.enable)
> + goto claimed;
> +
> + DRM_DEBUG_KMS("[CRTC:%d:%s] Used as slave for big joiner\n",
> + slave->base.base.id, slave->base.name);
> +
> + return copy_bigjoiner_crtc_state(slave_crtc_state, new_crtc_state);
> +
> +claimed:
> + DRM_DEBUG_KMS("[CRTC:%d:%s] Slave is enabled as normal CRTC, but
> "
> + "[CRTC:%d:%s] claiming this CRTC for bigjoiner.\n",
> + slave->base.base.id, slave->base.name,
> + master->base.base.id, master->base.name);
> + return -EINVAL;
> +}
> +
> +static int kill_bigjoiner_slave(struct intel_atomic_state *state,
> + struct intel_crtc_state *master_crtc_state) {
> + struct intel_crtc_state *slave_crtc_state =
> + intel_atomic_get_crtc_state(&state->base,
> + master_crtc_state-
> >bigjoiner_linked_crtc);
> +
> + if (IS_ERR(slave_crtc_state))
> + return PTR_ERR(slave_crtc_state);
> +
> + slave_crtc_state->bigjoiner = master_crtc_state->bigjoiner =
> false;
> + slave_crtc_state->bigjoiner_slave = master_crtc_state-
> >bigjoiner_slave = false;
> + slave_crtc_state->bigjoiner_linked_crtc = master_crtc_state-
> >bigjoiner_linked_crtc = NULL;
> + intel_crtc_copy_uapi_to_hw_state(state, slave_crtc_state);
> + return 0;
> +}
> +
> /**
> * DOC: asynchronous flip implementation
> *
> @@ -15207,16 +15340,33 @@ static int intel_atomic_check(struct drm_device
> *dev,
> continue;
> }
>
> + /* Kill old bigjoiner link, we may re-establish afterwards */
> + if (old_crtc_state->bigjoiner && !old_crtc_state-
> >bigjoiner_slave) {
> + ret = kill_bigjoiner_slave(state, new_crtc_state);
> + if (ret)
> + goto fail;
> + }
> +
> + if (!new_crtc_state->uapi.enable) {
> + if (!new_crtc_state->bigjoiner_slave) {
> + intel_crtc_copy_uapi_to_hw_state(state,
> new_crtc_state);
> + any_ms = true;
> + }
> + continue;
> + }
> +
> ret = intel_crtc_prepare_cleared_state(state, new_crtc_state);
> if (ret)
> goto fail;
>
> - if (!new_crtc_state->hw.enable)
> - continue;
> -
> ret = intel_modeset_pipe_config(state, new_crtc_state);
> if (ret)
> goto fail;
> +
> + ret = intel_atomic_check_bigjoiner(state, crtc, old_crtc_state,
> + new_crtc_state);
> + if (ret)
> + goto fail;
> }
>
> for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, diff --
> git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 5bb7adc1ff3e..b3d94e6cd7c5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1079,6 +1079,15 @@ struct intel_crtc_state {
> /* enable pipe csc? */
> bool csc_enable;
>
> + /* enable pipe big joiner? */
> + bool bigjoiner;
> +
> + /* big joiner slave crtc? */
> + bool bigjoiner_slave;
> +
> + /* linked crtc for bigjoiner, either slave or master */
> + struct intel_crtc *bigjoiner_linked_crtc;
> +
> /* Display Stream compression state */
> struct {
> bool compression_enable;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 5ad59610eb12..9430caf053cd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2403,12 +2403,12 @@ static int intel_dp_dsc_compute_config(struct
> intel_dp *intel_dp,
> pipe_config->lane_count,
> adjusted_mode->crtc_clock,
> adjusted_mode-
> >crtc_hdisplay,
> - false);
> + pipe_config->bigjoiner);
> dsc_dp_slice_count =
> intel_dp_dsc_get_slice_count(intel_dp,
> adjusted_mode->crtc_clock,
> adjusted_mode-
> >crtc_hdisplay,
> - false);
> + pipe_config->bigjoiner);
> if (!dsc_max_output_bpp || !dsc_dp_slice_count) {
> drm_dbg_kms(&dev_priv->drm,
> "Compressed BPP/Slice Count not
> supported\n"); @@ -2424,14 +2424,15 @@ static int
> intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> * is greater than the maximum Cdclock and if slice count is even
> * then we need to use 2 VDSC instances.
> */
> - if (adjusted_mode->crtc_clock > dev_priv->max_cdclk_freq) {
> - if (pipe_config->dsc.slice_count > 1) {
> - pipe_config->dsc.dsc_split = true;
> - } else {
> + if (adjusted_mode->crtc_clock > dev_priv->max_cdclk_freq ||
> + pipe_config->bigjoiner) {
> + if (pipe_config->dsc.slice_count < 2) {
> drm_dbg_kms(&dev_priv->drm,
> "Cannot split stream to use 2 VDSC
> instances\n");
> return -EINVAL;
> }
> +
> + pipe_config->dsc.dsc_split = true;
> }
>
> ret = intel_dp_dsc_compute_params(&dig_port->base, pipe_config);
> @@ -2502,6 +2503,11 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
> intel_dp->common_rates[limits.max_clock],
> limits.max_bpp, adjusted_mode->crtc_clock);
>
> + if ((adjusted_mode->crtc_clock > i915->max_dotclk_freq ||
> + adjusted_mode->crtc_hdisplay > 5120) &&
> + intel_dp_can_bigjoiner(intel_dp))
> + pipe_config->bigjoiner = true;
> +
> /*
> * Optimize for slow and wide. This is the place to add alternative
> * optimization policy.
> @@ -2510,7 +2516,7 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
>
> /* enable compression if the mode doesn't fit available BW */
> drm_dbg_kms(&i915->drm, "Force DSC en = %d\n", intel_dp-
> >force_dsc_en);
> - if (ret || intel_dp->force_dsc_en) {
> + if (ret || intel_dp->force_dsc_en || pipe_config->bigjoiner) {
> ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
> conn_state, &limits);
> if (ret < 0)
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 13/23] drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner
2020-11-13 22:03 ` [Intel-gfx] [PATCH 13/23] drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner Ville Syrjala
@ 2020-11-17 9:17 ` Manna, Animesh
0 siblings, 0 replies; 47+ messages in thread
From: Manna, Animesh @ 2020-11-17 9:17 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Saturday, November 14, 2020 3:34 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 13/23] drm/i915/dp: Master/Slave enable/disable
> sequence for bigjoiner
>
> From: Manasi Navare <manasi.d.navare@intel.com>
>
> Enabling is done in a special sequence and so should plane updates be. Ideally
> the end user never notices the second pipe is used.
>
> This way ideally everything will be tear free, and updates are really atomic as
> userspace expects it.
>
> This uses generic modeset_enables() calls like trans port sync but still has special
> handling for disable since for slave we should not disable things like encoder, plls
> that are not enabled for slave.
>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> [vsyrjala: Appease checkpatch]
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 25 +++-
> drivers/gpu/drm/i915/display/intel_display.c | 126 +++++++++++++++----
> 2 files changed, 122 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 439b92710fe6..9c4ad0392025 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -28,6 +28,7 @@
> #include <drm/drm_scdc_helper.h>
>
> #include "i915_drv.h"
> +#include "i915_trace.h"
> #include "intel_audio.h"
> #include "intel_combo_phy.h"
> #include "intel_connector.h"
> @@ -3664,7 +3665,8 @@ static void tgl_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
>
> /* 7.l Configure and enable FEC if needed */
> intel_ddi_enable_fec(encoder, crtc_state);
> - intel_dsc_enable(encoder, crtc_state);
> + if (!crtc_state->bigjoiner)
> + intel_dsc_enable(encoder, crtc_state);
> }
>
> static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state, @@ -
> 3736,7 +3738,8 @@ static void hsw_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
> if (!is_mst)
> intel_ddi_enable_pipe_clock(encoder, crtc_state);
>
> - intel_dsc_enable(encoder, crtc_state);
> + if (!crtc_state->bigjoiner)
> + intel_dsc_enable(encoder, crtc_state);
> }
>
> static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state, @@ -
> 3987,6 +3990,21 @@ static void intel_ddi_post_disable(struct
> intel_atomic_state *state,
> ilk_pfit_disable(old_crtc_state);
> }
>
> + if (old_crtc_state->bigjoiner_linked_crtc) {
> + struct intel_atomic_state *state =
> + to_intel_atomic_state(old_crtc_state->uapi.state);
> + struct intel_crtc *slave =
> + old_crtc_state->bigjoiner_linked_crtc;
> + const struct intel_crtc_state *old_slave_crtc_state =
> + intel_atomic_get_old_crtc_state(state, slave);
> +
> + intel_crtc_vblank_off(old_slave_crtc_state);
> + trace_intel_pipe_disable(slave);
> +
> + intel_dsc_disable(old_slave_crtc_state);
> + skl_scaler_disable(old_slave_crtc_state);
> + }
> +
> /*
> * When called from DP MST code:
> * - old_conn_state will be NULL
> @@ -4205,7 +4223,8 @@ static void intel_enable_ddi(struct intel_atomic_state
> *state, {
> drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);
>
> - intel_ddi_enable_transcoder_func(encoder, crtc_state);
> + if (!crtc_state->bigjoiner_slave)
> + intel_ddi_enable_transcoder_func(encoder, crtc_state);
>
> intel_enable_pipe(crtc_state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index aea2ff3ef8c4..60669bef659f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7138,6 +7138,45 @@ static void hsw_set_frame_start_delay(const struct
> intel_crtc_state *crtc_state)
> intel_de_write(dev_priv, reg, val);
> }
>
> +static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
> + const struct intel_crtc_state
> *crtc_state) {
> + struct intel_crtc *master = to_intel_crtc(crtc_state->uapi.crtc);
> + struct intel_crtc_state *master_crtc_state;
> + struct drm_connector_state *conn_state;
> + struct drm_connector *conn;
> + struct intel_encoder *encoder = NULL;
> + int i;
> +
> + if (crtc_state->bigjoiner_slave)
> + master = crtc_state->bigjoiner_linked_crtc;
> +
> + master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
> +
> + for_each_new_connector_in_state(&state->base, conn, conn_state, i) {
> + if (conn_state->crtc != &master->base)
> + continue;
> +
> + encoder = to_intel_encoder(conn_state->best_encoder);
> + break;
> + }
> +
> + if (!crtc_state->bigjoiner_slave) {
> + /* need to enable VDSC, which we skipped in pre-enable */
> + intel_dsc_enable(encoder, crtc_state);
> + } else {
> + /*
> + * Enable sequence steps 1-7 on bigjoiner master
> + */
> + intel_encoders_pre_pll_enable(state, master);
> + intel_enable_shared_dpll(master_crtc_state);
> + intel_encoders_pre_enable(state, master);
> +
> + /* and DSC on slave */
> + intel_dsc_enable(NULL, crtc_state);
> + }
> +}
> +
> static void hsw_crtc_enable(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> @@ -7151,35 +7190,40 @@ static void hsw_crtc_enable(struct
> intel_atomic_state *state,
> if (drm_WARN_ON(&dev_priv->drm, crtc->active))
> return;
>
> - intel_encoders_pre_pll_enable(state, crtc);
> + if (!new_crtc_state->bigjoiner) {
> + intel_encoders_pre_pll_enable(state, crtc);
>
> - if (new_crtc_state->shared_dpll)
> - intel_enable_shared_dpll(new_crtc_state);
> + if (new_crtc_state->shared_dpll)
> + intel_enable_shared_dpll(new_crtc_state);
>
> - intel_encoders_pre_enable(state, crtc);
> -
> - if (!transcoder_is_dsi(cpu_transcoder))
> - intel_set_transcoder_timings(new_crtc_state);
> -
> - intel_set_pipe_src_size(new_crtc_state);
> -
> - if (cpu_transcoder != TRANSCODER_EDP &&
> - !transcoder_is_dsi(cpu_transcoder))
> - intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder),
> - new_crtc_state->pixel_multiplier - 1);
> -
> - if (new_crtc_state->has_pch_encoder)
> - intel_cpu_transcoder_set_m_n(new_crtc_state,
> - &new_crtc_state->fdi_m_n, NULL);
> -
> - if (!transcoder_is_dsi(cpu_transcoder)) {
> - hsw_set_frame_start_delay(new_crtc_state);
> - hsw_set_pipeconf(new_crtc_state);
> + intel_encoders_pre_enable(state, crtc);
> + } else {
> + icl_ddi_bigjoiner_pre_enable(state, new_crtc_state);
> }
>
> + intel_set_pipe_src_size(new_crtc_state);
> if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
> bdw_set_pipemisc(new_crtc_state);
>
> + if (!new_crtc_state->bigjoiner_slave ||
> !transcoder_is_dsi(cpu_transcoder)) {
> + if (!transcoder_is_dsi(cpu_transcoder))
> + intel_set_transcoder_timings(new_crtc_state);
> +
> + if (cpu_transcoder != TRANSCODER_EDP &&
> + !transcoder_is_dsi(cpu_transcoder))
> + intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder),
> + new_crtc_state->pixel_multiplier - 1);
> +
> + if (new_crtc_state->has_pch_encoder)
> + intel_cpu_transcoder_set_m_n(new_crtc_state,
> + &new_crtc_state->fdi_m_n,
> NULL);
> +
> + hsw_set_frame_start_delay(new_crtc_state);
> + }
> +
> + if (!transcoder_is_dsi(cpu_transcoder))
> + hsw_set_pipeconf(new_crtc_state);
> +
> crtc->active = true;
>
> /* Display WA #1180: WaDisableScalarClockGating: glk, cnl */ @@ -
> 7214,6 +7258,11 @@ static void hsw_crtc_enable(struct intel_atomic_state
> *state,
> if (INTEL_GEN(dev_priv) >= 11)
> icl_pipe_mbus_enable(crtc);
>
> + if (new_crtc_state->bigjoiner_slave) {
> + trace_intel_pipe_enable(crtc);
> + intel_crtc_vblank_on(new_crtc_state);
> + }
> +
> intel_encoders_enable(state, crtc);
>
> if (psl_clkgate_wa) {
> @@ -15669,6 +15718,9 @@ static void intel_enable_crtc(struct
> intel_atomic_state *state,
>
> dev_priv->display.crtc_enable(state, crtc);
>
> + if (new_crtc_state->bigjoiner_slave)
> + return;
> +
> /* vblanks work again, re-enable pipe CRC. */
> intel_crtc_enable_pipe_crc(crtc);
> }
> @@ -15731,8 +15783,21 @@ static void intel_old_crtc_state_disables(struct
> intel_atomic_state *state, {
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
>
> + drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
> +
> intel_crtc_disable_planes(state, crtc);
>
> + /*
> + * We still need special handling for disabling bigjoiner master
> + * and slaves since for slave we do not have encoder or plls
> + * so we dont need to disable those.
> + */
> + if (old_crtc_state->bigjoiner) {
> + intel_crtc_disable_planes(state,
> + old_crtc_state-
> >bigjoiner_linked_crtc);
> + old_crtc_state->bigjoiner_linked_crtc->active = false;
> + }
> +
> /*
> * We need to disable pipe CRC before disabling the pipe,
> * or we race against vblank off.
> @@ -15761,7 +15826,7 @@ static void intel_commit_modeset_disables(struct
> intel_atomic_state *state)
> /* Only disable port sync and MST slaves */
> for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> new_crtc_state, i) {
> - if (!needs_modeset(new_crtc_state))
> + if (!needs_modeset(new_crtc_state) || old_crtc_state-
> >bigjoiner)
> continue;
>
> if (!old_crtc_state->hw.active)
> @@ -15786,10 +15851,18 @@ static void
> intel_commit_modeset_disables(struct intel_atomic_state *state)
> for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> new_crtc_state, i) {
> if (!needs_modeset(new_crtc_state) ||
> - (handled & BIT(crtc->pipe)))
> + (handled & BIT(crtc->pipe)) ||
> + old_crtc_state->bigjoiner_slave)
> continue;
>
> intel_pre_plane_update(state, crtc);
> + if (old_crtc_state->bigjoiner) {
> + struct intel_crtc *slave =
> + old_crtc_state->bigjoiner_linked_crtc;
> +
> + intel_pre_plane_update(state, slave);
> + }
> +
> if (old_crtc_state->hw.active)
> intel_old_crtc_state_disables(state, old_crtc_state,
> new_crtc_state, crtc);
> @@ -15887,7 +15960,8 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> continue;
>
> if (intel_dp_mst_is_slave_trans(new_crtc_state) ||
> - is_trans_port_sync_master(new_crtc_state))
> + is_trans_port_sync_master(new_crtc_state) ||
> + (new_crtc_state->bigjoiner && !new_crtc_state-
> >bigjoiner_slave))
> continue;
>
> modeset_pipes &= ~BIT(pipe);
> @@ -15897,7 +15971,7 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
>
> /*
> * Then we enable all remaining pipes that depend on other
> - * pipes: MST slaves and port sync masters.
> + * pipes: MST slaves and port sync masters, big joiner master
> */
> for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> enum pipe pipe = crtc->pipe;
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 01/23] drm/i915: Copy the plane hw state directly for Y planes
2020-11-13 22:03 ` [Intel-gfx] [PATCH 01/23] drm/i915: Copy the plane hw state directly for Y planes Ville Syrjala
@ 2020-11-17 9:19 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 47+ messages in thread
From: Lisovskiy, Stanislav @ 2020-11-17 9:19 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Sat, Nov 14, 2020 at 12:03:36AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> When doing the plane state copy from the UV plane to the Y plane
> let's just copy the hw state directly instead of using the original
> uapi state. The UV plane has already had its uapi state copied into
> its hw state, so this extra detour via the uapi state for the Y plane
> is pointless.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_atomic_plane.c | 12 ++++++++++++
> drivers/gpu/drm/i915/display/intel_atomic_plane.h | 2 ++
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> 3 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 3334ff253600..f47558efb3c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -265,6 +265,18 @@ void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
> plane_state->hw.scaling_filter = from_plane_state->uapi.scaling_filter;
> }
>
> +void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
> + const struct intel_plane_state *from_plane_state)
> +{
> + intel_plane_clear_hw_state(plane_state);
> +
> + memcpy(&plane_state->hw, &from_plane_state->hw,
> + sizeof(plane_state->hw));
> +
> + if (plane_state->hw.fb)
> + drm_framebuffer_get(plane_state->hw.fb);
> +}
> +
> void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
> struct intel_plane_state *plane_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index 59dd1fbb02ea..24a3a148aa62 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -25,6 +25,8 @@ unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state);
> void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
> const struct intel_plane_state *from_plane_state);
> +void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
> + const struct intel_plane_state *from_plane_state);
> void intel_update_plane(struct intel_plane *plane,
> const struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 03577ee5d9b7..62d96e6946e6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -12754,7 +12754,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
> memcpy(linked_state->color_plane, plane_state->color_plane,
> sizeof(linked_state->color_plane));
>
> - intel_plane_copy_uapi_to_hw_state(linked_state, plane_state);
> + intel_plane_copy_hw_state(linked_state, plane_state);
> linked_state->uapi.src = plane_state->uapi.src;
> linked_state->uapi.dst = plane_state->uapi.dst;
>
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 14/23] drm/i915: HW state readout for Bigjoiner case
2020-11-13 22:03 ` [Intel-gfx] [PATCH 14/23] drm/i915: HW state readout for Bigjoiner case Ville Syrjala
@ 2020-11-17 9:51 ` Manna, Animesh
0 siblings, 0 replies; 47+ messages in thread
From: Manna, Animesh @ 2020-11-17 9:51 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Saturday, November 14, 2020 3:34 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 14/23] drm/i915: HW state readout for Bigjoiner
> case
>
> From: Manasi Navare <manasi.d.navare@intel.com>
>
> Skip iterating over bigjoiner slaves, only the master has the state we care about.
>
> Add the width of the bigjoiner slave to the reconstructed fb.
>
> Hide the bigjoiner slave to userspace, and double the mode on bigjoiner master.
>
> And last, disable bigjoiner slave from primary if reconstruction fails.
>
> v3:
> * Fix the ddi_get_config slave error (Ankit Nautiyal)
> v2:
> * Unsupported bigjoiner config for initial fb (Ville)
>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> [vsyrjala:
> * Don't do any hw->uapi state copy for bigjoiner slave
> * We still have hw.mode so no need to pass it in
> * Appease checkpatch]
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 2 -
> drivers/gpu/drm/i915/display/intel_ddi.c | 37 ++-
> drivers/gpu/drm/i915/display/intel_display.c | 291 ++++++++++++------
> .../drm/i915/display/intel_display_types.h | 1 +
> 4 files changed, 230 insertions(+), 101 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 0fecf372be11..104a423e0cd5 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1492,8 +1492,6 @@ static void gen11_dsi_get_config(struct intel_encoder
> *encoder,
> struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
>
> - intel_dsc_get_config(pipe_config);
> -
> /* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */
> pipe_config->port_clock = intel_dpll_get_freq(i915,
> pipe_config->shared_dpll);
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 9c4ad0392025..aa444c428949 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4576,20 +4576,14 @@ static void bdw_get_trans_port_sync_config(struct
> intel_crtc_state *crtc_state)
> crtc_state->sync_mode_slaves_mask);
> }
>
> -void intel_ddi_get_config(struct intel_encoder *encoder,
> - struct intel_crtc_state *pipe_config)
> +static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
> + struct intel_crtc_state *pipe_config)
> {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
> enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
> u32 temp, flags = 0;
>
> - /* XXX: DSI transcoder paranoia */
> - if (drm_WARN_ON(&dev_priv->drm,
> transcoder_is_dsi(cpu_transcoder)))
> - return;
> -
> - intel_dsc_get_config(pipe_config);
> -
> temp = intel_de_read(dev_priv,
> TRANS_DDI_FUNC_CTL(cpu_transcoder));
> if (temp & TRANS_DDI_PHSYNC)
> flags |= DRM_MODE_FLAG_PHSYNC;
> @@ -4683,6 +4677,30 @@ void intel_ddi_get_config(struct intel_encoder
> *encoder,
> default:
> break;
> }
> +}
> +
> +void intel_ddi_get_config(struct intel_encoder *encoder,
> + struct intel_crtc_state *pipe_config) {
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> + enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
> +
> + /* XXX: DSI transcoder paranoia */
> + if (drm_WARN_ON(&dev_priv->drm,
> transcoder_is_dsi(cpu_transcoder)))
> + return;
> +
> + if (pipe_config->bigjoiner_slave) {
> + /* read out pipe settings from master */
> + enum transcoder save = pipe_config->cpu_transcoder;
> +
> + /* Our own transcoder needs to be disabled when reading it in
> intel_ddi_read_func_ctl() */
> + WARN_ON(pipe_config->output_types);
> + pipe_config->cpu_transcoder = (enum transcoder)pipe_config-
> >bigjoiner_linked_crtc->pipe;
> + intel_ddi_read_func_ctl(encoder, pipe_config);
> + pipe_config->cpu_transcoder = save;
> + } else {
> + intel_ddi_read_func_ctl(encoder, pipe_config);
> + }
>
> pipe_config->has_audio =
> intel_ddi_is_audio_enabled(dev_priv, cpu_transcoder); @@ -
> 4708,7 +4726,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
> dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
> }
>
> - intel_ddi_clock_get(encoder, pipe_config);
> + if (!pipe_config->bigjoiner_slave)
> + intel_ddi_clock_get(encoder, pipe_config);
>
> if (IS_GEN9_LP(dev_priv))
> pipe_config->lane_lat_optim_mask =
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 60669bef659f..07bee5caacfe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3631,6 +3631,8 @@ intel_find_initial_plane_obj(struct intel_crtc
> *intel_crtc,
> struct intel_plane *intel_plane = to_intel_plane(primary);
> struct intel_plane_state *intel_state =
> to_intel_plane_state(plane_state);
> + struct intel_crtc_state *crtc_state =
> + to_intel_crtc_state(intel_crtc->base.state);
> struct drm_framebuffer *fb;
> struct i915_vma *vma;
>
> @@ -3653,7 +3655,7 @@ intel_find_initial_plane_obj(struct intel_crtc
> *intel_crtc,
> if (c == &intel_crtc->base)
> continue;
>
> - if (!to_intel_crtc(c)->active)
> + if (!to_intel_crtc_state(c->state)->uapi.active)
> continue;
>
> state = to_intel_plane_state(c->primary->state);
> @@ -3675,6 +3677,11 @@ intel_find_initial_plane_obj(struct intel_crtc
> *intel_crtc,
> * pretend the BIOS never had it enabled.
> */
> intel_plane_disable_noatomic(intel_crtc, intel_plane);
> + if (crtc_state->bigjoiner) {
> + struct intel_crtc *slave =
> + crtc_state->bigjoiner_linked_crtc;
> + intel_plane_disable_noatomic(slave, to_intel_plane(slave-
> >base.primary));
> + }
>
> return;
>
> @@ -8220,13 +8227,27 @@ static void intel_crtc_readout_derived_state(struct
> intel_crtc_state *crtc_state
>
> drm_mode_copy(pipe_mode, adjusted_mode);
>
> + if (crtc_state->bigjoiner) {
> + /*
> + * transcoder is programmed to the full mode,
> + * but pipe timings are half of the transcoder mode
> + */
> + pipe_mode->crtc_hdisplay /= 2;
> + pipe_mode->crtc_hblank_start /= 2;
> + pipe_mode->crtc_hblank_end /= 2;
> + pipe_mode->crtc_hsync_start /= 2;
> + pipe_mode->crtc_hsync_end /= 2;
> + pipe_mode->crtc_htotal /= 2;
> + pipe_mode->crtc_clock /= 2;
> + }
> +
> intel_mode_from_crtc_timings(pipe_mode, pipe_mode);
> intel_mode_from_crtc_timings(adjusted_mode, adjusted_mode);
>
> intel_crtc_compute_pixel_rate(crtc_state);
>
> drm_mode_copy(mode, adjusted_mode);
> - mode->hdisplay = crtc_state->pipe_src_w;
> + mode->hdisplay = crtc_state->pipe_src_w << crtc_state->bigjoiner;
> mode->vdisplay = crtc_state->pipe_src_h; }
>
> @@ -10698,6 +10719,7 @@ static void
> skl_get_initial_plane_config(struct intel_crtc *crtc,
> struct intel_initial_plane_config *plane_config) {
> + struct intel_crtc_state *crtc_state =
> +to_intel_crtc_state(crtc->base.state);
> struct drm_device *dev = crtc->base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> @@ -10714,6 +10736,12 @@ skl_get_initial_plane_config(struct intel_crtc
> *crtc,
>
> drm_WARN_ON(dev, pipe != crtc->pipe);
>
> + if (crtc_state->bigjoiner) {
> + drm_dbg_kms(&dev_priv->drm,
> + "Unsupported bigjoiner configuration for initial
> FB\n");
> + return;
> + }
> +
> intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL);
> if (!intel_fb) {
> drm_dbg_kms(&dev_priv->drm, "failed to alloc fb\n"); @@ -
> 11320,6 +11348,8 @@ static void hsw_get_ddi_port_state(struct intel_crtc
> *crtc,
> } else {
> tmp = intel_de_read(dev_priv,
> TRANS_DDI_FUNC_CTL(cpu_transcoder));
> + if (!(tmp & TRANS_DDI_FUNC_ENABLE))
> + return;
> if (INTEL_GEN(dev_priv) >= 12)
> port =
> TGL_TRANS_DDI_FUNC_CTL_VAL_TO_PORT(tmp);
> else
> @@ -11395,10 +11425,19 @@ static bool hsw_get_pipe_config(struct
> intel_crtc *crtc,
> active = true;
> }
>
> - if (!active)
> - goto out;
> + intel_dsc_get_config(pipe_config);
>
> - if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
> + if (!active) {
> + /* bigjoiner slave doesn't enable transcoder */
> + if (!pipe_config->bigjoiner_slave)
> + goto out;
> +
> + active = true;
> + pipe_config->pixel_multiplier = 1;
> +
> + /* we cannot read out most state, so don't bother.. */
> + pipe_config->quirks |=
> PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE;
> + } else if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
> INTEL_GEN(dev_priv) >= 11) {
> hsw_get_ddi_port_state(crtc, pipe_config);
> intel_get_transcoder_timings(crtc, pipe_config); @@ -11473,7
> +11512,10 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> }
> }
>
> - if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
> + if (pipe_config->bigjoiner_slave) {
> + /* Cannot be read out as a slave, set to 0. */
> + pipe_config->pixel_multiplier = 0;
> + } else if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
> !transcoder_is_dsi(pipe_config->cpu_transcoder)) {
> pipe_config->pixel_multiplier =
> intel_de_read(dev_priv,
> @@ -13516,6 +13558,9 @@ intel_crtc_copy_uapi_to_hw_state(struct
> intel_atomic_state *state,
>
> static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state
> *crtc_state) {
> + if (crtc_state->bigjoiner_slave)
> + return;
> +
> crtc_state->uapi.enable = crtc_state->hw.enable;
> crtc_state->uapi.active = crtc_state->hw.active;
> drm_WARN_ON(crtc_state->uapi.crtc->dev,
> @@ -14157,35 +14202,53 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_X(output_types);
>
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
> + /* FIXME do the readout properly and get rid of this quirk */
> + if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
>
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
>
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
>
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
> +
> + PIPE_CONF_CHECK_I(pixel_multiplier);
> +
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_INTERLACE);
> +
> + if
> (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_PHSYNC);
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_NHSYNC);
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_PVSYNC);
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_NVSYNC);
> + }
> + }
>
> - PIPE_CONF_CHECK_I(pixel_multiplier);
> PIPE_CONF_CHECK_I(output_format);
> PIPE_CONF_CHECK_BOOL(has_hdmi_sink);
> if ((INTEL_GEN(dev_priv) < 8 && !IS_HASWELL(dev_priv)) || @@ -
> 14195,24 +14258,12 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> PIPE_CONF_CHECK_BOOL(hdmi_scrambling);
> PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);
> PIPE_CONF_CHECK_BOOL(has_infoframe);
> - PIPE_CONF_CHECK_BOOL(fec_enable);
> + /* FIXME do the readout properly and get rid of this quirk */
> + if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
> + PIPE_CONF_CHECK_BOOL(fec_enable);
>
> PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
>
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_INTERLACE);
> -
> - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_PHSYNC);
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_NHSYNC);
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_PVSYNC);
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_NVSYNC);
> - }
> -
> PIPE_CONF_CHECK_X(gmch_pfit.control);
> /* pfit ratios are autocomputed by the hw on gen4+ */
> if (INTEL_GEN(dev_priv) < 4)
> @@ -14238,7 +14289,9 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> }
>
> PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> - PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
> + /* FIXME do the readout properly and get rid of this quirk */
> + if
> (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
> + PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
>
> PIPE_CONF_CHECK_X(gamma_mode);
> if (IS_CHERRYVIEW(dev_priv))
> @@ -14259,49 +14312,53 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> PIPE_CONF_CHECK_BOOL(double_wide);
>
> PIPE_CONF_CHECK_P(shared_dpll);
> - PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
> - PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
> - PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
> - PIPE_CONF_CHECK_X(dpll_hw_state.fp1);
> - PIPE_CONF_CHECK_X(dpll_hw_state.wrpll);
> - PIPE_CONF_CHECK_X(dpll_hw_state.spll);
> - PIPE_CONF_CHECK_X(dpll_hw_state.ctrl1);
> - PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr1);
> - PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr2);
> - PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr0);
> - PIPE_CONF_CHECK_X(dpll_hw_state.ebb0);
> - PIPE_CONF_CHECK_X(dpll_hw_state.ebb4);
> - PIPE_CONF_CHECK_X(dpll_hw_state.pll0);
> - PIPE_CONF_CHECK_X(dpll_hw_state.pll1);
> - PIPE_CONF_CHECK_X(dpll_hw_state.pll2);
> - PIPE_CONF_CHECK_X(dpll_hw_state.pll3);
> - PIPE_CONF_CHECK_X(dpll_hw_state.pll6);
> - PIPE_CONF_CHECK_X(dpll_hw_state.pll8);
> - PIPE_CONF_CHECK_X(dpll_hw_state.pll9);
> - PIPE_CONF_CHECK_X(dpll_hw_state.pll10);
> - PIPE_CONF_CHECK_X(dpll_hw_state.pcsdw12);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_refclkin_ctl);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_coreclkctl1);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_hsclkctl);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div0);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div1);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_lf);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_frac_lock);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_ssc);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_bias);
> - PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);
>
> - PIPE_CONF_CHECK_X(dsi_pll.ctrl);
> - PIPE_CONF_CHECK_X(dsi_pll.div);
> + /* FIXME do the readout properly and get rid of this quirk */
> + if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
> + PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
> + PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
> + PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
> + PIPE_CONF_CHECK_X(dpll_hw_state.fp1);
> + PIPE_CONF_CHECK_X(dpll_hw_state.wrpll);
> + PIPE_CONF_CHECK_X(dpll_hw_state.spll);
> + PIPE_CONF_CHECK_X(dpll_hw_state.ctrl1);
> + PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr1);
> + PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr2);
> + PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr0);
> + PIPE_CONF_CHECK_X(dpll_hw_state.ebb0);
> + PIPE_CONF_CHECK_X(dpll_hw_state.ebb4);
> + PIPE_CONF_CHECK_X(dpll_hw_state.pll0);
> + PIPE_CONF_CHECK_X(dpll_hw_state.pll1);
> + PIPE_CONF_CHECK_X(dpll_hw_state.pll2);
> + PIPE_CONF_CHECK_X(dpll_hw_state.pll3);
> + PIPE_CONF_CHECK_X(dpll_hw_state.pll6);
> + PIPE_CONF_CHECK_X(dpll_hw_state.pll8);
> + PIPE_CONF_CHECK_X(dpll_hw_state.pll9);
> + PIPE_CONF_CHECK_X(dpll_hw_state.pll10);
> + PIPE_CONF_CHECK_X(dpll_hw_state.pcsdw12);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_refclkin_ctl);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_coreclkctl1);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_hsclkctl);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div0);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div1);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_lf);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_frac_lock);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_ssc);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_bias);
> + PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);
>
> - if (IS_G4X(dev_priv) || INTEL_GEN(dev_priv) >= 5)
> - PIPE_CONF_CHECK_I(pipe_bpp);
> + PIPE_CONF_CHECK_X(dsi_pll.ctrl);
> + PIPE_CONF_CHECK_X(dsi_pll.div);
>
> - PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
> - PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
> - PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
> + if (IS_G4X(dev_priv) || INTEL_GEN(dev_priv) >= 5)
> + PIPE_CONF_CHECK_I(pipe_bpp);
>
> - PIPE_CONF_CHECK_I(min_voltage_level);
> + PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
> +
> PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
> + PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
> +
> + PIPE_CONF_CHECK_I(min_voltage_level);
> + }
>
> PIPE_CONF_CHECK_X(infoframes.enable);
> PIPE_CONF_CHECK_X(infoframes.gcp);
> @@ -14313,6 +14370,9 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_X(sync_mode_slaves_mask);
> PIPE_CONF_CHECK_I(master_transcoder);
> + PIPE_CONF_CHECK_BOOL(bigjoiner);
> + PIPE_CONF_CHECK_BOOL(bigjoiner_slave);
> + PIPE_CONF_CHECK_P(bigjoiner_linked_crtc);
>
> PIPE_CONF_CHECK_I(dsc.compression_enable);
> PIPE_CONF_CHECK_I(dsc.dsc_split);
> @@ -14584,6 +14644,7 @@ verify_crtc_state(struct intel_crtc *crtc,
> struct intel_encoder *encoder;
> struct intel_crtc_state *pipe_config = old_crtc_state;
> struct drm_atomic_state *state = old_crtc_state->uapi.state;
> + struct intel_crtc *master = crtc;
>
> __drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi);
> intel_crtc_free_hw_state(old_crtc_state);
> @@ -14611,7 +14672,10 @@ verify_crtc_state(struct intel_crtc *crtc,
> "(expected %i, found %i)\n",
> new_crtc_state->hw.active, crtc->active);
>
> - for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
> + if (new_crtc_state->bigjoiner_slave)
> + master = new_crtc_state->bigjoiner_linked_crtc;
> +
> + for_each_encoder_on_crtc(dev, &master->base, encoder) {
> enum pipe pipe;
> bool active;
>
> @@ -14621,7 +14685,7 @@ verify_crtc_state(struct intel_crtc *crtc,
> encoder->base.base.id, active,
> new_crtc_state->hw.active);
>
> - I915_STATE_WARN(active && crtc->pipe != pipe,
> + I915_STATE_WARN(active && master->pipe != pipe,
> "Encoder connected to wrong pipe %c\n",
> pipe_name(pipe));
>
> @@ -18527,7 +18591,7 @@ int intel_modeset_init_nogem(struct
> drm_i915_private *i915)
> for_each_intel_crtc(dev, crtc) {
> struct intel_initial_plane_config plane_config = {};
>
> - if (!crtc->active)
> + if (!to_intel_crtc_state(crtc->base.state)->uapi.active)
> continue;
>
> /*
> @@ -18838,7 +18902,8 @@ static void intel_sanitize_crtc(struct intel_crtc
> *crtc,
>
> /* Adjust the state of the output pipe according to whether we
> * have active connectors/encoders. */
> - if (crtc_state->hw.active && !intel_crtc_has_encoders(crtc))
> + if (crtc_state->hw.active && !intel_crtc_has_encoders(crtc) &&
> + !crtc_state->bigjoiner_slave)
> intel_crtc_disable_noatomic(crtc, ctx);
>
> if (crtc_state->hw.active || HAS_GMCH(dev_priv)) { @@ -19053,6
> +19118,16 @@ static void intel_modeset_readout_hw_state(struct drm_device
> *dev)
> intel_encoder_get_config(encoder, crtc_state);
> if (encoder->sync_state)
> encoder->sync_state(encoder, crtc_state);
> +
> + /* read out to slave crtc as well for bigjoiner */
> + if (crtc_state->bigjoiner) {
> + /* encoder should read be linked to bigjoiner
> master */
> + WARN_ON(crtc_state->bigjoiner_slave);
> +
> + crtc = crtc_state->bigjoiner_linked_crtc;
> + crtc_state = to_intel_crtc_state(crtc-
> >base.state);
> + intel_encoder_get_config(encoder, crtc_state);
> + }
> } else {
> encoder->base.crtc = NULL;
> }
> @@ -19108,6 +19183,9 @@ static void intel_modeset_readout_hw_state(struct
> drm_device *dev)
> struct intel_plane *plane;
> int min_cdclk = 0;
>
> + if (crtc_state->bigjoiner_slave)
> + continue;
> +
> if (crtc_state->hw.active) {
> /*
> * The initial mode needs to be set in order to keep @@
> -19168,6 +19246,39 @@ static void intel_modeset_readout_hw_state(struct
> drm_device *dev)
> intel_bw_crtc_update(bw_state, crtc_state);
>
> intel_pipe_config_sanity_check(dev_priv, crtc_state);
> +
> + /* discard our incomplete slave state, copy it from master */
> + if (crtc_state->bigjoiner && crtc_state->hw.active) {
> + struct intel_crtc *slave = crtc_state-
> >bigjoiner_linked_crtc;
> + struct intel_crtc_state *slave_crtc_state =
> + to_intel_crtc_state(slave->base.state);
> +
> + copy_bigjoiner_crtc_state(slave_crtc_state,
> crtc_state);
> + slave->base.mode = crtc->base.mode;
> +
> + cdclk_state->min_cdclk[slave->pipe] = min_cdclk;
> + cdclk_state->min_voltage_level[slave->pipe] =
> + crtc_state->min_voltage_level;
> +
> + for_each_intel_plane_on_crtc(&dev_priv->drm, slave,
> plane) {
> + const struct intel_plane_state *plane_state =
> + to_intel_plane_state(plane-
> >base.state);
> +
> + /*
> + * FIXME don't have the fb yet, so can't
> + * use intel_plane_data_rate() :(
> + */
> + if (plane_state->uapi.visible)
> + crtc_state->data_rate[plane->id] =
> + 4 * crtc_state->pixel_rate;
> + else
> + crtc_state->data_rate[plane->id] = 0;
> + }
> +
> + intel_bw_crtc_update(bw_state, slave_crtc_state);
> + drm_calc_timestamping_constants(&slave->base,
> + &slave_crtc_state-
> >hw.adjusted_mode);
> + }
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index b3d94e6cd7c5..ce82d654d0f2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -850,6 +850,7 @@ struct intel_crtc_state {
> * accordingly.
> */
> #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable
> sync mode.flags */
> +#define PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE (1<<1) /* bigjoiner slave,
> partial readout */
> unsigned long quirks;
>
> unsigned fb_bits; /* framebuffers to flip */
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 19/23] drm/i915: Add debugfs dumping for bigjoiner, v3.
2020-11-13 22:03 ` [Intel-gfx] [PATCH 19/23] drm/i915: Add debugfs dumping for bigjoiner, v3 Ville Syrjala
@ 2020-11-17 11:07 ` Manna, Animesh
0 siblings, 0 replies; 47+ messages in thread
From: Manna, Animesh @ 2020-11-17 11:07 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Saturday, November 14, 2020 3:34 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 19/23] drm/i915: Add debugfs dumping for bigjoiner,
> v3.
>
> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>
> Dump debugfs and planar links as well, this will make it easier to debug when
> things go wrong.
>
> v4:
> * Rebase
> Changes since v1:
> - Report planar slaves as such, now that we have the plane_state switch.
> Changes since v2:
> - Rebase on top of the new plane format dumping
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> ---
> .../drm/i915/display/intel_display_debugfs.c | 25 ++++++++++++++++++-
> 1 file changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 00b79593bcef..ca41e8c00ad7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -755,6 +755,17 @@ static void plane_rotation(char *buf, size_t bufsize,
> unsigned int rotation)
> rotation);
> }
>
> +static const char *plane_visibility(const struct intel_plane_state
> +*plane_state) {
> + if (plane_state->uapi.visible)
> + return "visible";
> +
> + if (plane_state->planar_slave)
> + return "planar-slave";
> +
> + return "hidden";
> +}
> +
> static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) {
> const struct intel_plane_state *plane_state = @@ -773,13 +784,19 @@
> static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
> plane_rotation(rot_str, sizeof(rot_str),
> plane_state->uapi.rotation);
>
> - seq_printf(m, "\t\tuapi: [FB:%d] %s,0x%llx,%dx%d, src="
> DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
> + seq_printf(m, "\t\tuapi: [FB:%d] %s,0x%llx,%dx%d, visible=%s, src="
> +DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
> fb ? fb->base.id : 0, fb ? format_name.str : "n/a",
> fb ? fb->modifier : 0,
> fb ? fb->width : 0, fb ? fb->height : 0,
> + plane_visibility(plane_state),
> DRM_RECT_FP_ARG(&src),
> DRM_RECT_ARG(&dst),
> rot_str);
> +
> + if (plane_state->planar_linked_plane)
> + seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
> + plane_state->planar_linked_plane->base.base.id,
> plane_state->planar_linked_plane->base.name,
> + plane_state->planar_slave ? "slave" : "master");
> }
>
> static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
> @@ -875,6 +892,12 @@ static void intel_crtc_info(struct seq_file *m, struct
> intel_crtc *crtc)
> intel_scaler_info(m, crtc);
> }
>
> + if (crtc_state->bigjoiner)
> + seq_printf(m, "\tLinked to [CRTC:%d:%s] as a %s\n",
> + crtc_state->bigjoiner_linked_crtc->base.base.id,
> + crtc_state->bigjoiner_linked_crtc->base.name,
> + crtc_state->bigjoiner_slave ? "slave" : "master");
> +
> for_each_intel_encoder_mask(&dev_priv->drm, encoder,
> crtc_state->uapi.encoder_mask)
> intel_encoder_info(m, crtc, encoder);
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 18/23] drm/i915: Add bigjoiner aware plane clipping checks
2020-11-13 22:03 ` [Intel-gfx] [PATCH 18/23] drm/i915: Add bigjoiner aware plane clipping checks Ville Syrjala
@ 2020-11-17 14:54 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 47+ messages in thread
From: Lisovskiy, Stanislav @ 2020-11-17 14:54 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Sat, Nov 14, 2020 at 12:03:53AM +0200, Ville Syrjala wrote:
> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>
> We need to look at hw.fb for the framebuffer, and add the translation
> for the slave_plane_state. With these changes we set the correct
> rectangle on the bigjoiner slave, and don't set incorrect
> src/dst/visibility on the slave plane.
>
> v2:
> * Manual rebase (Manasi)
>
> v3:
> * hw.rotation instead of uapi.rotation (Ville)
>
Looks good to me,
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 60 +++++++++++++++++++
> .../gpu/drm/i915/display/intel_atomic_plane.h | 4 ++
> drivers/gpu/drm/i915/display/intel_display.c | 19 +++---
> drivers/gpu/drm/i915/display/intel_sprite.c | 21 +++----
> 4 files changed, 80 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 7abb0e3d6c0b..7e9f84b00859 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -271,6 +271,9 @@ void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
> plane_state->hw.color_encoding = from_plane_state->uapi.color_encoding;
> plane_state->hw.color_range = from_plane_state->uapi.color_range;
> plane_state->hw.scaling_filter = from_plane_state->uapi.scaling_filter;
> +
> + plane_state->uapi.src = drm_plane_state_src(&from_plane_state->uapi);
> + plane_state->uapi.dst = drm_plane_state_dest(&from_plane_state->uapi);
> }
>
> void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
> @@ -514,6 +517,63 @@ void i9xx_update_planes_on_crtc(struct intel_atomic_state *state,
> }
> }
>
> +int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
> + struct intel_crtc_state *crtc_state,
> + int min_scale, int max_scale,
> + bool can_position)
> +{
> + struct drm_framebuffer *fb = plane_state->hw.fb;
> + struct drm_rect *src = &plane_state->uapi.src;
> + struct drm_rect *dst = &plane_state->uapi.dst;
> + unsigned int rotation = plane_state->hw.rotation;
> + struct drm_rect clip = {};
> + int hscale, vscale;
> +
> + if (!fb) {
> + plane_state->uapi.visible = false;
> + return 0;
> + }
> +
> + drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation);
> +
> + /* Check scaling */
> + hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale);
> + vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale);
> + if (hscale < 0 || vscale < 0) {
> + DRM_DEBUG_KMS("Invalid scaling of plane\n");
> + drm_rect_debug_print("src: ", src, true);
> + drm_rect_debug_print("dst: ", dst, false);
> + return -ERANGE;
> + }
> +
> + if (crtc_state->hw.enable) {
> + clip.x2 = crtc_state->pipe_src_w;
> + clip.y2 = crtc_state->pipe_src_h;
> + }
> +
> + /* right side of the image is on the slave crtc, adjust dst to match */
> + if (crtc_state->bigjoiner_slave)
> + drm_rect_translate(dst, -crtc_state->pipe_src_w, 0);
> +
> + /*
> + * FIXME: This might need further adjustment for seamless scaling
> + * with phase information, for the 2p2 and 2p1 scenarios.
> + */
> + plane_state->uapi.visible = drm_rect_clip_scaled(src, dst, &clip);
> +
> + drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, rotation);
> +
> + if (!can_position && plane_state->uapi.visible &&
> + !drm_rect_equals(dst, &clip)) {
> + DRM_DEBUG_KMS("Plane must cover entire CRTC\n");
> + drm_rect_debug_print("dst: ", dst, false);
> + drm_rect_debug_print("clip: ", &clip, false);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
> .prepare_fb = intel_prepare_plane_fb,
> .cleanup_fb = intel_cleanup_plane_fb,
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index 5cae9db41062..5c78a087ed86 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -55,6 +55,10 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat
> int intel_plane_calc_min_cdclk(struct intel_atomic_state *state,
> struct intel_plane *plane,
> bool *need_cdclk_calc);
> +int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
> + struct intel_crtc_state *crtc_state,
> + int min_scale, int max_scale,
> + bool can_position);
> void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
> struct intel_plane_state *plane_state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 55e0a2f21d98..eeb50413fc8e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4315,12 +4315,10 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state,
> if (ret)
> return ret;
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - DRM_PLANE_HELPER_NO_SCALING,
> - DRM_PLANE_HELPER_NO_SCALING,
> - i9xx_plane_has_windowing(plane),
> - true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + DRM_PLANE_HELPER_NO_SCALING,
> + DRM_PLANE_HELPER_NO_SCALING,
> + i9xx_plane_has_windowing(plane));
> if (ret)
> return ret;
>
> @@ -11660,11 +11658,10 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
> return -EINVAL;
> }
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - DRM_PLANE_HELPER_NO_SCALING,
> - DRM_PLANE_HELPER_NO_SCALING,
> - true, true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + DRM_PLANE_HELPER_NO_SCALING,
> + DRM_PLANE_HELPER_NO_SCALING,
> + true);
> if (ret)
> return ret;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index a3ab44694118..019a2d6d807a 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -2187,10 +2187,8 @@ g4x_sprite_check(struct intel_crtc_state *crtc_state,
> }
> }
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - min_scale, max_scale,
> - true, true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + min_scale, max_scale, true);
> if (ret)
> return ret;
>
> @@ -2245,11 +2243,10 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state,
> if (ret)
> return ret;
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - DRM_PLANE_HELPER_NO_SCALING,
> - DRM_PLANE_HELPER_NO_SCALING,
> - true, true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + DRM_PLANE_HELPER_NO_SCALING,
> + DRM_PLANE_HELPER_NO_SCALING,
> + true);
> if (ret)
> return ret;
>
> @@ -2456,10 +2453,8 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state,
> max_scale = skl_plane_max_scale(dev_priv, fb);
> }
>
> - ret = drm_atomic_helper_check_plane_state(&plane_state->uapi,
> - &crtc_state->uapi,
> - min_scale, max_scale,
> - true, true);
> + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
> + min_scale, max_scale, true);
> if (ret)
> return ret;
>
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 21/23] drm/i915: Fix cursor src/dst rectangle with bigjoiner
2020-11-17 0:33 ` Navare, Manasi
@ 2020-11-17 15:09 ` Ville Syrjälä
2020-11-17 15:52 ` Navare, Manasi
0 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjälä @ 2020-11-17 15:09 UTC (permalink / raw)
To: Navare, Manasi; +Cc: intel-gfx
On Mon, Nov 16, 2020 at 04:33:50PM -0800, Navare, Manasi wrote:
> On Sat, Nov 14, 2020 at 12:03:56AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We can't call drm_plane_state_src() this late for the slave plane since
> > it would consult the wrong uapi state. We've alreayd done the correct
> > uapi->hw copy earlier, so let's just preserve the unclipped src/dst
> > rects using a temp copy across the intel_atomic_plane_check_clipping()
> > call.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 6 ++++--
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 19e9c3795265..7607bcd9b7fe 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -11651,6 +11651,8 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
> > {
> > const struct drm_framebuffer *fb = plane_state->hw.fb;
> > struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> > + const struct drm_rect src = plane_state->uapi.src;
> > + const struct drm_rect dst = plane_state->uapi.dst;
> > int ret;
> >
> > if (fb && fb->modifier != DRM_FORMAT_MOD_LINEAR) {
> > @@ -11666,8 +11668,8 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
> > return ret;
> >
> > /* Use the unclipped src/dst rectangles, which we program to hw */
> > - plane_state->uapi.src = drm_plane_state_src(&plane_state->uapi);
> > - plane_state->uapi.dst = drm_plane_state_dest(&plane_state->uapi);
> > + plane_state->uapi.src = src;
> > + plane_state->uapi.dst = dst;
>
> We get this for both slave and master? No slave condition needed?
Planes don't know/care about bigjoiner at this stage of the computation
anymore. The only bigjoiner thing for planes is the
add_affected_planes()+uapi->hw state copy.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 16/23] drm/i915: Add planes affected by bigjoiner to the state
2020-11-17 0:09 ` Navare, Manasi
@ 2020-11-17 15:14 ` Ville Syrjälä
2020-11-17 15:50 ` Navare, Manasi
0 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjälä @ 2020-11-17 15:14 UTC (permalink / raw)
To: Navare, Manasi; +Cc: intel-gfx
On Mon, Nov 16, 2020 at 04:09:01PM -0800, Navare, Manasi wrote:
> On Sat, Nov 14, 2020 at 12:03:51AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Make sure both the bigjoiner "master" and "slave" plane are
> > in the state whenever either of them is in the state.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++++++++++++
> > 1 file changed, 42 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 465877097582..1118ff73c0d4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -15069,6 +15069,44 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv)
> > IS_IVYBRIDGE(dev_priv) || (INTEL_GEN(dev_priv) >= 11);
> > }
> >
> > +static int intel_crtc_add_bigjoiner_planes(struct intel_atomic_state *state,
> > + struct intel_crtc *crtc,
> > + struct intel_crtc *other)
> > +{
> > + const struct intel_plane_state *plane_state;
> > + struct intel_plane *plane;
> > + u8 plane_ids = 0;
> > + int i;
> > +
> > + for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
> > + if (plane->pipe == crtc->pipe)
> > + plane_ids |= BIT(plane->id);
> > + }
> > +
> > + return intel_crtc_add_planes_to_state(state, other, plane_ids);
>
> We call this function intel_crtc_add_planes_to_state again in intel_atomic_check_planes again at
> the end, so arent we adding the planes to state twice for both master and slave?
>
> Do we need some condition to avoid adding it again at the end of intel_atomic_check_planes ?
No. That other stuff is there for the min_cdclk calculation.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 17/23] drm/i915: Get the uapi state from the correct plane when bigjoiner is used
2020-11-17 0:24 ` Navare, Manasi
@ 2020-11-17 15:17 ` Ville Syrjälä
2020-11-17 15:48 ` Navare, Manasi
0 siblings, 1 reply; 47+ messages in thread
From: Ville Syrjälä @ 2020-11-17 15:17 UTC (permalink / raw)
To: Navare, Manasi; +Cc: intel-gfx
On Mon, Nov 16, 2020 at 04:24:15PM -0800, Navare, Manasi wrote:
> On Sat, Nov 14, 2020 at 12:03:52AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > When using bigjoiner userspace is only controlling the "master"
> > plane, so use its uapi state for the "slave" plane as well.
> >
> > hw.crtc needs a bit of magic since we don't want to copy that from
> > the uapi state (as it points to the wrong pipe for the "slave
> > " plane). Instead we pass the right crtc in explicitly but only
> > assign it when the uapi state indicates the plane to be logically
> > enabled (ie. uapi.crtc != NULL).
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > .../gpu/drm/i915/display/intel_atomic_plane.c | 59 +++++++++++++------
> > .../gpu/drm/i915/display/intel_atomic_plane.h | 3 +-
> > drivers/gpu/drm/i915/display/intel_display.c | 5 +-
> > 3 files changed, 46 insertions(+), 21 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > index f47558efb3c2..7abb0e3d6c0b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > @@ -247,11 +247,19 @@ static void intel_plane_clear_hw_state(struct intel_plane_state *plane_state)
> > }
> >
> > void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
> > - const struct intel_plane_state *from_plane_state)
> > + const struct intel_plane_state *from_plane_state,
> > + struct intel_crtc *crtc)
> > {
> > intel_plane_clear_hw_state(plane_state);
> >
> > - plane_state->hw.crtc = from_plane_state->uapi.crtc;
> > + /*
> > + * For the bigjoiner slave uapi.crtc will point at
> > + * the master crtc. So we explicitly assign the right
> > + * slave crtc to hw.crtc. uapi.crtc!=NULL simply indicates
> > + * the plane is logically enabled on the uapi level.
> > + */
> > + plane_state->hw.crtc = from_plane_state->uapi.crtc ? &crtc->base : NULL;
>
> But here in case of bigjoiner_slave we actualy compute new_master_plane_state from master_plane which is
> obtained from the slaves linked crtc.
>
> So here, even for the slave plane's hw.crtc we are using master's uapi.crtc? Is that what is happening here?
Yes.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 17/23] drm/i915: Get the uapi state from the correct plane when bigjoiner is used
2020-11-17 15:17 ` Ville Syrjälä
@ 2020-11-17 15:48 ` Navare, Manasi
0 siblings, 0 replies; 47+ messages in thread
From: Navare, Manasi @ 2020-11-17 15:48 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Tue, Nov 17, 2020 at 05:17:15PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 16, 2020 at 04:24:15PM -0800, Navare, Manasi wrote:
> > On Sat, Nov 14, 2020 at 12:03:52AM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > When using bigjoiner userspace is only controlling the "master"
> > > plane, so use its uapi state for the "slave" plane as well.
> > >
> > > hw.crtc needs a bit of magic since we don't want to copy that from
> > > the uapi state (as it points to the wrong pipe for the "slave
> > > " plane). Instead we pass the right crtc in explicitly but only
> > > assign it when the uapi state indicates the plane to be logically
> > > enabled (ie. uapi.crtc != NULL).
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > .../gpu/drm/i915/display/intel_atomic_plane.c | 59 +++++++++++++------
> > > .../gpu/drm/i915/display/intel_atomic_plane.h | 3 +-
> > > drivers/gpu/drm/i915/display/intel_display.c | 5 +-
> > > 3 files changed, 46 insertions(+), 21 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > index f47558efb3c2..7abb0e3d6c0b 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > > @@ -247,11 +247,19 @@ static void intel_plane_clear_hw_state(struct intel_plane_state *plane_state)
> > > }
> > >
> > > void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
> > > - const struct intel_plane_state *from_plane_state)
> > > + const struct intel_plane_state *from_plane_state,
> > > + struct intel_crtc *crtc)
> > > {
> > > intel_plane_clear_hw_state(plane_state);
> > >
> > > - plane_state->hw.crtc = from_plane_state->uapi.crtc;
> > > + /*
> > > + * For the bigjoiner slave uapi.crtc will point at
> > > + * the master crtc. So we explicitly assign the right
> > > + * slave crtc to hw.crtc. uapi.crtc!=NULL simply indicates
> > > + * the plane is logically enabled on the uapi level.
> > > + */
> > > + plane_state->hw.crtc = from_plane_state->uapi.crtc ? &crtc->base : NULL;
> >
> > But here in case of bigjoiner_slave we actualy compute new_master_plane_state from master_plane which is
> > obtained from the slaves linked crtc.
> >
> > So here, even for the slave plane's hw.crtc we are using master's uapi.crtc? Is that what is happening here?
>
> Yes.
Ok gotcha
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 16/23] drm/i915: Add planes affected by bigjoiner to the state
2020-11-17 15:14 ` Ville Syrjälä
@ 2020-11-17 15:50 ` Navare, Manasi
0 siblings, 0 replies; 47+ messages in thread
From: Navare, Manasi @ 2020-11-17 15:50 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Tue, Nov 17, 2020 at 05:14:56PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 16, 2020 at 04:09:01PM -0800, Navare, Manasi wrote:
> > On Sat, Nov 14, 2020 at 12:03:51AM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > Make sure both the bigjoiner "master" and "slave" plane are
> > > in the state whenever either of them is in the state.
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++++++++++++
> > > 1 file changed, 42 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 465877097582..1118ff73c0d4 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -15069,6 +15069,44 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv)
> > > IS_IVYBRIDGE(dev_priv) || (INTEL_GEN(dev_priv) >= 11);
> > > }
> > >
> > > +static int intel_crtc_add_bigjoiner_planes(struct intel_atomic_state *state,
> > > + struct intel_crtc *crtc,
> > > + struct intel_crtc *other)
> > > +{
> > > + const struct intel_plane_state *plane_state;
> > > + struct intel_plane *plane;
> > > + u8 plane_ids = 0;
> > > + int i;
> > > +
> > > + for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
> > > + if (plane->pipe == crtc->pipe)
> > > + plane_ids |= BIT(plane->id);
> > > + }
> > > +
> > > + return intel_crtc_add_planes_to_state(state, other, plane_ids);
> >
> > We call this function intel_crtc_add_planes_to_state again in intel_atomic_check_planes again at
> > the end, so arent we adding the planes to state twice for both master and slave?
> >
> > Do we need some condition to avoid adding it again at the end of intel_atomic_check_planes ?
>
> No. That other stuff is there for the min_cdclk calculation.
ok in that case
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Intel-gfx] [PATCH 21/23] drm/i915: Fix cursor src/dst rectangle with bigjoiner
2020-11-17 15:09 ` Ville Syrjälä
@ 2020-11-17 15:52 ` Navare, Manasi
0 siblings, 0 replies; 47+ messages in thread
From: Navare, Manasi @ 2020-11-17 15:52 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Tue, Nov 17, 2020 at 05:09:06PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 16, 2020 at 04:33:50PM -0800, Navare, Manasi wrote:
> > On Sat, Nov 14, 2020 at 12:03:56AM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > We can't call drm_plane_state_src() this late for the slave plane since
> > > it would consult the wrong uapi state. We've alreayd done the correct
> > > uapi->hw copy earlier, so let's just preserve the unclipped src/dst
> > > rects using a temp copy across the intel_atomic_plane_check_clipping()
> > > call.
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display.c | 6 ++++--
> > > 1 file changed, 4 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 19e9c3795265..7607bcd9b7fe 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -11651,6 +11651,8 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
> > > {
> > > const struct drm_framebuffer *fb = plane_state->hw.fb;
> > > struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> > > + const struct drm_rect src = plane_state->uapi.src;
> > > + const struct drm_rect dst = plane_state->uapi.dst;
> > > int ret;
> > >
> > > if (fb && fb->modifier != DRM_FORMAT_MOD_LINEAR) {
> > > @@ -11666,8 +11668,8 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
> > > return ret;
> > >
> > > /* Use the unclipped src/dst rectangles, which we program to hw */
> > > - plane_state->uapi.src = drm_plane_state_src(&plane_state->uapi);
> > > - plane_state->uapi.dst = drm_plane_state_dest(&plane_state->uapi);
> > > + plane_state->uapi.src = src;
> > > + plane_state->uapi.dst = dst;
> >
> > We get this for both slave and master? No slave condition needed?
>
> Planes don't know/care about bigjoiner at this stage of the computation
> anymore. The only bigjoiner thing for planes is the
> add_affected_planes()+uapi->hw state copy.
>
Okay cool,
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 47+ messages in thread
end of thread, other threads:[~2020-11-17 15:49 UTC | newest]
Thread overview: 47+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-13 22:03 [Intel-gfx] [PATCH 00/23] drm/i915: Big bigjoiner series Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 01/23] drm/i915: Copy the plane hw state directly for Y planes Ville Syrjala
2020-11-17 9:19 ` Lisovskiy, Stanislav
2020-11-13 22:03 ` [Intel-gfx] [PATCH 02/23] drm/i915: Pass intel_atomic_state around Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 03/23] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 04/23] drm/i915: Pimp the watermark documentation a bit Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 05/23] drm/i915: Precompute can_sagv for each wm level Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 06/23] drm/i915: Store plane relative data rate in crtc_state Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 07/23] drm/i915: Remove skl_adjusted_plane_pixel_rate() Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 08/23] drm/i915: Pass intel_atomic_state instead of drm_atomic_state Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 09/23] drm/i915/dp: Add from_crtc_state to copy color blobs Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 10/23] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3 Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 11/23] drm/i915: Try to make bigjoiner work in atomic check Ville Syrjala
2020-11-17 8:28 ` Manna, Animesh
2020-11-13 22:03 ` [Intel-gfx] [PATCH 12/23] drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave Ville Syrjala
2020-11-13 22:03 ` [Intel-gfx] [PATCH 13/23] drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner Ville Syrjala
2020-11-17 9:17 ` Manna, Animesh
2020-11-13 22:03 ` [Intel-gfx] [PATCH 14/23] drm/i915: HW state readout for Bigjoiner case Ville Syrjala
2020-11-17 9:51 ` Manna, Animesh
2020-11-13 22:03 ` [Intel-gfx] [PATCH 15/23] drm/i915: Add crtcs affected by bigjoiner to the state Ville Syrjala
2020-11-16 23:37 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 16/23] drm/i915: Add planes " Ville Syrjala
2020-11-17 0:09 ` Navare, Manasi
2020-11-17 15:14 ` Ville Syrjälä
2020-11-17 15:50 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 17/23] drm/i915: Get the uapi state from the correct plane when bigjoiner is used Ville Syrjala
2020-11-17 0:24 ` Navare, Manasi
2020-11-17 15:17 ` Ville Syrjälä
2020-11-17 15:48 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 18/23] drm/i915: Add bigjoiner aware plane clipping checks Ville Syrjala
2020-11-17 14:54 ` Lisovskiy, Stanislav
2020-11-13 22:03 ` [Intel-gfx] [PATCH 19/23] drm/i915: Add debugfs dumping for bigjoiner, v3 Ville Syrjala
2020-11-17 11:07 ` Manna, Animesh
2020-11-13 22:03 ` [Intel-gfx] [PATCH 20/23] drm/i915: Disable legacy cursor fastpath for bigjoiner Ville Syrjala
2020-11-17 0:27 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 21/23] drm/i915: Fix cursor src/dst rectangle with bigjoiner Ville Syrjala
2020-11-17 0:33 ` Navare, Manasi
2020-11-17 15:09 ` Ville Syrjälä
2020-11-17 15:52 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 22/23] drm/i915: Add bigjoiner state dump Ville Syrjala
2020-11-17 0:36 ` Navare, Manasi
2020-11-13 22:03 ` [Intel-gfx] [PATCH 23/23] drm/i915: Enable bigjoiner Ville Syrjala
2020-11-17 0:36 ` Navare, Manasi
2020-11-14 0:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Big bigjoiner series Patchwork
2020-11-14 0:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-14 0:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-14 4:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.