All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chris Wilson <chris@chris-wilson.co.uk>
To: Christoph Hellwig <hch@infradead.org>,
	David Woodhouse <dwmw2@infradead.org>,
	Joerg Roedel <joro@8bytes.org>,
	Lu Baolu <baolu.lu@linux.intel.com>, Tom Murphy <murphyt7@tcd.ie>,
	Will Deacon <will@kernel.org>
Cc: Ashok Raj <ashok.raj@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
	Lu Baolu <baolu.lu@linux.intel.com>
Subject: Re: [PATCH v5 0/7] Convert the intel iommu driver to the dma-iommu api
Date: Fri, 20 Nov 2020 12:24:01 +0000	[thread overview]
Message-ID: <160587504147.19364.17448380121292539865@build.alporthouse.com> (raw)
In-Reply-To: <20201120101719.3172693-1-baolu.lu@linux.intel.com>

Quoting Lu Baolu (2020-11-20 10:17:12)
> Lu Baolu (3):
>   iommu: Add quirk for Intel graphic devices in map_sg
>   iommu/vt-d: Update domain geometry in iommu_ops.at(de)tach_dev
>   iommu/vt-d: Cleanup after converting to dma-iommu ops
> 
> Tom Murphy (4):
>   iommu: Handle freelists when using deferred flushing in iommu drivers
>   iommu: Add iommu_dma_free_cpu_cached_iovas()
>   iommu: Allow the dma-iommu api to use bounce buffers
>   iommu/vt-d: Convert intel iommu driver to the iommu ops

Something that may be of interest is that we encounter problems with
using intel-iommu across a PCI remove event. All HW generations fail
with faults like:

DMAR: DRHD: handling fault status reg 3
DMAR: [DMA Write] Request device [00:02.0] PASID ffffffff fault addr 4b822000 [fault reason 02] Present bit in context entry is clear

i.e. they all report missing present bit after re-adding the device to the
iommu group. Forcing an identity map (or disabling iommu) works fine.

I applied this series just on the off-chance it changed the symptoms; it
does not. If you have any ideas on how to chase down this fault, that
would be very useful. We have a few other DMAR faults visible on many
platforms, all "[fault reason 07] Next page table ptr is invalid" that
are again not affected by this series, that we also need to resolve.
-Chris

WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk>
To: Christoph Hellwig <hch@infradead.org>,
	David Woodhouse <dwmw2@infradead.org>,
	Joerg Roedel <joro@8bytes.org>,
	Lu Baolu <baolu.lu@linux.intel.com>, Tom Murphy <murphyt7@tcd.ie>,
	Will Deacon <will@kernel.org>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	iommu@lists.linux-foundation.org, Ashok Raj <ashok.raj@intel.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 0/7] Convert the intel iommu driver to the dma-iommu api
Date: Fri, 20 Nov 2020 12:24:01 +0000	[thread overview]
Message-ID: <160587504147.19364.17448380121292539865@build.alporthouse.com> (raw)
In-Reply-To: <20201120101719.3172693-1-baolu.lu@linux.intel.com>

Quoting Lu Baolu (2020-11-20 10:17:12)
> Lu Baolu (3):
>   iommu: Add quirk for Intel graphic devices in map_sg
>   iommu/vt-d: Update domain geometry in iommu_ops.at(de)tach_dev
>   iommu/vt-d: Cleanup after converting to dma-iommu ops
> 
> Tom Murphy (4):
>   iommu: Handle freelists when using deferred flushing in iommu drivers
>   iommu: Add iommu_dma_free_cpu_cached_iovas()
>   iommu: Allow the dma-iommu api to use bounce buffers
>   iommu/vt-d: Convert intel iommu driver to the iommu ops

Something that may be of interest is that we encounter problems with
using intel-iommu across a PCI remove event. All HW generations fail
with faults like:

DMAR: DRHD: handling fault status reg 3
DMAR: [DMA Write] Request device [00:02.0] PASID ffffffff fault addr 4b822000 [fault reason 02] Present bit in context entry is clear

i.e. they all report missing present bit after re-adding the device to the
iommu group. Forcing an identity map (or disabling iommu) works fine.

I applied this series just on the off-chance it changed the symptoms; it
does not. If you have any ideas on how to chase down this fault, that
would be very useful. We have a few other DMAR faults visible on many
platforms, all "[fault reason 07] Next page table ptr is invalid" that
are again not affected by this series, that we also need to resolve.
-Chris
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

  parent reply	other threads:[~2020-11-20 12:24 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-20 10:17 [PATCH v5 0/7] Convert the intel iommu driver to the dma-iommu api Lu Baolu
2020-11-20 10:17 ` Lu Baolu
2020-11-20 10:17 ` [PATCH v5 1/7] iommu: Handle freelists when using deferred flushing in iommu drivers Lu Baolu
2020-11-20 10:17   ` Lu Baolu
2020-11-20 10:17 ` [PATCH v5 2/7] iommu: Add iommu_dma_free_cpu_cached_iovas() Lu Baolu
2020-11-20 10:17   ` Lu Baolu
2020-11-20 10:17 ` [PATCH v5 3/7] iommu: Allow the dma-iommu api to use bounce buffers Lu Baolu
2020-11-20 10:17   ` Lu Baolu
2020-11-23 10:08   ` Christoph Hellwig
2020-11-23 10:08     ` Christoph Hellwig
2020-11-23 11:40     ` Lu Baolu
2020-11-23 11:40       ` Lu Baolu
2020-11-23 11:47       ` Will Deacon
2020-11-23 11:47         ` Will Deacon
2020-11-23 11:56         ` Lu Baolu
2020-11-23 11:56           ` Lu Baolu
2020-11-20 10:17 ` [PATCH v5 4/7] iommu: Add quirk for Intel graphic devices in map_sg Lu Baolu
2020-11-20 10:17   ` Lu Baolu
2020-11-20 10:17 ` [PATCH v5 5/7] iommu/vt-d: Update domain geometry in iommu_ops.at(de)tach_dev Lu Baolu
2020-11-20 10:17   ` Lu Baolu
2020-11-20 10:17 ` [PATCH v5 6/7] iommu/vt-d: Convert intel iommu driver to the iommu ops Lu Baolu
2020-11-20 10:17   ` Lu Baolu
2020-11-20 10:17 ` [PATCH v5 7/7] iommu/vt-d: Cleanup after converting to dma-iommu ops Lu Baolu
2020-11-20 10:17   ` Lu Baolu
2020-11-20 12:24 ` Chris Wilson [this message]
2020-11-20 12:24   ` [PATCH v5 0/7] Convert the intel iommu driver to the dma-iommu api Chris Wilson
2020-11-20 13:39   ` Lu Baolu
2020-11-20 13:39     ` Lu Baolu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=160587504147.19364.17448380121292539865@build.alporthouse.com \
    --to=chris@chris-wilson.co.uk \
    --cc=ashok.raj@intel.com \
    --cc=baolu.lu@linux.intel.com \
    --cc=dwmw2@infradead.org \
    --cc=hch@infradead.org \
    --cc=iommu@lists.linux-foundation.org \
    --cc=joro@8bytes.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=murphyt7@tcd.ie \
    --cc=tvrtko.ursulin@linux.intel.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.