[PATCH v2 0/4] hw/arm: sabrelite: Improve emulation fidelity to allow booting upstream U-Boot

[PATCH v2 0/4] hw/arm: sabrelite: Improve emulation fidelity to allow booting upstream U-Boot

[Bin Meng]

From: Bin Meng <bin.meng@windriver.com>

At present the upstream U-Boot (as of today, v2021.01-rc3) does not
boot on QEMU sabrelite machine.

This fixes several issues to improve emulation fidelity of the i.MX6
sabrelite board. With this series, upstream U-Boot can boot to U-Boot
command shell. While we are here, add a target guide for this board
to help people run Linux kernel and U-Boot on QEMU.

Changes in v2:
- new patch: add sabrelite target guide

Bin Meng (4):
  hw/misc: imx6_ccm: Update PMU_MISC0 reset value
  hw/msic: imx6_ccm: Correct register value for silicon type
  hw/arm: sabrelite: Connect the Ethernet PHY at address 6
  docs/system: arm: Add sabrelite board description

 docs/system/arm/sabrelite.rst | 119 ++++++++++++++++++++++++++++++++++++++++++
 docs/system/target-arm.rst    |   1 +
 hw/arm/sabrelite.c            |   4 ++
 hw/misc/imx6_ccm.c            |   4 +-
 4 files changed, 126 insertions(+), 2 deletions(-)
 create mode 100644 docs/system/arm/sabrelite.rst

-- 
2.7.4

[PATCH v2 1/4] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Bin Meng]

From: Bin Meng <bin.meng@windriver.com>

U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
bandgap has stabilized.

With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
sabrelite board (mx6qsabrelite_defconfig), with a slight change made
by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
shell on QEMU with the following command:

$ qemu-system-arm -M sabrelite -smp 4 -m 1G -kernel u-boot \
    -display none -serial null -serial stdio

Boot log below:

  U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)

  CPU:   Freescale i.MX?? rev1.0 at 792 MHz
  Reset cause: POR
  Model: Freescale i.MX6 Quad SABRE Lite Board
  Board: SABRE Lite
  I2C:   ready
  DRAM:  1 GiB
  force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
  force_idle_bus: failed to clear bus, sda=0 scl=0
  force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
  force_idle_bus: failed to clear bus, sda=0 scl=0
  force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
  force_idle_bus: failed to clear bus, sda=0 scl=0
  MMC:   FSL_SDHC: 0, FSL_SDHC: 1
  Loading Environment from MMC... *** Warning - No block device, using default environment

  In:    serial
  Out:   serial
  Err:   serial
  Net:   Board Net Initialization Failed
  No ethernet found.
  starting USB...
  Bus usb@2184000: usb dr_mode not found
  USB EHCI 1.00
  Bus usb@2184200: USB EHCI 1.00
  scanning bus usb@2184000 for devices... 1 USB Device(s) found
  scanning bus usb@2184200 for devices... 1 USB Device(s) found
         scanning usb for storage devices... 0 Storage Device(s) found
         scanning usb for ethernet devices... 0 Ethernet Device(s) found
  Hit any key to stop autoboot:  0
  =>

Signed-off-by: Bin Meng <bin.meng@windriver.com>
---

(no changes since v1)

 hw/misc/imx6_ccm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
index cb74042..7e031b6 100644
--- a/hw/misc/imx6_ccm.c
+++ b/hw/misc/imx6_ccm.c
@@ -450,7 +450,7 @@ static void imx6_ccm_reset(DeviceState *dev)
     s->analog[PMU_REG_3P0] = 0x00000F74;
     s->analog[PMU_REG_2P5] = 0x00005071;
     s->analog[PMU_REG_CORE] = 0x00402010;
-    s->analog[PMU_MISC0] = 0x04000000;
+    s->analog[PMU_MISC0] = 0x04000080;
     s->analog[PMU_MISC1] = 0x00000000;
     s->analog[PMU_MISC2] = 0x00272727;
 
-- 
2.7.4

[PATCH v2 2/4] hw/msic: imx6_ccm: Correct register value for silicon type

[Bin Meng]

From: Bin Meng <bin.meng@windriver.com>

Currently when U-Boot boots, it prints "??" for i.MX processor:

  CPU:   Freescale i.MX?? rev1.0 at 792 MHz

The register that was used to determine the silicon type is
undocumented in the latest IMX6DQRM (Rev. 6, 05/2020), but we
can refer to get_cpu_rev() in arch/arm/mach-imx/mx6/soc.c in
the U-Boot source codes that USB_ANALOG_DIGPROG is used.

Update its reset value to indicate i.MX6Q.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
---

(no changes since v1)

 hw/misc/imx6_ccm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
index 7e031b6..4c830fd 100644
--- a/hw/misc/imx6_ccm.c
+++ b/hw/misc/imx6_ccm.c
@@ -462,7 +462,7 @@ static void imx6_ccm_reset(DeviceState *dev)
     s->analog[USB_ANALOG_USB2_VBUS_DETECT] = 0x00000004;
     s->analog[USB_ANALOG_USB2_CHRG_DETECT] = 0x00000000;
     s->analog[USB_ANALOG_USB2_MISC] = 0x00000002;
-    s->analog[USB_ANALOG_DIGPROG] = 0x00000000;
+    s->analog[USB_ANALOG_DIGPROG] = 0x00630000;
 
     /* all PLLs need to be locked */
     s->analog[CCM_ANALOG_PLL_ARM]   |= CCM_ANALOG_PLL_LOCK;
-- 
2.7.4

[PATCH v2 3/4] hw/arm: sabrelite: Connect the Ethernet PHY at address 6

[Bin Meng]

From: Bin Meng <bin.meng@windriver.com>

At present, when booting U-Boot on QEMU sabrelite, we see:

  Net:   Board Net Initialization Failed
  No ethernet found.

U-Boot scans PHY at address 4/5/6/7 (see board_eth_init() in the
U-Boot source: board/boundary/nitrogen6x/nitrogen6x.c). On the real
board, the Ethernet PHY is at address 6. Adjust this by updating the
"fec-phy-num" property of the fsl_imx6 SoC object.

With this change, U-Boot sees the PHY but complains MAC address:

  Net:   using phy at 6
  FEC [PRIME]
  Error: FEC address not set.

This is due to U-Boot tries to read the MAC address from the fuse,
which QEMU does not have any valid content filled in. However this
does not prevent the Ethernet from working in QEMU. We just need to
set up the MAC address later in the U-Boot command shell, by:

  => setenv ethaddr 00:11:22:33:44:55

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

---

(no changes since v1)

 hw/arm/sabrelite.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index 91d8c43..a3dbf85 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -51,6 +51,10 @@ static void sabrelite_init(MachineState *machine)
 
     s = FSL_IMX6(object_new(TYPE_FSL_IMX6));
     object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
+
+    /* Ethernet PHY address is 6 */
+    object_property_set_int(OBJECT(s), "fec-phy-num", 6, &error_fatal);
+
     qdev_realize(DEVICE(s), NULL, &error_fatal);
 
     memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR,
-- 
2.7.4

[PATCH v2 4/4] docs/system: arm: Add sabrelite board description

[Bin Meng]

From: Bin Meng <bin.meng@windriver.com>

This adds the target guide for SABRE Lite board, and documents how
to boot a Linux kernel and U-Boot bootloader.

Signed-off-by: Bin Meng <bin.meng@windriver.com>

---

Changes in v2:
- new patch: add sabrelite target guide

 docs/system/arm/sabrelite.rst | 119 ++++++++++++++++++++++++++++++++++++++++++
 docs/system/target-arm.rst    |   1 +
 2 files changed, 120 insertions(+)
 create mode 100644 docs/system/arm/sabrelite.rst

diff --git a/docs/system/arm/sabrelite.rst b/docs/system/arm/sabrelite.rst
new file mode 100644
index 0000000..4c5d101
--- /dev/null
+++ b/docs/system/arm/sabrelite.rst
@@ -0,0 +1,119 @@
+Boundary Devices SABRE Lite (``sabrelite``)
+===========================================
+
+Boundary Devices SABRE Lite i.MX6 Development Board is a low-cost development
+platform featuring the powerful Freescale / NXP Semiconductor's i.MX 6 Quad
+Applications Processor.
+
+Supported devices
+-----------------
+
+The SABRE Lite machine supports the following devices:
+
+ * Up to 4 Cortex A9 cores
+ * Generic Interrupt Controller
+ * 1 Clock Controller Module
+ * 1 System Reset Controller
+ * 5 UARTs
+ * 2 EPIC timers
+ * 1 GPT timer
+ * 2 Watchdog timers
+ * 1 FEC ethernet controller
+ * 3 I2C controllers
+ * 7 GPIO controllers
+ * 4 SDHC storage controllers
+ * 4 USB 2.0 host controllers
+ * 5 ECSPI controllers
+ * 1 SST 25VF016B flash
+
+Please note above list is a complete superset the QEMU SABRE Lite machine can
+support. For a normal use case, a device tree blob that reprents a real world
+SABRE Lite board, only exposes a subset of devices to the guest software.
+
+Boot options
+------------
+
+The SABRE Lite machine can start using the standard -kernel functionality
+for loading a Linux kernel, U-Boot bootloader or ELF executable.
+
+Running Linux kernel
+--------------------
+
+Linux mainline v5.10 release is tested at the time of writing. To build a Linux
+mainline kernel that can be booted by the SABRE Lite machine, simply configure
+the kernel using the imx_v6_v7_defconfig configuration:
+
+.. code-block:: bash
+
+  $ export ARCH=arm
+  $ export CROSS_COMPILE=arm-linux-gnueabihf-
+  $ make imx_v6_v7_defconfig
+  $ make
+
+To boot the newly built Linux kernel in QEMU with the SABRE Lite machine, use:
+
+.. code-block:: bash
+
+  $ qemu-system-arm -M sabrelite -smp 4 -m 1G \
+      -display none -serial null -serial stdio \
+      -kernel arch/arm/boot/zImage \
+      -dtb arch/arm/boot/dts/imx6q-sabrelite.dtb \
+      -initrd /path/to/rootfs.ext4 \
+      -append "root=/dev/ram"
+
+Running U-Boot
+--------------
+
+U-Boot mainline v2020.10 release is tested at the time of writing. To build a
+U-Boot mainline bootloader that can be booted by the SABRE Lite machine, use
+the mx6qsabrelite_defconfig with similar commands as described above for Linux:
+
+.. code-block:: bash
+
+  $ export CROSS_COMPILE=arm-linux-gnueabihf-
+  $ make mx6qsabrelite_defconfig
+
+Note we need to adjust settings by:
+
+.. code-block:: bash
+
+  $ make menuconfig
+
+then manually select the following configuration in U-Boot:
+
+  Device Tree Control > Provider of DTB for DT Control > Embedded DTB
+
+To start U-Boot using the SABRE Lite machine, provide the u-boot binary to
+the -kernel argument, along with an SD card image with rootfs:
+
+.. code-block:: bash
+
+  $ qemu-system-arm -M sabrelite -smp 4 -m 1G \
+      -display none -serial null -serial stdio \
+      -kernel u-boot
+
+The following example shows booting Linux kernel from dhcp, and uses the
+rootfs on an SD card. This requies some additional command line parameters
+for QEMU:
+
+.. code-block:: none
+
+  -nic user,tftp=/path/to/kernel/zImage \
+  -drive file=sdcard.img,id=rootfs -device sd-card,drive=rootfs
+
+The directory for the built-in TFTP server should also contain the device tree
+blob of the SABRE Lite board. The sample SD card image was populated with the
+root file system with one single partition. You may adjust the kernel "root="
+boot parameter accordingly.
+
+After U-Boot boots, type the following commands in the U-Boot command shell to
+boot the Linux kernel:
+
+.. code-block:: none
+
+  => setenv ethaddr 00:11:22:33:44:55
+  => setenv bootfile zImage
+  => dhcp
+  => tftpboot 14000000 imx6q-sabrelite.dtb
+  => setenv bootargs root=/dev/mmcblk3p1
+  => bootz 12000000 - 14000000
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index bde4b8e..edd013c 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -83,6 +83,7 @@ undocumented; you can get a complete list by running
    arm/versatile
    arm/vexpress
    arm/aspeed
+   arm/sabrelite
    arm/digic
    arm/musicpal
    arm/gumstix
-- 
2.7.4

Re: [PATCH v2 1/4] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Bin Meng]

On Wed, Dec 23, 2020 at 2:26 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
> in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
> bandgap has stabilized.
>
> With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
> sabrelite board (mx6qsabrelite_defconfig), with a slight change made
> by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
> shell on QEMU with the following command:
>
> $ qemu-system-arm -M sabrelite -smp 4 -m 1G -kernel u-boot \
>     -display none -serial null -serial stdio
>
> Boot log below:
>
>   U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)
>
>   CPU:   Freescale i.MX?? rev1.0 at 792 MHz
>   Reset cause: POR
>   Model: Freescale i.MX6 Quad SABRE Lite Board
>   Board: SABRE Lite
>   I2C:   ready
>   DRAM:  1 GiB
>   force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   MMC:   FSL_SDHC: 0, FSL_SDHC: 1
>   Loading Environment from MMC... *** Warning - No block device, using default environment
>
>   In:    serial
>   Out:   serial
>   Err:   serial
>   Net:   Board Net Initialization Failed
>   No ethernet found.
>   starting USB...
>   Bus usb@2184000: usb dr_mode not found
>   USB EHCI 1.00
>   Bus usb@2184200: USB EHCI 1.00
>   scanning bus usb@2184000 for devices... 1 USB Device(s) found
>   scanning bus usb@2184200 for devices... 1 USB Device(s) found
>          scanning usb for storage devices... 0 Storage Device(s) found
>          scanning usb for ethernet devices... 0 Ethernet Device(s) found
>   Hit any key to stop autoboot:  0
>   =>
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
> (no changes since v1)
>
>  hw/misc/imx6_ccm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Ping?

Re: [PATCH v2 4/4] docs/system: arm: Add sabrelite board description

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> From: Bin Meng <bin.meng@windriver.com>
>
> This adds the target guide for SABRE Lite board, and documents how
> to boot a Linux kernel and U-Boot bootloader.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>

Awesome documentation 👏

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

>
> ---
>
> Changes in v2:
> - new patch: add sabrelite target guide
>
>  docs/system/arm/sabrelite.rst | 119 ++++++++++++++++++++++++++++++++++++++++++
>  docs/system/target-arm.rst    |   1 +
>  2 files changed, 120 insertions(+)
>  create mode 100644 docs/system/arm/sabrelite.rst
>
> diff --git a/docs/system/arm/sabrelite.rst b/docs/system/arm/sabrelite.rst
> new file mode 100644
> index 0000000..4c5d101
> --- /dev/null
> +++ b/docs/system/arm/sabrelite.rst
> @@ -0,0 +1,119 @@
> +Boundary Devices SABRE Lite (``sabrelite``)
> +===========================================
> +
> +Boundary Devices SABRE Lite i.MX6 Development Board is a low-cost development
> +platform featuring the powerful Freescale / NXP Semiconductor's i.MX 6 Quad
> +Applications Processor.
> +
> +Supported devices
> +-----------------
> +
> +The SABRE Lite machine supports the following devices:
> +
> + * Up to 4 Cortex A9 cores
> + * Generic Interrupt Controller
> + * 1 Clock Controller Module
> + * 1 System Reset Controller
> + * 5 UARTs
> + * 2 EPIC timers
> + * 1 GPT timer
> + * 2 Watchdog timers
> + * 1 FEC ethernet controller
> + * 3 I2C controllers
> + * 7 GPIO controllers
> + * 4 SDHC storage controllers
> + * 4 USB 2.0 host controllers
> + * 5 ECSPI controllers
> + * 1 SST 25VF016B flash
> +
> +Please note above list is a complete superset the QEMU SABRE Lite machine can
> +support. For a normal use case, a device tree blob that reprents a real world
> +SABRE Lite board, only exposes a subset of devices to the guest software.
> +
> +Boot options
> +------------
> +
> +The SABRE Lite machine can start using the standard -kernel functionality
> +for loading a Linux kernel, U-Boot bootloader or ELF executable.
> +
> +Running Linux kernel
> +--------------------
> +
> +Linux mainline v5.10 release is tested at the time of writing. To build a Linux
> +mainline kernel that can be booted by the SABRE Lite machine, simply configure
> +the kernel using the imx_v6_v7_defconfig configuration:
> +
> +.. code-block:: bash
> +
> +  $ export ARCH=arm
> +  $ export CROSS_COMPILE=arm-linux-gnueabihf-
> +  $ make imx_v6_v7_defconfig
> +  $ make
> +
> +To boot the newly built Linux kernel in QEMU with the SABRE Lite machine, use:
> +
> +.. code-block:: bash
> +
> +  $ qemu-system-arm -M sabrelite -smp 4 -m 1G \
> +      -display none -serial null -serial stdio \
> +      -kernel arch/arm/boot/zImage \
> +      -dtb arch/arm/boot/dts/imx6q-sabrelite.dtb \
> +      -initrd /path/to/rootfs.ext4 \
> +      -append "root=/dev/ram"
> +
> +Running U-Boot
> +--------------
> +
> +U-Boot mainline v2020.10 release is tested at the time of writing. To build a
> +U-Boot mainline bootloader that can be booted by the SABRE Lite machine, use
> +the mx6qsabrelite_defconfig with similar commands as described above for Linux:
> +
> +.. code-block:: bash
> +
> +  $ export CROSS_COMPILE=arm-linux-gnueabihf-
> +  $ make mx6qsabrelite_defconfig
> +
> +Note we need to adjust settings by:
> +
> +.. code-block:: bash
> +
> +  $ make menuconfig
> +
> +then manually select the following configuration in U-Boot:
> +
> +  Device Tree Control > Provider of DTB for DT Control > Embedded DTB
> +
> +To start U-Boot using the SABRE Lite machine, provide the u-boot binary to
> +the -kernel argument, along with an SD card image with rootfs:
> +
> +.. code-block:: bash
> +
> +  $ qemu-system-arm -M sabrelite -smp 4 -m 1G \
> +      -display none -serial null -serial stdio \
> +      -kernel u-boot
> +
> +The following example shows booting Linux kernel from dhcp, and uses the
> +rootfs on an SD card. This requies some additional command line parameters
> +for QEMU:
> +
> +.. code-block:: none
> +
> +  -nic user,tftp=/path/to/kernel/zImage \
> +  -drive file=sdcard.img,id=rootfs -device sd-card,drive=rootfs
> +
> +The directory for the built-in TFTP server should also contain the device tree
> +blob of the SABRE Lite board. The sample SD card image was populated with the
> +root file system with one single partition. You may adjust the kernel "root="
> +boot parameter accordingly.
> +
> +After U-Boot boots, type the following commands in the U-Boot command shell to
> +boot the Linux kernel:
> +
> +.. code-block:: none
> +
> +  => setenv ethaddr 00:11:22:33:44:55
> +  => setenv bootfile zImage
> +  => dhcp
> +  => tftpboot 14000000 imx6q-sabrelite.dtb
> +  => setenv bootargs root=/dev/mmcblk3p1
> +  => bootz 12000000 - 14000000
> diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
> index bde4b8e..edd013c 100644
> --- a/docs/system/target-arm.rst
> +++ b/docs/system/target-arm.rst
> @@ -83,6 +83,7 @@ undocumented; you can get a complete list by running
>     arm/versatile
>     arm/vexpress
>     arm/aspeed
> +   arm/sabrelite
>     arm/digic
>     arm/musicpal
>     arm/gumstix


-- 
Alex Bennée

Re: [PATCH v2 2/4] hw/msic: imx6_ccm: Correct register value for silicon type

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> From: Bin Meng <bin.meng@windriver.com>
>
> Currently when U-Boot boots, it prints "??" for i.MX processor:
>
>   CPU:   Freescale i.MX?? rev1.0 at 792 MHz
>
> The register that was used to determine the silicon type is
> undocumented in the latest IMX6DQRM (Rev. 6, 05/2020), but we
> can refer to get_cpu_rev() in arch/arm/mach-imx/mx6/soc.c in
> the U-Boot source codes that USB_ANALOG_DIGPROG is used.
>
> Update its reset value to indicate i.MX6Q.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

-- 
Alex Bennée

Re: [PATCH v2 1/4] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> From: Bin Meng <bin.meng@windriver.com>
>
> U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
> in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
> bandgap has stabilized.
>
> With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
> sabrelite board (mx6qsabrelite_defconfig), with a slight change made
> by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
> shell on QEMU with the following command:
>
> $ qemu-system-arm -M sabrelite -smp 4 -m 1G -kernel u-boot \
>     -display none -serial null -serial stdio
>
> Boot log below:
>
>   U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)
>
>   CPU:   Freescale i.MX?? rev1.0 at 792 MHz
>   Reset cause: POR
>   Model: Freescale i.MX6 Quad SABRE Lite Board
>   Board: SABRE Lite
>   I2C:   ready
>   DRAM:  1 GiB
>   force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
>   force_idle_bus: failed to clear bus, sda=0 scl=0
>   MMC:   FSL_SDHC: 0, FSL_SDHC: 1
>   Loading Environment from MMC... *** Warning - No block device, using default environment
>
>   In:    serial
>   Out:   serial
>   Err:   serial
>   Net:   Board Net Initialization Failed
>   No ethernet found.
>   starting USB...
>   Bus usb@2184000: usb dr_mode not found
>   USB EHCI 1.00
>   Bus usb@2184200: USB EHCI 1.00
>   scanning bus usb@2184000 for devices... 1 USB Device(s) found
>   scanning bus usb@2184200 for devices... 1 USB Device(s) found
>          scanning usb for storage devices... 0 Storage Device(s) found
>          scanning usb for ethernet devices... 0 Ethernet Device(s) found
>   Hit any key to stop autoboot:  0
>   =>
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

-- 
Alex Bennée

Re: [PATCH v2 1/4] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Alex Bennée]

Bin Meng <bmeng.cn@gmail.com> writes:

> On Wed, Dec 23, 2020 at 2:26 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>>
>> From: Bin Meng <bin.meng@windriver.com>
>>
<snip>
>>
>> (no changes since v1)
>>
>>  hw/misc/imx6_ccm.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>
> Ping?

Looks good to me - Peter should be able to pull it into his tree soon.

-- 
Alex Bennée

Re: [PATCH v2 1/4] hw/misc: imx6_ccm: Update PMU_MISC0 reset value

[Bin Meng]

Hi Alex,

On Tue, Jan 5, 2021 at 5:25 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Bin Meng <bmeng.cn@gmail.com> writes:
>
> > On Wed, Dec 23, 2020 at 2:26 PM Bin Meng <bmeng.cn@gmail.com> wrote:
> >>
> >> From: Bin Meng <bin.meng@windriver.com>
> >>
> <snip>
> >>
> >> (no changes since v1)
> >>
> >>  hw/misc/imx6_ccm.c | 2 +-
> >>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >
> > Ping?
>
> Looks good to me - Peter should be able to pull it into his tree soon.

Thank you for the review.

Regards,
Bin