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From: Bin Meng <bmeng.cn@gmail.com>
To: Jim Wilson <jimw@sifive.com>,
	Alistair Francis <alistair.francis@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 0/4] target/riscv: Generate the GDB XML file for CSR registers dynamically
Date: Tue, 12 Jan 2021 12:52:00 +0800	[thread overview]
Message-ID: <1610427124-49887-1-git-send-email-bmeng.cn@gmail.com> (raw)

From: Bin Meng <bin.meng@windriver.com>


At present QEMU RISC-V uses a hardcoded XML to report the feature
"org.gnu.gdb.riscv.csr" [1]. There are two major issues with the
approach being used currently:

- The XML does not specify the "regnum" field of a CSR entry, hence
  consecutive numbers are used by the remote GDB client to access
  CSRs. In QEMU we have to maintain a map table to convert the GDB
  number to the hardware number which is error prone.
- The XML contains some CSRs that QEMU does not implement at all,
  which causes an "E14" response sent to remote GDB client.

Change to generate the CSR register list dynamically, based on the
availability presented in the CSR function table. This new approach
will reflect a correct list of CSRs that QEMU actually implements.

[1] https://sourceware.org/gdb/current/onlinedocs/gdb/RISC_002dV-Features.html#RISC_002dV-Features


Bin Meng (4):
  target/riscv: Make csr_ops[CSR_TABLE_SIZE] external
  target/riscv: Add CSR name in the CSR function table
  target/riscv: Generate the GDB XML file for CSR registers dynamically
  target/riscv: Remove built-in GDB XML files for CSRs

 default-configs/targets/riscv32-linux-user.mak |   2 +-
 default-configs/targets/riscv32-softmmu.mak    |   2 +-
 default-configs/targets/riscv64-linux-user.mak |   2 +-
 default-configs/targets/riscv64-softmmu.mak    |   2 +-
 target/riscv/cpu.h                             |  11 +
 target/riscv/cpu.c                             |  12 +
 target/riscv/csr.c                             | 342 ++++++++++++++++++-------
 target/riscv/gdbstub.c                         | 308 ++++------------------
 gdb-xml/riscv-32bit-csr.xml                    | 250 ------------------
 gdb-xml/riscv-64bit-csr.xml                    | 250 ------------------
 10 files changed, 320 insertions(+), 861 deletions(-)
 delete mode 100644 gdb-xml/riscv-32bit-csr.xml
 delete mode 100644 gdb-xml/riscv-64bit-csr.xml

-- 
2.7.4



WARNING: multiple messages have this Message-ID (diff)
From: Bin Meng <bmeng.cn@gmail.com>
To: Jim Wilson <jimw@sifive.com>,
	Alistair Francis <alistair.francis@wdc.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	Bin Meng <bin.meng@windriver.com>
Subject: [PATCH 0/4] target/riscv: Generate the GDB XML file for CSR registers dynamically
Date: Tue, 12 Jan 2021 12:52:00 +0800	[thread overview]
Message-ID: <1610427124-49887-1-git-send-email-bmeng.cn@gmail.com> (raw)

From: Bin Meng <bin.meng@windriver.com>


At present QEMU RISC-V uses a hardcoded XML to report the feature
"org.gnu.gdb.riscv.csr" [1]. There are two major issues with the
approach being used currently:

- The XML does not specify the "regnum" field of a CSR entry, hence
  consecutive numbers are used by the remote GDB client to access
  CSRs. In QEMU we have to maintain a map table to convert the GDB
  number to the hardware number which is error prone.
- The XML contains some CSRs that QEMU does not implement at all,
  which causes an "E14" response sent to remote GDB client.

Change to generate the CSR register list dynamically, based on the
availability presented in the CSR function table. This new approach
will reflect a correct list of CSRs that QEMU actually implements.

[1] https://sourceware.org/gdb/current/onlinedocs/gdb/RISC_002dV-Features.html#RISC_002dV-Features


Bin Meng (4):
  target/riscv: Make csr_ops[CSR_TABLE_SIZE] external
  target/riscv: Add CSR name in the CSR function table
  target/riscv: Generate the GDB XML file for CSR registers dynamically
  target/riscv: Remove built-in GDB XML files for CSRs

 default-configs/targets/riscv32-linux-user.mak |   2 +-
 default-configs/targets/riscv32-softmmu.mak    |   2 +-
 default-configs/targets/riscv64-linux-user.mak |   2 +-
 default-configs/targets/riscv64-softmmu.mak    |   2 +-
 target/riscv/cpu.h                             |  11 +
 target/riscv/cpu.c                             |  12 +
 target/riscv/csr.c                             | 342 ++++++++++++++++++-------
 target/riscv/gdbstub.c                         | 308 ++++------------------
 gdb-xml/riscv-32bit-csr.xml                    | 250 ------------------
 gdb-xml/riscv-64bit-csr.xml                    | 250 ------------------
 10 files changed, 320 insertions(+), 861 deletions(-)
 delete mode 100644 gdb-xml/riscv-32bit-csr.xml
 delete mode 100644 gdb-xml/riscv-64bit-csr.xml

-- 
2.7.4



             reply	other threads:[~2021-01-12  5:04 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-12  4:52 Bin Meng [this message]
2021-01-12  4:52 ` [PATCH 0/4] target/riscv: Generate the GDB XML file for CSR registers dynamically Bin Meng
2021-01-12  4:52 ` [PATCH 1/4] target/riscv: Make csr_ops[CSR_TABLE_SIZE] external Bin Meng
2021-01-12  4:52   ` Bin Meng
2021-01-15 21:49   ` Alistair Francis
2021-01-15 21:49     ` Alistair Francis
2021-01-18 17:55   ` Richard Henderson
2021-01-19  2:41     ` Bin Meng
2021-01-19  2:41       ` Bin Meng
2021-01-12  4:52 ` [PATCH 2/4] target/riscv: Add CSR name in the CSR function table Bin Meng
2021-01-12  4:52   ` Bin Meng
2021-01-15 13:14   ` Alexander Richardson
2021-01-15 13:14     ` Alexander Richardson
2021-01-15 13:43     ` Bin Meng
2021-01-15 13:43       ` Bin Meng
2021-01-15 21:53     ` Alistair Francis
2021-01-15 21:53       ` Alistair Francis
2021-01-15 21:51   ` Alistair Francis
2021-01-15 21:51     ` Alistair Francis
2021-01-12  4:52 ` [PATCH 3/4] target/riscv: Generate the GDB XML file for CSR registers dynamically Bin Meng
2021-01-12  4:52   ` Bin Meng
2021-01-15 21:59   ` Alistair Francis
2021-01-15 21:59     ` Alistair Francis
2021-01-15 22:07     ` Alistair Francis
2021-01-15 22:07       ` Alistair Francis
2021-01-16  1:36       ` Bin Meng
2021-01-16  1:36         ` Bin Meng
2021-01-12  4:52 ` [PATCH 4/4] target/riscv: Remove built-in GDB XML files for CSRs Bin Meng
2021-01-12  4:52   ` Bin Meng
2021-01-15 22:00   ` Alistair Francis
2021-01-15 22:00     ` Alistair Francis

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