* [Bug 1918026] [NEW] RISCV64 32-bit AMOs incorrectly simulated
@ 2021-03-06 21:24 Ryan Macnak
2021-03-07 2:11 ` [Bug 1918026] " Richard Henderson
2021-03-07 5:06 ` Richard Henderson
0 siblings, 2 replies; 3+ messages in thread
From: Ryan Macnak @ 2021-03-06 21:24 UTC (permalink / raw)
To: qemu-devel
Public bug reported:
Version: qemu-riscv64 version 4.2.1 (Debian 1:4.2-3ubuntu6.14)
test:
amomaxu.w a0, a1, (a0)
ret
int32_t* value = -7;
EXPECT_EQ(-7, test(&value, -11));
EXPECT_EQ(-7, value); // FAIL, saw -11
EXPECT_EQ(-7, test(&value, -7));
EXPECT_EQ(-7, value); // FAIL, raw -11
EXPECT_EQ(-7, test(&value, -4));
EXPECT_EQ(-4, value);
test:
amomax.w a0, a1, (a0)
ret
int32_t* value = -7;
EXPECT_EQ(-7, test(&value, -11));
EXPECT_EQ(-7, value);
EXPECT_EQ(-7, test(&value, -7));
EXPECT_EQ(-7, value);
EXPECT_EQ(-7, test(&value, -4));
EXPECT_EQ(-4, value); // FAIL, saw -7
I suspect that trans_amo<op>_w should be using
tcg_gen_atomic_fetch_<op>_i32 instead of tcg_gen_atomic_fetch_<op>_tl.
** Affects: qemu
Importance: Undecided
Status: New
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https://bugs.launchpad.net/bugs/1918026
Title:
RISCV64 32-bit AMOs incorrectly simulated
Status in QEMU:
New
Bug description:
Version: qemu-riscv64 version 4.2.1 (Debian 1:4.2-3ubuntu6.14)
test:
amomaxu.w a0, a1, (a0)
ret
int32_t* value = -7;
EXPECT_EQ(-7, test(&value, -11));
EXPECT_EQ(-7, value); // FAIL, saw -11
EXPECT_EQ(-7, test(&value, -7));
EXPECT_EQ(-7, value); // FAIL, raw -11
EXPECT_EQ(-7, test(&value, -4));
EXPECT_EQ(-4, value);
test:
amomax.w a0, a1, (a0)
ret
int32_t* value = -7;
EXPECT_EQ(-7, test(&value, -11));
EXPECT_EQ(-7, value);
EXPECT_EQ(-7, test(&value, -7));
EXPECT_EQ(-7, value);
EXPECT_EQ(-7, test(&value, -4));
EXPECT_EQ(-4, value); // FAIL, saw -7
I suspect that trans_amo<op>_w should be using
tcg_gen_atomic_fetch_<op>_i32 instead of tcg_gen_atomic_fetch_<op>_tl.
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1918026/+subscriptions
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug 1918026] Re: RISCV64 32-bit AMOs incorrectly simulated
2021-03-06 21:24 [Bug 1918026] [NEW] RISCV64 32-bit AMOs incorrectly simulated Ryan Macnak
@ 2021-03-07 2:11 ` Richard Henderson
2021-03-07 5:06 ` Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2021-03-07 2:11 UTC (permalink / raw)
To: qemu-devel
Not as simple as _tl vs _i32. That suffix should be taking
care of the sign-extension to _tl that happens after the
operation. The size of the operation should be in the MO_TESL,
which specifies target-endian signed "long" (32-bit).
Will investigate further.
--
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1918026
Title:
RISCV64 32-bit AMOs incorrectly simulated
Status in QEMU:
New
Bug description:
Version: qemu-riscv64 version 4.2.1 (Debian 1:4.2-3ubuntu6.14)
test:
amomaxu.w a0, a1, (a0)
ret
int32_t* value = -7;
EXPECT_EQ(-7, test(&value, -11));
EXPECT_EQ(-7, value); // FAIL, saw -11
EXPECT_EQ(-7, test(&value, -7));
EXPECT_EQ(-7, value); // FAIL, raw -11
EXPECT_EQ(-7, test(&value, -4));
EXPECT_EQ(-4, value);
test:
amomax.w a0, a1, (a0)
ret
int32_t* value = -7;
EXPECT_EQ(-7, test(&value, -11));
EXPECT_EQ(-7, value);
EXPECT_EQ(-7, test(&value, -7));
EXPECT_EQ(-7, value);
EXPECT_EQ(-7, test(&value, -4));
EXPECT_EQ(-4, value); // FAIL, saw -7
I suspect that trans_amo<op>_w should be using
tcg_gen_atomic_fetch_<op>_i32 instead of tcg_gen_atomic_fetch_<op>_tl.
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1918026/+subscriptions
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug 1918026] Re: RISCV64 32-bit AMOs incorrectly simulated
2021-03-06 21:24 [Bug 1918026] [NEW] RISCV64 32-bit AMOs incorrectly simulated Ryan Macnak
2021-03-07 2:11 ` [Bug 1918026] " Richard Henderson
@ 2021-03-07 5:06 ` Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2021-03-07 5:06 UTC (permalink / raw)
To: qemu-devel
Flushing out the report to something that compiles,
the test case works for me using qemu 5.2.
** Attachment added: "z.c"
https://bugs.launchpad.net/qemu/+bug/1918026/+attachment/5474131/+files/z.c
** Changed in: qemu
Status: New => Fix Released
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1918026
Title:
RISCV64 32-bit AMOs incorrectly simulated
Status in QEMU:
Fix Released
Bug description:
Version: qemu-riscv64 version 4.2.1 (Debian 1:4.2-3ubuntu6.14)
test:
amomaxu.w a0, a1, (a0)
ret
int32_t* value = -7;
EXPECT_EQ(-7, test(&value, -11));
EXPECT_EQ(-7, value); // FAIL, saw -11
EXPECT_EQ(-7, test(&value, -7));
EXPECT_EQ(-7, value); // FAIL, raw -11
EXPECT_EQ(-7, test(&value, -4));
EXPECT_EQ(-4, value);
test:
amomax.w a0, a1, (a0)
ret
int32_t* value = -7;
EXPECT_EQ(-7, test(&value, -11));
EXPECT_EQ(-7, value);
EXPECT_EQ(-7, test(&value, -7));
EXPECT_EQ(-7, value);
EXPECT_EQ(-7, test(&value, -4));
EXPECT_EQ(-4, value); // FAIL, saw -7
I suspect that trans_amo<op>_w should be using
tcg_gen_atomic_fetch_<op>_i32 instead of tcg_gen_atomic_fetch_<op>_tl.
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1918026/+subscriptions
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-03-07 5:17 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-03-06 21:24 [Bug 1918026] [NEW] RISCV64 32-bit AMOs incorrectly simulated Ryan Macnak
2021-03-07 2:11 ` [Bug 1918026] " Richard Henderson
2021-03-07 5:06 ` Richard Henderson
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