[Intel-gfx] [PATCH v3 0/8] drm/i915: refactor KBL/TGL/ADLS stepping scheme

[Intel-gfx] [PATCH v3 0/8] drm/i915: refactor KBL/TGL/ADLS stepping scheme

[Jani Nikula]

v3 of [1], mostly with just stepping->step renames

BR,
Jani.


[1] https://patchwork.freedesktop.org/series/87323/


Jani Nikula (8):
  drm/i915: remove unused ADLS_REVID_* macros
  drm/i915: split out stepping info to a new file
  drm/i915: add new helpers for accessing stepping info
  drm/i915: switch KBL to the new stepping scheme
  drm/i915: switch TGL and ADL to the new stepping scheme
  drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEP
  drm/i915: rename disp_stepping->display_step and gt_stepping->gt_step
  drm/i915: rename i915_rev_steppings->intel_step_info

 drivers/gpu/drm/i915/Makefile                 |   1 +
 .../drm/i915/display/intel_display_power.c    |   2 +-
 drivers/gpu/drm/i915/display/intel_psr.c      |   4 +-
 .../drm/i915/display/skl_universal_plane.c    |   2 +-
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c      |   2 +-
 drivers/gpu/drm/i915/gt/intel_workarounds.c   |  55 ++-----
 drivers/gpu/drm/i915/i915_drv.c               |   3 +-
 drivers/gpu/drm/i915/i915_drv.h               | 134 +++++-------------
 drivers/gpu/drm/i915/intel_device_info.c      |   2 +-
 drivers/gpu/drm/i915/intel_device_info.h      |   4 +
 drivers/gpu/drm/i915/intel_pm.c               |   6 +-
 drivers/gpu/drm/i915/intel_step.c             | 106 ++++++++++++++
 drivers/gpu/drm/i915/intel_step.h             |  40 ++++++
 13 files changed, 207 insertions(+), 154 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_step.c
 create mode 100644 drivers/gpu/drm/i915/intel_step.h

-- 
2.20.1

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[Intel-gfx] [PATCH v3 1/8] drm/i915: remove unused ADLS_REVID_* macros

[Jani Nikula]

It's the adls_revid_step_tbl array indexes that matter.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1d45d7492d10..2f511bf2bd82 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1587,12 +1587,6 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
 #define IS_DG1_REVID(p, since, until) \
 	(IS_DG1(p) && IS_REVID(p, since, until))
 
-#define ADLS_REVID_A0		0x0
-#define ADLS_REVID_A2		0x1
-#define ADLS_REVID_B0		0x4
-#define ADLS_REVID_G0		0x8
-#define ADLS_REVID_C0		0xC /*Same as H0 ADLS SOC stepping*/
-
 #define IS_ADLS_DISP_STEPPING(p, since, until) \
 	(IS_ALDERLAKE_S(p) && \
 	 tgl_stepping_get(p)->disp_stepping >= (since) && \
-- 
2.20.1

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[Intel-gfx] [PATCH v3 2/8] drm/i915: split out stepping info to a new file

[Jani Nikula]

gt/intel_workarounds.c is decidedly the wrong place for handling
stepping info. Add new intel_step.[ch] for the data, and move the
stepping arrays there. No functional changes.

v2: Rename stepping->step

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile               |  1 +
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 39 -----------------
 drivers/gpu/drm/i915/i915_drv.h             | 19 +--------
 drivers/gpu/drm/i915/intel_step.c           | 46 +++++++++++++++++++++
 drivers/gpu/drm/i915/intel_step.h           | 25 +++++++++++
 5 files changed, 74 insertions(+), 56 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_step.c
 create mode 100644 drivers/gpu/drm/i915/intel_step.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index bc6138880c67..a9fb426d5e41 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -53,6 +53,7 @@ i915-y += i915_config.o \
 	  intel_pm.o \
 	  intel_runtime_pm.o \
 	  intel_sideband.o \
+	  intel_step.o \
 	  intel_uncore.o \
 	  intel_wakeref.o \
 	  vlv_suspend.o
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3b4a7da60f0b..2827d4f2e086 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -52,45 +52,6 @@
  * - Public functions to init or apply the given workaround type.
  */
 
-/*
- * KBL revision ID ordering is bizarre; higher revision ID's map to lower
- * steppings in some cases.  So rather than test against the revision ID
- * directly, let's map that into our own range of increasing ID's that we
- * can test against in a regular manner.
- */
-
-const struct i915_rev_steppings kbl_revids[] = {
-	[0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
-	[1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
-	[2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
-	[3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
-	[4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
-	[5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
-	[6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
-	[7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
-};
-
-const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
-	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
-	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
-	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
-	[3] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_D0 },
-};
-
-/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
-const struct i915_rev_steppings tgl_revid_step_tbl[] = {
-	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
-	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
-};
-
-const struct i915_rev_steppings adls_revid_step_tbl[] = {
-	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
-	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
-	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
-	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
-	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
-};
-
 static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
 {
 	wal->name = name;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2f511bf2bd82..02170edd6628 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -86,9 +86,10 @@
 #include "gt/uc/intel_uc.h"
 
 #include "intel_device_info.h"
+#include "intel_memory_region.h"
 #include "intel_pch.h"
 #include "intel_runtime_pm.h"
-#include "intel_memory_region.h"
+#include "intel_step.h"
 #include "intel_uncore.h"
 #include "intel_wakeref.h"
 #include "intel_wopcm.h"
@@ -1471,14 +1472,6 @@ enum {
 	KBL_REVID_G0,
 };
 
-struct i915_rev_steppings {
-	u8 gt_stepping;
-	u8 disp_stepping;
-};
-
-/* Defined in intel_workarounds.c */
-extern const struct i915_rev_steppings kbl_revids[];
-
 #define IS_KBL_GT_REVID(dev_priv, since, until) \
 	(IS_KABYLAKE(dev_priv) && \
 	 kbl_revids[INTEL_REVID(dev_priv)].gt_stepping >= since && \
@@ -1527,14 +1520,6 @@ enum {
 	STEP_D0,
 };
 
-#define TGL_UY_REVID_STEP_TBL_SIZE	4
-#define TGL_REVID_STEP_TBL_SIZE		2
-#define ADLS_REVID_STEP_TBL_SIZE	13
-
-extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
-extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
-extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
-
 static inline const struct i915_rev_steppings *
 tgl_stepping_get(struct drm_i915_private *dev_priv)
 {
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
new file mode 100644
index 000000000000..e19820cbe8e3
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2020,2021 Intel Corporation
+ */
+
+#include "i915_drv.h"
+#include "intel_step.h"
+
+/*
+ * KBL revision ID ordering is bizarre; higher revision ID's map to lower
+ * steppings in some cases.  So rather than test against the revision ID
+ * directly, let's map that into our own range of increasing ID's that we
+ * can test against in a regular manner.
+ */
+
+const struct i915_rev_steppings kbl_revids[] = {
+	[0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
+	[1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
+	[2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
+	[3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
+	[4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
+	[5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
+	[6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
+	[7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
+};
+
+const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
+	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
+	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
+	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
+	[3] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_D0 },
+};
+
+/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
+const struct i915_rev_steppings tgl_revid_step_tbl[] = {
+	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
+	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
+};
+
+const struct i915_rev_steppings adls_revid_step_tbl[] = {
+	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
+	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
+	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
+	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
+	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
+};
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
new file mode 100644
index 000000000000..af922ae3bb4e
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2020,2021 Intel Corporation
+ */
+
+#ifndef __INTEL_STEP_H__
+#define __INTEL_STEP_H__
+
+#include <linux/types.h>
+
+struct i915_rev_steppings {
+	u8 gt_stepping;
+	u8 disp_stepping;
+};
+
+#define TGL_UY_REVID_STEP_TBL_SIZE	4
+#define TGL_REVID_STEP_TBL_SIZE		2
+#define ADLS_REVID_STEP_TBL_SIZE	13
+
+extern const struct i915_rev_steppings kbl_revids[];
+extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
+extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
+extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
+
+#endif /* __INTEL_STEP_H__ */
-- 
2.20.1

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[Intel-gfx] [PATCH v3 3/8] drm/i915: add new helpers for accessing stepping info

[Jani Nikula]

Add new runtime info field for stepping. Add new helpers for accessing
them. As we'll be switching platforms over to the new scheme
incrementally, check for non-initialized steppings.

In case a platform does not have separate display and gt steppings, it's
okay to use a common shorthand. However, in this case the display
stepping must not be initialized, and gt stepping is the single point of
truth.

v2: Rename stepping->step

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 24 +++++++++++++++---------
 drivers/gpu/drm/i915/intel_device_info.h |  4 ++++
 drivers/gpu/drm/i915/intel_step.h        | 14 ++++++++++++++
 3 files changed, 33 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 02170edd6628..a543b1ad9ba9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1274,6 +1274,21 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
 #define IS_REVID(p, since, until) \
 	(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
 
+#define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.disp_stepping)
+#define INTEL_GT_STEP(__i915) (RUNTIME_INFO(__i915)->step.gt_stepping)
+
+#define IS_DISPLAY_STEP(__i915, since, until) \
+	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
+	 INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) <= (until))
+
+#define IS_GT_STEP(__i915, since, until) \
+	(drm_WARN_ON(&(__i915)->drm, INTEL_GT_STEP(__i915) == STEP_NONE), \
+	 INTEL_GT_STEP(__i915) >= (since) && INTEL_GT_STEP(__i915) <= (until))
+
+#define IS_STEP(p, since, until) \
+	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) != STEP_NONE), \
+	 INTEL_GT_STEP(__i915, since, until))
+
 static __always_inline unsigned int
 __platform_mask_index(const struct intel_runtime_info *info,
 		      enum intel_platform p)
@@ -1511,15 +1526,6 @@ enum {
 #define IS_JSL_EHL_REVID(p, since, until) \
 	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
 
-enum {
-	STEP_A0,
-	STEP_A2,
-	STEP_B0,
-	STEP_B1,
-	STEP_C0,
-	STEP_D0,
-};
-
 static inline const struct i915_rev_steppings *
 tgl_stepping_get(struct drm_i915_private *dev_priv)
 {
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index d44f64b57b7a..f84569e8e711 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -27,6 +27,8 @@
 
 #include <uapi/drm/i915_drm.h>
 
+#include "intel_step.h"
+
 #include "display/intel_display.h"
 
 #include "gt/intel_engine_types.h"
@@ -225,6 +227,8 @@ struct intel_runtime_info {
 	u8 num_scalers[I915_MAX_PIPES];
 
 	u32 rawclk_freq;
+
+	struct i915_rev_steppings step;
 };
 
 struct intel_driver_caps {
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
index af922ae3bb4e..8b3ef19d935b 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -22,4 +22,18 @@ extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_T
 extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
 extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
 
+/*
+ * Symbolic steppings that do not match the hardware. These are valid both as gt
+ * and display steppings as symbolic names.
+ */
+enum intel_step {
+	STEP_NONE = 0,
+	STEP_A0,
+	STEP_A2,
+	STEP_B0,
+	STEP_B1,
+	STEP_C0,
+	STEP_D0,
+};
+
 #endif /* __INTEL_STEP_H__ */
-- 
2.20.1

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[Intel-gfx] [PATCH v3 4/8] drm/i915: switch KBL to the new stepping scheme

[Jani Nikula]

Add new symbolic names for revision ids, and convert KBL revids to use
them via the new stepping check macros.

This also fixes theoretical out of bounds access to kbl_revids array.

v2: Rename stepping->step

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

---

The initialization sounds like an early part of
intel_device_info_runtime_init(), and indeed touches runtime info.
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c    |  2 +-
 drivers/gpu/drm/i915/gt/intel_workarounds.c |  6 +-
 drivers/gpu/drm/i915/i915_drv.c             |  3 +-
 drivers/gpu/drm/i915/i915_drv.h             | 24 ++-----
 drivers/gpu/drm/i915/intel_pm.c             |  4 +-
 drivers/gpu/drm/i915/intel_step.c           | 69 ++++++++++++++++++---
 drivers/gpu/drm/i915/intel_step.h           | 11 +++-
 7 files changed, 82 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index cac80af7ad1c..74e8acc72da0 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -42,7 +42,7 @@ int gen8_emit_flush_rcs(struct i915_request *rq, u32 mode)
 			vf_flush_wa = true;
 
 		/* WaForGAMHang:kbl */
-		if (IS_KBL_GT_REVID(rq->engine->i915, 0, KBL_REVID_B0))
+		if (IS_KBL_GT_STEP(rq->engine->i915, 0, STEP_B0))
 			dc_flush_wa = true;
 	}
 
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 2827d4f2e086..0c502a733779 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -481,7 +481,7 @@ static void kbl_ctx_workarounds_init(struct intel_engine_cs *engine,
 	gen9_ctx_workarounds_init(engine, wal);
 
 	/* WaToEnableHwFixForPushConstHWBug:kbl */
-	if (IS_KBL_GT_REVID(i915, KBL_REVID_C0, REVID_FOREVER))
+	if (IS_KBL_GT_STEP(i915, STEP_C0, STEP_FOREVER))
 		wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
 			     GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
 
@@ -899,7 +899,7 @@ kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 	gen9_gt_workarounds_init(i915, wal);
 
 	/* WaDisableDynamicCreditSharing:kbl */
-	if (IS_KBL_GT_REVID(i915, 0, KBL_REVID_B0))
+	if (IS_KBL_GT_STEP(i915, 0, STEP_B0))
 		wa_write_or(wal,
 			    GAMT_CHKN_BIT_REG,
 			    GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
@@ -2020,7 +2020,7 @@ xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 	struct drm_i915_private *i915 = engine->i915;
 
 	/* WaKBLVECSSemaphoreWaitPoll:kbl */
-	if (IS_KBL_GT_REVID(i915, KBL_REVID_A0, KBL_REVID_E0)) {
+	if (IS_KBL_GT_STEP(i915, STEP_A0, STEP_E0)) {
 		wa_write(wal,
 			 RING_SEMA_WAIT_POLL(engine->mmio_base),
 			 1);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3edd5e47ad68..83214ffe6cf1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -273,7 +273,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
 	pre |= IS_HSW_EARLY_SDV(dev_priv);
 	pre |= IS_SKL_REVID(dev_priv, 0, SKL_REVID_F0);
 	pre |= IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST);
-	pre |= IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_A0);
+	pre |= IS_KBL_GT_STEP(dev_priv, 0, STEP_A0);
 	pre |= IS_GLK_REVID(dev_priv, 0, GLK_REVID_A2);
 
 	if (pre) {
@@ -307,6 +307,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
 		return -ENODEV;
 
 	intel_device_info_subplatform_init(dev_priv);
+	intel_step_init(dev_priv);
 
 	intel_uncore_mmio_debug_init_early(&dev_priv->mmio_debug);
 	intel_uncore_init_early(&dev_priv->uncore, dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a543b1ad9ba9..7f259aab4226 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1475,26 +1475,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_BXT_REVID(dev_priv, since, until) \
 	(IS_BROXTON(dev_priv) && IS_REVID(dev_priv, since, until))
 
-enum {
-	KBL_REVID_A0,
-	KBL_REVID_B0,
-	KBL_REVID_B1,
-	KBL_REVID_C0,
-	KBL_REVID_D0,
-	KBL_REVID_D1,
-	KBL_REVID_E0,
-	KBL_REVID_F0,
-	KBL_REVID_G0,
-};
-
-#define IS_KBL_GT_REVID(dev_priv, since, until) \
-	(IS_KABYLAKE(dev_priv) && \
-	 kbl_revids[INTEL_REVID(dev_priv)].gt_stepping >= since && \
-	 kbl_revids[INTEL_REVID(dev_priv)].gt_stepping <= until)
-#define IS_KBL_DISP_REVID(dev_priv, since, until) \
-	(IS_KABYLAKE(dev_priv) && \
-	 kbl_revids[INTEL_REVID(dev_priv)].disp_stepping >= since && \
-	 kbl_revids[INTEL_REVID(dev_priv)].disp_stepping <= until)
+#define IS_KBL_GT_STEP(dev_priv, since, until) \
+	(IS_KABYLAKE(dev_priv) && IS_GT_STEP(dev_priv, since, until))
+#define IS_KBL_DISPLAY_STEP(dev_priv, since, until) \
+	(IS_KABYLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, since, until))
 
 #define GLK_REVID_A0		0x0
 #define GLK_REVID_A1		0x1
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 854ffecd98d9..fd8d2732f68b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7213,12 +7213,12 @@ static void kbl_init_clock_gating(struct drm_i915_private *dev_priv)
 		   FBC_LLC_FULLY_OPEN);
 
 	/* WaDisableSDEUnitClockGating:kbl */
-	if (IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_B0))
+	if (IS_KBL_GT_STEP(dev_priv, 0, STEP_B0))
 		intel_uncore_write(&dev_priv->uncore, GEN8_UCGCTL6, intel_uncore_read(&dev_priv->uncore, GEN8_UCGCTL6) |
 			   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
 
 	/* WaDisableGamClockGating:kbl */
-	if (IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_B0))
+	if (IS_KBL_GT_STEP(dev_priv, 0, STEP_B0))
 		intel_uncore_write(&dev_priv->uncore, GEN6_UCGCTL1, intel_uncore_read(&dev_priv->uncore, GEN6_UCGCTL1) |
 			   GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
 
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index e19820cbe8e3..aaa9494b0f4f 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -13,15 +13,17 @@
  * can test against in a regular manner.
  */
 
-const struct i915_rev_steppings kbl_revids[] = {
-	[0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
-	[1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
-	[2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
-	[3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
-	[4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
-	[5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
-	[6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
-	[7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
+
+/* FIXME: what about REVID_E0 */
+static const struct i915_rev_steppings kbl_revids[] = {
+	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
+	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
+	[2] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
+	[3] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_B0 },
+	[4] = { .gt_stepping = STEP_F0, .disp_stepping = STEP_C0 },
+	[5] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B1 },
+	[6] = { .gt_stepping = STEP_D1, .disp_stepping = STEP_B1 },
+	[7] = { .gt_stepping = STEP_G0, .disp_stepping = STEP_C0 },
 };
 
 const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
@@ -44,3 +46,52 @@ const struct i915_rev_steppings adls_revid_step_tbl[] = {
 	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
 	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
 };
+
+void intel_step_init(struct drm_i915_private *i915)
+{
+	const struct i915_rev_steppings *revids = NULL;
+	int size = 0;
+	int revid = INTEL_REVID(i915);
+	struct i915_rev_steppings step = {};
+
+	if (IS_KABYLAKE(i915)) {
+		revids = kbl_revids;
+		size = ARRAY_SIZE(kbl_revids);
+	}
+
+	/* Not using the stepping scheme for the platform yet. */
+	if (!revids)
+		return;
+
+	if (revid < size && revids[revid].gt_stepping != STEP_NONE) {
+		step = revids[revid];
+	} else {
+		drm_dbg(&i915->drm, "Unknown revid 0x%02x\n", revid);
+
+		/*
+		 * If we hit a gap in the revid array, use the information for
+		 * the next revid.
+		 *
+		 * This may be wrong in all sorts of ways, especially if the
+		 * steppings in the array are not monotonically increasing, but
+		 * it's better than defaulting to 0.
+		 */
+		while (revid < size && revids[revid].gt_stepping == STEP_NONE)
+			revid++;
+
+		if (revid < size) {
+			drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n",
+				revid);
+			step = revids[revid];
+		} else {
+			drm_dbg(&i915->drm, "Using future steppings\n");
+			step.gt_stepping = STEP_FUTURE;
+			step.disp_stepping = STEP_FUTURE;
+		}
+	}
+
+	if (drm_WARN_ON(&i915->drm, step.gt_stepping == STEP_NONE))
+		return;
+
+	RUNTIME_INFO(i915)->step = step;
+}
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
index 8b3ef19d935b..b29e15f71214 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -8,6 +8,8 @@
 
 #include <linux/types.h>
 
+struct drm_i915_private;
+
 struct i915_rev_steppings {
 	u8 gt_stepping;
 	u8 disp_stepping;
@@ -17,7 +19,6 @@ struct i915_rev_steppings {
 #define TGL_REVID_STEP_TBL_SIZE		2
 #define ADLS_REVID_STEP_TBL_SIZE	13
 
-extern const struct i915_rev_steppings kbl_revids[];
 extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
 extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
 extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
@@ -34,6 +35,14 @@ enum intel_step {
 	STEP_B1,
 	STEP_C0,
 	STEP_D0,
+	STEP_D1,
+	STEP_E0,
+	STEP_F0,
+	STEP_G0,
+	STEP_FUTURE,
+	STEP_FOREVER,
 };
 
+void intel_step_init(struct drm_i915_private *i915);
+
 #endif /* __INTEL_STEP_H__ */
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v3 5/8] drm/i915: switch TGL and ADL to the new stepping scheme

[Jani Nikula]

This changes the way revids not present in the array are handled:

- For gaps in the array, the next present revid is used.

- For revids beyond the array, the new STEP_FUTURE is used instead of
  the last revid in the array.

In both cases, we'll get debug logging of what's going on.

v2: Rename stepping->step

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h   | 59 ++++++++-----------------------
 drivers/gpu/drm/i915/intel_step.c | 17 ++++++---
 drivers/gpu/drm/i915/intel_step.h |  8 -----
 3 files changed, 28 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7f259aab4226..991318e90b5a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1510,44 +1510,17 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_JSL_EHL_REVID(p, since, until) \
 	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
 
-static inline const struct i915_rev_steppings *
-tgl_stepping_get(struct drm_i915_private *dev_priv)
-{
-	u8 revid = INTEL_REVID(dev_priv);
-	u8 size;
-	const struct i915_rev_steppings *revid_step_tbl;
-
-	if (IS_ALDERLAKE_S(dev_priv)) {
-		revid_step_tbl = adls_revid_step_tbl;
-		size = ARRAY_SIZE(adls_revid_step_tbl);
-	} else if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
-		revid_step_tbl = tgl_uy_revid_step_tbl;
-		size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
-	} else {
-		revid_step_tbl = tgl_revid_step_tbl;
-		size = ARRAY_SIZE(tgl_revid_step_tbl);
-	}
-
-	revid = min_t(u8, revid, size - 1);
-
-	return &revid_step_tbl[revid];
-}
-
-#define IS_TGL_DISP_STEPPING(p, since, until) \
-	(IS_TIGERLAKE(p) && \
-	 tgl_stepping_get(p)->disp_stepping >= (since) && \
-	 tgl_stepping_get(p)->disp_stepping <= (until))
+#define IS_TGL_DISP_STEPPING(__i915, since, until) \
+	(IS_TIGERLAKE(__i915) && \
+	 IS_DISPLAY_STEP(__i915, since, until))
 
-#define IS_TGL_UY_GT_STEPPING(p, since, until) \
-	((IS_TGL_U(p) || IS_TGL_Y(p)) && \
-	 tgl_stepping_get(p)->gt_stepping >= (since) && \
-	 tgl_stepping_get(p)->gt_stepping <= (until))
+#define IS_TGL_UY_GT_STEPPING(__i915, since, until) \
+	((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
+	 IS_GT_STEP(__i915, since, until))
 
-#define IS_TGL_GT_STEPPING(p, since, until) \
-	(IS_TIGERLAKE(p) && \
-	 !(IS_TGL_U(p) || IS_TGL_Y(p)) && \
-	 tgl_stepping_get(p)->gt_stepping >= (since) && \
-	 tgl_stepping_get(p)->gt_stepping <= (until))
+#define IS_TGL_GT_STEPPING(__i915, since, until) \
+	(IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
+	 IS_GT_STEP(__i915, since, until))
 
 #define RKL_REVID_A0		0x0
 #define RKL_REVID_B0		0x1
@@ -1562,15 +1535,13 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
 #define IS_DG1_REVID(p, since, until) \
 	(IS_DG1(p) && IS_REVID(p, since, until))
 
-#define IS_ADLS_DISP_STEPPING(p, since, until) \
-	(IS_ALDERLAKE_S(p) && \
-	 tgl_stepping_get(p)->disp_stepping >= (since) && \
-	 tgl_stepping_get(p)->disp_stepping <= (until))
+#define IS_ADLS_DISP_STEPPING(__i915, since, until) \
+	(IS_ALDERLAKE_S(__i915) && \
+	 IS_DISPLAY_STEP(__i915, since, until))
 
-#define IS_ADLS_GT_STEPPING(p, since, until) \
-	(IS_ALDERLAKE_S(p) && \
-	 tgl_stepping_get(p)->gt_stepping >= (since) && \
-	 tgl_stepping_get(p)->gt_stepping <= (until))
+#define IS_ADLS_GT_STEPPING(__i915, since, until) \
+	(IS_ALDERLAKE_S(__i915) && \
+	 IS_GT_STEP(__i915, since, until))
 
 #define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
 #define IS_GEN9_LP(dev_priv)	(IS_GEN(dev_priv, 9) && IS_LP(dev_priv))
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index aaa9494b0f4f..4593eba24a7d 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -26,7 +26,7 @@ static const struct i915_rev_steppings kbl_revids[] = {
 	[7] = { .gt_stepping = STEP_G0, .disp_stepping = STEP_C0 },
 };
 
-const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
+static const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
 	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
 	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
 	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
@@ -34,12 +34,12 @@ const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
 };
 
 /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
-const struct i915_rev_steppings tgl_revid_step_tbl[] = {
+static const struct i915_rev_steppings tgl_revid_step_tbl[] = {
 	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
 	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
 };
 
-const struct i915_rev_steppings adls_revid_step_tbl[] = {
+static const struct i915_rev_steppings adls_revid_step_tbl[] = {
 	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
 	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
 	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
@@ -54,7 +54,16 @@ void intel_step_init(struct drm_i915_private *i915)
 	int revid = INTEL_REVID(i915);
 	struct i915_rev_steppings step = {};
 
-	if (IS_KABYLAKE(i915)) {
+	if (IS_ALDERLAKE_S(i915)) {
+		revids = adls_revid_step_tbl;
+		size = ARRAY_SIZE(adls_revid_step_tbl);
+	} else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
+		revids = tgl_uy_revid_step_tbl;
+		size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
+	} else if (IS_TIGERLAKE(i915)) {
+		revids = tgl_revid_step_tbl;
+		size = ARRAY_SIZE(tgl_revid_step_tbl);
+	} else if (IS_KABYLAKE(i915)) {
 		revids = kbl_revids;
 		size = ARRAY_SIZE(kbl_revids);
 	}
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
index b29e15f71214..5cc5601794f0 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -15,14 +15,6 @@ struct i915_rev_steppings {
 	u8 disp_stepping;
 };
 
-#define TGL_UY_REVID_STEP_TBL_SIZE	4
-#define TGL_REVID_STEP_TBL_SIZE		2
-#define ADLS_REVID_STEP_TBL_SIZE	13
-
-extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
-extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
-extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
-
 /*
  * Symbolic steppings that do not match the hardware. These are valid both as gt
  * and display steppings as symbolic names.
-- 
2.20.1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v3 6/8] drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEP

[Jani Nikula]

Matter of taste. STEP matches the enums.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c |  2 +-
 drivers/gpu/drm/i915/display/intel_psr.c           |  4 ++--
 drivers/gpu/drm/i915/display/skl_universal_plane.c |  2 +-
 drivers/gpu/drm/i915/gt/intel_workarounds.c        | 10 +++++-----
 drivers/gpu/drm/i915/i915_drv.h                    | 10 +++++-----
 drivers/gpu/drm/i915/intel_device_info.c           |  2 +-
 drivers/gpu/drm/i915/intel_pm.c                    |  2 +-
 7 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 7e0eaa872350..b1feec8e7081 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -5333,7 +5333,7 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv)
 
 	if (IS_ALDERLAKE_S(dev_priv) ||
 	    IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) ||
-	    IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_B0))
+	    IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
 		/* Wa_1409767108:tgl,dg1,adl-s */
 		table = wa_1409767108_buddy_page_masks;
 	else
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index cd434285e3b7..71d084fdf26c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -548,7 +548,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
 
 	if (intel_dp->psr.psr2_sel_fetch_enabled) {
 		/* WA 1408330847 */
-		if (IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_A0) ||
+		if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0) ||
 		    IS_RKL_REVID(dev_priv, RKL_REVID_A0, RKL_REVID_A0))
 			intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
 				     DIS_RAM_BYPASS_PSR2_MAN_TRACK,
@@ -1110,7 +1110,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 
 	/* WA 1408330847 */
 	if (intel_dp->psr.psr2_sel_fetch_enabled &&
-	    (IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_A0) ||
+	    (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0) ||
 	     IS_RKL_REVID(dev_priv, RKL_REVID_A0, RKL_REVID_A0)))
 		intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
 			     DIS_RAM_BYPASS_PSR2_MAN_TRACK, 0);
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 1f335cb09149..c4edfc673d47 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1858,7 +1858,7 @@ static bool gen12_plane_supports_mc_ccs(struct drm_i915_private *dev_priv,
 {
 	/* Wa_14010477008:tgl[a0..c0],rkl[all],dg1[all] */
 	if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv) ||
-	    IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_C0))
+	    IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_C0))
 		return false;
 
 	return plane_id < PLANE_SPRITE4;
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 0c502a733779..4f8f9fbf6619 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1091,19 +1091,19 @@ tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 	gen12_gt_workarounds_init(i915, wal);
 
 	/* Wa_1409420604:tgl */
-	if (IS_TGL_UY_GT_STEPPING(i915, STEP_A0, STEP_A0))
+	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_A0))
 		wa_write_or(wal,
 			    SUBSLICE_UNIT_LEVEL_CLKGATE2,
 			    CPSSUNIT_CLKGATE_DIS);
 
 	/* Wa_1607087056:tgl also know as BUG:1409180338 */
-	if (IS_TGL_UY_GT_STEPPING(i915, STEP_A0, STEP_A0))
+	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_A0))
 		wa_write_or(wal,
 			    SLICE_UNIT_LEVEL_CLKGATE,
 			    L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS);
 
 	/* Wa_1408615072:tgl[a0] */
-	if (IS_TGL_UY_GT_STEPPING(i915, STEP_A0, STEP_A0))
+	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_A0))
 		wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
 			    VSUNIT_CLKGATE_DIS_TGL);
 }
@@ -1581,7 +1581,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 	struct drm_i915_private *i915 = engine->i915;
 
 	if (IS_DG1_REVID(i915, DG1_REVID_A0, DG1_REVID_A0) ||
-	    IS_TGL_UY_GT_STEPPING(i915, STEP_A0, STEP_A0)) {
+	    IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_A0)) {
 		/*
 		 * Wa_1607138336:tgl[a0],dg1[a0]
 		 * Wa_1607063988:tgl[a0],dg1[a0]
@@ -1591,7 +1591,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 			    GEN12_DISABLE_POSH_BUSY_FF_DOP_CG);
 	}
 
-	if (IS_TGL_UY_GT_STEPPING(i915, STEP_A0, STEP_A0)) {
+	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_A0)) {
 		/*
 		 * Wa_1606679103:tgl
 		 * (see also Wa_1606682166:icl)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 991318e90b5a..50f6f957c5db 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1510,15 +1510,15 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_JSL_EHL_REVID(p, since, until) \
 	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
 
-#define IS_TGL_DISP_STEPPING(__i915, since, until) \
+#define IS_TGL_DISPLAY_STEP(__i915, since, until) \
 	(IS_TIGERLAKE(__i915) && \
 	 IS_DISPLAY_STEP(__i915, since, until))
 
-#define IS_TGL_UY_GT_STEPPING(__i915, since, until) \
+#define IS_TGL_UY_GT_STEP(__i915, since, until) \
 	((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
 	 IS_GT_STEP(__i915, since, until))
 
-#define IS_TGL_GT_STEPPING(__i915, since, until) \
+#define IS_TGL_GT_STEP(__i915, since, until) \
 	(IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
 	 IS_GT_STEP(__i915, since, until))
 
@@ -1535,11 +1535,11 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_DG1_REVID(p, since, until) \
 	(IS_DG1(p) && IS_REVID(p, since, until))
 
-#define IS_ADLS_DISP_STEPPING(__i915, since, until) \
+#define IS_ADLS_DISPLAY_STEP(__i915, since, until) \
 	(IS_ALDERLAKE_S(__i915) && \
 	 IS_DISPLAY_STEP(__i915, since, until))
 
-#define IS_ADLS_GT_STEPPING(__i915, since, until) \
+#define IS_ADLS_GT_STEP(__i915, since, until) \
 	(IS_ALDERLAKE_S(__i915) && \
 	 IS_GT_STEP(__i915, since, until))
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index aeb28d589b2b..de02207f6ec6 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -251,7 +251,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
 	enum pipe pipe;
 
 	/* Wa_14011765242: adl-s A0 */
-	if (IS_ADLS_DISP_STEPPING(dev_priv, STEP_A0, STEP_A0))
+	if (IS_ADLS_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0))
 		for_each_pipe(dev_priv, pipe)
 			runtime->num_scalers[pipe] = 0;
 	else if (INTEL_GEN(dev_priv) >= 10) {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fd8d2732f68b..d888f9f74a28 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7114,7 +7114,7 @@ static void gen12lp_init_clock_gating(struct drm_i915_private *dev_priv)
 			   ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
 
 	/* Wa_1409825376:tgl (pre-prod)*/
-	if (IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_B1))
+	if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B1))
 		intel_uncore_write(&dev_priv->uncore, GEN9_CLKGATE_DIS_3, intel_uncore_read(&dev_priv->uncore, GEN9_CLKGATE_DIS_3) |
 			   TGL_VRH_GATING_DIS);
 
-- 
2.20.1

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[Intel-gfx] [PATCH v3 7/8] drm/i915: rename disp_stepping->display_step and gt_stepping->gt_step

[Jani Nikula]

Matter of taste. Step matches the enums.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h   |  4 +--
 drivers/gpu/drm/i915/intel_step.c | 48 +++++++++++++++----------------
 drivers/gpu/drm/i915/intel_step.h |  4 +--
 3 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 50f6f957c5db..ea82d93df7b8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1274,8 +1274,8 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
 #define IS_REVID(p, since, until) \
 	(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
 
-#define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.disp_stepping)
-#define INTEL_GT_STEP(__i915) (RUNTIME_INFO(__i915)->step.gt_stepping)
+#define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step)
+#define INTEL_GT_STEP(__i915) (RUNTIME_INFO(__i915)->step.gt_step)
 
 #define IS_DISPLAY_STEP(__i915, since, until) \
 	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index 4593eba24a7d..9df2dd264841 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -16,35 +16,35 @@
 
 /* FIXME: what about REVID_E0 */
 static const struct i915_rev_steppings kbl_revids[] = {
-	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
-	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
-	[2] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
-	[3] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_B0 },
-	[4] = { .gt_stepping = STEP_F0, .disp_stepping = STEP_C0 },
-	[5] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B1 },
-	[6] = { .gt_stepping = STEP_D1, .disp_stepping = STEP_B1 },
-	[7] = { .gt_stepping = STEP_G0, .disp_stepping = STEP_C0 },
+	[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
+	[1] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
+	[2] = { .gt_step = STEP_C0, .display_step = STEP_B0 },
+	[3] = { .gt_step = STEP_D0, .display_step = STEP_B0 },
+	[4] = { .gt_step = STEP_F0, .display_step = STEP_C0 },
+	[5] = { .gt_step = STEP_C0, .display_step = STEP_B1 },
+	[6] = { .gt_step = STEP_D1, .display_step = STEP_B1 },
+	[7] = { .gt_step = STEP_G0, .display_step = STEP_C0 },
 };
 
 static const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
-	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
-	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
-	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
-	[3] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_D0 },
+	[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
+	[1] = { .gt_step = STEP_B0, .display_step = STEP_C0 },
+	[2] = { .gt_step = STEP_B1, .display_step = STEP_C0 },
+	[3] = { .gt_step = STEP_C0, .display_step = STEP_D0 },
 };
 
 /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
 static const struct i915_rev_steppings tgl_revid_step_tbl[] = {
-	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
-	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
+	[0] = { .gt_step = STEP_A0, .display_step = STEP_B0 },
+	[1] = { .gt_step = STEP_B0, .display_step = STEP_D0 },
 };
 
 static const struct i915_rev_steppings adls_revid_step_tbl[] = {
-	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
-	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
-	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
-	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
-	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
+	[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
+	[0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 },
+	[0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
+	[0x8] = { .gt_step = STEP_C0, .display_step = STEP_B0 },
+	[0xC] = { .gt_step = STEP_D0, .display_step = STEP_C0 },
 };
 
 void intel_step_init(struct drm_i915_private *i915)
@@ -72,7 +72,7 @@ void intel_step_init(struct drm_i915_private *i915)
 	if (!revids)
 		return;
 
-	if (revid < size && revids[revid].gt_stepping != STEP_NONE) {
+	if (revid < size && revids[revid].gt_step != STEP_NONE) {
 		step = revids[revid];
 	} else {
 		drm_dbg(&i915->drm, "Unknown revid 0x%02x\n", revid);
@@ -85,7 +85,7 @@ void intel_step_init(struct drm_i915_private *i915)
 		 * steppings in the array are not monotonically increasing, but
 		 * it's better than defaulting to 0.
 		 */
-		while (revid < size && revids[revid].gt_stepping == STEP_NONE)
+		while (revid < size && revids[revid].gt_step == STEP_NONE)
 			revid++;
 
 		if (revid < size) {
@@ -94,12 +94,12 @@ void intel_step_init(struct drm_i915_private *i915)
 			step = revids[revid];
 		} else {
 			drm_dbg(&i915->drm, "Using future steppings\n");
-			step.gt_stepping = STEP_FUTURE;
-			step.disp_stepping = STEP_FUTURE;
+			step.gt_step = STEP_FUTURE;
+			step.display_step = STEP_FUTURE;
 		}
 	}
 
-	if (drm_WARN_ON(&i915->drm, step.gt_stepping == STEP_NONE))
+	if (drm_WARN_ON(&i915->drm, step.gt_step == STEP_NONE))
 		return;
 
 	RUNTIME_INFO(i915)->step = step;
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
index 5cc5601794f0..102fd6a26893 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -11,8 +11,8 @@
 struct drm_i915_private;
 
 struct i915_rev_steppings {
-	u8 gt_stepping;
-	u8 disp_stepping;
+	u8 gt_step;
+	u8 display_step;
 };
 
 /*
-- 
2.20.1

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[Intel-gfx] [PATCH v3 8/8] drm/i915: rename i915_rev_steppings->intel_step_info

[Jani Nikula]

Matter of taste. Match the prefix for everything else related to
steppings. No functional changes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_device_info.h |  2 +-
 drivers/gpu/drm/i915/intel_step.c        | 12 ++++++------
 drivers/gpu/drm/i915/intel_step.h        |  2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index f84569e8e711..1bcae2a8c79b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -228,7 +228,7 @@ struct intel_runtime_info {
 
 	u32 rawclk_freq;
 
-	struct i915_rev_steppings step;
+	struct intel_step_info step;
 };
 
 struct intel_driver_caps {
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index 9df2dd264841..914a5de4346e 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -15,7 +15,7 @@
 
 
 /* FIXME: what about REVID_E0 */
-static const struct i915_rev_steppings kbl_revids[] = {
+static const struct intel_step_info kbl_revids[] = {
 	[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
 	[1] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
 	[2] = { .gt_step = STEP_C0, .display_step = STEP_B0 },
@@ -26,7 +26,7 @@ static const struct i915_rev_steppings kbl_revids[] = {
 	[7] = { .gt_step = STEP_G0, .display_step = STEP_C0 },
 };
 
-static const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
+static const struct intel_step_info tgl_uy_revid_step_tbl[] = {
 	[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
 	[1] = { .gt_step = STEP_B0, .display_step = STEP_C0 },
 	[2] = { .gt_step = STEP_B1, .display_step = STEP_C0 },
@@ -34,12 +34,12 @@ static const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
 };
 
 /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
-static const struct i915_rev_steppings tgl_revid_step_tbl[] = {
+static const struct intel_step_info tgl_revid_step_tbl[] = {
 	[0] = { .gt_step = STEP_A0, .display_step = STEP_B0 },
 	[1] = { .gt_step = STEP_B0, .display_step = STEP_D0 },
 };
 
-static const struct i915_rev_steppings adls_revid_step_tbl[] = {
+static const struct intel_step_info adls_revid_step_tbl[] = {
 	[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
 	[0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 },
 	[0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
@@ -49,10 +49,10 @@ static const struct i915_rev_steppings adls_revid_step_tbl[] = {
 
 void intel_step_init(struct drm_i915_private *i915)
 {
-	const struct i915_rev_steppings *revids = NULL;
+	const struct intel_step_info *revids = NULL;
 	int size = 0;
 	int revid = INTEL_REVID(i915);
-	struct i915_rev_steppings step = {};
+	struct intel_step_info step = {};
 
 	if (IS_ALDERLAKE_S(i915)) {
 		revids = adls_revid_step_tbl;
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
index 102fd6a26893..958a8bb5d677 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -10,7 +10,7 @@
 
 struct drm_i915_private;
 
-struct i915_rev_steppings {
+struct intel_step_info {
 	u8 gt_step;
 	u8 display_step;
 };
-- 
2.20.1

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: refactor KBL/TGL/ADLS stepping scheme (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: refactor KBL/TGL/ADLS stepping scheme (rev2)
URL   : https://patchwork.freedesktop.org/series/87323/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
c52f0ea75128 drm/i915: remove unused ADLS_REVID_* macros
1d23fa9cb274 drm/i915: split out stepping info to a new file
-:123: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#123: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 162 lines checked
93d71ad11f06 drm/i915: add new helpers for accessing stepping info
-:30: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#30: FILE: drivers/gpu/drm/i915/i915_drv.h:1280:
+#define IS_DISPLAY_STEP(__i915, since, until) \
+	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
+	 INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) <= (until))

-:34: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#34: FILE: drivers/gpu/drm/i915/i915_drv.h:1284:
+#define IS_GT_STEP(__i915, since, until) \
+	(drm_WARN_ON(&(__i915)->drm, INTEL_GT_STEP(__i915) == STEP_NONE), \
+	 INTEL_GT_STEP(__i915) >= (since) && INTEL_GT_STEP(__i915) <= (until))

total: 0 errors, 0 warnings, 2 checks, 70 lines checked
c5a4a8ab6645 drm/i915: switch KBL to the new stepping scheme
-:108: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#108: FILE: drivers/gpu/drm/i915/i915_drv.h:1478:
+#define IS_KBL_GT_STEP(dev_priv, since, until) \
+	(IS_KABYLAKE(dev_priv) && IS_GT_STEP(dev_priv, since, until))

-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#110: FILE: drivers/gpu/drm/i915/i915_drv.h:1480:
+#define IS_KBL_DISPLAY_STEP(dev_priv, since, until) \
+	(IS_KABYLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, since, until))

-:151: CHECK:LINE_SPACING: Please don't use multiple blank lines
#151: FILE: drivers/gpu/drm/i915/intel_step.c:16:
 
+

total: 0 errors, 0 warnings, 3 checks, 198 lines checked
3ab291f069dc drm/i915: switch TGL and ADL to the new stepping scheme
-:54: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#54: FILE: drivers/gpu/drm/i915/i915_drv.h:1513:
+#define IS_TGL_DISP_STEPPING(__i915, since, until) \
+	(IS_TIGERLAKE(__i915) && \
+	 IS_DISPLAY_STEP(__i915, since, until))

-:62: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#62: FILE: drivers/gpu/drm/i915/i915_drv.h:1517:
+#define IS_TGL_UY_GT_STEPPING(__i915, since, until) \
+	((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
+	 IS_GT_STEP(__i915, since, until))

-:71: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#71: FILE: drivers/gpu/drm/i915/i915_drv.h:1521:
+#define IS_TGL_GT_STEPPING(__i915, since, until) \
+	(IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
+	 IS_GT_STEP(__i915, since, until))

-:85: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#85: FILE: drivers/gpu/drm/i915/i915_drv.h:1538:
+#define IS_ADLS_DISP_STEPPING(__i915, since, until) \
+	(IS_ALDERLAKE_S(__i915) && \
+	 IS_DISPLAY_STEP(__i915, since, until))

-:93: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#93: FILE: drivers/gpu/drm/i915/i915_drv.h:1542:
+#define IS_ADLS_GT_STEPPING(__i915, since, until) \
+	(IS_ALDERLAKE_S(__i915) && \
+	 IS_GT_STEP(__i915, since, until))

total: 0 errors, 0 warnings, 5 checks, 127 lines checked
f94a68bcd095 drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEP
-:113: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#113: FILE: drivers/gpu/drm/i915/i915_drv.h:1513:
+#define IS_TGL_DISPLAY_STEP(__i915, since, until) \
 	(IS_TIGERLAKE(__i915) && \
 	 IS_DISPLAY_STEP(__i915, since, until))

-:118: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#118: FILE: drivers/gpu/drm/i915/i915_drv.h:1517:
+#define IS_TGL_UY_GT_STEP(__i915, since, until) \
 	((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
 	 IS_GT_STEP(__i915, since, until))

-:123: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#123: FILE: drivers/gpu/drm/i915/i915_drv.h:1521:
+#define IS_TGL_GT_STEP(__i915, since, until) \
 	(IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
 	 IS_GT_STEP(__i915, since, until))

-:132: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#132: FILE: drivers/gpu/drm/i915/i915_drv.h:1538:
+#define IS_ADLS_DISPLAY_STEP(__i915, since, until) \
 	(IS_ALDERLAKE_S(__i915) && \
 	 IS_DISPLAY_STEP(__i915, since, until))

-:137: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#137: FILE: drivers/gpu/drm/i915/i915_drv.h:1542:
+#define IS_ADLS_GT_STEP(__i915, since, until) \
 	(IS_ALDERLAKE_S(__i915) && \
 	 IS_GT_STEP(__i915, since, until))

total: 0 errors, 0 warnings, 5 checks, 117 lines checked
19a6fa288b97 drm/i915: rename disp_stepping->display_step and gt_stepping->gt_step
d1a2f1d5bb5c drm/i915: rename i915_rev_steppings->intel_step_info


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: refactor KBL/TGL/ADLS stepping scheme (rev2)

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 4286 bytes --]

== Series Details ==

Series: drm/i915: refactor KBL/TGL/ADLS stepping scheme (rev2)
URL   : https://patchwork.freedesktop.org/series/87323/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9840 -> Patchwork_19768
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/index.html

Known issues
------------

  Here are the changes found in Patchwork_19768 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_tiled_blits@basic:
    - fi-kbl-8809g:       [PASS][1] -> [TIMEOUT][2] ([i915#2502] / [i915#3145])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/fi-kbl-8809g/igt@gem_tiled_blits@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/fi-kbl-8809g/igt@gem_tiled_blits@basic.html

  * igt@i915_selftest@live@client:
    - fi-glk-dsi:         [PASS][3] -> [DMESG-FAIL][4] ([i915#3047])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/fi-glk-dsi/igt@i915_selftest@live@client.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/fi-glk-dsi/igt@i915_selftest@live@client.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-tgl-u2:          [FAIL][5] ([i915#1888]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_tiled_fence_blits@basic:
    - fi-kbl-8809g:       [TIMEOUT][7] ([i915#3145]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/fi-kbl-8809g/igt@gem_tiled_fence_blits@basic.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/fi-kbl-8809g/igt@gem_tiled_fence_blits@basic.html

  * igt@i915_selftest@live@client:
    - fi-bsw-kefka:       [DMESG-FAIL][9] -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/fi-bsw-kefka/igt@i915_selftest@live@client.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/fi-bsw-kefka/igt@i915_selftest@live@client.html

  * igt@kms_flip@basic-flip-vs-modeset@d-dsi1:
    - {fi-tgl-dsi}:       [DMESG-WARN][11] ([i915#402]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-modeset@d-dsi1.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-modeset@d-dsi1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2502]: https://gitlab.freedesktop.org/drm/intel/issues/2502
  [i915#3047]: https://gitlab.freedesktop.org/drm/intel/issues/3047
  [i915#3145]: https://gitlab.freedesktop.org/drm/intel/issues/3145
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402


Participating hosts (46 -> 42)
------------------------------

  Missing    (4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u 


Build changes
-------------

  * Linux: CI_DRM_9840 -> Patchwork_19768

  CI-20190529: 20190529
  CI_DRM_9840: c32ebbc1bfd09da5fd10264570b81c9e65091a08 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6026: 8b8bbecf2f32298544c2f193753a0153f39e7326 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19768: d1a2f1d5bb5c67b4f1bd95219ba73da00960d641 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d1a2f1d5bb5c drm/i915: rename i915_rev_steppings->intel_step_info
19a6fa288b97 drm/i915: rename disp_stepping->display_step and gt_stepping->gt_step
f94a68bcd095 drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEP
3ab291f069dc drm/i915: switch TGL and ADL to the new stepping scheme
c5a4a8ab6645 drm/i915: switch KBL to the new stepping scheme
93d71ad11f06 drm/i915: add new helpers for accessing stepping info
1d23fa9cb274 drm/i915: split out stepping info to a new file
c52f0ea75128 drm/i915: remove unused ADLS_REVID_* macros

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/index.html

[-- Attachment #1.2: Type: text/html, Size: 5168 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: refactor KBL/TGL/ADLS stepping scheme (rev2)

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 30277 bytes --]

== Series Details ==

Series: drm/i915: refactor KBL/TGL/ADLS stepping scheme (rev2)
URL   : https://patchwork.freedesktop.org/series/87323/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9840_full -> Patchwork_19768_full
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with Patchwork_19768_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_19768_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_19768_full:

### IGT changes ###

#### Warnings ####

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][1], [FAIL][2], [FAIL][3], [FAIL][4], [FAIL][5], [FAIL][6], [FAIL][7]) ([i915#180] / [i915#1814] / [i915#2292] / [i915#2724] / [i915#3002]) -> ([FAIL][8], [FAIL][9], [FAIL][10], [FAIL][11], [FAIL][12], [FAIL][13], [FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17], [FAIL][18]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2292] / [i915#2505] / [i915#2724] / [i915#3002] / [i915#602] / [i915#92])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl3/igt@runner@aborted.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl7/igt@runner@aborted.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl7/igt@runner@aborted.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl7/igt@runner@aborted.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl4/igt@runner@aborted.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl2/igt@runner@aborted.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl3/igt@runner@aborted.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl7/igt@runner@aborted.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl2/igt@runner@aborted.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl3/igt@runner@aborted.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl7/igt@runner@aborted.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl3/igt@runner@aborted.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl3/igt@runner@aborted.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl6/igt@runner@aborted.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl7/igt@runner@aborted.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl6/igt@runner@aborted.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl3/igt@runner@aborted.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl6/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_19768_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@preservation-s3@bcs0:
    - shard-skl:          [PASS][19] -> [INCOMPLETE][20] ([i915#198])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl9/igt@gem_ctx_isolation@preservation-s3@bcs0.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl1/igt@gem_ctx_isolation@preservation-s3@bcs0.html
    - shard-kbl:          [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +4 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl1/igt@gem_ctx_isolation@preservation-s3@bcs0.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl3/igt@gem_ctx_isolation@preservation-s3@bcs0.html

  * igt@gem_ctx_isolation@preservation-s3@vecs0:
    - shard-apl:          NOTRUN -> [DMESG-WARN][23] ([i915#180])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl2/igt@gem_ctx_isolation@preservation-s3@vecs0.html

  * igt@gem_ctx_persistence@smoketest:
    - shard-snb:          NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#1099]) +3 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-snb2/igt@gem_ctx_persistence@smoketest.html

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [PASS][25] -> [TIMEOUT][26] ([i915#2369] / [i915#2481] / [i915#3070])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-iclb5/igt@gem_eio@unwedge-stress.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb1/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-skl:          NOTRUN -> [SKIP][27] ([fdo#109271]) +68 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl4/igt@gem_exec_fair@basic-flow@rcs0.html
    - shard-tglb:         [PASS][28] -> [FAIL][29] ([i915#2842]) +1 similar issue
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-tglb3/igt@gem_exec_fair@basic-flow@rcs0.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [PASS][30] -> [FAIL][31] ([i915#2842])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb4/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-kbl:          [PASS][32] -> [FAIL][33] ([i915#2842]) +4 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl4/igt@gem_exec_fair@basic-none@vcs0.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_exec_params@rsvd2-dirt:
    - shard-iclb:         NOTRUN -> [SKIP][34] ([fdo#109283])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@gem_exec_params@rsvd2-dirt.html

  * igt@gem_exec_reloc@basic-parallel:
    - shard-apl:          NOTRUN -> [TIMEOUT][35] ([i915#1729])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl3/igt@gem_exec_reloc@basic-parallel.html

  * igt@gem_exec_schedule@u-fairslice@rcs0:
    - shard-glk:          [PASS][36] -> [DMESG-WARN][37] ([i915#1610] / [i915#2803])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-glk3/igt@gem_exec_schedule@u-fairslice@rcs0.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk6/igt@gem_exec_schedule@u-fairslice@rcs0.html

  * igt@gem_exec_schedule@u-fairslice@vcs0:
    - shard-apl:          [PASS][38] -> [DMESG-WARN][39] ([i915#1610])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-apl6/igt@gem_exec_schedule@u-fairslice@vcs0.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl8/igt@gem_exec_schedule@u-fairslice@vcs0.html

  * igt@gem_exec_schedule@u-fairslice@vecs0:
    - shard-tglb:         [PASS][40] -> [DMESG-WARN][41] ([i915#2803])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-tglb1/igt@gem_exec_schedule@u-fairslice@vecs0.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-tglb7/igt@gem_exec_schedule@u-fairslice@vecs0.html

  * igt@gem_huc_copy@huc-copy:
    - shard-skl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#2190])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl4/igt@gem_huc_copy@huc-copy.html

  * igt@gem_mmap_gtt@cpuset-big-copy:
    - shard-glk:          [PASS][43] -> [FAIL][44] ([i915#307])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-glk5/igt@gem_mmap_gtt@cpuset-big-copy.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk4/igt@gem_mmap_gtt@cpuset-big-copy.html

  * igt@gem_pread@exhaustion:
    - shard-snb:          NOTRUN -> [WARN][45] ([i915#2658])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-snb2/igt@gem_pread@exhaustion.html
    - shard-kbl:          NOTRUN -> [WARN][46] ([i915#2658])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl7/igt@gem_pread@exhaustion.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-apl:          NOTRUN -> [WARN][47] ([i915#2658])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl7/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_userptr_blits@process-exit-mmap-busy@wc:
    - shard-apl:          NOTRUN -> [SKIP][48] ([fdo#109271] / [i915#1699]) +3 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl3/igt@gem_userptr_blits@process-exit-mmap-busy@wc.html
    - shard-glk:          NOTRUN -> [SKIP][49] ([fdo#109271] / [i915#1699]) +3 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk7/igt@gem_userptr_blits@process-exit-mmap-busy@wc.html

  * igt@gen7_exec_parse@basic-allowed:
    - shard-iclb:         NOTRUN -> [SKIP][50] ([fdo#109289])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@gen7_exec_parse@basic-allowed.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#112306])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@gen9_exec_parse@bb-start-param.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-skl:          NOTRUN -> [FAIL][52] ([i915#454])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl4/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-skl:          [PASS][53] -> [FAIL][54] ([i915#454])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl8/igt@i915_pm_dc@dc6-psr.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl5/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@modeset-pc8-residency-stress:
    - shard-iclb:         NOTRUN -> [SKIP][55] ([fdo#109293] / [fdo#109506])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@i915_pm_rpm@modeset-pc8-residency-stress.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
    - shard-iclb:         NOTRUN -> [SKIP][56] ([fdo#110723])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo:
    - shard-snb:          NOTRUN -> [SKIP][57] ([fdo#109271]) +193 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-snb2/igt@kms_ccs@pipe-a-ccs-on-another-bo.html

  * igt@kms_chamelium@dp-frame-dump:
    - shard-glk:          NOTRUN -> [SKIP][58] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk7/igt@kms_chamelium@dp-frame-dump.html

  * igt@kms_chamelium@hdmi-audio-edid:
    - shard-kbl:          NOTRUN -> [SKIP][59] ([fdo#109271] / [fdo#111827]) +4 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl4/igt@kms_chamelium@hdmi-audio-edid.html

  * igt@kms_chamelium@hdmi-hpd-with-enabled-mode:
    - shard-snb:          NOTRUN -> [SKIP][60] ([fdo#109271] / [fdo#111827]) +11 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-snb6/igt@kms_chamelium@hdmi-hpd-with-enabled-mode.html

  * igt@kms_chamelium@vga-hpd:
    - shard-apl:          NOTRUN -> [SKIP][61] ([fdo#109271] / [fdo#111827]) +21 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl2/igt@kms_chamelium@vga-hpd.html

  * igt@kms_color@pipe-d-ctm-blue-to-red:
    - shard-iclb:         NOTRUN -> [SKIP][62] ([fdo#109278] / [i915#1149])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@kms_color@pipe-d-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-c-ctm-limited-range:
    - shard-iclb:         NOTRUN -> [SKIP][63] ([fdo#109284] / [fdo#111827])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@kms_color_chamelium@pipe-c-ctm-limited-range.html

  * igt@kms_color_chamelium@pipe-d-ctm-red-to-blue:
    - shard-skl:          NOTRUN -> [SKIP][64] ([fdo#109271] / [fdo#111827]) +6 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl4/igt@kms_color_chamelium@pipe-d-ctm-red-to-blue.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-iclb:         NOTRUN -> [SKIP][65] ([i915#3116])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen:
    - shard-iclb:         NOTRUN -> [SKIP][66] ([fdo#109278] / [fdo#109279])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x64-random:
    - shard-skl:          NOTRUN -> [FAIL][67] ([i915#54])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl4/igt@kms_cursor_crc@pipe-b-cursor-64x64-random.html

  * igt@kms_cursor_crc@pipe-d-cursor-suspend:
    - shard-kbl:          NOTRUN -> [SKIP][68] ([fdo#109271]) +23 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
    - shard-iclb:         NOTRUN -> [SKIP][69] ([fdo#109274] / [fdo#109278])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-skl:          [PASS][70] -> [FAIL][71] ([i915#2346])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-kbl:          [PASS][72] -> [INCOMPLETE][73] ([i915#155] / [i915#180] / [i915#636])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl4/igt@kms_fbcon_fbt@fbc-suspend.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][74] -> [FAIL][75] ([i915#2122])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@plain-flip-fb-recreate@c-edp1:
    - shard-skl:          [PASS][76] -> [FAIL][77] ([i915#2122])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl10/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl7/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
    - shard-apl:          NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#2672])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-cpu:
    - shard-iclb:         NOTRUN -> [SKIP][79] ([fdo#109280]) +7 similar issues
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-cpu.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-apl:          [PASS][80] -> [DMESG-WARN][81] ([i915#180])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
    - shard-apl:          NOTRUN -> [FAIL][82] ([i915#265])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
    - shard-skl:          NOTRUN -> [FAIL][83] ([fdo#108145] / [i915#265]) +3 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
    - shard-apl:          NOTRUN -> [FAIL][84] ([fdo#108145] / [i915#265]) +2 similar issues
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl6/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
    - shard-kbl:          NOTRUN -> [FAIL][85] ([fdo#108145] / [i915#265])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][86] -> [FAIL][87] ([fdo#108145] / [i915#265]) +1 similar issue
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
    - shard-skl:          NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#2733])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl6/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
    - shard-apl:          NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#658]) +4 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl7/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-3:
    - shard-skl:          NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#658])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-3.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         NOTRUN -> [SKIP][91] ([fdo#109642] / [fdo#111068] / [i915#658])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_primary_mmap_gtt:
    - shard-iclb:         [PASS][92] -> [SKIP][93] ([fdo#109441])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb6/igt@kms_psr@psr2_primary_mmap_gtt.html

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-kbl:          NOTRUN -> [DMESG-WARN][94] ([i915#180])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl6/igt@kms_vblank@pipe-c-ts-continuation-suspend.html

  * igt@kms_vblank@pipe-d-ts-continuation-modeset:
    - shard-iclb:         NOTRUN -> [SKIP][95] ([fdo#109278]) +1 similar issue
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@kms_vblank@pipe-d-ts-continuation-modeset.html

  * igt@kms_vblank@pipe-d-wait-forked-hang:
    - shard-apl:          NOTRUN -> [SKIP][96] ([fdo#109271]) +238 similar issues
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl7/igt@kms_vblank@pipe-d-wait-forked-hang.html

  * igt@kms_vblank@pipe-d-wait-idle:
    - shard-apl:          NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#533]) +1 similar issue
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl3/igt@kms_vblank@pipe-d-wait-idle.html
    - shard-glk:          NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#533]) +1 similar issue
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk7/igt@kms_vblank@pipe-d-wait-idle.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-apl:          NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#2437])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl1/igt@kms_writeback@writeback-fb-id.html

  * igt@nouveau_crc@pipe-d-source-outp-complete:
    - shard-iclb:         NOTRUN -> [SKIP][100] ([fdo#109278] / [i915#2530])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@nouveau_crc@pipe-d-source-outp-complete.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [PASS][101] -> [FAIL][102] ([i915#1542])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl2/igt@perf@polling-parameterized.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl4/igt@perf@polling-parameterized.html

  * igt@perf@polling-small-buf:
    - shard-skl:          NOTRUN -> [FAIL][103] ([i915#1722])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl6/igt@perf@polling-small-buf.html

  * igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name:
    - shard-iclb:         NOTRUN -> [SKIP][104] ([fdo#109291])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html

  * igt@prime_nv_api@i915_self_import:
    - shard-glk:          NOTRUN -> [SKIP][105] ([fdo#109271]) +26 similar issues
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk7/igt@prime_nv_api@i915_self_import.html

  * igt@sysfs_clients@recycle:
    - shard-iclb:         [PASS][106] -> [FAIL][107] ([i915#3028])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-iclb1/igt@sysfs_clients@recycle.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb6/igt@sysfs_clients@recycle.html

  * igt@sysfs_clients@recycle-many:
    - shard-kbl:          [PASS][108] -> [FAIL][109] ([i915#3028])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl6/igt@sysfs_clients@recycle-many.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl2/igt@sysfs_clients@recycle-many.html

  * igt@sysfs_clients@sema-10@rcs0:
    - shard-apl:          [PASS][110] -> [SKIP][111] ([fdo#109271] / [i915#3026])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-apl6/igt@sysfs_clients@sema-10@rcs0.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl8/igt@sysfs_clients@sema-10@rcs0.html

  * igt@sysfs_clients@split-10@bcs0:
    - shard-apl:          NOTRUN -> [SKIP][112] ([fdo#109271] / [i915#3026])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl2/igt@sysfs_clients@split-10@bcs0.html

  * igt@sysfs_defaults@readonly@rcs0:
    - shard-skl:          [PASS][113] -> [DMESG-WARN][114] ([i915#1982])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl5/igt@sysfs_defaults@readonly@rcs0.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl8/igt@sysfs_defaults@readonly@rcs0.html

  * igt@sysfs_heartbeat_interval@mixed@vcs0:
    - shard-skl:          [PASS][115] -> [FAIL][116] ([i915#1731])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl1/igt@sysfs_heartbeat_interval@mixed@vcs0.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl10/igt@sysfs_heartbeat_interval@mixed@vcs0.html

  
#### Possible fixes ####

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [TIMEOUT][117] ([i915#2369] / [i915#3063]) -> [PASS][118]
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-tglb2/igt@gem_eio@unwedge-stress.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-tglb8/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_balancer@hang:
    - shard-iclb:         [INCOMPLETE][119] ([i915#1895] / [i915#3031]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-iclb4/igt@gem_exec_balancer@hang.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb3/igt@gem_exec_balancer@hang.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [SKIP][121] ([fdo#109271]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-kbl:          [FAIL][123] ([i915#2842]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl4/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_schedule@u-fairslice@rcs0:
    - shard-apl:          [DMESG-WARN][125] ([i915#1610]) -> [PASS][126]
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-apl6/igt@gem_exec_schedule@u-fairslice@rcs0.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl8/igt@gem_exec_schedule@u-fairslice@rcs0.html

  * igt@gem_exec_whisper@basic-forked-all:
    - shard-glk:          [DMESG-WARN][127] ([i915#118] / [i915#95]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-glk9/igt@gem_exec_whisper@basic-forked-all.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk1/igt@gem_exec_whisper@basic-forked-all.html

  * igt@gem_mmap_gtt@big-copy-xy:
    - shard-glk:          [FAIL][129] ([i915#307]) -> [PASS][130]
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-glk5/igt@gem_mmap_gtt@big-copy-xy.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk7/igt@gem_mmap_gtt@big-copy-xy.html

  * igt@gem_mmap_gtt@cpuset-big-copy-xy:
    - shard-iclb:         [FAIL][131] ([i915#307]) -> [PASS][132] +1 similar issue
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-iclb1/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy-xy.html

  * igt@kms_color@pipe-c-ctm-0-5:
    - shard-skl:          [DMESG-WARN][133] ([i915#1982]) -> [PASS][134]
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl8/igt@kms_color@pipe-c-ctm-0-5.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl8/igt@kms_color@pipe-c-ctm-0-5.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x21-offscreen:
    - shard-skl:          [FAIL][135] ([i915#54]) -> [PASS][136]
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-64x21-offscreen.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-64x21-offscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][137] ([i915#180]) -> [PASS][138] +1 similar issue
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-kbl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [FAIL][139] ([i915#79]) -> [PASS][140]
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-tglb:         [FAIL][141] ([i915#79]) -> [PASS][142]
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-tglb7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-tglb3/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
    - shard-skl:          [INCOMPLETE][143] ([i915#198] / [i915#1982]) -> [PASS][144]
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl2/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-apl:          [DMESG-WARN][145] ([i915#180]) -> [PASS][146] +2 similar issues
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-apl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-apl1/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-skl:          [FAIL][147] ([i915#1188]) -> [PASS][148]
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-skl5/igt@kms_hdr@bpc-switch-dpms.html
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-skl8/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         [SKIP][149] ([fdo#109441]) -> [PASS][150] +1 similar issue
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9840/shard-iclb4/igt@kms_psr@psr2_primary_page_flip.html
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html

  * igt@kms_vblank@pipe-a-ts-contin

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19768/index.html

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Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: split out stepping info to a new file

[Lucas De Marchi]

On Mon, Mar 08, 2021 at 03:56:39PM +0200, Jani Nikula wrote:
>gt/intel_workarounds.c is decidedly the wrong place for handling
>stepping info. Add new intel_step.[ch] for the data, and move the
>stepping arrays there. No functional changes.
>
>v2: Rename stepping->step
>
>Signed-off-by: Jani Nikula <jani.nikula@intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

but what branch is this supposed to go to?

Lucas De Marchi

>---
> drivers/gpu/drm/i915/Makefile               |  1 +
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 39 -----------------
> drivers/gpu/drm/i915/i915_drv.h             | 19 +--------
> drivers/gpu/drm/i915/intel_step.c           | 46 +++++++++++++++++++++
> drivers/gpu/drm/i915/intel_step.h           | 25 +++++++++++
> 5 files changed, 74 insertions(+), 56 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/intel_step.c
> create mode 100644 drivers/gpu/drm/i915/intel_step.h
>
>diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>index bc6138880c67..a9fb426d5e41 100644
>--- a/drivers/gpu/drm/i915/Makefile
>+++ b/drivers/gpu/drm/i915/Makefile
>@@ -53,6 +53,7 @@ i915-y += i915_config.o \
> 	  intel_pm.o \
> 	  intel_runtime_pm.o \
> 	  intel_sideband.o \
>+	  intel_step.o \
> 	  intel_uncore.o \
> 	  intel_wakeref.o \
> 	  vlv_suspend.o
>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>index 3b4a7da60f0b..2827d4f2e086 100644
>--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>@@ -52,45 +52,6 @@
>  * - Public functions to init or apply the given workaround type.
>  */
>
>-/*
>- * KBL revision ID ordering is bizarre; higher revision ID's map to lower
>- * steppings in some cases.  So rather than test against the revision ID
>- * directly, let's map that into our own range of increasing ID's that we
>- * can test against in a regular manner.
>- */
>-
>-const struct i915_rev_steppings kbl_revids[] = {
>-	[0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
>-	[1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
>-	[2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
>-	[3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
>-	[4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
>-	[5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
>-	[6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
>-	[7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
>-};
>-
>-const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>-	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>-	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
>-	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
>-	[3] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_D0 },
>-};
>-
>-/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
>-const struct i915_rev_steppings tgl_revid_step_tbl[] = {
>-	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
>-	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
>-};
>-
>-const struct i915_rev_steppings adls_revid_step_tbl[] = {
>-	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>-	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
>-	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
>-	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
>-	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
>-};
>-
> static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
> {
> 	wal->name = name;
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 2f511bf2bd82..02170edd6628 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -86,9 +86,10 @@
> #include "gt/uc/intel_uc.h"
>
> #include "intel_device_info.h"
>+#include "intel_memory_region.h"
> #include "intel_pch.h"
> #include "intel_runtime_pm.h"
>-#include "intel_memory_region.h"
>+#include "intel_step.h"
> #include "intel_uncore.h"
> #include "intel_wakeref.h"
> #include "intel_wopcm.h"
>@@ -1471,14 +1472,6 @@ enum {
> 	KBL_REVID_G0,
> };
>
>-struct i915_rev_steppings {
>-	u8 gt_stepping;
>-	u8 disp_stepping;
>-};
>-
>-/* Defined in intel_workarounds.c */
>-extern const struct i915_rev_steppings kbl_revids[];
>-
> #define IS_KBL_GT_REVID(dev_priv, since, until) \
> 	(IS_KABYLAKE(dev_priv) && \
> 	 kbl_revids[INTEL_REVID(dev_priv)].gt_stepping >= since && \
>@@ -1527,14 +1520,6 @@ enum {
> 	STEP_D0,
> };
>
>-#define TGL_UY_REVID_STEP_TBL_SIZE	4
>-#define TGL_REVID_STEP_TBL_SIZE		2
>-#define ADLS_REVID_STEP_TBL_SIZE	13
>-
>-extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
>-extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>-extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>-
> static inline const struct i915_rev_steppings *
> tgl_stepping_get(struct drm_i915_private *dev_priv)
> {
>diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
>new file mode 100644
>index 000000000000..e19820cbe8e3
>--- /dev/null
>+++ b/drivers/gpu/drm/i915/intel_step.c
>@@ -0,0 +1,46 @@
>+// SPDX-License-Identifier: MIT
>+/*
>+ * Copyright © 2020,2021 Intel Corporation
>+ */
>+
>+#include "i915_drv.h"
>+#include "intel_step.h"
>+
>+/*
>+ * KBL revision ID ordering is bizarre; higher revision ID's map to lower
>+ * steppings in some cases.  So rather than test against the revision ID
>+ * directly, let's map that into our own range of increasing ID's that we
>+ * can test against in a regular manner.
>+ */
>+
>+const struct i915_rev_steppings kbl_revids[] = {
>+	[0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
>+	[1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
>+	[2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
>+	[3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
>+	[4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
>+	[5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
>+	[6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
>+	[7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
>+};
>+
>+const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>+	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>+	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
>+	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
>+	[3] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_D0 },
>+};
>+
>+/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
>+const struct i915_rev_steppings tgl_revid_step_tbl[] = {
>+	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
>+	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
>+};
>+
>+const struct i915_rev_steppings adls_revid_step_tbl[] = {
>+	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>+	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
>+	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
>+	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
>+	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
>+};
>diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
>new file mode 100644
>index 000000000000..af922ae3bb4e
>--- /dev/null
>+++ b/drivers/gpu/drm/i915/intel_step.h
>@@ -0,0 +1,25 @@
>+/* SPDX-License-Identifier: MIT */
>+/*
>+ * Copyright © 2020,2021 Intel Corporation
>+ */
>+
>+#ifndef __INTEL_STEP_H__
>+#define __INTEL_STEP_H__
>+
>+#include <linux/types.h>
>+
>+struct i915_rev_steppings {
>+	u8 gt_stepping;
>+	u8 disp_stepping;
>+};
>+
>+#define TGL_UY_REVID_STEP_TBL_SIZE	4
>+#define TGL_REVID_STEP_TBL_SIZE		2
>+#define ADLS_REVID_STEP_TBL_SIZE	13
>+
>+extern const struct i915_rev_steppings kbl_revids[];
>+extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
>+extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>+extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>+
>+#endif /* __INTEL_STEP_H__ */
>-- 
>2.20.1
>
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Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: split out stepping info to a new file

[Jani Nikula]

On Mon, 08 Mar 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> On Mon, Mar 08, 2021 at 03:56:39PM +0200, Jani Nikula wrote:
>>gt/intel_workarounds.c is decidedly the wrong place for handling
>>stepping info. Add new intel_step.[ch] for the data, and move the
>>stepping arrays there. No functional changes.
>>
>>v2: Rename stepping->step
>>
>>Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
> but what branch is this supposed to go to?

drm-intel-next is the idea.

BR,
Jani.


>
> Lucas De Marchi
>
>>---
>> drivers/gpu/drm/i915/Makefile               |  1 +
>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 39 -----------------
>> drivers/gpu/drm/i915/i915_drv.h             | 19 +--------
>> drivers/gpu/drm/i915/intel_step.c           | 46 +++++++++++++++++++++
>> drivers/gpu/drm/i915/intel_step.h           | 25 +++++++++++
>> 5 files changed, 74 insertions(+), 56 deletions(-)
>> create mode 100644 drivers/gpu/drm/i915/intel_step.c
>> create mode 100644 drivers/gpu/drm/i915/intel_step.h
>>
>>diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>>index bc6138880c67..a9fb426d5e41 100644
>>--- a/drivers/gpu/drm/i915/Makefile
>>+++ b/drivers/gpu/drm/i915/Makefile
>>@@ -53,6 +53,7 @@ i915-y += i915_config.o \
>> 	  intel_pm.o \
>> 	  intel_runtime_pm.o \
>> 	  intel_sideband.o \
>>+	  intel_step.o \
>> 	  intel_uncore.o \
>> 	  intel_wakeref.o \
>> 	  vlv_suspend.o
>>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>index 3b4a7da60f0b..2827d4f2e086 100644
>>--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>@@ -52,45 +52,6 @@
>>  * - Public functions to init or apply the given workaround type.
>>  */
>>
>>-/*
>>- * KBL revision ID ordering is bizarre; higher revision ID's map to lower
>>- * steppings in some cases.  So rather than test against the revision ID
>>- * directly, let's map that into our own range of increasing ID's that we
>>- * can test against in a regular manner.
>>- */
>>-
>>-const struct i915_rev_steppings kbl_revids[] = {
>>-	[0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
>>-	[1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
>>-	[2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
>>-	[3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
>>-	[4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
>>-	[5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
>>-	[6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
>>-	[7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
>>-};
>>-
>>-const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>>-	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>>-	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
>>-	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
>>-	[3] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_D0 },
>>-};
>>-
>>-/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
>>-const struct i915_rev_steppings tgl_revid_step_tbl[] = {
>>-	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
>>-	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
>>-};
>>-
>>-const struct i915_rev_steppings adls_revid_step_tbl[] = {
>>-	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>>-	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
>>-	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
>>-	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
>>-	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
>>-};
>>-
>> static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
>> {
>> 	wal->name = name;
>>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>index 2f511bf2bd82..02170edd6628 100644
>>--- a/drivers/gpu/drm/i915/i915_drv.h
>>+++ b/drivers/gpu/drm/i915/i915_drv.h
>>@@ -86,9 +86,10 @@
>> #include "gt/uc/intel_uc.h"
>>
>> #include "intel_device_info.h"
>>+#include "intel_memory_region.h"
>> #include "intel_pch.h"
>> #include "intel_runtime_pm.h"
>>-#include "intel_memory_region.h"
>>+#include "intel_step.h"
>> #include "intel_uncore.h"
>> #include "intel_wakeref.h"
>> #include "intel_wopcm.h"
>>@@ -1471,14 +1472,6 @@ enum {
>> 	KBL_REVID_G0,
>> };
>>
>>-struct i915_rev_steppings {
>>-	u8 gt_stepping;
>>-	u8 disp_stepping;
>>-};
>>-
>>-/* Defined in intel_workarounds.c */
>>-extern const struct i915_rev_steppings kbl_revids[];
>>-
>> #define IS_KBL_GT_REVID(dev_priv, since, until) \
>> 	(IS_KABYLAKE(dev_priv) && \
>> 	 kbl_revids[INTEL_REVID(dev_priv)].gt_stepping >= since && \
>>@@ -1527,14 +1520,6 @@ enum {
>> 	STEP_D0,
>> };
>>
>>-#define TGL_UY_REVID_STEP_TBL_SIZE	4
>>-#define TGL_REVID_STEP_TBL_SIZE		2
>>-#define ADLS_REVID_STEP_TBL_SIZE	13
>>-
>>-extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
>>-extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>>-extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>>-
>> static inline const struct i915_rev_steppings *
>> tgl_stepping_get(struct drm_i915_private *dev_priv)
>> {
>>diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
>>new file mode 100644
>>index 000000000000..e19820cbe8e3
>>--- /dev/null
>>+++ b/drivers/gpu/drm/i915/intel_step.c
>>@@ -0,0 +1,46 @@
>>+// SPDX-License-Identifier: MIT
>>+/*
>>+ * Copyright © 2020,2021 Intel Corporation
>>+ */
>>+
>>+#include "i915_drv.h"
>>+#include "intel_step.h"
>>+
>>+/*
>>+ * KBL revision ID ordering is bizarre; higher revision ID's map to lower
>>+ * steppings in some cases.  So rather than test against the revision ID
>>+ * directly, let's map that into our own range of increasing ID's that we
>>+ * can test against in a regular manner.
>>+ */
>>+
>>+const struct i915_rev_steppings kbl_revids[] = {
>>+	[0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
>>+	[1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
>>+	[2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
>>+	[3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
>>+	[4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
>>+	[5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
>>+	[6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
>>+	[7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
>>+};
>>+
>>+const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>>+	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>>+	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
>>+	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
>>+	[3] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_D0 },
>>+};
>>+
>>+/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
>>+const struct i915_rev_steppings tgl_revid_step_tbl[] = {
>>+	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
>>+	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
>>+};
>>+
>>+const struct i915_rev_steppings adls_revid_step_tbl[] = {
>>+	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>>+	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
>>+	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
>>+	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
>>+	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
>>+};
>>diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
>>new file mode 100644
>>index 000000000000..af922ae3bb4e
>>--- /dev/null
>>+++ b/drivers/gpu/drm/i915/intel_step.h
>>@@ -0,0 +1,25 @@
>>+/* SPDX-License-Identifier: MIT */
>>+/*
>>+ * Copyright © 2020,2021 Intel Corporation
>>+ */
>>+
>>+#ifndef __INTEL_STEP_H__
>>+#define __INTEL_STEP_H__
>>+
>>+#include <linux/types.h>
>>+
>>+struct i915_rev_steppings {
>>+	u8 gt_stepping;
>>+	u8 disp_stepping;
>>+};
>>+
>>+#define TGL_UY_REVID_STEP_TBL_SIZE	4
>>+#define TGL_REVID_STEP_TBL_SIZE		2
>>+#define ADLS_REVID_STEP_TBL_SIZE	13
>>+
>>+extern const struct i915_rev_steppings kbl_revids[];
>>+extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
>>+extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>>+extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>>+
>>+#endif /* __INTEL_STEP_H__ */
>>-- 
>>2.20.1
>>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH v3 3/8] drm/i915: add new helpers for accessing stepping info

[Souza, Jose]

On Mon, 2021-03-08 at 15:56 +0200, Jani Nikula wrote:
> Add new runtime info field for stepping. Add new helpers for accessing
> them. As we'll be switching platforms over to the new scheme
> incrementally, check for non-initialized steppings.
> 
> In case a platform does not have separate display and gt steppings, it's
> okay to use a common shorthand. However, in this case the display
> stepping must not be initialized, and gt stepping is the single point of
> truth.
> 
> v2: Rename stepping->step
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 24 +++++++++++++++---------
>  drivers/gpu/drm/i915/intel_device_info.h |  4 ++++
>  drivers/gpu/drm/i915/intel_step.h        | 14 ++++++++++++++
>  3 files changed, 33 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 02170edd6628..a543b1ad9ba9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1274,6 +1274,21 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
>  #define IS_REVID(p, since, until) \
>  	(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
>  
> 
> +#define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.disp_stepping)
> +#define INTEL_GT_STEP(__i915) (RUNTIME_INFO(__i915)->step.gt_stepping)
> +
> +#define IS_DISPLAY_STEP(__i915, since, until) \
> +	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
> +	 INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) <= (until))
> +
> +#define IS_GT_STEP(__i915, since, until) \
> +	(drm_WARN_ON(&(__i915)->drm, INTEL_GT_STEP(__i915) == STEP_NONE), \
> +	 INTEL_GT_STEP(__i915) >= (since) && INTEL_GT_STEP(__i915) <= (until))
> +
> +#define IS_STEP(p, since, until) \
> +	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) != STEP_NONE), \

(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \

But I don't think IS_STEP() is useful, better use IS_DISPLAY/GT_STEP even for platforms with the same display and GT version.

With the change above:

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> +	 INTEL_GT_STEP(__i915, since, until))
> +
>  static __always_inline unsigned int
>  __platform_mask_index(const struct intel_runtime_info *info,
>  		      enum intel_platform p)
> @@ -1511,15 +1526,6 @@ enum {
>  #define IS_JSL_EHL_REVID(p, since, until) \
>  	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
>  
> 
> -enum {
> -	STEP_A0,
> -	STEP_A2,
> -	STEP_B0,
> -	STEP_B1,
> -	STEP_C0,
> -	STEP_D0,
> -};
> -
>  static inline const struct i915_rev_steppings *
>  tgl_stepping_get(struct drm_i915_private *dev_priv)
>  {
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index d44f64b57b7a..f84569e8e711 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -27,6 +27,8 @@
>  
> 
>  #include <uapi/drm/i915_drm.h>
>  
> 
> +#include "intel_step.h"
> +
>  #include "display/intel_display.h"
>  
> 
>  #include "gt/intel_engine_types.h"
> @@ -225,6 +227,8 @@ struct intel_runtime_info {
>  	u8 num_scalers[I915_MAX_PIPES];
>  
> 
>  	u32 rawclk_freq;
> +
> +	struct i915_rev_steppings step;
>  };
>  
> 
>  struct intel_driver_caps {
> diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
> index af922ae3bb4e..8b3ef19d935b 100644
> --- a/drivers/gpu/drm/i915/intel_step.h
> +++ b/drivers/gpu/drm/i915/intel_step.h
> @@ -22,4 +22,18 @@ extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_T
>  extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>  extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>  
> 
> +/*
> + * Symbolic steppings that do not match the hardware. These are valid both as gt
> + * and display steppings as symbolic names.
> + */
> +enum intel_step {
> +	STEP_NONE = 0,
> +	STEP_A0,
> +	STEP_A2,
> +	STEP_B0,
> +	STEP_B1,
> +	STEP_C0,
> +	STEP_D0,
> +};
> +
>  #endif /* __INTEL_STEP_H__ */

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Re: [Intel-gfx] [PATCH v3 4/8] drm/i915: switch KBL to the new stepping scheme

[Souza, Jose]

On Mon, 2021-03-08 at 15:56 +0200, Jani Nikula wrote:
> Add new symbolic names for revision ids, and convert KBL revids to use
> them via the new stepping check macros.
> 
> This also fixes theoretical out of bounds access to kbl_revids array.
> 
> v2: Rename stepping->step
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> 
> ---
> 
> The initialization sounds like an early part of
> intel_device_info_runtime_init(), and indeed touches runtime info.
> ---
>  drivers/gpu/drm/i915/gt/gen8_engine_cs.c    |  2 +-
>  drivers/gpu/drm/i915/gt/intel_workarounds.c |  6 +-
>  drivers/gpu/drm/i915/i915_drv.c             |  3 +-
>  drivers/gpu/drm/i915/i915_drv.h             | 24 ++-----
>  drivers/gpu/drm/i915/intel_pm.c             |  4 +-
>  drivers/gpu/drm/i915/intel_step.c           | 69 ++++++++++++++++++---
>  drivers/gpu/drm/i915/intel_step.h           | 11 +++-
>  7 files changed, 82 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> index cac80af7ad1c..74e8acc72da0 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> @@ -42,7 +42,7 @@ int gen8_emit_flush_rcs(struct i915_request *rq, u32 mode)
>  			vf_flush_wa = true;
>  
> 
>  		/* WaForGAMHang:kbl */
> -		if (IS_KBL_GT_REVID(rq->engine->i915, 0, KBL_REVID_B0))
> +		if (IS_KBL_GT_STEP(rq->engine->i915, 0, STEP_B0))
>  			dc_flush_wa = true;
>  	}
>  
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 2827d4f2e086..0c502a733779 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -481,7 +481,7 @@ static void kbl_ctx_workarounds_init(struct intel_engine_cs *engine,
>  	gen9_ctx_workarounds_init(engine, wal);
>  
> 
>  	/* WaToEnableHwFixForPushConstHWBug:kbl */
> -	if (IS_KBL_GT_REVID(i915, KBL_REVID_C0, REVID_FOREVER))
> +	if (IS_KBL_GT_STEP(i915, STEP_C0, STEP_FOREVER))
>  		wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
>  			     GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
>  
> 
> @@ -899,7 +899,7 @@ kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  	gen9_gt_workarounds_init(i915, wal);
>  
> 
>  	/* WaDisableDynamicCreditSharing:kbl */
> -	if (IS_KBL_GT_REVID(i915, 0, KBL_REVID_B0))
> +	if (IS_KBL_GT_STEP(i915, 0, STEP_B0))
>  		wa_write_or(wal,
>  			    GAMT_CHKN_BIT_REG,
>  			    GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
> @@ -2020,7 +2020,7 @@ xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>  	struct drm_i915_private *i915 = engine->i915;
>  
> 
>  	/* WaKBLVECSSemaphoreWaitPoll:kbl */
> -	if (IS_KBL_GT_REVID(i915, KBL_REVID_A0, KBL_REVID_E0)) {
> +	if (IS_KBL_GT_STEP(i915, STEP_A0, STEP_E0)) {
>  		wa_write(wal,
>  			 RING_SEMA_WAIT_POLL(engine->mmio_base),
>  			 1);
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 3edd5e47ad68..83214ffe6cf1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -273,7 +273,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
>  	pre |= IS_HSW_EARLY_SDV(dev_priv);
>  	pre |= IS_SKL_REVID(dev_priv, 0, SKL_REVID_F0);
>  	pre |= IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST);
> -	pre |= IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_A0);
> +	pre |= IS_KBL_GT_STEP(dev_priv, 0, STEP_A0);
>  	pre |= IS_GLK_REVID(dev_priv, 0, GLK_REVID_A2);
>  
> 
>  	if (pre) {
> @@ -307,6 +307,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
>  		return -ENODEV;
>  
> 
>  	intel_device_info_subplatform_init(dev_priv);
> +	intel_step_init(dev_priv);
>  
> 
>  	intel_uncore_mmio_debug_init_early(&dev_priv->mmio_debug);
>  	intel_uncore_init_early(&dev_priv->uncore, dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a543b1ad9ba9..7f259aab4226 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1475,26 +1475,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define IS_BXT_REVID(dev_priv, since, until) \
>  	(IS_BROXTON(dev_priv) && IS_REVID(dev_priv, since, until))
>  
> 
> -enum {
> -	KBL_REVID_A0,
> -	KBL_REVID_B0,
> -	KBL_REVID_B1,
> -	KBL_REVID_C0,
> -	KBL_REVID_D0,
> -	KBL_REVID_D1,
> -	KBL_REVID_E0,
> -	KBL_REVID_F0,
> -	KBL_REVID_G0,
> -};
> -
> -#define IS_KBL_GT_REVID(dev_priv, since, until) \
> -	(IS_KABYLAKE(dev_priv) && \
> -	 kbl_revids[INTEL_REVID(dev_priv)].gt_stepping >= since && \
> -	 kbl_revids[INTEL_REVID(dev_priv)].gt_stepping <= until)
> -#define IS_KBL_DISP_REVID(dev_priv, since, until) \
> -	(IS_KABYLAKE(dev_priv) && \
> -	 kbl_revids[INTEL_REVID(dev_priv)].disp_stepping >= since && \
> -	 kbl_revids[INTEL_REVID(dev_priv)].disp_stepping <= until)
> +#define IS_KBL_GT_STEP(dev_priv, since, until) \
> +	(IS_KABYLAKE(dev_priv) && IS_GT_STEP(dev_priv, since, until))
> +#define IS_KBL_DISPLAY_STEP(dev_priv, since, until) \
> +	(IS_KABYLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, since, until))
>  
> 
>  #define GLK_REVID_A0		0x0
>  #define GLK_REVID_A1		0x1
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 854ffecd98d9..fd8d2732f68b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7213,12 +7213,12 @@ static void kbl_init_clock_gating(struct drm_i915_private *dev_priv)
>  		   FBC_LLC_FULLY_OPEN);
>  
> 
>  	/* WaDisableSDEUnitClockGating:kbl */
> -	if (IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_B0))
> +	if (IS_KBL_GT_STEP(dev_priv, 0, STEP_B0))
>  		intel_uncore_write(&dev_priv->uncore, GEN8_UCGCTL6, intel_uncore_read(&dev_priv->uncore, GEN8_UCGCTL6) |
>  			   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
>  
> 
>  	/* WaDisableGamClockGating:kbl */
> -	if (IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_B0))
> +	if (IS_KBL_GT_STEP(dev_priv, 0, STEP_B0))
>  		intel_uncore_write(&dev_priv->uncore, GEN6_UCGCTL1, intel_uncore_read(&dev_priv->uncore, GEN6_UCGCTL1) |
>  			   GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
>  
> 
> diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
> index e19820cbe8e3..aaa9494b0f4f 100644
> --- a/drivers/gpu/drm/i915/intel_step.c
> +++ b/drivers/gpu/drm/i915/intel_step.c
> @@ -13,15 +13,17 @@
>   * can test against in a regular manner.
>   */
>  
> 
> -const struct i915_rev_steppings kbl_revids[] = {
> -	[0] = { .gt_stepping = KBL_REVID_A0, .disp_stepping = KBL_REVID_A0 },
> -	[1] = { .gt_stepping = KBL_REVID_B0, .disp_stepping = KBL_REVID_B0 },
> -	[2] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B0 },
> -	[3] = { .gt_stepping = KBL_REVID_D0, .disp_stepping = KBL_REVID_B0 },
> -	[4] = { .gt_stepping = KBL_REVID_F0, .disp_stepping = KBL_REVID_C0 },
> -	[5] = { .gt_stepping = KBL_REVID_C0, .disp_stepping = KBL_REVID_B1 },
> -	[6] = { .gt_stepping = KBL_REVID_D1, .disp_stepping = KBL_REVID_B1 },
> -	[7] = { .gt_stepping = KBL_REVID_G0, .disp_stepping = KBL_REVID_C0 },
> +
> +/* FIXME: what about REVID_E0 */
> +static const struct i915_rev_steppings kbl_revids[] = {
> +	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
> +	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
> +	[2] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
> +	[3] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_B0 },
> +	[4] = { .gt_stepping = STEP_F0, .disp_stepping = STEP_C0 },
> +	[5] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B1 },
> +	[6] = { .gt_stepping = STEP_D1, .disp_stepping = STEP_B1 },
> +	[7] = { .gt_stepping = STEP_G0, .disp_stepping = STEP_C0 },
>  };
>  
> 
>  const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
> @@ -44,3 +46,52 @@ const struct i915_rev_steppings adls_revid_step_tbl[] = {
>  	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
>  	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
>  };
> +
> +void intel_step_init(struct drm_i915_private *i915)
> +{
> +	const struct i915_rev_steppings *revids = NULL;
> +	int size = 0;
> +	int revid = INTEL_REVID(i915);
> +	struct i915_rev_steppings step = {};
> +
> +	if (IS_KABYLAKE(i915)) {
> +		revids = kbl_revids;
> +		size = ARRAY_SIZE(kbl_revids);
> +	}
> +
> +	/* Not using the stepping scheme for the platform yet. */
> +	if (!revids)
> +		return;
> +
> +	if (revid < size && revids[revid].gt_stepping != STEP_NONE) {
> +		step = revids[revid];
> +	} else {
> +		drm_dbg(&i915->drm, "Unknown revid 0x%02x\n", revid);

This should be more than dbg so we can caught this and fix it.

Other than that:

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> +
> +		/*
> +		 * If we hit a gap in the revid array, use the information for
> +		 * the next revid.
> +		 *
> +		 * This may be wrong in all sorts of ways, especially if the
> +		 * steppings in the array are not monotonically increasing, but
> +		 * it's better than defaulting to 0.
> +		 */
> +		while (revid < size && revids[revid].gt_stepping == STEP_NONE)
> +			revid++;
> +
> +		if (revid < size) {
> +			drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n",
> +				revid);
> +			step = revids[revid];
> +		} else {
> +			drm_dbg(&i915->drm, "Using future steppings\n");
> +			step.gt_stepping = STEP_FUTURE;
> +			step.disp_stepping = STEP_FUTURE;
> +		}
> +	}
> +
> +	if (drm_WARN_ON(&i915->drm, step.gt_stepping == STEP_NONE))
> +		return;
> +
> +	RUNTIME_INFO(i915)->step = step;
> +}
> diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
> index 8b3ef19d935b..b29e15f71214 100644
> --- a/drivers/gpu/drm/i915/intel_step.h
> +++ b/drivers/gpu/drm/i915/intel_step.h
> @@ -8,6 +8,8 @@
>  
> 
>  #include <linux/types.h>
>  
> 
> +struct drm_i915_private;
> +
>  struct i915_rev_steppings {
>  	u8 gt_stepping;
>  	u8 disp_stepping;
> @@ -17,7 +19,6 @@ struct i915_rev_steppings {
>  #define TGL_REVID_STEP_TBL_SIZE		2
>  #define ADLS_REVID_STEP_TBL_SIZE	13
>  
> 
> -extern const struct i915_rev_steppings kbl_revids[];
>  extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
>  extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>  extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
> @@ -34,6 +35,14 @@ enum intel_step {
>  	STEP_B1,
>  	STEP_C0,
>  	STEP_D0,
> +	STEP_D1,
> +	STEP_E0,
> +	STEP_F0,
> +	STEP_G0,
> +	STEP_FUTURE,
> +	STEP_FOREVER,
>  };
>  
> 
> +void intel_step_init(struct drm_i915_private *i915);
> +
>  #endif /* __INTEL_STEP_H__ */

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Re: [Intel-gfx] [PATCH v3 5/8] drm/i915: switch TGL and ADL to the new stepping scheme

[Souza, Jose]

On Mon, 2021-03-08 at 15:56 +0200, Jani Nikula wrote:
> This changes the way revids not present in the array are handled:
> 
> - For gaps in the array, the next present revid is used.
> 
> - For revids beyond the array, the new STEP_FUTURE is used instead of
>   the last revid in the array.
> 
> In both cases, we'll get debug logging of what's going on.
> 
> v2: Rename stepping->step
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h   | 59 ++++++++-----------------------
>  drivers/gpu/drm/i915/intel_step.c | 17 ++++++---
>  drivers/gpu/drm/i915/intel_step.h |  8 -----
>  3 files changed, 28 insertions(+), 56 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7f259aab4226..991318e90b5a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1510,44 +1510,17 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define IS_JSL_EHL_REVID(p, since, until) \
>  	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
>  
> 
> 
> 
> -static inline const struct i915_rev_steppings *
> -tgl_stepping_get(struct drm_i915_private *dev_priv)
> -{
> -	u8 revid = INTEL_REVID(dev_priv);
> -	u8 size;
> -	const struct i915_rev_steppings *revid_step_tbl;
> -
> -	if (IS_ALDERLAKE_S(dev_priv)) {
> -		revid_step_tbl = adls_revid_step_tbl;
> -		size = ARRAY_SIZE(adls_revid_step_tbl);
> -	} else if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> -		revid_step_tbl = tgl_uy_revid_step_tbl;
> -		size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
> -	} else {
> -		revid_step_tbl = tgl_revid_step_tbl;
> -		size = ARRAY_SIZE(tgl_revid_step_tbl);
> -	}
> -
> -	revid = min_t(u8, revid, size - 1);
> -
> -	return &revid_step_tbl[revid];
> -}
> -
> -#define IS_TGL_DISP_STEPPING(p, since, until) \
> -	(IS_TIGERLAKE(p) && \
> -	 tgl_stepping_get(p)->disp_stepping >= (since) && \
> -	 tgl_stepping_get(p)->disp_stepping <= (until))
> +#define IS_TGL_DISP_STEPPING(__i915, since, until) \
> +	(IS_TIGERLAKE(__i915) && \
> +	 IS_DISPLAY_STEP(__i915, since, until))
>  
> 
> 
> 
> -#define IS_TGL_UY_GT_STEPPING(p, since, until) \
> -	((IS_TGL_U(p) || IS_TGL_Y(p)) && \
> -	 tgl_stepping_get(p)->gt_stepping >= (since) && \
> -	 tgl_stepping_get(p)->gt_stepping <= (until))
> +#define IS_TGL_UY_GT_STEPPING(__i915, since, until) \
> +	((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
> +	 IS_GT_STEP(__i915, since, until))
>  
> 
> 
> 
> -#define IS_TGL_GT_STEPPING(p, since, until) \
> -	(IS_TIGERLAKE(p) && \
> -	 !(IS_TGL_U(p) || IS_TGL_Y(p)) && \
> -	 tgl_stepping_get(p)->gt_stepping >= (since) && \
> -	 tgl_stepping_get(p)->gt_stepping <= (until))
> +#define IS_TGL_GT_STEPPING(__i915, since, until) \
> +	(IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
> +	 IS_GT_STEP(__i915, since, until))
>  
> 
> 
> 
>  #define RKL_REVID_A0		0x0
>  #define RKL_REVID_B0		0x1
> @@ -1562,15 +1535,13 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
>  #define IS_DG1_REVID(p, since, until) \
>  	(IS_DG1(p) && IS_REVID(p, since, until))
>  
> 
> 
> 
> -#define IS_ADLS_DISP_STEPPING(p, since, until) \
> -	(IS_ALDERLAKE_S(p) && \
> -	 tgl_stepping_get(p)->disp_stepping >= (since) && \
> -	 tgl_stepping_get(p)->disp_stepping <= (until))
> +#define IS_ADLS_DISP_STEPPING(__i915, since, until) \
> +	(IS_ALDERLAKE_S(__i915) && \
> +	 IS_DISPLAY_STEP(__i915, since, until))
>  
> 
> 
> 
> -#define IS_ADLS_GT_STEPPING(p, since, until) \
> -	(IS_ALDERLAKE_S(p) && \
> -	 tgl_stepping_get(p)->gt_stepping >= (since) && \
> -	 tgl_stepping_get(p)->gt_stepping <= (until))
> +#define IS_ADLS_GT_STEPPING(__i915, since, until) \
> +	(IS_ALDERLAKE_S(__i915) && \
> +	 IS_GT_STEP(__i915, since, until))
>  
> 
> 
> 
>  #define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
>  #define IS_GEN9_LP(dev_priv)	(IS_GEN(dev_priv, 9) && IS_LP(dev_priv))
> diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
> index aaa9494b0f4f..4593eba24a7d 100644
> --- a/drivers/gpu/drm/i915/intel_step.c
> +++ b/drivers/gpu/drm/i915/intel_step.c
> @@ -26,7 +26,7 @@ static const struct i915_rev_steppings kbl_revids[] = {
>  	[7] = { .gt_stepping = STEP_G0, .disp_stepping = STEP_C0 },
>  };
>  
> 
> 
> 
> -const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
> +static const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>  	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>  	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
>  	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
> @@ -34,12 +34,12 @@ const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>  };
>  
> 
> 
> 
>  /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
> -const struct i915_rev_steppings tgl_revid_step_tbl[] = {
> +static const struct i915_rev_steppings tgl_revid_step_tbl[] = {
>  	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
>  	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
>  };
>  
> 
> 
> 
> -const struct i915_rev_steppings adls_revid_step_tbl[] = {
> +static const struct i915_rev_steppings adls_revid_step_tbl[] = {
>  	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>  	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
>  	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
> @@ -54,7 +54,16 @@ void intel_step_init(struct drm_i915_private *i915)
>  	int revid = INTEL_REVID(i915);
>  	struct i915_rev_steppings step = {};
>  
> 
> 
> 
> -	if (IS_KABYLAKE(i915)) {
> +	if (IS_ALDERLAKE_S(i915)) {
> +		revids = adls_revid_step_tbl;
> +		size = ARRAY_SIZE(adls_revid_step_tbl);
> +	} else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
> +		revids = tgl_uy_revid_step_tbl;
> +		size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
> +	} else if (IS_TIGERLAKE(i915)) {
> +		revids = tgl_revid_step_tbl;
> +		size = ARRAY_SIZE(tgl_revid_step_tbl);
> +	} else if (IS_KABYLAKE(i915)) {
>  		revids = kbl_revids;
>  		size = ARRAY_SIZE(kbl_revids);
>  	}
> diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
> index b29e15f71214..5cc5601794f0 100644
> --- a/drivers/gpu/drm/i915/intel_step.h
> +++ b/drivers/gpu/drm/i915/intel_step.h
> @@ -15,14 +15,6 @@ struct i915_rev_steppings {
>  	u8 disp_stepping;
>  };
>  
> 
> 
> 
> -#define TGL_UY_REVID_STEP_TBL_SIZE	4
> -#define TGL_REVID_STEP_TBL_SIZE		2
> -#define ADLS_REVID_STEP_TBL_SIZE	13
> -
> -extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
> -extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
> -extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
> -
>  /*
>   * Symbolic steppings that do not match the hardware. These are valid both as gt
>   * and display steppings as symbolic names.

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Re: [Intel-gfx] [PATCH v3 8/8] drm/i915: rename i915_rev_steppings->intel_step_info

[Souza, Jose]

On Mon, 2021-03-08 at 15:56 +0200, Jani Nikula wrote:
> Matter of taste. Match the prefix for everything else related to
> steppings. No functional changes.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
For the renaming patches, 6, 7 and 8 I'm also fine with the current naming up to you.


> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_device_info.h |  2 +-
>  drivers/gpu/drm/i915/intel_step.c        | 12 ++++++------
>  drivers/gpu/drm/i915/intel_step.h        |  2 +-
>  3 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index f84569e8e711..1bcae2a8c79b 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -228,7 +228,7 @@ struct intel_runtime_info {
>  
> 
> 
> 
>  	u32 rawclk_freq;
>  
> 
> 
> 
> -	struct i915_rev_steppings step;
> +	struct intel_step_info step;
>  };
>  
> 
> 
> 
>  struct intel_driver_caps {
> diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
> index 9df2dd264841..914a5de4346e 100644
> --- a/drivers/gpu/drm/i915/intel_step.c
> +++ b/drivers/gpu/drm/i915/intel_step.c
> @@ -15,7 +15,7 @@
>  
> 
> 
> 
>  
> 
> 
> 
>  /* FIXME: what about REVID_E0 */
> -static const struct i915_rev_steppings kbl_revids[] = {
> +static const struct intel_step_info kbl_revids[] = {
>  	[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
>  	[1] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
>  	[2] = { .gt_step = STEP_C0, .display_step = STEP_B0 },
> @@ -26,7 +26,7 @@ static const struct i915_rev_steppings kbl_revids[] = {
>  	[7] = { .gt_step = STEP_G0, .display_step = STEP_C0 },
>  };
>  
> 
> 
> 
> -static const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
> +static const struct intel_step_info tgl_uy_revid_step_tbl[] = {
>  	[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
>  	[1] = { .gt_step = STEP_B0, .display_step = STEP_C0 },
>  	[2] = { .gt_step = STEP_B1, .display_step = STEP_C0 },
> @@ -34,12 +34,12 @@ static const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>  };
>  
> 
> 
> 
>  /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
> -static const struct i915_rev_steppings tgl_revid_step_tbl[] = {
> +static const struct intel_step_info tgl_revid_step_tbl[] = {
>  	[0] = { .gt_step = STEP_A0, .display_step = STEP_B0 },
>  	[1] = { .gt_step = STEP_B0, .display_step = STEP_D0 },
>  };
>  
> 
> 
> 
> -static const struct i915_rev_steppings adls_revid_step_tbl[] = {
> +static const struct intel_step_info adls_revid_step_tbl[] = {
>  	[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
>  	[0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 },
>  	[0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
> @@ -49,10 +49,10 @@ static const struct i915_rev_steppings adls_revid_step_tbl[] = {
>  
> 
> 
> 
>  void intel_step_init(struct drm_i915_private *i915)
>  {
> -	const struct i915_rev_steppings *revids = NULL;
> +	const struct intel_step_info *revids = NULL;
>  	int size = 0;
>  	int revid = INTEL_REVID(i915);
> -	struct i915_rev_steppings step = {};
> +	struct intel_step_info step = {};
>  
> 
> 
> 
>  	if (IS_ALDERLAKE_S(i915)) {
>  		revids = adls_revid_step_tbl;
> diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
> index 102fd6a26893..958a8bb5d677 100644
> --- a/drivers/gpu/drm/i915/intel_step.h
> +++ b/drivers/gpu/drm/i915/intel_step.h
> @@ -10,7 +10,7 @@
>  
> 
> 
> 
>  struct drm_i915_private;
>  
> 
> 
> 
> -struct i915_rev_steppings {
> +struct intel_step_info {
>  	u8 gt_step;
>  	u8 display_step;
>  };

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Re: [Intel-gfx] [PATCH v3 3/8] drm/i915: add new helpers for accessing stepping info

[Jani Nikula]

On Thu, 25 Mar 2021, "Souza, Jose" <jose.souza@intel.com> wrote:
> On Mon, 2021-03-08 at 15:56 +0200, Jani Nikula wrote:
>> Add new runtime info field for stepping. Add new helpers for accessing
>> them. As we'll be switching platforms over to the new scheme
>> incrementally, check for non-initialized steppings.
>> 
>> In case a platform does not have separate display and gt steppings, it's
>> okay to use a common shorthand. However, in this case the display
>> stepping must not be initialized, and gt stepping is the single point of
>> truth.
>> 
>> v2: Rename stepping->step
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h          | 24 +++++++++++++++---------
>>  drivers/gpu/drm/i915/intel_device_info.h |  4 ++++
>>  drivers/gpu/drm/i915/intel_step.h        | 14 ++++++++++++++
>>  3 files changed, 33 insertions(+), 9 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 02170edd6628..a543b1ad9ba9 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1274,6 +1274,21 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
>>  #define IS_REVID(p, since, until) \
>>  	(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
>>  
>> 
>> +#define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.disp_stepping)
>> +#define INTEL_GT_STEP(__i915) (RUNTIME_INFO(__i915)->step.gt_stepping)
>> +
>> +#define IS_DISPLAY_STEP(__i915, since, until) \
>> +	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
>> +	 INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) <= (until))
>> +
>> +#define IS_GT_STEP(__i915, since, until) \
>> +	(drm_WARN_ON(&(__i915)->drm, INTEL_GT_STEP(__i915) == STEP_NONE), \
>> +	 INTEL_GT_STEP(__i915) >= (since) && INTEL_GT_STEP(__i915) <= (until))
>> +
>> +#define IS_STEP(p, since, until) \
>> +	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) != STEP_NONE), \
>
> (drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
>
> But I don't think IS_STEP() is useful, better use IS_DISPLAY/GT_STEP even for platforms with the same display and GT version.

The INTEL_DISPLAY_STEP(__i915) != STEP_NONE check is as I intended, not
a mistake.

The idea is that you'd only be able to use IS_STEP() on platforms where
display step is not set, i.e. where the versions are the same for
display and GT.

I don't actually add users for this one, though, and we may indeed be
better off just throwing it out and always using the specific GT/display
macros.

BR,
Jani.


>
> With the change above:
>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
>> +	 INTEL_GT_STEP(__i915, since, until))
>> +
>>  static __always_inline unsigned int
>>  __platform_mask_index(const struct intel_runtime_info *info,
>>  		      enum intel_platform p)
>> @@ -1511,15 +1526,6 @@ enum {
>>  #define IS_JSL_EHL_REVID(p, since, until) \
>>  	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
>>  
>> 
>> -enum {
>> -	STEP_A0,
>> -	STEP_A2,
>> -	STEP_B0,
>> -	STEP_B1,
>> -	STEP_C0,
>> -	STEP_D0,
>> -};
>> -
>>  static inline const struct i915_rev_steppings *
>>  tgl_stepping_get(struct drm_i915_private *dev_priv)
>>  {
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>> index d44f64b57b7a..f84569e8e711 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.h
>> +++ b/drivers/gpu/drm/i915/intel_device_info.h
>> @@ -27,6 +27,8 @@
>>  
>> 
>>  #include <uapi/drm/i915_drm.h>
>>  
>> 
>> +#include "intel_step.h"
>> +
>>  #include "display/intel_display.h"
>>  
>> 
>>  #include "gt/intel_engine_types.h"
>> @@ -225,6 +227,8 @@ struct intel_runtime_info {
>>  	u8 num_scalers[I915_MAX_PIPES];
>>  
>> 
>>  	u32 rawclk_freq;
>> +
>> +	struct i915_rev_steppings step;
>>  };
>>  
>> 
>>  struct intel_driver_caps {
>> diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
>> index af922ae3bb4e..8b3ef19d935b 100644
>> --- a/drivers/gpu/drm/i915/intel_step.h
>> +++ b/drivers/gpu/drm/i915/intel_step.h
>> @@ -22,4 +22,18 @@ extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_T
>>  extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>>  extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>>  
>> 
>> +/*
>> + * Symbolic steppings that do not match the hardware. These are valid both as gt
>> + * and display steppings as symbolic names.
>> + */
>> +enum intel_step {
>> +	STEP_NONE = 0,
>> +	STEP_A0,
>> +	STEP_A2,
>> +	STEP_B0,
>> +	STEP_B1,
>> +	STEP_C0,
>> +	STEP_D0,
>> +};
>> +
>>  #endif /* __INTEL_STEP_H__ */
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH v3 3/8] drm/i915: add new helpers for accessing stepping info

[Jani Nikula]

On Fri, 26 Mar 2021, Jani Nikula <jani.nikula@intel.com> wrote:
> On Thu, 25 Mar 2021, "Souza, Jose" <jose.souza@intel.com> wrote:
>> On Mon, 2021-03-08 at 15:56 +0200, Jani Nikula wrote:
>>> Add new runtime info field for stepping. Add new helpers for accessing
>>> them. As we'll be switching platforms over to the new scheme
>>> incrementally, check for non-initialized steppings.
>>> 
>>> In case a platform does not have separate display and gt steppings, it's
>>> okay to use a common shorthand. However, in this case the display
>>> stepping must not be initialized, and gt stepping is the single point of
>>> truth.
>>> 
>>> v2: Rename stepping->step
>>> 
>>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>>> ---
>>>  drivers/gpu/drm/i915/i915_drv.h          | 24 +++++++++++++++---------
>>>  drivers/gpu/drm/i915/intel_device_info.h |  4 ++++
>>>  drivers/gpu/drm/i915/intel_step.h        | 14 ++++++++++++++
>>>  3 files changed, 33 insertions(+), 9 deletions(-)
>>> 
>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>> index 02170edd6628..a543b1ad9ba9 100644
>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>> @@ -1274,6 +1274,21 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
>>>  #define IS_REVID(p, since, until) \
>>>  	(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
>>>  
>>> 
>>> +#define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.disp_stepping)
>>> +#define INTEL_GT_STEP(__i915) (RUNTIME_INFO(__i915)->step.gt_stepping)
>>> +
>>> +#define IS_DISPLAY_STEP(__i915, since, until) \
>>> +	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
>>> +	 INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) <= (until))
>>> +
>>> +#define IS_GT_STEP(__i915, since, until) \
>>> +	(drm_WARN_ON(&(__i915)->drm, INTEL_GT_STEP(__i915) == STEP_NONE), \
>>> +	 INTEL_GT_STEP(__i915) >= (since) && INTEL_GT_STEP(__i915) <= (until))
>>> +
>>> +#define IS_STEP(p, since, until) \
>>> +	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) != STEP_NONE), \
>>
>> (drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
>>
>> But I don't think IS_STEP() is useful, better use IS_DISPLAY/GT_STEP even for platforms with the same display and GT version.
>
> The INTEL_DISPLAY_STEP(__i915) != STEP_NONE check is as I intended, not
> a mistake.
>
> The idea is that you'd only be able to use IS_STEP() on platforms where
> display step is not set, i.e. where the versions are the same for
> display and GT.
>
> I don't actually add users for this one, though, and we may indeed be
> better off just throwing it out and always using the specific GT/display
> macros.

Sent next version with IS_STEP() removed, and presumed the rb holds with
that.

Thanks,
Jani.

>
> BR,
> Jani.
>
>
>>
>> With the change above:
>>
>> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>>
>>> +	 INTEL_GT_STEP(__i915, since, until))
>>> +
>>>  static __always_inline unsigned int
>>>  __platform_mask_index(const struct intel_runtime_info *info,
>>>  		      enum intel_platform p)
>>> @@ -1511,15 +1526,6 @@ enum {
>>>  #define IS_JSL_EHL_REVID(p, since, until) \
>>>  	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
>>>  
>>> 
>>> -enum {
>>> -	STEP_A0,
>>> -	STEP_A2,
>>> -	STEP_B0,
>>> -	STEP_B1,
>>> -	STEP_C0,
>>> -	STEP_D0,
>>> -};
>>> -
>>>  static inline const struct i915_rev_steppings *
>>>  tgl_stepping_get(struct drm_i915_private *dev_priv)
>>>  {
>>> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>>> index d44f64b57b7a..f84569e8e711 100644
>>> --- a/drivers/gpu/drm/i915/intel_device_info.h
>>> +++ b/drivers/gpu/drm/i915/intel_device_info.h
>>> @@ -27,6 +27,8 @@
>>>  
>>> 
>>>  #include <uapi/drm/i915_drm.h>
>>>  
>>> 
>>> +#include "intel_step.h"
>>> +
>>>  #include "display/intel_display.h"
>>>  
>>> 
>>>  #include "gt/intel_engine_types.h"
>>> @@ -225,6 +227,8 @@ struct intel_runtime_info {
>>>  	u8 num_scalers[I915_MAX_PIPES];
>>>  
>>> 
>>>  	u32 rawclk_freq;
>>> +
>>> +	struct i915_rev_steppings step;
>>>  };
>>>  
>>> 
>>>  struct intel_driver_caps {
>>> diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
>>> index af922ae3bb4e..8b3ef19d935b 100644
>>> --- a/drivers/gpu/drm/i915/intel_step.h
>>> +++ b/drivers/gpu/drm/i915/intel_step.h
>>> @@ -22,4 +22,18 @@ extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_T
>>>  extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>>>  extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>>>  
>>> 
>>> +/*
>>> + * Symbolic steppings that do not match the hardware. These are valid both as gt
>>> + * and display steppings as symbolic names.
>>> + */
>>> +enum intel_step {
>>> +	STEP_NONE = 0,
>>> +	STEP_A0,
>>> +	STEP_A2,
>>> +	STEP_B0,
>>> +	STEP_B1,
>>> +	STEP_C0,
>>> +	STEP_D0,
>>> +};
>>> +
>>>  #endif /* __INTEL_STEP_H__ */
>>
>> _______________________________________________
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>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center
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