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From: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<drinkcat@chromium.org>
Cc: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v6 5/5] arm64: dts: mt8192: add pwrap node
Date: Fri, 12 Mar 2021 23:34:46 +0800	[thread overview]
Message-ID: <1615563286-22126-6-git-send-email-hsin-hsiung.wang@mediatek.com> (raw)
In-Reply-To: <1615563286-22126-1-git-send-email-hsin-hsiung.wang@mediatek.com>

Add pwrap node to SOC MT8192.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
changes since v5:
- no change.
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 9757138a8bbd..fcd6b899d7f9 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -291,6 +291,18 @@
 			clock-names = "clk13m";
 		};
 
+		pwrap: pwrap@10026000 {
+			compatible = "mediatek,mt6873-pwrap";
+			reg = <0 0x10026000 0 0x1000>;
+			reg-names = "pwrap";
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&infracfg CLK_INFRA_PMIC_AP>,
+				 <&infracfg CLK_INFRA_PMIC_TMR>;
+			clock-names = "spi", "wrap";
+			assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
+			assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
+		};
+
 		uart0: serial@11002000 {
 			compatible = "mediatek,mt8192-uart",
 				     "mediatek,mt6577-uart";
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<drinkcat@chromium.org>
Cc: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	 <srv_heupstream@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v6 5/5] arm64: dts: mt8192: add pwrap node
Date: Fri, 12 Mar 2021 23:34:46 +0800	[thread overview]
Message-ID: <1615563286-22126-6-git-send-email-hsin-hsiung.wang@mediatek.com> (raw)
In-Reply-To: <1615563286-22126-1-git-send-email-hsin-hsiung.wang@mediatek.com>

Add pwrap node to SOC MT8192.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
changes since v5:
- no change.
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 9757138a8bbd..fcd6b899d7f9 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -291,6 +291,18 @@
 			clock-names = "clk13m";
 		};
 
+		pwrap: pwrap@10026000 {
+			compatible = "mediatek,mt6873-pwrap";
+			reg = <0 0x10026000 0 0x1000>;
+			reg-names = "pwrap";
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&infracfg CLK_INFRA_PMIC_AP>,
+				 <&infracfg CLK_INFRA_PMIC_TMR>;
+			clock-names = "spi", "wrap";
+			assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
+			assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
+		};
+
 		uart0: serial@11002000 {
 			compatible = "mediatek,mt8192-uart",
 				     "mediatek,mt6577-uart";
-- 
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<drinkcat@chromium.org>
Cc: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	 <srv_heupstream@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v6 5/5] arm64: dts: mt8192: add pwrap node
Date: Fri, 12 Mar 2021 23:34:46 +0800	[thread overview]
Message-ID: <1615563286-22126-6-git-send-email-hsin-hsiung.wang@mediatek.com> (raw)
In-Reply-To: <1615563286-22126-1-git-send-email-hsin-hsiung.wang@mediatek.com>

Add pwrap node to SOC MT8192.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
changes since v5:
- no change.
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 9757138a8bbd..fcd6b899d7f9 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -291,6 +291,18 @@
 			clock-names = "clk13m";
 		};
 
+		pwrap: pwrap@10026000 {
+			compatible = "mediatek,mt6873-pwrap";
+			reg = <0 0x10026000 0 0x1000>;
+			reg-names = "pwrap";
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&infracfg CLK_INFRA_PMIC_AP>,
+				 <&infracfg CLK_INFRA_PMIC_TMR>;
+			clock-names = "spi", "wrap";
+			assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
+			assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
+		};
+
 		uart0: serial@11002000 {
 			compatible = "mediatek,mt8192-uart",
 				     "mediatek,mt6577-uart";
-- 
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-03-12 15:36 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-12 15:34 [PATCH v6 0/5] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC Hsin-Hsiung Wang
2021-03-12 15:34 ` Hsin-Hsiung Wang
2021-03-12 15:34 ` Hsin-Hsiung Wang
2021-03-12 15:34 ` [PATCH v6 1/5] soc: mediatek: pwrap: use BIT() macro Hsin-Hsiung Wang
2021-03-12 15:34   ` Hsin-Hsiung Wang
2021-03-12 15:34   ` Hsin-Hsiung Wang
2021-03-12 15:34 ` [PATCH v6 2/5] soc: mediatek: pwrap: add arbiter capability Hsin-Hsiung Wang
2021-03-12 15:34   ` Hsin-Hsiung Wang
2021-03-12 15:34   ` Hsin-Hsiung Wang
2021-03-12 15:34 ` [PATCH v6 3/5] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap Hsin-Hsiung Wang
2021-03-12 15:34   ` Hsin-Hsiung Wang
2021-03-12 15:34   ` Hsin-Hsiung Wang
2021-03-12 15:34 ` [PATCH v6 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs Hsin-Hsiung Wang
2021-03-12 15:34   ` Hsin-Hsiung Wang
2021-03-12 15:34   ` Hsin-Hsiung Wang
2021-03-12 15:34 ` Hsin-Hsiung Wang [this message]
2021-03-12 15:34   ` [PATCH v6 5/5] arm64: dts: mt8192: add pwrap node Hsin-Hsiung Wang
2021-03-12 15:34   ` Hsin-Hsiung Wang
2021-03-12 19:15   ` kernel test robot
2021-03-12 19:15     ` kernel test robot
2021-03-12 19:15     ` kernel test robot
2021-03-12 19:15     ` kernel test robot
2021-03-30 10:34 ` [PATCH v6 0/5] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC Matthias Brugger
2021-03-30 10:34   ` Matthias Brugger
2021-03-30 10:34   ` Matthias Brugger

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