* [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding
@ 2021-03-25 21:47 Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 01/25] drm/i915: Fix rotation setup during plane HW readout Imre Deak
` (40 more replies)
0 siblings, 41 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
This is v2 of [1], addressing Ville's review comments. A bigger change
is unifying the FB and plane view calculation more in patch 16-18.
Besides these patch 15 also needs an r-b.
v1 triggered a problem in igt/kms_busy, kms_cursor_legacy, which should
be now fixed by [2].
[1] https://patchwork.freedesktop.org/series/87859/
[2] https://patchwork.freedesktop.org/series/88300/
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Imre Deak (25):
drm/i915: Fix rotation setup during plane HW readout
drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()
drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()
drm/i915: Make sure i915_ggtt_view is inited when creating an FB
drm/i915/selftest: Make sure to init i915_ggtt_view in
igt_vma_rotate_remap()
drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h
drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c
drm/i915/intel_fb: Pull is_surface_linear() from
intel_display.c/skl_universal_plane.c
drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c
drm/i915/intel_fb: Pull FB plane functions from intel_display.c
drm/i915/intel_fb: Unexport intel_fb_check_stride()
drm/i915/intel_fb: s/dev_priv/i915/
drm/i915/intel_fb: Factor out convert_plane_offset_to_xy()
drm/i915/intel_fb: Factor out calc_plane_aligned_offset()
drm/i915/intel_fb: Factor out calc_plane_normal_size()
drm/i915: Unify the FB and plane state view information into one
struct
drm/i915: Store the normal view FB pitch in FB's intel_fb_view
drm/i915: Simplify copying the FB view state to the plane state
drm/i915/intel_fb: Factor out calc_plane_remap_info()
drm/i915: Shrink the size of intel_remapped_plane_info struct
drm/i915/selftest: Unify use of intel_remapped_plane_info in
igt_vma_rotate_remap()
drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct
drm/i915: Add support for FBs requiring a POT stride alignment
drm/i915/selftest: Add remap/rotate vma subtests when
dst_stride!=width/height
drm/i915: For-CI: Force remapping the FB with a POT aligned stride
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/i9xx_plane.c | 21 +-
drivers/gpu/drm/i915/display/intel_cursor.c | 15 +-
drivers/gpu/drm/i915/display/intel_display.c | 861 +---------------
drivers/gpu/drm/i915/display/intel_display.h | 13 -
.../drm/i915/display/intel_display_types.h | 81 +-
drivers/gpu/drm/i915/display/intel_fb.c | 973 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_fb.h | 58 ++
drivers/gpu/drm/i915/display/intel_fbc.c | 6 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 58 +-
drivers/gpu/drm/i915/display/intel_sprite.h | 1 -
.../drm/i915/display/skl_universal_plane.c | 112 +-
.../drm/i915/display/skl_universal_plane.h | 2 -
drivers/gpu/drm/i915/gt/intel_ggtt.c | 58 +-
drivers/gpu/drm/i915/i915_debugfs.c | 16 +-
drivers/gpu/drm/i915/i915_vma_types.h | 12 +-
drivers/gpu/drm/i915/selftests/i915_vma.c | 217 ++--
17 files changed, 1382 insertions(+), 1123 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_fb.c
create mode 100644 drivers/gpu/drm/i915/display/intel_fb.h
--
2.25.1
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^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 01/25] drm/i915: Fix rotation setup during plane HW readout
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 02/25] drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt() Imre Deak
` (39 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
The HW plane state is cleared and inited after we store the rotation to
it, so store it instead to the uapi state to match what we do with all
other plane state until intel_plane_copy_uapi_to_hw_state() is called.
Rotation for initial FBs is not supported atm, but let's still fix the
plane state setup here.
While at it remove the redundant intel_state->uapi.src/dst init, which
will be done in intel_plane_copy_uapi_to_hw_state().
v2: Remove redundant intel_state->uapi.src/dst init. (Ville)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 17490d29dc133..e345e645a156e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2500,11 +2500,11 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
return;
valid_fb:
- intel_state->hw.rotation = plane_config->rotation;
+ plane_state->rotation = plane_config->rotation;
intel_fill_fb_ggtt_view(&intel_state->view, fb,
- intel_state->hw.rotation);
+ plane_state->rotation);
intel_state->color_plane[0].stride =
- intel_fb_pitch(fb, 0, intel_state->hw.rotation);
+ intel_fb_pitch(fb, 0, plane_state->rotation);
__i915_vma_pin(vma);
intel_state->vma = i915_vma_get(vma);
@@ -2522,9 +2522,6 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
plane_state->crtc_w = fb->width;
plane_state->crtc_h = fb->height;
- intel_state->uapi.src = drm_plane_state_src(plane_state);
- intel_state->uapi.dst = drm_plane_state_dest(plane_state);
-
if (plane_config->tiling)
dev_priv->preserve_bios_swizzle = true;
--
2.25.1
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^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 02/25] drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 01/25] drm/i915: Fix rotation setup during plane HW readout Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 03/25] drm/i915/selftest: Fix debug message " Imre Deak
` (38 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
An inner scope version of err shadows the variable in the outer scope,
and err doesn't get set after a failure, fix these.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/selftests/i915_vma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 1b6125e4c1ac6..35481cfbb6353 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -890,7 +890,6 @@ static int igt_vma_remapped_gtt(void *arg)
struct i915_vma *vma;
u32 __iomem *map;
unsigned int x, y;
- int err;
i915_gem_object_lock(obj, NULL);
err = i915_gem_object_set_to_gtt_domain(obj, true);
@@ -962,6 +961,7 @@ static int igt_vma_remapped_gtt(void *arg)
*t == I915_GGTT_VIEW_ROTATED ? "Rotated" : "Remapped",
val, exp);
i915_vma_unpin_iomap(vma);
+ err = -EINVAL;
goto out;
}
}
--
2.25.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 03/25] drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 01/25] drm/i915: Fix rotation setup during plane HW readout Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 02/25] drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt() Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 04/25] drm/i915: Make sure i915_ggtt_view is inited when creating an FB Imre Deak
` (37 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
The expected/found values were swapped in a debug message, fix this up.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/selftests/i915_vma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 35481cfbb6353..23f6a212a391d 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -959,7 +959,7 @@ static int igt_vma_remapped_gtt(void *arg)
if (val != exp) {
pr_err("%s VMA write test failed, expected 0x%x, found 0x%x\n",
*t == I915_GGTT_VIEW_ROTATED ? "Rotated" : "Remapped",
- val, exp);
+ exp, val);
i915_vma_unpin_iomap(vma);
err = -EINVAL;
goto out;
--
2.25.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 04/25] drm/i915: Make sure i915_ggtt_view is inited when creating an FB
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (2 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 03/25] drm/i915/selftest: Fix debug message " Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 05/25] drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap() Imre Deak
` (36 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
This probably doesn't cause an issue, since the code checks the view
type dependent size of the views before comparing them, but let's follow
the practice to bzero the whole struct when initializing it.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e345e645a156e..c06f51cf3d02d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1005,6 +1005,8 @@ intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
const struct drm_framebuffer *fb,
unsigned int rotation)
{
+ memset(view, 0, sizeof(*view));
+
view->type = I915_GGTT_VIEW_NORMAL;
if (drm_rotation_90_or_270(rotation)) {
view->type = I915_GGTT_VIEW_ROTATED;
--
2.25.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 05/25] drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap()
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (3 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 04/25] drm/i915: Make sure i915_ggtt_view is inited when creating an FB Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 06/25] drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h Imre Deak
` (35 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
This probably doesn't cause an issue, since the code checks the view
type dependent size of the views before comparing them, but let's follow
the practice to bzero the whole struct when initializing it.
v2: Use {} instead of { } struct intializer. (Ville)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/selftests/i915_vma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 23f6a212a391d..9dd6799105e66 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -515,7 +515,7 @@ static int igt_vma_rotate_remap(void *arg)
for (t = types; *t; t++) {
for (a = planes; a->width; a++) {
for (b = planes + ARRAY_SIZE(planes); b-- != planes; ) {
- struct i915_ggtt_view view;
+ struct i915_ggtt_view view = {};
unsigned int n, max_offset;
max_offset = max(a->stride * a->height,
--
2.25.1
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^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 06/25] drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (4 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 05/25] drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap() Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 07/25] drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c Imre Deak
` (34 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
Start collecting all the FB plane related functions into a new intel_fb.c
file.
v2: Drop display/ part of header includes. (Ville)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 1 +
.../drm/i915/display/intel_display_types.h | 19 -------------
drivers/gpu/drm/i915/display/intel_fb.c | 28 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_fb.h | 17 +++++++++++
.../drm/i915/display/skl_universal_plane.c | 1 +
6 files changed, 48 insertions(+), 19 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_fb.c
create mode 100644 drivers/gpu/drm/i915/display/intel_fb.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 14f1ab399ad08..fcaadd52813e3 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -208,6 +208,7 @@ i915-y += \
display/intel_dpll.o \
display/intel_dpll_mgr.o \
display/intel_dsb.o \
+ display/intel_fb.o \
display/intel_fbc.o \
display/intel_fdi.o \
display/intel_fifo_underrun.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c06f51cf3d02d..d8770e471dcc4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -54,6 +54,7 @@
#include "display/intel_dpll_mgr.h"
#include "display/intel_dsi.h"
#include "display/intel_dvo.h"
+#include "display/intel_fb.h"
#include "display/intel_gmbus.h"
#include "display/intel_hdmi.h"
#include "display/intel_lvds.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 946e030313a86..80983cfe9d3b0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1995,14 +1995,6 @@ static inline bool is_ccs_modifier(u64 modifier)
modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
}
-static inline bool is_ccs_plane(const struct drm_framebuffer *fb, int plane)
-{
- if (!is_ccs_modifier(fb->modifier))
- return false;
-
- return plane >= fb->format->num_planes / 2;
-}
-
static inline bool is_gen12_ccs_modifier(u64 modifier)
{
return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
@@ -2010,15 +2002,4 @@ static inline bool is_gen12_ccs_modifier(u64 modifier)
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
}
-static inline bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane)
-{
- return is_gen12_ccs_modifier(fb->modifier) && is_ccs_plane(fb, plane);
-}
-
-static inline bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane)
-{
- return fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC &&
- plane == 2;
-}
-
#endif /* __INTEL_DISPLAY_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
new file mode 100644
index 0000000000000..ff9094793ee8e
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#include <drm/drm_framebuffer.h>
+
+#include "intel_display_types.h"
+#include "intel_fb.h"
+
+bool is_ccs_plane(const struct drm_framebuffer *fb, int plane)
+{
+ if (!is_ccs_modifier(fb->modifier))
+ return false;
+
+ return plane >= fb->format->num_planes / 2;
+}
+
+bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane)
+{
+ return is_gen12_ccs_modifier(fb->modifier) && is_ccs_plane(fb, plane);
+}
+
+bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane)
+{
+ return fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC &&
+ plane == 2;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
new file mode 100644
index 0000000000000..64e6a25213203
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2020-2021 Intel Corporation
+ */
+
+#ifndef __INTEL_FB_H__
+#define __INTEL_FB_H__
+
+#include <linux/types.h>
+
+struct drm_framebuffer;
+
+bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
+bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
+bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
+
+#endif /* __INTEL_FB_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index c6d7b6c054b56..94e95bf14e889 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -11,6 +11,7 @@
#include "i915_drv.h"
#include "intel_atomic_plane.h"
#include "intel_display_types.h"
+#include "intel_fb.h"
#include "intel_pm.h"
#include "intel_psr.h"
#include "intel_sprite.h"
--
2.25.1
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^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 07/25] drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (5 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 06/25] drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 08/25] drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c Imre Deak
` (33 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
Move the FB plane related functions from skl_universal_plane.c to
intel_fb.c.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 32 +++++++++++++++++
drivers/gpu/drm/i915/display/intel_fb.h | 4 +++
.../drm/i915/display/skl_universal_plane.c | 34 -------------------
.../drm/i915/display/skl_universal_plane.h | 2 --
4 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index ff9094793ee8e..40d56eb1914ee 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -26,3 +26,35 @@ bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane)
return fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC &&
plane == 2;
}
+
+int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane)
+{
+ drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
+ (main_plane && main_plane >= fb->format->num_planes / 2));
+
+ return fb->format->num_planes / 2 + main_plane;
+}
+
+int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane)
+{
+ drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
+ ccs_plane < fb->format->num_planes / 2);
+
+ if (is_gen12_ccs_cc_plane(fb, ccs_plane))
+ return 0;
+
+ return ccs_plane - fb->format->num_planes / 2;
+}
+
+int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
+{
+ struct drm_i915_private *i915 = to_i915(fb->dev);
+
+ if (is_ccs_modifier(fb->modifier))
+ return main_to_ccs_plane(fb, main_plane);
+ else if (DISPLAY_VER(i915) < 11 &&
+ intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
+ return 1;
+ else
+ return 0;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index 64e6a25213203..3cde53c75cb35 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -14,4 +14,8 @@ bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
+int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane);
+int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane);
+int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane);
+
#endif /* __INTEL_FB_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 94e95bf14e889..5b0f8e5302461 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -915,40 +915,6 @@ static u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
return plane_color_ctl;
}
-static int
-main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane)
-{
- drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
- (main_plane && main_plane >= fb->format->num_planes / 2));
-
- return fb->format->num_planes / 2 + main_plane;
-}
-
-int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane)
-{
- drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
- ccs_plane < fb->format->num_planes / 2);
-
- if (is_gen12_ccs_cc_plane(fb, ccs_plane))
- return 0;
-
- return ccs_plane - fb->format->num_planes / 2;
-}
-
-static int
-skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
-{
- struct drm_i915_private *i915 = to_i915(fb->dev);
-
- if (is_ccs_modifier(fb->modifier))
- return main_to_ccs_plane(fb, main_plane);
- else if (DISPLAY_VER(i915) < 11 &&
- intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
- return 1;
- else
- return 0;
-}
-
static void
skl_program_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.h b/drivers/gpu/drm/i915/display/skl_universal_plane.h
index 8182666536308..351040b64dc74 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.h
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.h
@@ -8,7 +8,6 @@
#include <linux/types.h>
-struct drm_framebuffer;
struct drm_i915_private;
struct intel_crtc;
struct intel_initial_plane_config;
@@ -26,7 +25,6 @@ void skl_get_initial_plane_config(struct intel_crtc *crtc,
int skl_format_to_fourcc(int format, bool rgb_order, bool alpha);
-int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane);
int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
int *x, int *y, u32 *offset);
--
2.25.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 08/25] drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (6 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 07/25] drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 09/25] drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c Imre Deak
` (32 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
Move is_surface_linear() to intel_fb.c and export it from here, also
removing the duplicate definitions of it.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 6 ------
drivers/gpu/drm/i915/display/intel_fb.c | 6 ++++++
drivers/gpu/drm/i915/display/intel_fb.h | 2 ++
drivers/gpu/drm/i915/display/skl_universal_plane.c | 6 ------
4 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d8770e471dcc4..736ab23bcaef4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1294,12 +1294,6 @@ static u32 intel_adjust_tile_offset(int *x, int *y,
return new_offset;
}
-static bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane)
-{
- return fb->modifier == DRM_FORMAT_MOD_LINEAR ||
- is_gen12_ccs_plane(fb, color_plane);
-}
-
static u32 intel_adjust_aligned_offset(int *x, int *y,
const struct drm_framebuffer *fb,
int color_plane,
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 40d56eb1914ee..17c6bd7680d9b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -27,6 +27,12 @@ bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane)
plane == 2;
}
+bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane)
+{
+ return fb->modifier == DRM_FORMAT_MOD_LINEAR ||
+ is_gen12_ccs_plane(fb, color_plane);
+}
+
int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane)
{
drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index 3cde53c75cb35..6ea220438f9ac 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -14,6 +14,8 @@ bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
+bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane);
+
int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane);
int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane);
int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane);
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 5b0f8e5302461..22f7a13020189 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -562,12 +562,6 @@ icl_program_input_csc(struct intel_plane *plane,
PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2), 0x0);
}
-static bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane)
-{
- return fb->modifier == DRM_FORMAT_MOD_LINEAR ||
- is_gen12_ccs_plane(fb, color_plane);
-}
-
static unsigned int skl_plane_stride_mult(const struct drm_framebuffer *fb,
int color_plane, unsigned int rotation)
{
--
2.25.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 09/25] drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (7 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 08/25] drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 10/25] drm/i915/intel_fb: Pull FB plane functions from intel_display.c Imre Deak
` (31 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
Move the FB plane specific function from intel_sprite.c to intel_fb.c
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 32 +++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_fb.h | 4 +++
drivers/gpu/drm/i915/display/intel_sprite.c | 32 ---------------------
drivers/gpu/drm/i915/display/intel_sprite.h | 1 -
4 files changed, 36 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 17c6bd7680d9b..8b14e069fc710 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -64,3 +64,35 @@ int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
else
return 0;
}
+
+int intel_plane_check_stride(const struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+ unsigned int rotation = plane_state->hw.rotation;
+ u32 stride, max_stride;
+
+ /*
+ * We ignore stride for all invisible planes that
+ * can be remapped. Otherwise we could end up
+ * with a false positive when the remapping didn't
+ * kick in due the plane being invisible.
+ */
+ if (intel_plane_can_remap(plane_state) &&
+ !plane_state->uapi.visible)
+ return 0;
+
+ /* FIXME other color planes? */
+ stride = plane_state->color_plane[0].stride;
+ max_stride = plane->max_stride(plane, fb->format->format,
+ fb->modifier, rotation);
+
+ if (stride > max_stride) {
+ DRM_DEBUG_KMS("[FB:%d] stride (%d) exceeds [PLANE:%d:%s] max stride (%d)\n",
+ fb->base.id, stride,
+ plane->base.base.id, plane->base.name, max_stride);
+ return -EINVAL;
+ }
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index 6ea220438f9ac..8c15f4c9561b1 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -10,6 +10,8 @@
struct drm_framebuffer;
+struct intel_plane_state;
+
bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
@@ -20,4 +22,6 @@ int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane);
int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane);
int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane);
+int intel_plane_check_stride(const struct intel_plane_state *plane_state);
+
#endif /* __INTEL_FB_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index d55a13312885b..af2d617d9eb2b 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -49,38 +49,6 @@
#include "i9xx_plane.h"
#include "intel_vrr.h"
-int intel_plane_check_stride(const struct intel_plane_state *plane_state)
-{
- struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- const struct drm_framebuffer *fb = plane_state->hw.fb;
- unsigned int rotation = plane_state->hw.rotation;
- u32 stride, max_stride;
-
- /*
- * We ignore stride for all invisible planes that
- * can be remapped. Otherwise we could end up
- * with a false positive when the remapping didn't
- * kick in due the plane being invisible.
- */
- if (intel_plane_can_remap(plane_state) &&
- !plane_state->uapi.visible)
- return 0;
-
- /* FIXME other color planes? */
- stride = plane_state->color_plane[0].stride;
- max_stride = plane->max_stride(plane, fb->format->format,
- fb->modifier, rotation);
-
- if (stride > max_stride) {
- DRM_DEBUG_KMS("[FB:%d] stride (%d) exceeds [PLANE:%d:%s] max stride (%d)\n",
- fb->base.id, stride,
- plane->base.base.id, plane->base.name, max_stride);
- return -EINVAL;
- }
-
- return 0;
-}
-
int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h b/drivers/gpu/drm/i915/display/intel_sprite.h
index f6989da2dc4bd..c085eb87705cc 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.h
+++ b/drivers/gpu/drm/i915/display/intel_sprite.h
@@ -35,7 +35,6 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state);
void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state);
-int intel_plane_check_stride(const struct intel_plane_state *plane_state);
int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);
int chv_plane_check_rotation(const struct intel_plane_state *plane_state);
--
2.25.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 10/25] drm/i915/intel_fb: Pull FB plane functions from intel_display.c
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (8 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 09/25] drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 11/25] drm/i915/intel_fb: Unexport intel_fb_check_stride() Imre Deak
` (30 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
Move the FB plane specific functions from intel_display.c to intel_fb.c.
There's more functions like this, but I leave moving those as well for a
follow up, and for now moving only the ones needed by the end of this
patchset (adding support for padding tile-rows in an FB GGTT view).
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 1 +
drivers/gpu/drm/i915/display/intel_cursor.c | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 818 -------------------
drivers/gpu/drm/i915/display/intel_display.h | 13 -
drivers/gpu/drm/i915/display/intel_fb.c | 807 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_fb.h | 31 +
6 files changed, 840 insertions(+), 831 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 6919ede20b19b..40266b78247b2 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -11,6 +11,7 @@
#include "intel_atomic.h"
#include "intel_atomic_plane.h"
#include "intel_display_types.h"
+#include "intel_fb.h"
#include "intel_sprite.h"
#include "i9xx_plane.h"
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 0132ed3cb09d3..84099b7f5c358 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -15,6 +15,7 @@
#include "intel_cursor.h"
#include "intel_display_types.h"
#include "intel_display.h"
+#include "intel_fb.h"
#include "intel_frontbuffer.h"
#include "intel_pm.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 736ab23bcaef4..25eaa8a44baa8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -856,19 +856,6 @@ void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state)
intel_wait_for_pipe_off(old_crtc_state);
}
-static unsigned int intel_tile_size(const struct drm_i915_private *dev_priv)
-{
- return IS_DISPLAY_VER(dev_priv, 2) ? 2048 : 4096;
-}
-
-static bool is_aux_plane(const struct drm_framebuffer *fb, int plane)
-{
- if (is_ccs_modifier(fb->modifier))
- return is_ccs_plane(fb, plane);
-
- return plane == 1;
-}
-
bool
intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
u64 modifier)
@@ -877,13 +864,6 @@ intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
info->num_planes == (is_ccs_modifier(modifier) ? 4 : 2);
}
-static bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb,
- int color_plane)
-{
- return intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
- color_plane == 1;
-}
-
unsigned int
intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
{
@@ -938,38 +918,6 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
}
}
-unsigned int
-intel_tile_height(const struct drm_framebuffer *fb, int color_plane)
-{
- if (is_gen12_ccs_plane(fb, color_plane))
- return 1;
-
- return intel_tile_size(to_i915(fb->dev)) /
- intel_tile_width_bytes(fb, color_plane);
-}
-
-/* Return the tile dimensions in pixel units */
-static void intel_tile_dims(const struct drm_framebuffer *fb, int color_plane,
- unsigned int *tile_width,
- unsigned int *tile_height)
-{
- unsigned int tile_width_bytes = intel_tile_width_bytes(fb, color_plane);
- unsigned int cpp = fb->format->cpp[color_plane];
-
- *tile_width = tile_width_bytes / cpp;
- *tile_height = intel_tile_height(fb, color_plane);
-}
-
-static unsigned int intel_tile_row_size(const struct drm_framebuffer *fb,
- int color_plane)
-{
- unsigned int tile_width, tile_height;
-
- intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
-
- return fb->pitches[color_plane] * tile_height;
-}
-
unsigned int
intel_fb_align_height(const struct drm_framebuffer *fb,
int color_plane, unsigned int height)
@@ -1001,32 +949,6 @@ unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info
return size;
}
-static void
-intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
- const struct drm_framebuffer *fb,
- unsigned int rotation)
-{
- memset(view, 0, sizeof(*view));
-
- view->type = I915_GGTT_VIEW_NORMAL;
- if (drm_rotation_90_or_270(rotation)) {
- view->type = I915_GGTT_VIEW_ROTATED;
- view->rotated = to_intel_framebuffer(fb)->rot_info;
- }
-}
-
-static unsigned int intel_cursor_alignment(const struct drm_i915_private *dev_priv)
-{
- if (IS_I830(dev_priv))
- return 16 * 1024;
- else if (IS_I85X(dev_priv))
- return 256;
- else if (IS_I845G(dev_priv) || IS_I865G(dev_priv))
- return 32;
- else
- return 4 * 1024;
-}
-
static unsigned int intel_linear_alignment(const struct drm_i915_private *dev_priv)
{
if (DISPLAY_VER(dev_priv) >= 9)
@@ -1227,15 +1149,6 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
i915_vma_put(vma);
}
-static int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane,
- unsigned int rotation)
-{
- if (drm_rotation_90_or_270(rotation))
- return to_intel_framebuffer(fb)->rotated[color_plane].pitch;
- else
- return fb->pitches[color_plane];
-}
-
/*
* Convert the x/y offsets into a linear offset.
* Only valid with 0/180 degree rotation, which is fine since linear
@@ -1267,224 +1180,6 @@ void intel_add_fb_offsets(int *x, int *y,
*y += state->color_plane[color_plane].y;
}
-static u32 intel_adjust_tile_offset(int *x, int *y,
- unsigned int tile_width,
- unsigned int tile_height,
- unsigned int tile_size,
- unsigned int pitch_tiles,
- u32 old_offset,
- u32 new_offset)
-{
- unsigned int pitch_pixels = pitch_tiles * tile_width;
- unsigned int tiles;
-
- WARN_ON(old_offset & (tile_size - 1));
- WARN_ON(new_offset & (tile_size - 1));
- WARN_ON(new_offset > old_offset);
-
- tiles = (old_offset - new_offset) / tile_size;
-
- *y += tiles / pitch_tiles * tile_height;
- *x += tiles % pitch_tiles * tile_width;
-
- /* minimize x in case it got needlessly big */
- *y += *x / pitch_pixels * tile_height;
- *x %= pitch_pixels;
-
- return new_offset;
-}
-
-static u32 intel_adjust_aligned_offset(int *x, int *y,
- const struct drm_framebuffer *fb,
- int color_plane,
- unsigned int rotation,
- unsigned int pitch,
- u32 old_offset, u32 new_offset)
-{
- struct drm_i915_private *dev_priv = to_i915(fb->dev);
- unsigned int cpp = fb->format->cpp[color_plane];
-
- drm_WARN_ON(&dev_priv->drm, new_offset > old_offset);
-
- if (!is_surface_linear(fb, color_plane)) {
- unsigned int tile_size, tile_width, tile_height;
- unsigned int pitch_tiles;
-
- tile_size = intel_tile_size(dev_priv);
- intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
-
- if (drm_rotation_90_or_270(rotation)) {
- pitch_tiles = pitch / tile_height;
- swap(tile_width, tile_height);
- } else {
- pitch_tiles = pitch / (tile_width * cpp);
- }
-
- intel_adjust_tile_offset(x, y, tile_width, tile_height,
- tile_size, pitch_tiles,
- old_offset, new_offset);
- } else {
- old_offset += *y * pitch + *x * cpp;
-
- *y = (old_offset - new_offset) / pitch;
- *x = ((old_offset - new_offset) - *y * pitch) / cpp;
- }
-
- return new_offset;
-}
-
-/*
- * Adjust the tile offset by moving the difference into
- * the x/y offsets.
- */
-u32 intel_plane_adjust_aligned_offset(int *x, int *y,
- const struct intel_plane_state *state,
- int color_plane,
- u32 old_offset, u32 new_offset)
-{
- return intel_adjust_aligned_offset(x, y, state->hw.fb, color_plane,
- state->hw.rotation,
- state->color_plane[color_plane].stride,
- old_offset, new_offset);
-}
-
-/*
- * Computes the aligned offset to the base tile and adjusts
- * x, y. bytes per pixel is assumed to be a power-of-two.
- *
- * In the 90/270 rotated case, x and y are assumed
- * to be already rotated to match the rotated GTT view, and
- * pitch is the tile_height aligned framebuffer height.
- *
- * This function is used when computing the derived information
- * under intel_framebuffer, so using any of that information
- * here is not allowed. Anything under drm_framebuffer can be
- * used. This is why the user has to pass in the pitch since it
- * is specified in the rotated orientation.
- */
-static u32 intel_compute_aligned_offset(struct drm_i915_private *dev_priv,
- int *x, int *y,
- const struct drm_framebuffer *fb,
- int color_plane,
- unsigned int pitch,
- unsigned int rotation,
- u32 alignment)
-{
- unsigned int cpp = fb->format->cpp[color_plane];
- u32 offset, offset_aligned;
-
- if (!is_surface_linear(fb, color_plane)) {
- unsigned int tile_size, tile_width, tile_height;
- unsigned int tile_rows, tiles, pitch_tiles;
-
- tile_size = intel_tile_size(dev_priv);
- intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
-
- if (drm_rotation_90_or_270(rotation)) {
- pitch_tiles = pitch / tile_height;
- swap(tile_width, tile_height);
- } else {
- pitch_tiles = pitch / (tile_width * cpp);
- }
-
- tile_rows = *y / tile_height;
- *y %= tile_height;
-
- tiles = *x / tile_width;
- *x %= tile_width;
-
- offset = (tile_rows * pitch_tiles + tiles) * tile_size;
-
- offset_aligned = offset;
- if (alignment)
- offset_aligned = rounddown(offset_aligned, alignment);
-
- intel_adjust_tile_offset(x, y, tile_width, tile_height,
- tile_size, pitch_tiles,
- offset, offset_aligned);
- } else {
- offset = *y * pitch + *x * cpp;
- offset_aligned = offset;
- if (alignment) {
- offset_aligned = rounddown(offset_aligned, alignment);
- *y = (offset % alignment) / pitch;
- *x = ((offset % alignment) - *y * pitch) / cpp;
- } else {
- *y = *x = 0;
- }
- }
-
- return offset_aligned;
-}
-
-u32 intel_plane_compute_aligned_offset(int *x, int *y,
- const struct intel_plane_state *state,
- int color_plane)
-{
- struct intel_plane *intel_plane = to_intel_plane(state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
- const struct drm_framebuffer *fb = state->hw.fb;
- unsigned int rotation = state->hw.rotation;
- int pitch = state->color_plane[color_plane].stride;
- u32 alignment;
-
- if (intel_plane->id == PLANE_CURSOR)
- alignment = intel_cursor_alignment(dev_priv);
- else
- alignment = intel_surf_alignment(fb, color_plane);
-
- return intel_compute_aligned_offset(dev_priv, x, y, fb, color_plane,
- pitch, rotation, alignment);
-}
-
-/* Convert the fb->offset[] into x/y offsets */
-static int intel_fb_offset_to_xy(int *x, int *y,
- const struct drm_framebuffer *fb,
- int color_plane)
-{
- struct drm_i915_private *dev_priv = to_i915(fb->dev);
- unsigned int height;
- u32 alignment;
-
- if (DISPLAY_VER(dev_priv) >= 12 &&
- is_semiplanar_uv_plane(fb, color_plane))
- alignment = intel_tile_row_size(fb, color_plane);
- else if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
- alignment = intel_tile_size(dev_priv);
- else
- alignment = 0;
-
- if (alignment != 0 && fb->offsets[color_plane] % alignment) {
- drm_dbg_kms(&dev_priv->drm,
- "Misaligned offset 0x%08x for color plane %d\n",
- fb->offsets[color_plane], color_plane);
- return -EINVAL;
- }
-
- height = drm_framebuffer_plane_height(fb->height, fb, color_plane);
- height = ALIGN(height, intel_tile_height(fb, color_plane));
-
- /* Catch potential overflows early */
- if (add_overflows_t(u32, mul_u32_u32(height, fb->pitches[color_plane]),
- fb->offsets[color_plane])) {
- drm_dbg_kms(&dev_priv->drm,
- "Bad offset 0x%08x or pitch %d for color plane %d\n",
- fb->offsets[color_plane], fb->pitches[color_plane],
- color_plane);
- return -ERANGE;
- }
-
- *x = 0;
- *y = 0;
-
- intel_adjust_aligned_offset(x, y,
- fb, color_plane, DRM_MODE_ROTATE_0,
- fb->pitches[color_plane],
- fb->offsets[color_plane], 0);
-
- return 0;
-}
-
static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)
{
switch (fb_modifier) {
@@ -1720,519 +1415,6 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
return tile_width;
}
-bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
-{
- struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- const struct drm_framebuffer *fb = plane_state->hw.fb;
- int i;
-
- /* We don't want to deal with remapping with cursors */
- if (plane->id == PLANE_CURSOR)
- return false;
-
- /*
- * The display engine limits already match/exceed the
- * render engine limits, so not much point in remapping.
- * Would also need to deal with the fence POT alignment
- * and gen2 2KiB GTT tile size.
- */
- if (DISPLAY_VER(dev_priv) < 4)
- return false;
-
- /*
- * The new CCS hash mode isn't compatible with remapping as
- * the virtual address of the pages affects the compressed data.
- */
- if (is_ccs_modifier(fb->modifier))
- return false;
-
- /* Linear needs a page aligned stride for remapping */
- if (fb->modifier == DRM_FORMAT_MOD_LINEAR) {
- unsigned int alignment = intel_tile_size(dev_priv) - 1;
-
- for (i = 0; i < fb->format->num_planes; i++) {
- if (fb->pitches[i] & alignment)
- return false;
- }
- }
-
- return true;
-}
-
-static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
-{
- struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- const struct drm_framebuffer *fb = plane_state->hw.fb;
- unsigned int rotation = plane_state->hw.rotation;
- u32 stride, max_stride;
-
- /*
- * No remapping for invisible planes since we don't have
- * an actual source viewport to remap.
- */
- if (!plane_state->uapi.visible)
- return false;
-
- if (!intel_plane_can_remap(plane_state))
- return false;
-
- /*
- * FIXME: aux plane limits on gen9+ are
- * unclear in Bspec, for now no checking.
- */
- stride = intel_fb_pitch(fb, 0, rotation);
- max_stride = plane->max_stride(plane, fb->format->format,
- fb->modifier, rotation);
-
- return stride > max_stride;
-}
-
-void
-intel_fb_plane_get_subsampling(int *hsub, int *vsub,
- const struct drm_framebuffer *fb,
- int color_plane)
-{
- int main_plane;
-
- if (color_plane == 0) {
- *hsub = 1;
- *vsub = 1;
-
- return;
- }
-
- /*
- * TODO: Deduct the subsampling from the char block for all CCS
- * formats and planes.
- */
- if (!is_gen12_ccs_plane(fb, color_plane)) {
- *hsub = fb->format->hsub;
- *vsub = fb->format->vsub;
-
- return;
- }
-
- main_plane = skl_ccs_to_main_plane(fb, color_plane);
- *hsub = drm_format_info_block_width(fb->format, color_plane) /
- drm_format_info_block_width(fb->format, main_plane);
-
- /*
- * The min stride check in the core framebuffer_check() function
- * assumes that format->hsub applies to every plane except for the
- * first plane. That's incorrect for the CCS AUX plane of the first
- * plane, but for the above check to pass we must define the block
- * width with that subsampling applied to it. Adjust the width here
- * accordingly, so we can calculate the actual subsampling factor.
- */
- if (main_plane == 0)
- *hsub *= fb->format->hsub;
-
- *vsub = 32;
-}
-static int
-intel_fb_check_ccs_xy(struct drm_framebuffer *fb, int ccs_plane, int x, int y)
-{
- struct drm_i915_private *i915 = to_i915(fb->dev);
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- int main_plane;
- int hsub, vsub;
- int tile_width, tile_height;
- int ccs_x, ccs_y;
- int main_x, main_y;
-
- if (!is_ccs_plane(fb, ccs_plane) || is_gen12_ccs_cc_plane(fb, ccs_plane))
- return 0;
-
- intel_tile_dims(fb, ccs_plane, &tile_width, &tile_height);
- intel_fb_plane_get_subsampling(&hsub, &vsub, fb, ccs_plane);
-
- tile_width *= hsub;
- tile_height *= vsub;
-
- ccs_x = (x * hsub) % tile_width;
- ccs_y = (y * vsub) % tile_height;
-
- main_plane = skl_ccs_to_main_plane(fb, ccs_plane);
- main_x = intel_fb->normal[main_plane].x % tile_width;
- main_y = intel_fb->normal[main_plane].y % tile_height;
-
- /*
- * CCS doesn't have its own x/y offset register, so the intra CCS tile
- * x/y offsets must match between CCS and the main surface.
- */
- if (main_x != ccs_x || main_y != ccs_y) {
- drm_dbg_kms(&i915->drm,
- "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
- main_x, main_y,
- ccs_x, ccs_y,
- intel_fb->normal[main_plane].x,
- intel_fb->normal[main_plane].y,
- x, y);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static void
-intel_fb_plane_dims(int *w, int *h, struct drm_framebuffer *fb, int color_plane)
-{
- int main_plane = is_ccs_plane(fb, color_plane) ?
- skl_ccs_to_main_plane(fb, color_plane) : 0;
- int main_hsub, main_vsub;
- int hsub, vsub;
-
- intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, fb, main_plane);
- intel_fb_plane_get_subsampling(&hsub, &vsub, fb, color_plane);
- *w = fb->width / main_hsub / hsub;
- *h = fb->height / main_vsub / vsub;
-}
-
-/*
- * Setup the rotated view for an FB plane and return the size the GTT mapping
- * requires for this view.
- */
-static u32
-setup_fb_rotation(int plane, const struct intel_remapped_plane_info *plane_info,
- u32 gtt_offset_rotated, int x, int y,
- unsigned int width, unsigned int height,
- unsigned int tile_size,
- unsigned int tile_width, unsigned int tile_height,
- struct drm_framebuffer *fb)
-{
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct intel_rotation_info *rot_info = &intel_fb->rot_info;
- unsigned int pitch_tiles;
- struct drm_rect r;
-
- /* Y or Yf modifiers required for 90/270 rotation */
- if (fb->modifier != I915_FORMAT_MOD_Y_TILED &&
- fb->modifier != I915_FORMAT_MOD_Yf_TILED)
- return 0;
-
- if (drm_WARN_ON(fb->dev, plane >= ARRAY_SIZE(rot_info->plane)))
- return 0;
-
- rot_info->plane[plane] = *plane_info;
-
- intel_fb->rotated[plane].pitch = plane_info->height * tile_height;
-
- /* rotate the x/y offsets to match the GTT view */
- drm_rect_init(&r, x, y, width, height);
- drm_rect_rotate(&r,
- plane_info->width * tile_width,
- plane_info->height * tile_height,
- DRM_MODE_ROTATE_270);
- x = r.x1;
- y = r.y1;
-
- /* rotate the tile dimensions to match the GTT view */
- pitch_tiles = intel_fb->rotated[plane].pitch / tile_height;
- swap(tile_width, tile_height);
-
- /*
- * We only keep the x/y offsets, so push all of the
- * gtt offset into the x/y offsets.
- */
- intel_adjust_tile_offset(&x, &y,
- tile_width, tile_height,
- tile_size, pitch_tiles,
- gtt_offset_rotated * tile_size, 0);
-
- /*
- * First pixel of the framebuffer from
- * the start of the rotated gtt mapping.
- */
- intel_fb->rotated[plane].x = x;
- intel_fb->rotated[plane].y = y;
-
- return plane_info->width * plane_info->height;
-}
-
-static int
-intel_fill_fb_info(struct drm_i915_private *dev_priv,
- struct drm_framebuffer *fb)
-{
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct drm_i915_gem_object *obj = intel_fb_obj(fb);
- u32 gtt_offset_rotated = 0;
- unsigned int max_size = 0;
- int i, num_planes = fb->format->num_planes;
- unsigned int tile_size = intel_tile_size(dev_priv);
-
- for (i = 0; i < num_planes; i++) {
- unsigned int width, height;
- unsigned int cpp, size;
- u32 offset;
- int x, y;
- int ret;
-
- /*
- * Plane 2 of Render Compression with Clear Color fb modifier
- * is consumed by the driver and not passed to DE. Skip the
- * arithmetic related to alignment and offset calculation.
- */
- if (is_gen12_ccs_cc_plane(fb, i)) {
- if (IS_ALIGNED(fb->offsets[i], PAGE_SIZE))
- continue;
- else
- return -EINVAL;
- }
-
- cpp = fb->format->cpp[i];
- intel_fb_plane_dims(&width, &height, fb, i);
-
- ret = intel_fb_offset_to_xy(&x, &y, fb, i);
- if (ret) {
- drm_dbg_kms(&dev_priv->drm,
- "bad fb plane %d offset: 0x%x\n",
- i, fb->offsets[i]);
- return ret;
- }
-
- ret = intel_fb_check_ccs_xy(fb, i, x, y);
- if (ret)
- return ret;
-
- /*
- * The fence (if used) is aligned to the start of the object
- * so having the framebuffer wrap around across the edge of the
- * fenced region doesn't really work. We have no API to configure
- * the fence start offset within the object (nor could we probably
- * on gen2/3). So it's just easier if we just require that the
- * fb layout agrees with the fence layout. We already check that the
- * fb stride matches the fence stride elsewhere.
- */
- if (i == 0 && i915_gem_object_is_tiled(obj) &&
- (x + width) * cpp > fb->pitches[i]) {
- drm_dbg_kms(&dev_priv->drm,
- "bad fb plane %d offset: 0x%x\n",
- i, fb->offsets[i]);
- return -EINVAL;
- }
-
- /*
- * First pixel of the framebuffer from
- * the start of the normal gtt mapping.
- */
- intel_fb->normal[i].x = x;
- intel_fb->normal[i].y = y;
-
- offset = intel_compute_aligned_offset(dev_priv, &x, &y, fb, i,
- fb->pitches[i],
- DRM_MODE_ROTATE_0,
- tile_size);
- offset /= tile_size;
-
- if (!is_surface_linear(fb, i)) {
- struct intel_remapped_plane_info plane_info;
- unsigned int tile_width, tile_height;
-
- intel_tile_dims(fb, i, &tile_width, &tile_height);
-
- plane_info.offset = offset;
- plane_info.stride = DIV_ROUND_UP(fb->pitches[i],
- tile_width * cpp);
- plane_info.width = DIV_ROUND_UP(x + width, tile_width);
- plane_info.height = DIV_ROUND_UP(y + height,
- tile_height);
-
- /* how many tiles does this plane need */
- size = plane_info.stride * plane_info.height;
- /*
- * If the plane isn't horizontally tile aligned,
- * we need one more tile.
- */
- if (x != 0)
- size++;
-
- gtt_offset_rotated +=
- setup_fb_rotation(i, &plane_info,
- gtt_offset_rotated,
- x, y, width, height,
- tile_size,
- tile_width, tile_height,
- fb);
- } else {
- size = DIV_ROUND_UP((y + height) * fb->pitches[i] +
- x * cpp, tile_size);
- }
-
- /* how many tiles in total needed in the bo */
- max_size = max(max_size, offset + size);
- }
-
- if (mul_u32_u32(max_size, tile_size) > obj->base.size) {
- drm_dbg_kms(&dev_priv->drm,
- "fb too big for bo (need %llu bytes, have %zu bytes)\n",
- mul_u32_u32(max_size, tile_size), obj->base.size);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static void
-intel_plane_remap_gtt(struct intel_plane_state *plane_state)
-{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
- struct drm_framebuffer *fb = plane_state->hw.fb;
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct intel_rotation_info *info = &plane_state->view.rotated;
- unsigned int rotation = plane_state->hw.rotation;
- int i, num_planes = fb->format->num_planes;
- unsigned int tile_size = intel_tile_size(dev_priv);
- unsigned int src_x, src_y;
- unsigned int src_w, src_h;
- u32 gtt_offset = 0;
-
- memset(&plane_state->view, 0, sizeof(plane_state->view));
- plane_state->view.type = drm_rotation_90_or_270(rotation) ?
- I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
-
- src_x = plane_state->uapi.src.x1 >> 16;
- src_y = plane_state->uapi.src.y1 >> 16;
- src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
- src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
-
- drm_WARN_ON(&dev_priv->drm, is_ccs_modifier(fb->modifier));
-
- /* Make src coordinates relative to the viewport */
- drm_rect_translate(&plane_state->uapi.src,
- -(src_x << 16), -(src_y << 16));
-
- /* Rotate src coordinates to match rotated GTT view */
- if (drm_rotation_90_or_270(rotation))
- drm_rect_rotate(&plane_state->uapi.src,
- src_w << 16, src_h << 16,
- DRM_MODE_ROTATE_270);
-
- for (i = 0; i < num_planes; i++) {
- unsigned int hsub = i ? fb->format->hsub : 1;
- unsigned int vsub = i ? fb->format->vsub : 1;
- unsigned int cpp = fb->format->cpp[i];
- unsigned int tile_width, tile_height;
- unsigned int width, height;
- unsigned int pitch_tiles;
- unsigned int x, y;
- u32 offset;
-
- intel_tile_dims(fb, i, &tile_width, &tile_height);
-
- x = src_x / hsub;
- y = src_y / vsub;
- width = src_w / hsub;
- height = src_h / vsub;
-
- /*
- * First pixel of the src viewport from the
- * start of the normal gtt mapping.
- */
- x += intel_fb->normal[i].x;
- y += intel_fb->normal[i].y;
-
- offset = intel_compute_aligned_offset(dev_priv, &x, &y,
- fb, i, fb->pitches[i],
- DRM_MODE_ROTATE_0, tile_size);
- offset /= tile_size;
-
- drm_WARN_ON(&dev_priv->drm, i >= ARRAY_SIZE(info->plane));
- info->plane[i].offset = offset;
- info->plane[i].stride = DIV_ROUND_UP(fb->pitches[i],
- tile_width * cpp);
- info->plane[i].width = DIV_ROUND_UP(x + width, tile_width);
- info->plane[i].height = DIV_ROUND_UP(y + height, tile_height);
-
- if (drm_rotation_90_or_270(rotation)) {
- struct drm_rect r;
-
- /* rotate the x/y offsets to match the GTT view */
- drm_rect_init(&r, x, y, width, height);
- drm_rect_rotate(&r,
- info->plane[i].width * tile_width,
- info->plane[i].height * tile_height,
- DRM_MODE_ROTATE_270);
- x = r.x1;
- y = r.y1;
-
- pitch_tiles = info->plane[i].height;
- plane_state->color_plane[i].stride = pitch_tiles * tile_height;
-
- /* rotate the tile dimensions to match the GTT view */
- swap(tile_width, tile_height);
- } else {
- pitch_tiles = info->plane[i].width;
- plane_state->color_plane[i].stride = pitch_tiles * tile_width * cpp;
- }
-
- /*
- * We only keep the x/y offsets, so push all of the
- * gtt offset into the x/y offsets.
- */
- intel_adjust_tile_offset(&x, &y,
- tile_width, tile_height,
- tile_size, pitch_tiles,
- gtt_offset * tile_size, 0);
-
- gtt_offset += info->plane[i].width * info->plane[i].height;
-
- plane_state->color_plane[i].offset = 0;
- plane_state->color_plane[i].x = x;
- plane_state->color_plane[i].y = y;
- }
-}
-
-int
-intel_plane_compute_gtt(struct intel_plane_state *plane_state)
-{
- const struct intel_framebuffer *fb =
- to_intel_framebuffer(plane_state->hw.fb);
- unsigned int rotation = plane_state->hw.rotation;
- int i, num_planes;
-
- if (!fb)
- return 0;
-
- num_planes = fb->base.format->num_planes;
-
- if (intel_plane_needs_remap(plane_state)) {
- intel_plane_remap_gtt(plane_state);
-
- /*
- * Sometimes even remapping can't overcome
- * the stride limitations :( Can happen with
- * big plane sizes and suitably misaligned
- * offsets.
- */
- return intel_plane_check_stride(plane_state);
- }
-
- intel_fill_fb_ggtt_view(&plane_state->view, &fb->base, rotation);
-
- for (i = 0; i < num_planes; i++) {
- plane_state->color_plane[i].stride = intel_fb_pitch(&fb->base, i, rotation);
- plane_state->color_plane[i].offset = 0;
-
- if (drm_rotation_90_or_270(rotation)) {
- plane_state->color_plane[i].x = fb->rotated[i].x;
- plane_state->color_plane[i].y = fb->rotated[i].y;
- } else {
- plane_state->color_plane[i].x = fb->normal[i].x;
- plane_state->color_plane[i].y = fb->normal[i].y;
- }
- }
-
- /* Rotate src coordinates to match rotated GTT view */
- if (drm_rotation_90_or_270(rotation))
- drm_rect_rotate(&plane_state->uapi.src,
- fb->base.width << 16, fb->base.height << 16,
- DRM_MODE_ROTATE_270);
-
- return intel_plane_check_stride(plane_state);
-}
-
static struct i915_vma *
initial_plane_vma(struct drm_i915_private *i915,
struct intel_initial_plane_config *plane_config)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index f056e19cf559a..62ce3b06ff98a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -515,7 +515,6 @@ void intel_link_compute_m_n(u16 bpp, int nlanes,
void lpt_disable_clkout_dp(struct drm_i915_private *dev_priv);
u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
u32 pixel_format, u64 modifier);
-bool intel_plane_can_remap(const struct intel_plane_state *plane_state);
enum drm_mode_status
intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
const struct drm_display_mode *mode,
@@ -627,10 +626,6 @@ bool
intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
u64 modifier);
-int intel_plane_compute_gtt(struct intel_plane_state *plane_state);
-u32 intel_plane_compute_aligned_offset(int *x, int *y,
- const struct intel_plane_state *state,
- int color_plane);
int intel_plane_pin_fb(struct intel_plane_state *plane_state);
void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
struct intel_encoder *
@@ -639,15 +634,7 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
int color_plane);
-void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
- const struct drm_framebuffer *fb,
- int color_plane);
-u32 intel_plane_adjust_aligned_offset(int *x, int *y,
- const struct intel_plane_state *state,
- int color_plane,
- u32 old_offset, u32 new_offset);
unsigned int intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane);
-unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane);
void intel_display_driver_register(struct drm_i915_private *i915);
void intel_display_driver_unregister(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 8b14e069fc710..b872eb29fd0d7 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -5,6 +5,7 @@
#include <drm/drm_framebuffer.h>
+#include "intel_display.h"
#include "intel_display_types.h"
#include "intel_fb.h"
@@ -27,6 +28,20 @@ bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane)
plane == 2;
}
+bool is_aux_plane(const struct drm_framebuffer *fb, int plane)
+{
+ if (is_ccs_modifier(fb->modifier))
+ return is_ccs_plane(fb, plane);
+
+ return plane == 1;
+}
+
+bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int color_plane)
+{
+ return intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
+ color_plane == 1;
+}
+
bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane)
{
return fb->modifier == DRM_FORMAT_MOD_LINEAR ||
@@ -65,6 +80,750 @@ int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
return 0;
}
+unsigned int intel_tile_size(const struct drm_i915_private *dev_priv)
+{
+ return IS_DISPLAY_VER(dev_priv, 2) ? 2048 : 4096;
+}
+
+unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane)
+{
+ if (is_gen12_ccs_plane(fb, color_plane))
+ return 1;
+
+ return intel_tile_size(to_i915(fb->dev)) /
+ intel_tile_width_bytes(fb, color_plane);
+}
+
+/* Return the tile dimensions in pixel units */
+static void intel_tile_dims(const struct drm_framebuffer *fb, int color_plane,
+ unsigned int *tile_width,
+ unsigned int *tile_height)
+{
+ unsigned int tile_width_bytes = intel_tile_width_bytes(fb, color_plane);
+ unsigned int cpp = fb->format->cpp[color_plane];
+
+ *tile_width = tile_width_bytes / cpp;
+ *tile_height = intel_tile_height(fb, color_plane);
+}
+
+unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_plane)
+{
+ unsigned int tile_width, tile_height;
+
+ intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
+
+ return fb->pitches[color_plane] * tile_height;
+}
+
+unsigned int intel_cursor_alignment(const struct drm_i915_private *dev_priv)
+{
+ if (IS_I830(dev_priv))
+ return 16 * 1024;
+ else if (IS_I85X(dev_priv))
+ return 256;
+ else if (IS_I845G(dev_priv) || IS_I865G(dev_priv))
+ return 32;
+ else
+ return 4 * 1024;
+}
+
+void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
+ const struct drm_framebuffer *fb,
+ int color_plane)
+{
+ int main_plane;
+
+ if (color_plane == 0) {
+ *hsub = 1;
+ *vsub = 1;
+
+ return;
+ }
+
+ /*
+ * TODO: Deduct the subsampling from the char block for all CCS
+ * formats and planes.
+ */
+ if (!is_gen12_ccs_plane(fb, color_plane)) {
+ *hsub = fb->format->hsub;
+ *vsub = fb->format->vsub;
+
+ return;
+ }
+
+ main_plane = skl_ccs_to_main_plane(fb, color_plane);
+ *hsub = drm_format_info_block_width(fb->format, color_plane) /
+ drm_format_info_block_width(fb->format, main_plane);
+
+ /*
+ * The min stride check in the core framebuffer_check() function
+ * assumes that format->hsub applies to every plane except for the
+ * first plane. That's incorrect for the CCS AUX plane of the first
+ * plane, but for the above check to pass we must define the block
+ * width with that subsampling applied to it. Adjust the width here
+ * accordingly, so we can calculate the actual subsampling factor.
+ */
+ if (main_plane == 0)
+ *hsub *= fb->format->hsub;
+
+ *vsub = 32;
+}
+
+static void intel_fb_plane_dims(int *w, int *h, struct drm_framebuffer *fb, int color_plane)
+{
+ int main_plane = is_ccs_plane(fb, color_plane) ?
+ skl_ccs_to_main_plane(fb, color_plane) : 0;
+ int main_hsub, main_vsub;
+ int hsub, vsub;
+
+ intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, fb, main_plane);
+ intel_fb_plane_get_subsampling(&hsub, &vsub, fb, color_plane);
+ *w = fb->width / main_hsub / hsub;
+ *h = fb->height / main_vsub / vsub;
+}
+
+static u32 intel_adjust_tile_offset(int *x, int *y,
+ unsigned int tile_width,
+ unsigned int tile_height,
+ unsigned int tile_size,
+ unsigned int pitch_tiles,
+ u32 old_offset,
+ u32 new_offset)
+{
+ unsigned int pitch_pixels = pitch_tiles * tile_width;
+ unsigned int tiles;
+
+ WARN_ON(old_offset & (tile_size - 1));
+ WARN_ON(new_offset & (tile_size - 1));
+ WARN_ON(new_offset > old_offset);
+
+ tiles = (old_offset - new_offset) / tile_size;
+
+ *y += tiles / pitch_tiles * tile_height;
+ *x += tiles % pitch_tiles * tile_width;
+
+ /* minimize x in case it got needlessly big */
+ *y += *x / pitch_pixels * tile_height;
+ *x %= pitch_pixels;
+
+ return new_offset;
+}
+
+static u32 intel_adjust_aligned_offset(int *x, int *y,
+ const struct drm_framebuffer *fb,
+ int color_plane,
+ unsigned int rotation,
+ unsigned int pitch,
+ u32 old_offset, u32 new_offset)
+{
+ struct drm_i915_private *dev_priv = to_i915(fb->dev);
+ unsigned int cpp = fb->format->cpp[color_plane];
+
+ drm_WARN_ON(&dev_priv->drm, new_offset > old_offset);
+
+ if (!is_surface_linear(fb, color_plane)) {
+ unsigned int tile_size, tile_width, tile_height;
+ unsigned int pitch_tiles;
+
+ tile_size = intel_tile_size(dev_priv);
+ intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
+
+ if (drm_rotation_90_or_270(rotation)) {
+ pitch_tiles = pitch / tile_height;
+ swap(tile_width, tile_height);
+ } else {
+ pitch_tiles = pitch / (tile_width * cpp);
+ }
+
+ intel_adjust_tile_offset(x, y, tile_width, tile_height,
+ tile_size, pitch_tiles,
+ old_offset, new_offset);
+ } else {
+ old_offset += *y * pitch + *x * cpp;
+
+ *y = (old_offset - new_offset) / pitch;
+ *x = ((old_offset - new_offset) - *y * pitch) / cpp;
+ }
+
+ return new_offset;
+}
+
+/*
+ * Adjust the tile offset by moving the difference into
+ * the x/y offsets.
+ */
+u32 intel_plane_adjust_aligned_offset(int *x, int *y,
+ const struct intel_plane_state *state,
+ int color_plane,
+ u32 old_offset, u32 new_offset)
+{
+ return intel_adjust_aligned_offset(x, y, state->hw.fb, color_plane,
+ state->hw.rotation,
+ state->color_plane[color_plane].stride,
+ old_offset, new_offset);
+}
+
+/*
+ * Computes the aligned offset to the base tile and adjusts
+ * x, y. bytes per pixel is assumed to be a power-of-two.
+ *
+ * In the 90/270 rotated case, x and y are assumed
+ * to be already rotated to match the rotated GTT view, and
+ * pitch is the tile_height aligned framebuffer height.
+ *
+ * This function is used when computing the derived information
+ * under intel_framebuffer, so using any of that information
+ * here is not allowed. Anything under drm_framebuffer can be
+ * used. This is why the user has to pass in the pitch since it
+ * is specified in the rotated orientation.
+ */
+static u32 intel_compute_aligned_offset(struct drm_i915_private *dev_priv,
+ int *x, int *y,
+ const struct drm_framebuffer *fb,
+ int color_plane,
+ unsigned int pitch,
+ unsigned int rotation,
+ u32 alignment)
+{
+ unsigned int cpp = fb->format->cpp[color_plane];
+ u32 offset, offset_aligned;
+
+ if (!is_surface_linear(fb, color_plane)) {
+ unsigned int tile_size, tile_width, tile_height;
+ unsigned int tile_rows, tiles, pitch_tiles;
+
+ tile_size = intel_tile_size(dev_priv);
+ intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
+
+ if (drm_rotation_90_or_270(rotation)) {
+ pitch_tiles = pitch / tile_height;
+ swap(tile_width, tile_height);
+ } else {
+ pitch_tiles = pitch / (tile_width * cpp);
+ }
+
+ tile_rows = *y / tile_height;
+ *y %= tile_height;
+
+ tiles = *x / tile_width;
+ *x %= tile_width;
+
+ offset = (tile_rows * pitch_tiles + tiles) * tile_size;
+
+ offset_aligned = offset;
+ if (alignment)
+ offset_aligned = rounddown(offset_aligned, alignment);
+
+ intel_adjust_tile_offset(x, y, tile_width, tile_height,
+ tile_size, pitch_tiles,
+ offset, offset_aligned);
+ } else {
+ offset = *y * pitch + *x * cpp;
+ offset_aligned = offset;
+ if (alignment) {
+ offset_aligned = rounddown(offset_aligned, alignment);
+ *y = (offset % alignment) / pitch;
+ *x = ((offset % alignment) - *y * pitch) / cpp;
+ } else {
+ *y = *x = 0;
+ }
+ }
+
+ return offset_aligned;
+}
+
+u32 intel_plane_compute_aligned_offset(int *x, int *y,
+ const struct intel_plane_state *state,
+ int color_plane)
+{
+ struct intel_plane *intel_plane = to_intel_plane(state->uapi.plane);
+ struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
+ const struct drm_framebuffer *fb = state->hw.fb;
+ unsigned int rotation = state->hw.rotation;
+ int pitch = state->color_plane[color_plane].stride;
+ u32 alignment;
+
+ if (intel_plane->id == PLANE_CURSOR)
+ alignment = intel_cursor_alignment(dev_priv);
+ else
+ alignment = intel_surf_alignment(fb, color_plane);
+
+ return intel_compute_aligned_offset(dev_priv, x, y, fb, color_plane,
+ pitch, rotation, alignment);
+}
+
+/* Convert the fb->offset[] into x/y offsets */
+static int intel_fb_offset_to_xy(int *x, int *y,
+ const struct drm_framebuffer *fb,
+ int color_plane)
+{
+ struct drm_i915_private *dev_priv = to_i915(fb->dev);
+ unsigned int height;
+ u32 alignment;
+
+ if (DISPLAY_VER(dev_priv) >= 12 &&
+ is_semiplanar_uv_plane(fb, color_plane))
+ alignment = intel_tile_row_size(fb, color_plane);
+ else if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
+ alignment = intel_tile_size(dev_priv);
+ else
+ alignment = 0;
+
+ if (alignment != 0 && fb->offsets[color_plane] % alignment) {
+ drm_dbg_kms(&dev_priv->drm,
+ "Misaligned offset 0x%08x for color plane %d\n",
+ fb->offsets[color_plane], color_plane);
+ return -EINVAL;
+ }
+
+ height = drm_framebuffer_plane_height(fb->height, fb, color_plane);
+ height = ALIGN(height, intel_tile_height(fb, color_plane));
+
+ /* Catch potential overflows early */
+ if (add_overflows_t(u32, mul_u32_u32(height, fb->pitches[color_plane]),
+ fb->offsets[color_plane])) {
+ drm_dbg_kms(&dev_priv->drm,
+ "Bad offset 0x%08x or pitch %d for color plane %d\n",
+ fb->offsets[color_plane], fb->pitches[color_plane],
+ color_plane);
+ return -ERANGE;
+ }
+
+ *x = 0;
+ *y = 0;
+
+ intel_adjust_aligned_offset(x, y,
+ fb, color_plane, DRM_MODE_ROTATE_0,
+ fb->pitches[color_plane],
+ fb->offsets[color_plane], 0);
+
+ return 0;
+}
+
+static int intel_fb_check_ccs_xy(struct drm_framebuffer *fb, int ccs_plane, int x, int y)
+{
+ struct drm_i915_private *i915 = to_i915(fb->dev);
+ struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+ int main_plane;
+ int hsub, vsub;
+ int tile_width, tile_height;
+ int ccs_x, ccs_y;
+ int main_x, main_y;
+
+ if (!is_ccs_plane(fb, ccs_plane) || is_gen12_ccs_cc_plane(fb, ccs_plane))
+ return 0;
+
+ intel_tile_dims(fb, ccs_plane, &tile_width, &tile_height);
+ intel_fb_plane_get_subsampling(&hsub, &vsub, fb, ccs_plane);
+
+ tile_width *= hsub;
+ tile_height *= vsub;
+
+ ccs_x = (x * hsub) % tile_width;
+ ccs_y = (y * vsub) % tile_height;
+
+ main_plane = skl_ccs_to_main_plane(fb, ccs_plane);
+ main_x = intel_fb->normal[main_plane].x % tile_width;
+ main_y = intel_fb->normal[main_plane].y % tile_height;
+
+ /*
+ * CCS doesn't have its own x/y offset register, so the intra CCS tile
+ * x/y offsets must match between CCS and the main surface.
+ */
+ if (main_x != ccs_x || main_y != ccs_y) {
+ drm_dbg_kms(&i915->drm,
+ "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
+ main_x, main_y,
+ ccs_x, ccs_y,
+ intel_fb->normal[main_plane].x,
+ intel_fb->normal[main_plane].y,
+ x, y);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+ int i;
+
+ /* We don't want to deal with remapping with cursors */
+ if (plane->id == PLANE_CURSOR)
+ return false;
+
+ /*
+ * The display engine limits already match/exceed the
+ * render engine limits, so not much point in remapping.
+ * Would also need to deal with the fence POT alignment
+ * and gen2 2KiB GTT tile size.
+ */
+ if (DISPLAY_VER(dev_priv) < 4)
+ return false;
+
+ /*
+ * The new CCS hash mode isn't compatible with remapping as
+ * the virtual address of the pages affects the compressed data.
+ */
+ if (is_ccs_modifier(fb->modifier))
+ return false;
+
+ /* Linear needs a page aligned stride for remapping */
+ if (fb->modifier == DRM_FORMAT_MOD_LINEAR) {
+ unsigned int alignment = intel_tile_size(dev_priv) - 1;
+
+ for (i = 0; i < fb->format->num_planes; i++) {
+ if (fb->pitches[i] & alignment)
+ return false;
+ }
+ }
+
+ return true;
+}
+
+int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation)
+{
+ if (drm_rotation_90_or_270(rotation))
+ return to_intel_framebuffer(fb)->rotated[color_plane].pitch;
+ else
+ return fb->pitches[color_plane];
+}
+
+static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+ unsigned int rotation = plane_state->hw.rotation;
+ u32 stride, max_stride;
+
+ /*
+ * No remapping for invisible planes since we don't have
+ * an actual source viewport to remap.
+ */
+ if (!plane_state->uapi.visible)
+ return false;
+
+ if (!intel_plane_can_remap(plane_state))
+ return false;
+
+ /*
+ * FIXME: aux plane limits on gen9+ are
+ * unclear in Bspec, for now no checking.
+ */
+ stride = intel_fb_pitch(fb, 0, rotation);
+ max_stride = plane->max_stride(plane, fb->format->format,
+ fb->modifier, rotation);
+
+ return stride > max_stride;
+}
+
+/*
+ * Setup the rotated view for an FB plane and return the size the GTT mapping
+ * requires for this view.
+ */
+static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *plane_info,
+ u32 gtt_offset_rotated, int x, int y,
+ unsigned int width, unsigned int height,
+ unsigned int tile_size,
+ unsigned int tile_width, unsigned int tile_height,
+ struct drm_framebuffer *fb)
+{
+ struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+ struct intel_rotation_info *rot_info = &intel_fb->rot_info;
+ unsigned int pitch_tiles;
+ struct drm_rect r;
+
+ /* Y or Yf modifiers required for 90/270 rotation */
+ if (fb->modifier != I915_FORMAT_MOD_Y_TILED &&
+ fb->modifier != I915_FORMAT_MOD_Yf_TILED)
+ return 0;
+
+ if (drm_WARN_ON(fb->dev, plane >= ARRAY_SIZE(rot_info->plane)))
+ return 0;
+
+ rot_info->plane[plane] = *plane_info;
+
+ intel_fb->rotated[plane].pitch = plane_info->height * tile_height;
+
+ /* rotate the x/y offsets to match the GTT view */
+ drm_rect_init(&r, x, y, width, height);
+ drm_rect_rotate(&r,
+ plane_info->width * tile_width,
+ plane_info->height * tile_height,
+ DRM_MODE_ROTATE_270);
+ x = r.x1;
+ y = r.y1;
+
+ /* rotate the tile dimensions to match the GTT view */
+ pitch_tiles = intel_fb->rotated[plane].pitch / tile_height;
+ swap(tile_width, tile_height);
+
+ /*
+ * We only keep the x/y offsets, so push all of the
+ * gtt offset into the x/y offsets.
+ */
+ intel_adjust_tile_offset(&x, &y,
+ tile_width, tile_height,
+ tile_size, pitch_tiles,
+ gtt_offset_rotated * tile_size, 0);
+
+ /*
+ * First pixel of the framebuffer from
+ * the start of the rotated gtt mapping.
+ */
+ intel_fb->rotated[plane].x = x;
+ intel_fb->rotated[plane].y = y;
+
+ return plane_info->width * plane_info->height;
+}
+
+int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer *fb)
+{
+ struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+ struct drm_i915_gem_object *obj = intel_fb_obj(fb);
+ u32 gtt_offset_rotated = 0;
+ unsigned int max_size = 0;
+ int i, num_planes = fb->format->num_planes;
+ unsigned int tile_size = intel_tile_size(dev_priv);
+
+ for (i = 0; i < num_planes; i++) {
+ unsigned int width, height;
+ unsigned int cpp, size;
+ u32 offset;
+ int x, y;
+ int ret;
+
+ /*
+ * Plane 2 of Render Compression with Clear Color fb modifier
+ * is consumed by the driver and not passed to DE. Skip the
+ * arithmetic related to alignment and offset calculation.
+ */
+ if (is_gen12_ccs_cc_plane(fb, i)) {
+ if (IS_ALIGNED(fb->offsets[i], PAGE_SIZE))
+ continue;
+ else
+ return -EINVAL;
+ }
+
+ cpp = fb->format->cpp[i];
+ intel_fb_plane_dims(&width, &height, fb, i);
+
+ ret = intel_fb_offset_to_xy(&x, &y, fb, i);
+ if (ret) {
+ drm_dbg_kms(&dev_priv->drm,
+ "bad fb plane %d offset: 0x%x\n",
+ i, fb->offsets[i]);
+ return ret;
+ }
+
+ ret = intel_fb_check_ccs_xy(fb, i, x, y);
+ if (ret)
+ return ret;
+
+ /*
+ * The fence (if used) is aligned to the start of the object
+ * so having the framebuffer wrap around across the edge of the
+ * fenced region doesn't really work. We have no API to configure
+ * the fence start offset within the object (nor could we probably
+ * on gen2/3). So it's just easier if we just require that the
+ * fb layout agrees with the fence layout. We already check that the
+ * fb stride matches the fence stride elsewhere.
+ */
+ if (i == 0 && i915_gem_object_is_tiled(obj) &&
+ (x + width) * cpp > fb->pitches[i]) {
+ drm_dbg_kms(&dev_priv->drm,
+ "bad fb plane %d offset: 0x%x\n",
+ i, fb->offsets[i]);
+ return -EINVAL;
+ }
+
+ /*
+ * First pixel of the framebuffer from
+ * the start of the normal gtt mapping.
+ */
+ intel_fb->normal[i].x = x;
+ intel_fb->normal[i].y = y;
+
+ offset = intel_compute_aligned_offset(dev_priv, &x, &y, fb, i,
+ fb->pitches[i],
+ DRM_MODE_ROTATE_0,
+ tile_size);
+ offset /= tile_size;
+
+ if (!is_surface_linear(fb, i)) {
+ struct intel_remapped_plane_info plane_info;
+ unsigned int tile_width, tile_height;
+
+ intel_tile_dims(fb, i, &tile_width, &tile_height);
+
+ plane_info.offset = offset;
+ plane_info.stride = DIV_ROUND_UP(fb->pitches[i],
+ tile_width * cpp);
+ plane_info.width = DIV_ROUND_UP(x + width, tile_width);
+ plane_info.height = DIV_ROUND_UP(y + height,
+ tile_height);
+
+ /* how many tiles does this plane need */
+ size = plane_info.stride * plane_info.height;
+ /*
+ * If the plane isn't horizontally tile aligned,
+ * we need one more tile.
+ */
+ if (x != 0)
+ size++;
+
+ gtt_offset_rotated +=
+ setup_fb_rotation(i, &plane_info,
+ gtt_offset_rotated,
+ x, y, width, height,
+ tile_size,
+ tile_width, tile_height,
+ fb);
+ } else {
+ size = DIV_ROUND_UP((y + height) * fb->pitches[i] +
+ x * cpp, tile_size);
+ }
+
+ /* how many tiles in total needed in the bo */
+ max_size = max(max_size, offset + size);
+ }
+
+ if (mul_u32_u32(max_size, tile_size) > obj->base.size) {
+ drm_dbg_kms(&dev_priv->drm,
+ "fb too big for bo (need %llu bytes, have %zu bytes)\n",
+ mul_u32_u32(max_size, tile_size), obj->base.size);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *dev_priv =
+ to_i915(plane_state->uapi.plane->dev);
+ struct drm_framebuffer *fb = plane_state->hw.fb;
+ struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+ struct intel_rotation_info *info = &plane_state->view.rotated;
+ unsigned int rotation = plane_state->hw.rotation;
+ int i, num_planes = fb->format->num_planes;
+ unsigned int tile_size = intel_tile_size(dev_priv);
+ unsigned int src_x, src_y;
+ unsigned int src_w, src_h;
+ u32 gtt_offset = 0;
+
+ memset(&plane_state->view, 0, sizeof(plane_state->view));
+ plane_state->view.type = drm_rotation_90_or_270(rotation) ?
+ I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
+
+ src_x = plane_state->uapi.src.x1 >> 16;
+ src_y = plane_state->uapi.src.y1 >> 16;
+ src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
+ src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
+
+ drm_WARN_ON(&dev_priv->drm, is_ccs_modifier(fb->modifier));
+
+ /* Make src coordinates relative to the viewport */
+ drm_rect_translate(&plane_state->uapi.src,
+ -(src_x << 16), -(src_y << 16));
+
+ /* Rotate src coordinates to match rotated GTT view */
+ if (drm_rotation_90_or_270(rotation))
+ drm_rect_rotate(&plane_state->uapi.src,
+ src_w << 16, src_h << 16,
+ DRM_MODE_ROTATE_270);
+
+ for (i = 0; i < num_planes; i++) {
+ unsigned int hsub = i ? fb->format->hsub : 1;
+ unsigned int vsub = i ? fb->format->vsub : 1;
+ unsigned int cpp = fb->format->cpp[i];
+ unsigned int tile_width, tile_height;
+ unsigned int width, height;
+ unsigned int pitch_tiles;
+ unsigned int x, y;
+ u32 offset;
+
+ intel_tile_dims(fb, i, &tile_width, &tile_height);
+
+ x = src_x / hsub;
+ y = src_y / vsub;
+ width = src_w / hsub;
+ height = src_h / vsub;
+
+ /*
+ * First pixel of the src viewport from the
+ * start of the normal gtt mapping.
+ */
+ x += intel_fb->normal[i].x;
+ y += intel_fb->normal[i].y;
+
+ offset = intel_compute_aligned_offset(dev_priv, &x, &y,
+ fb, i, fb->pitches[i],
+ DRM_MODE_ROTATE_0, tile_size);
+ offset /= tile_size;
+
+ drm_WARN_ON(&dev_priv->drm, i >= ARRAY_SIZE(info->plane));
+ info->plane[i].offset = offset;
+ info->plane[i].stride = DIV_ROUND_UP(fb->pitches[i],
+ tile_width * cpp);
+ info->plane[i].width = DIV_ROUND_UP(x + width, tile_width);
+ info->plane[i].height = DIV_ROUND_UP(y + height, tile_height);
+
+ if (drm_rotation_90_or_270(rotation)) {
+ struct drm_rect r;
+
+ /* rotate the x/y offsets to match the GTT view */
+ drm_rect_init(&r, x, y, width, height);
+ drm_rect_rotate(&r,
+ info->plane[i].width * tile_width,
+ info->plane[i].height * tile_height,
+ DRM_MODE_ROTATE_270);
+ x = r.x1;
+ y = r.y1;
+
+ pitch_tiles = info->plane[i].height;
+ plane_state->color_plane[i].stride = pitch_tiles * tile_height;
+
+ /* rotate the tile dimensions to match the GTT view */
+ swap(tile_width, tile_height);
+ } else {
+ pitch_tiles = info->plane[i].width;
+ plane_state->color_plane[i].stride = pitch_tiles * tile_width * cpp;
+ }
+
+ /*
+ * We only keep the x/y offsets, so push all of the
+ * gtt offset into the x/y offsets.
+ */
+ intel_adjust_tile_offset(&x, &y,
+ tile_width, tile_height,
+ tile_size, pitch_tiles,
+ gtt_offset * tile_size, 0);
+
+ gtt_offset += info->plane[i].width * info->plane[i].height;
+
+ plane_state->color_plane[i].offset = 0;
+ plane_state->color_plane[i].x = x;
+ plane_state->color_plane[i].y = y;
+ }
+}
+
+void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
+ const struct drm_framebuffer *fb,
+ unsigned int rotation)
+{
+ memset(view, 0, sizeof(*view));
+
+ view->type = I915_GGTT_VIEW_NORMAL;
+ if (drm_rotation_90_or_270(rotation)) {
+ view->type = I915_GGTT_VIEW_ROTATED;
+ view->rotated = to_intel_framebuffer(fb)->rot_info;
+ }
+}
+
int intel_plane_check_stride(const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
@@ -96,3 +855,51 @@ int intel_plane_check_stride(const struct intel_plane_state *plane_state)
return 0;
}
+
+int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
+{
+ const struct intel_framebuffer *fb =
+ to_intel_framebuffer(plane_state->hw.fb);
+ unsigned int rotation = plane_state->hw.rotation;
+ int i, num_planes;
+
+ if (!fb)
+ return 0;
+
+ num_planes = fb->base.format->num_planes;
+
+ if (intel_plane_needs_remap(plane_state)) {
+ intel_plane_remap_gtt(plane_state);
+
+ /*
+ * Sometimes even remapping can't overcome
+ * the stride limitations :( Can happen with
+ * big plane sizes and suitably misaligned
+ * offsets.
+ */
+ return intel_plane_check_stride(plane_state);
+ }
+
+ intel_fill_fb_ggtt_view(&plane_state->view, &fb->base, rotation);
+
+ for (i = 0; i < num_planes; i++) {
+ plane_state->color_plane[i].stride = intel_fb_pitch(&fb->base, i, rotation);
+ plane_state->color_plane[i].offset = 0;
+
+ if (drm_rotation_90_or_270(rotation)) {
+ plane_state->color_plane[i].x = fb->rotated[i].x;
+ plane_state->color_plane[i].y = fb->rotated[i].y;
+ } else {
+ plane_state->color_plane[i].x = fb->normal[i].x;
+ plane_state->color_plane[i].y = fb->normal[i].y;
+ }
+ }
+
+ /* Rotate src coordinates to match rotated GTT view */
+ if (drm_rotation_90_or_270(rotation))
+ drm_rect_rotate(&plane_state->uapi.src,
+ fb->base.width << 16, fb->base.height << 16,
+ DRM_MODE_ROTATE_270);
+
+ return intel_plane_check_stride(plane_state);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index 8c15f4c9561b1..59f8715e0bdaf 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -10,11 +10,17 @@
struct drm_framebuffer;
+struct drm_i915_private;
+
+struct i915_ggtt_view;
+
struct intel_plane_state;
bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
+bool is_aux_plane(const struct drm_framebuffer *fb, int plane);
+bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int color_plane);
bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane);
@@ -24,4 +30,29 @@ int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane);
int intel_plane_check_stride(const struct intel_plane_state *plane_state);
+unsigned int intel_tile_size(const struct drm_i915_private *dev_priv);
+unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane);
+unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_plane);
+
+unsigned int intel_cursor_alignment(const struct drm_i915_private *dev_priv);
+
+void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
+ const struct drm_framebuffer *fb,
+ int color_plane);
+
+u32 intel_plane_adjust_aligned_offset(int *x, int *y,
+ const struct intel_plane_state *state,
+ int color_plane,
+ u32 old_offset, u32 new_offset);
+u32 intel_plane_compute_aligned_offset(int *x, int *y,
+ const struct intel_plane_state *state,
+ int color_plane);
+
+int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation);
+
+int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer *fb);
+void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view, const struct drm_framebuffer *fb,
+ unsigned int rotation);
+int intel_plane_compute_gtt(struct intel_plane_state *plane_state);
+
#endif /* __INTEL_FB_H__ */
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 11/25] drm/i915/intel_fb: Unexport intel_fb_check_stride()
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (9 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 10/25] drm/i915/intel_fb: Pull FB plane functions from intel_display.c Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 12/25] drm/i915/intel_fb: s/dev_priv/i915/ Imre Deak
` (29 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
After the previous patch we can unexport intel_fb_check_stride(), which
isn't needed by intel_display.c.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
drivers/gpu/drm/i915/display/intel_fb.h | 2 --
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index b872eb29fd0d7..8cc93d89fc0aa 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -824,7 +824,7 @@ void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
}
}
-int intel_plane_check_stride(const struct intel_plane_state *plane_state)
+static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index 59f8715e0bdaf..042946f452f09 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -28,8 +28,6 @@ int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane);
int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane);
int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane);
-int intel_plane_check_stride(const struct intel_plane_state *plane_state);
-
unsigned int intel_tile_size(const struct drm_i915_private *dev_priv);
unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane);
unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_plane);
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 12/25] drm/i915/intel_fb: s/dev_priv/i915/
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (10 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 11/25] drm/i915/intel_fb: Unexport intel_fb_check_stride() Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 13/25] drm/i915/intel_fb: Factor out convert_plane_offset_to_xy() Imre Deak
` (28 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
Rename dev_priv to i915 in the intel_fb.[ch] files.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 66 ++++++++++++-------------
drivers/gpu/drm/i915/display/intel_fb.h | 6 +--
2 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 8cc93d89fc0aa..f4579f306733f 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -80,9 +80,9 @@ int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
return 0;
}
-unsigned int intel_tile_size(const struct drm_i915_private *dev_priv)
+unsigned int intel_tile_size(const struct drm_i915_private *i915)
{
- return IS_DISPLAY_VER(dev_priv, 2) ? 2048 : 4096;
+ return IS_DISPLAY_VER(i915, 2) ? 2048 : 4096;
}
unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane)
@@ -115,13 +115,13 @@ unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_pla
return fb->pitches[color_plane] * tile_height;
}
-unsigned int intel_cursor_alignment(const struct drm_i915_private *dev_priv)
+unsigned int intel_cursor_alignment(const struct drm_i915_private *i915)
{
- if (IS_I830(dev_priv))
+ if (IS_I830(i915))
return 16 * 1024;
- else if (IS_I85X(dev_priv))
+ else if (IS_I85X(i915))
return 256;
- else if (IS_I845G(dev_priv) || IS_I865G(dev_priv))
+ else if (IS_I845G(i915) || IS_I865G(i915))
return 32;
else
return 4 * 1024;
@@ -216,16 +216,16 @@ static u32 intel_adjust_aligned_offset(int *x, int *y,
unsigned int pitch,
u32 old_offset, u32 new_offset)
{
- struct drm_i915_private *dev_priv = to_i915(fb->dev);
+ struct drm_i915_private *i915 = to_i915(fb->dev);
unsigned int cpp = fb->format->cpp[color_plane];
- drm_WARN_ON(&dev_priv->drm, new_offset > old_offset);
+ drm_WARN_ON(&i915->drm, new_offset > old_offset);
if (!is_surface_linear(fb, color_plane)) {
unsigned int tile_size, tile_width, tile_height;
unsigned int pitch_tiles;
- tile_size = intel_tile_size(dev_priv);
+ tile_size = intel_tile_size(i915);
intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
if (drm_rotation_90_or_270(rotation)) {
@@ -277,7 +277,7 @@ u32 intel_plane_adjust_aligned_offset(int *x, int *y,
* used. This is why the user has to pass in the pitch since it
* is specified in the rotated orientation.
*/
-static u32 intel_compute_aligned_offset(struct drm_i915_private *dev_priv,
+static u32 intel_compute_aligned_offset(struct drm_i915_private *i915,
int *x, int *y,
const struct drm_framebuffer *fb,
int color_plane,
@@ -292,7 +292,7 @@ static u32 intel_compute_aligned_offset(struct drm_i915_private *dev_priv,
unsigned int tile_size, tile_width, tile_height;
unsigned int tile_rows, tiles, pitch_tiles;
- tile_size = intel_tile_size(dev_priv);
+ tile_size = intel_tile_size(i915);
intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
if (drm_rotation_90_or_270(rotation)) {
@@ -337,18 +337,18 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
int color_plane)
{
struct intel_plane *intel_plane = to_intel_plane(state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
+ struct drm_i915_private *i915 = to_i915(intel_plane->base.dev);
const struct drm_framebuffer *fb = state->hw.fb;
unsigned int rotation = state->hw.rotation;
int pitch = state->color_plane[color_plane].stride;
u32 alignment;
if (intel_plane->id == PLANE_CURSOR)
- alignment = intel_cursor_alignment(dev_priv);
+ alignment = intel_cursor_alignment(i915);
else
alignment = intel_surf_alignment(fb, color_plane);
- return intel_compute_aligned_offset(dev_priv, x, y, fb, color_plane,
+ return intel_compute_aligned_offset(i915, x, y, fb, color_plane,
pitch, rotation, alignment);
}
@@ -357,20 +357,20 @@ static int intel_fb_offset_to_xy(int *x, int *y,
const struct drm_framebuffer *fb,
int color_plane)
{
- struct drm_i915_private *dev_priv = to_i915(fb->dev);
+ struct drm_i915_private *i915 = to_i915(fb->dev);
unsigned int height;
u32 alignment;
- if (DISPLAY_VER(dev_priv) >= 12 &&
+ if (DISPLAY_VER(i915) >= 12 &&
is_semiplanar_uv_plane(fb, color_plane))
alignment = intel_tile_row_size(fb, color_plane);
else if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
- alignment = intel_tile_size(dev_priv);
+ alignment = intel_tile_size(i915);
else
alignment = 0;
if (alignment != 0 && fb->offsets[color_plane] % alignment) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"Misaligned offset 0x%08x for color plane %d\n",
fb->offsets[color_plane], color_plane);
return -EINVAL;
@@ -382,7 +382,7 @@ static int intel_fb_offset_to_xy(int *x, int *y,
/* Catch potential overflows early */
if (add_overflows_t(u32, mul_u32_u32(height, fb->pitches[color_plane]),
fb->offsets[color_plane])) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"Bad offset 0x%08x or pitch %d for color plane %d\n",
fb->offsets[color_plane], fb->pitches[color_plane],
color_plane);
@@ -447,7 +447,7 @@ static int intel_fb_check_ccs_xy(struct drm_framebuffer *fb, int ccs_plane, int
static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int i;
@@ -461,7 +461,7 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
* Would also need to deal with the fence POT alignment
* and gen2 2KiB GTT tile size.
*/
- if (DISPLAY_VER(dev_priv) < 4)
+ if (DISPLAY_VER(i915) < 4)
return false;
/*
@@ -473,7 +473,7 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
/* Linear needs a page aligned stride for remapping */
if (fb->modifier == DRM_FORMAT_MOD_LINEAR) {
- unsigned int alignment = intel_tile_size(dev_priv) - 1;
+ unsigned int alignment = intel_tile_size(i915) - 1;
for (i = 0; i < fb->format->num_planes; i++) {
if (fb->pitches[i] & alignment)
@@ -580,14 +580,14 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
return plane_info->width * plane_info->height;
}
-int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer *fb)
+int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb)
{
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
struct drm_i915_gem_object *obj = intel_fb_obj(fb);
u32 gtt_offset_rotated = 0;
unsigned int max_size = 0;
int i, num_planes = fb->format->num_planes;
- unsigned int tile_size = intel_tile_size(dev_priv);
+ unsigned int tile_size = intel_tile_size(i915);
for (i = 0; i < num_planes; i++) {
unsigned int width, height;
@@ -613,7 +613,7 @@ int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer
ret = intel_fb_offset_to_xy(&x, &y, fb, i);
if (ret) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"bad fb plane %d offset: 0x%x\n",
i, fb->offsets[i]);
return ret;
@@ -634,7 +634,7 @@ int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer
*/
if (i == 0 && i915_gem_object_is_tiled(obj) &&
(x + width) * cpp > fb->pitches[i]) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"bad fb plane %d offset: 0x%x\n",
i, fb->offsets[i]);
return -EINVAL;
@@ -647,7 +647,7 @@ int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer
intel_fb->normal[i].x = x;
intel_fb->normal[i].y = y;
- offset = intel_compute_aligned_offset(dev_priv, &x, &y, fb, i,
+ offset = intel_compute_aligned_offset(i915, &x, &y, fb, i,
fb->pitches[i],
DRM_MODE_ROTATE_0,
tile_size);
@@ -692,7 +692,7 @@ int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer
}
if (mul_u32_u32(max_size, tile_size) > obj->base.size) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"fb too big for bo (need %llu bytes, have %zu bytes)\n",
mul_u32_u32(max_size, tile_size), obj->base.size);
return -EINVAL;
@@ -703,14 +703,14 @@ int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer
static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
+ struct drm_i915_private *i915 =
to_i915(plane_state->uapi.plane->dev);
struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
struct intel_rotation_info *info = &plane_state->view.rotated;
unsigned int rotation = plane_state->hw.rotation;
int i, num_planes = fb->format->num_planes;
- unsigned int tile_size = intel_tile_size(dev_priv);
+ unsigned int tile_size = intel_tile_size(i915);
unsigned int src_x, src_y;
unsigned int src_w, src_h;
u32 gtt_offset = 0;
@@ -724,7 +724,7 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
- drm_WARN_ON(&dev_priv->drm, is_ccs_modifier(fb->modifier));
+ drm_WARN_ON(&i915->drm, is_ccs_modifier(fb->modifier));
/* Make src coordinates relative to the viewport */
drm_rect_translate(&plane_state->uapi.src,
@@ -760,12 +760,12 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
x += intel_fb->normal[i].x;
y += intel_fb->normal[i].y;
- offset = intel_compute_aligned_offset(dev_priv, &x, &y,
+ offset = intel_compute_aligned_offset(i915, &x, &y,
fb, i, fb->pitches[i],
DRM_MODE_ROTATE_0, tile_size);
offset /= tile_size;
- drm_WARN_ON(&dev_priv->drm, i >= ARRAY_SIZE(info->plane));
+ drm_WARN_ON(&i915->drm, i >= ARRAY_SIZE(info->plane));
info->plane[i].offset = offset;
info->plane[i].stride = DIV_ROUND_UP(fb->pitches[i],
tile_width * cpp);
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index 042946f452f09..bd1551c694eb3 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -28,11 +28,11 @@ int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane);
int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane);
int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane);
-unsigned int intel_tile_size(const struct drm_i915_private *dev_priv);
+unsigned int intel_tile_size(const struct drm_i915_private *i915);
unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane);
unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_plane);
-unsigned int intel_cursor_alignment(const struct drm_i915_private *dev_priv);
+unsigned int intel_cursor_alignment(const struct drm_i915_private *i915);
void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
const struct drm_framebuffer *fb,
@@ -48,7 +48,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation);
-int intel_fill_fb_info(struct drm_i915_private *dev_priv, struct drm_framebuffer *fb);
+int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb);
void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view, const struct drm_framebuffer *fb,
unsigned int rotation);
int intel_plane_compute_gtt(struct intel_plane_state *plane_state);
--
2.25.1
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^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 13/25] drm/i915/intel_fb: Factor out convert_plane_offset_to_xy()
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (11 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 12/25] drm/i915/intel_fb: s/dev_priv/i915/ Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 14/25] drm/i915/intel_fb: Factor out calc_plane_aligned_offset() Imre Deak
` (27 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
Factor out to a new function the logic to convert the FB plane offset to
x/y and check the validity of x/y, with the goal to make
intel_fill_fb_info() more readable.
v2: Use &fb->base instead of a drm_fb alias. (Ville)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 69 +++++++++++++++----------
1 file changed, 41 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index f4579f306733f..25b967220cf04 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -400,10 +400,10 @@ static int intel_fb_offset_to_xy(int *x, int *y,
return 0;
}
-static int intel_fb_check_ccs_xy(struct drm_framebuffer *fb, int ccs_plane, int x, int y)
+static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane, int x, int y)
{
struct drm_i915_private *i915 = to_i915(fb->dev);
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+ const struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
int main_plane;
int hsub, vsub;
int tile_width, tile_height;
@@ -520,6 +520,44 @@ static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
return stride > max_stride;
}
+static int convert_plane_offset_to_xy(const struct intel_framebuffer *fb, int color_plane,
+ int plane_width, int *x, int *y)
+{
+ struct drm_i915_gem_object *obj = intel_fb_obj(&fb->base);
+ int ret;
+
+ ret = intel_fb_offset_to_xy(x, y, &fb->base, color_plane);
+ if (ret) {
+ drm_dbg_kms(fb->base.dev,
+ "bad fb plane %d offset: 0x%x\n",
+ color_plane, fb->base.offsets[color_plane]);
+ return ret;
+ }
+
+ ret = intel_fb_check_ccs_xy(&fb->base, color_plane, *x, *y);
+ if (ret)
+ return ret;
+
+ /*
+ * The fence (if used) is aligned to the start of the object
+ * so having the framebuffer wrap around across the edge of the
+ * fenced region doesn't really work. We have no API to configure
+ * the fence start offset within the object (nor could we probably
+ * on gen2/3). So it's just easier if we just require that the
+ * fb layout agrees with the fence layout. We already check that the
+ * fb stride matches the fence stride elsewhere.
+ */
+ if (color_plane == 0 && i915_gem_object_is_tiled(obj) &&
+ (*x + plane_width) * fb->base.format->cpp[color_plane] > fb->base.pitches[color_plane]) {
+ drm_dbg_kms(fb->base.dev,
+ "bad fb plane %d offset: 0x%x\n",
+ color_plane, fb->base.offsets[color_plane]);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
/*
* Setup the rotated view for an FB plane and return the size the GTT mapping
* requires for this view.
@@ -611,35 +649,10 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
cpp = fb->format->cpp[i];
intel_fb_plane_dims(&width, &height, fb, i);
- ret = intel_fb_offset_to_xy(&x, &y, fb, i);
- if (ret) {
- drm_dbg_kms(&i915->drm,
- "bad fb plane %d offset: 0x%x\n",
- i, fb->offsets[i]);
- return ret;
- }
-
- ret = intel_fb_check_ccs_xy(fb, i, x, y);
+ ret = convert_plane_offset_to_xy(intel_fb, i, width, &x, &y);
if (ret)
return ret;
- /*
- * The fence (if used) is aligned to the start of the object
- * so having the framebuffer wrap around across the edge of the
- * fenced region doesn't really work. We have no API to configure
- * the fence start offset within the object (nor could we probably
- * on gen2/3). So it's just easier if we just require that the
- * fb layout agrees with the fence layout. We already check that the
- * fb stride matches the fence stride elsewhere.
- */
- if (i == 0 && i915_gem_object_is_tiled(obj) &&
- (x + width) * cpp > fb->pitches[i]) {
- drm_dbg_kms(&i915->drm,
- "bad fb plane %d offset: 0x%x\n",
- i, fb->offsets[i]);
- return -EINVAL;
- }
-
/*
* First pixel of the framebuffer from
* the start of the normal gtt mapping.
--
2.25.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 14/25] drm/i915/intel_fb: Factor out calc_plane_aligned_offset()
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (12 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 13/25] drm/i915/intel_fb: Factor out convert_plane_offset_to_xy() Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 15/25] drm/i915/intel_fb: Factor out calc_plane_normal_size() Imre Deak
` (26 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
Factor out to a new function the logic to convert the FB plane x/y
values to a tile size based offset and new x/y relative to this offset.
This makes intel_fill_fb_info() and intel_plane_remap_gtt() somewhat
more readable.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 25b967220cf04..1400a31f0dd6b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -558,6 +558,20 @@ static int convert_plane_offset_to_xy(const struct intel_framebuffer *fb, int co
return 0;
}
+static u32 calc_plane_aligned_offset(const struct intel_framebuffer *fb, int color_plane, int *x, int *y)
+{
+ struct drm_i915_private *i915 = to_i915(fb->base.dev);
+ unsigned int tile_size = intel_tile_size(i915);
+ u32 offset;
+
+ offset = intel_compute_aligned_offset(i915, x, y, &fb->base, color_plane,
+ fb->base.pitches[color_plane],
+ DRM_MODE_ROTATE_0,
+ tile_size);
+
+ return offset / tile_size;
+}
+
/*
* Setup the rotated view for an FB plane and return the size the GTT mapping
* requires for this view.
@@ -660,11 +674,7 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
intel_fb->normal[i].x = x;
intel_fb->normal[i].y = y;
- offset = intel_compute_aligned_offset(i915, &x, &y, fb, i,
- fb->pitches[i],
- DRM_MODE_ROTATE_0,
- tile_size);
- offset /= tile_size;
+ offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
if (!is_surface_linear(fb, i)) {
struct intel_remapped_plane_info plane_info;
@@ -773,10 +783,7 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
x += intel_fb->normal[i].x;
y += intel_fb->normal[i].y;
- offset = intel_compute_aligned_offset(i915, &x, &y,
- fb, i, fb->pitches[i],
- DRM_MODE_ROTATE_0, tile_size);
- offset /= tile_size;
+ offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
drm_WARN_ON(&i915->drm, i >= ARRAY_SIZE(info->plane));
info->plane[i].offset = offset;
--
2.25.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 15/25] drm/i915/intel_fb: Factor out calc_plane_normal_size()
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (13 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 14/25] drm/i915/intel_fb: Factor out calc_plane_aligned_offset() Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-26 16:22 ` Ville Syrjälä
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 16/25] drm/i915: Unify the FB and plane state view information into one struct Imre Deak
` (25 subsequent siblings)
40 siblings, 1 reply; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
Factor out to a new function the logic to calculate an FB plane's
normal-view size.
Instead of using intel_remapped_plane_info, which is related only to
remapping, add a helper to get the tile pitch and rows for an FB plane,
so these helpers can be used both by the normal size calculation and the
remapping code.
Also add a new fb_plane_view_dims struct in which we can pass around the
view (either FB plane or plane source) and tile dimensions conveniently
to functions calculating further view parameters.
v2:
- Add back the +1 tile adjustment for x!=0 in calc_plane_normal_size(). (Ville)
- s/pages/tiles/ in calc_plane_normal_size(). (Ville)
- Add a helper for the plane view width calculation. (Ville)
- Return tiles as unsigned int from calc_plane_normal_size().
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 97 +++++++++++++++++++------
1 file changed, 76 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 1400a31f0dd6b..6f8206769c3df 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -632,6 +632,74 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
return plane_info->width * plane_info->height;
}
+struct fb_plane_view_dims {
+ unsigned int width, height;
+ unsigned int tile_width, tile_height;
+};
+
+static void init_plane_view_dims(const struct intel_framebuffer *fb, int color_plane,
+ unsigned int width, unsigned int height,
+ struct fb_plane_view_dims *dims)
+{
+ dims->width = width;
+ dims->height = height;
+
+ intel_tile_dims(&fb->base, color_plane, &dims->tile_width, &dims->tile_height);
+}
+
+static unsigned int
+plane_view_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
+ const struct fb_plane_view_dims *dims)
+{
+ return DIV_ROUND_UP(fb->base.pitches[color_plane],
+ dims->tile_width * fb->base.format->cpp[color_plane]);
+}
+
+static unsigned int
+plane_view_width_tiles(const struct intel_framebuffer *fb, int color_plane,
+ const struct fb_plane_view_dims *dims,
+ int x)
+{
+ return DIV_ROUND_UP(x + dims->width, dims->tile_width);
+}
+
+static unsigned int
+plane_view_height_tiles(const struct intel_framebuffer *fb, int color_plane,
+ const struct fb_plane_view_dims *dims,
+ int y)
+{
+ return DIV_ROUND_UP(y + dims->height, dims->tile_height);
+}
+
+/* Return number of tiles @color_plane needs. */
+static unsigned int
+calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
+ const struct fb_plane_view_dims *dims,
+ int x, int y)
+{
+ struct drm_i915_private *i915 = to_i915(fb->base.dev);
+ unsigned int tiles;
+
+ if (is_surface_linear(&fb->base, color_plane)) {
+ unsigned int size;
+
+ size = (y + dims->height) * fb->base.pitches[color_plane] +
+ x * fb->base.format->cpp[color_plane];
+ tiles = DIV_ROUND_UP(size, intel_tile_size(i915));
+ } else {
+ tiles = plane_view_stride_tiles(fb, color_plane, dims) *
+ plane_view_height_tiles(fb, color_plane, dims, y);
+ /*
+ * If the plane isn't horizontally tile aligned,
+ * we need one more tile.
+ */
+ if (x != 0)
+ tiles++;
+ }
+
+ return tiles;
+}
+
int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb)
{
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
@@ -642,6 +710,7 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
unsigned int tile_size = intel_tile_size(i915);
for (i = 0; i < num_planes; i++) {
+ struct fb_plane_view_dims view_dims;
unsigned int width, height;
unsigned int cpp, size;
u32 offset;
@@ -667,6 +736,8 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
if (ret)
return ret;
+ init_plane_view_dims(intel_fb, i, width, height, &view_dims);
+
/*
* First pixel of the framebuffer from
* the start of the normal gtt mapping.
@@ -678,38 +749,22 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
if (!is_surface_linear(fb, i)) {
struct intel_remapped_plane_info plane_info;
- unsigned int tile_width, tile_height;
-
- intel_tile_dims(fb, i, &tile_width, &tile_height);
plane_info.offset = offset;
- plane_info.stride = DIV_ROUND_UP(fb->pitches[i],
- tile_width * cpp);
- plane_info.width = DIV_ROUND_UP(x + width, tile_width);
- plane_info.height = DIV_ROUND_UP(y + height,
- tile_height);
-
- /* how many tiles does this plane need */
- size = plane_info.stride * plane_info.height;
- /*
- * If the plane isn't horizontally tile aligned,
- * we need one more tile.
- */
- if (x != 0)
- size++;
+ plane_info.stride = plane_view_stride_tiles(intel_fb, i, &view_dims);
+ plane_info.width = plane_view_width_tiles(intel_fb, i, &view_dims, x);
+ plane_info.height = plane_view_height_tiles(intel_fb, i, &view_dims, y);
gtt_offset_rotated +=
setup_fb_rotation(i, &plane_info,
gtt_offset_rotated,
x, y, width, height,
tile_size,
- tile_width, tile_height,
+ view_dims.tile_width, view_dims.tile_height,
fb);
- } else {
- size = DIV_ROUND_UP((y + height) * fb->pitches[i] +
- x * cpp, tile_size);
}
+ size = calc_plane_normal_size(intel_fb, i, &view_dims, x, y);
/* how many tiles in total needed in the bo */
max_size = max(max_size, offset + size);
}
--
2.25.1
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^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 16/25] drm/i915: Unify the FB and plane state view information into one struct
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (14 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 15/25] drm/i915/intel_fb: Factor out calc_plane_normal_size() Imre Deak
@ 2021-03-25 21:47 ` Imre Deak
2021-03-26 16:33 ` Ville Syrjälä
2021-03-27 22:09 ` [Intel-gfx] [PATCH v3 " Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 17/25] drm/i915: Store the normal view FB pitch in FB's intel_fb_view Imre Deak
` (24 subsequent siblings)
40 siblings, 2 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:47 UTC (permalink / raw)
To: intel-gfx
To allow the simplification of FB/plane view computation in the
follow-up patches, unify the corresponding state in the
intel_framebuffer and intel_plane_state structs into a new intel_fb_view
struct.
This adds some overhead to intel_framebuffer as the rotated view will
have now space for 4 color planes instead of the required 2 and it'll
also contain the unused offset for each color_plane info. Imo this is an
acceptable trade-off to get a simplified way of the remap computation.
Use the new intel_fb_view struct for the FB normal view as well, so (in
the follow-up patches) we can remove the special casing for normal view
calculation wrt. the calculation of remapped/rotated views. This also
adds an overhead to the intel_framebuffer struct, as the gtt remap info
and per-color plane offset/pitch is not required for the normal view,
but imo this is an acceptable trade-off as above. The per-color plane
pitch filed will be used by a follow-up patch, so we can retrieve the
pitch for each view in the same way.
No functional changes in this patch.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 20 +++---
drivers/gpu/drm/i915/display/intel_cursor.c | 14 ++--
drivers/gpu/drm/i915/display/intel_display.c | 22 +++---
.../drm/i915/display/intel_display_types.h | 61 ++++++++++------
drivers/gpu/drm/i915/display/intel_fb.c | 66 ++++++++---------
drivers/gpu/drm/i915/display/intel_fb.h | 3 +
drivers/gpu/drm/i915/display/intel_fbc.c | 6 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 26 +++----
.../drm/i915/display/skl_universal_plane.c | 71 +++++++++----------
9 files changed, 153 insertions(+), 136 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 40266b78247b2..8ee59490c027a 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -271,7 +271,7 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
u32 alignment = intel_surf_alignment(fb, 0);
int cpp = fb->format->cpp[0];
- while ((src_x + src_w) * cpp > plane_state->color_plane[0].stride) {
+ while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].pitch) {
if (offset == 0) {
drm_dbg_kms(&dev_priv->drm,
"Unable to find suitable display surface offset due to X-tiling\n");
@@ -311,9 +311,9 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
drm_WARN_ON(&dev_priv->drm, src_x > 4095 || src_y > 4095);
}
- plane_state->color_plane[0].offset = offset;
- plane_state->color_plane[0].x = src_x;
- plane_state->color_plane[0].y = src_y;
+ plane_state->view.color_plane[0].offset = offset;
+ plane_state->view.color_plane[0].x = src_x;
+ plane_state->view.color_plane[0].y = src_y;
return 0;
}
@@ -424,8 +424,8 @@ static void i9xx_update_plane(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
u32 linear_offset;
- int x = plane_state->color_plane[0].x;
- int y = plane_state->color_plane[0].y;
+ int x = plane_state->view.color_plane[0].x;
+ int y = plane_state->view.color_plane[0].y;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
int crtc_w = drm_rect_width(&plane_state->uapi.dst);
@@ -439,14 +439,14 @@ static void i9xx_update_plane(struct intel_plane *plane,
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
if (DISPLAY_VER(dev_priv) >= 4)
- dspaddr_offset = plane_state->color_plane[0].offset;
+ dspaddr_offset = plane_state->view.color_plane[0].offset;
else
dspaddr_offset = linear_offset;
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DSPSTRIDE(i9xx_plane),
- plane_state->color_plane[0].stride);
+ plane_state->view.color_plane[0].pitch);
if (DISPLAY_VER(dev_priv) < 4) {
/*
@@ -531,7 +531,7 @@ g4x_primary_async_flip(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
u32 dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state);
- u32 dspaddr_offset = plane_state->color_plane[0].offset;
+ u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
unsigned long irqflags;
@@ -552,7 +552,7 @@ vlv_primary_async_flip(struct intel_plane *plane,
bool async_flip)
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- u32 dspaddr_offset = plane_state->color_plane[0].offset;
+ u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
unsigned long irqflags;
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 84099b7f5c358..03dad12cf78fc 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -45,7 +45,7 @@ static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
else
base = intel_plane_ggtt_offset(plane_state);
- return base + plane_state->color_plane[0].offset;
+ return base + plane_state->view.color_plane[0].offset;
}
static u32 intel_cursor_position(const struct intel_plane_state *plane_state)
@@ -125,9 +125,9 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
offset += (src_h * src_w - 1) * fb->format->cpp[0];
}
- plane_state->color_plane[0].offset = offset;
- plane_state->color_plane[0].x = src_x;
- plane_state->color_plane[0].y = src_y;
+ plane_state->view.color_plane[0].offset = offset;
+ plane_state->view.color_plane[0].x = src_x;
+ plane_state->view.color_plane[0].y = src_y;
return 0;
}
@@ -194,7 +194,7 @@ static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state,
{
return CURSOR_ENABLE |
CURSOR_FORMAT_ARGB |
- CURSOR_STRIDE(plane_state->color_plane[0].stride);
+ CURSOR_STRIDE(plane_state->view.color_plane[0].pitch);
}
static bool i845_cursor_size_ok(const struct intel_plane_state *plane_state)
@@ -233,7 +233,7 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
}
drm_WARN_ON(&i915->drm, plane_state->uapi.visible &&
- plane_state->color_plane[0].stride != fb->pitches[0]);
+ plane_state->view.color_plane[0].pitch != fb->pitches[0]);
switch (fb->pitches[0]) {
case 256:
@@ -450,7 +450,7 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
}
drm_WARN_ON(&dev_priv->drm, plane_state->uapi.visible &&
- plane_state->color_plane[0].stride != fb->pitches[0]);
+ plane_state->view.color_plane[0].pitch != fb->pitches[0]);
if (fb->pitches[0] !=
drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 25eaa8a44baa8..4ee7e72142a5f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1013,7 +1013,7 @@ static bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
return DISPLAY_VER(dev_priv) < 4 ||
(plane->has_fbc &&
- plane_state->view.type == I915_GGTT_VIEW_NORMAL);
+ plane_state->view.gtt.type == I915_GGTT_VIEW_NORMAL);
}
struct i915_vma *
@@ -1161,7 +1161,7 @@ u32 intel_fb_xy_to_linear(int x, int y,
{
const struct drm_framebuffer *fb = state->hw.fb;
unsigned int cpp = fb->format->cpp[color_plane];
- unsigned int pitch = state->color_plane[color_plane].stride;
+ unsigned int pitch = state->view.color_plane[color_plane].pitch;
return y * pitch + x * cpp;
}
@@ -1176,8 +1176,8 @@ void intel_add_fb_offsets(int *x, int *y,
int color_plane)
{
- *x += state->color_plane[color_plane].x;
- *y += state->color_plane[color_plane].y;
+ *x += state->view.color_plane[color_plane].x;
+ *y += state->view.color_plane[color_plane].y;
}
static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)
@@ -1680,9 +1680,9 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
valid_fb:
plane_state->rotation = plane_config->rotation;
- intel_fill_fb_ggtt_view(&intel_state->view, fb,
+ intel_fill_fb_ggtt_view(&intel_state->view.gtt, fb,
plane_state->rotation);
- intel_state->color_plane[0].stride =
+ intel_state->view.color_plane[0].pitch =
intel_fb_pitch(fb, 0, plane_state->rotation);
__i915_vma_pin(vma);
@@ -1723,7 +1723,7 @@ intel_plane_fence_y_offset(const struct intel_plane_state *plane_state)
int x = 0, y = 0;
intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
- plane_state->color_plane[0].offset, 0);
+ plane_state->view.color_plane[0].offset, 0);
return y;
}
@@ -6787,8 +6787,6 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE;
linked_state->color_ctl = plane_state->color_ctl;
linked_state->view = plane_state->view;
- memcpy(linked_state->color_plane, plane_state->color_plane,
- sizeof(linked_state->color_plane));
intel_plane_copy_hw_state(linked_state, plane_state);
linked_state->uapi.src = plane_state->uapi.src;
@@ -9320,8 +9318,8 @@ static int intel_atomic_check_async(struct intel_atomic_state *state)
return -EINVAL;
}
- if (old_plane_state->color_plane[0].stride !=
- new_plane_state->color_plane[0].stride) {
+ if (old_plane_state->view.color_plane[0].pitch !=
+ new_plane_state->view.color_plane[0].pitch) {
drm_dbg_kms(&i915->drm, "Stride cannot be changed in async flip\n");
return -EINVAL;
}
@@ -10546,7 +10544,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state)
INTEL_INFO(dev_priv)->display.cursor_needs_physical;
vma = intel_pin_and_fence_fb_obj(fb, phys_cursor,
- &plane_state->view,
+ &plane_state->view.gtt,
intel_plane_uses_fence(plane_state),
&plane_state->flags);
if (IS_ERR(vma))
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 80983cfe9d3b0..b72861f6f68a7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -85,20 +85,49 @@ enum intel_broadcast_rgb {
INTEL_BROADCAST_RGB_LIMITED,
};
+struct intel_fb_view {
+ /*
+ * The remap information used in the remapped and rotated views to
+ * create the DMA scatter-gather list for each FB color plane. This sg
+ * list is created along with the view type (gtt.type) specific
+ * i915_vma object and contains the list of FB object pages (reordered
+ * in the rotated view) that are visible in the view.
+ * In the normal view the FB object's backing store sg list is used
+ * directly and hence the remap information here is not used.
+ */
+ struct i915_ggtt_view gtt;
+
+ /*
+ * The GTT view (gtt.type) specific information for each FB color
+ * plane. In the normal GTT view all formats (up to 4 color planes),
+ * in the rotated and remapped GTT view all no-CCS formats (up to 2
+ * color planes) are supported.
+ *
+ * TODO: add support for CCS formats in the remapped GTT view.
+ *
+ * The view information shared by all FB color planes in the FB,
+ * like dst x/y and src/dst width, is stored separately in
+ * intel_plane_state.
+ */
+ struct i915_color_plane_view {
+ u32 offset;
+ unsigned int x, y;
+ /*
+ * Plane pitch (stride) in:
+ * bytes for 0/180 degree rotation
+ * pixels for 90/270 degree rotation
+ */
+ unsigned int pitch;
+ } color_plane[4];
+};
+
struct intel_framebuffer {
struct drm_framebuffer base;
struct intel_frontbuffer *frontbuffer;
- struct intel_rotation_info rot_info;
- /* for each plane in the normal GTT view */
- struct {
- unsigned int x, y;
- } normal[4];
- /* for each plane in the rotated GTT view for no-CCS formats */
- struct {
- unsigned int x, y;
- unsigned int pitch; /* pixels */
- } rotated[2];
+ /* Params to remap the FB pages and program the plane registers in each view. */
+ struct intel_fb_view normal_view;
+ struct intel_fb_view rotated_view;
};
struct intel_fbdev {
@@ -581,21 +610,11 @@ struct intel_plane_state {
enum drm_scaling_filter scaling_filter;
} hw;
- struct i915_ggtt_view view;
struct i915_vma *vma;
unsigned long flags;
#define PLANE_HAS_FENCE BIT(0)
- struct {
- u32 offset;
- /*
- * Plane stride in:
- * bytes for 0/180 degree rotation
- * pixels for 90/270 degree rotation
- */
- u32 stride;
- int x, y;
- } color_plane[4];
+ struct intel_fb_view view;
/* plane control register */
u32 ctl;
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 6f8206769c3df..b223e16eb6a22 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -259,7 +259,7 @@ u32 intel_plane_adjust_aligned_offset(int *x, int *y,
{
return intel_adjust_aligned_offset(x, y, state->hw.fb, color_plane,
state->hw.rotation,
- state->color_plane[color_plane].stride,
+ state->view.color_plane[color_plane].pitch,
old_offset, new_offset);
}
@@ -340,7 +340,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
struct drm_i915_private *i915 = to_i915(intel_plane->base.dev);
const struct drm_framebuffer *fb = state->hw.fb;
unsigned int rotation = state->hw.rotation;
- int pitch = state->color_plane[color_plane].stride;
+ int pitch = state->view.color_plane[color_plane].pitch;
u32 alignment;
if (intel_plane->id == PLANE_CURSOR)
@@ -423,8 +423,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
ccs_y = (y * vsub) % tile_height;
main_plane = skl_ccs_to_main_plane(fb, ccs_plane);
- main_x = intel_fb->normal[main_plane].x % tile_width;
- main_y = intel_fb->normal[main_plane].y % tile_height;
+ main_x = intel_fb->normal_view.color_plane[main_plane].x % tile_width;
+ main_y = intel_fb->normal_view.color_plane[main_plane].y % tile_height;
/*
* CCS doesn't have its own x/y offset register, so the intra CCS tile
@@ -435,8 +435,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
"Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
main_x, main_y,
ccs_x, ccs_y,
- intel_fb->normal[main_plane].x,
- intel_fb->normal[main_plane].y,
+ intel_fb->normal_view.color_plane[main_plane].x,
+ intel_fb->normal_view.color_plane[main_plane].y,
x, y);
return -EINVAL;
}
@@ -487,7 +487,7 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation)
{
if (drm_rotation_90_or_270(rotation))
- return to_intel_framebuffer(fb)->rotated[color_plane].pitch;
+ return to_intel_framebuffer(fb)->rotated_view.color_plane[color_plane].pitch;
else
return fb->pitches[color_plane];
}
@@ -584,7 +584,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
struct drm_framebuffer *fb)
{
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct intel_rotation_info *rot_info = &intel_fb->rot_info;
+ struct intel_rotation_info *rot_info = &intel_fb->rotated_view.gtt.rotated;
unsigned int pitch_tiles;
struct drm_rect r;
@@ -598,7 +598,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
rot_info->plane[plane] = *plane_info;
- intel_fb->rotated[plane].pitch = plane_info->height * tile_height;
+ intel_fb->rotated_view.color_plane[plane].pitch = plane_info->height * tile_height;
/* rotate the x/y offsets to match the GTT view */
drm_rect_init(&r, x, y, width, height);
@@ -610,7 +610,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
y = r.y1;
/* rotate the tile dimensions to match the GTT view */
- pitch_tiles = intel_fb->rotated[plane].pitch / tile_height;
+ pitch_tiles = intel_fb->rotated_view.color_plane[plane].pitch / tile_height;
swap(tile_width, tile_height);
/*
@@ -626,8 +626,8 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
* First pixel of the framebuffer from
* the start of the rotated gtt mapping.
*/
- intel_fb->rotated[plane].x = x;
- intel_fb->rotated[plane].y = y;
+ intel_fb->rotated_view.color_plane[plane].x = x;
+ intel_fb->rotated_view.color_plane[plane].y = y;
return plane_info->width * plane_info->height;
}
@@ -742,8 +742,8 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
* First pixel of the framebuffer from
* the start of the normal gtt mapping.
*/
- intel_fb->normal[i].x = x;
- intel_fb->normal[i].y = y;
+ intel_fb->normal_view.color_plane[i].x = x;
+ intel_fb->normal_view.color_plane[i].y = y;
offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
@@ -785,7 +785,7 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
to_i915(plane_state->uapi.plane->dev);
struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct intel_rotation_info *info = &plane_state->view.rotated;
+ struct intel_rotation_info *info = &plane_state->view.gtt.rotated;
unsigned int rotation = plane_state->hw.rotation;
int i, num_planes = fb->format->num_planes;
unsigned int tile_size = intel_tile_size(i915);
@@ -793,8 +793,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
unsigned int src_w, src_h;
u32 gtt_offset = 0;
- memset(&plane_state->view, 0, sizeof(plane_state->view));
- plane_state->view.type = drm_rotation_90_or_270(rotation) ?
+ memset(&plane_state->view.gtt, 0, sizeof(plane_state->view.gtt));
+ plane_state->view.gtt.type = drm_rotation_90_or_270(rotation) ?
I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
src_x = plane_state->uapi.src.x1 >> 16;
@@ -835,8 +835,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
* First pixel of the src viewport from the
* start of the normal gtt mapping.
*/
- x += intel_fb->normal[i].x;
- y += intel_fb->normal[i].y;
+ x += intel_fb->normal_view.color_plane[i].x;
+ y += intel_fb->normal_view.color_plane[i].y;
offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
@@ -860,13 +860,13 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
y = r.y1;
pitch_tiles = info->plane[i].height;
- plane_state->color_plane[i].stride = pitch_tiles * tile_height;
+ plane_state->view.color_plane[i].pitch = pitch_tiles * tile_height;
/* rotate the tile dimensions to match the GTT view */
swap(tile_width, tile_height);
} else {
pitch_tiles = info->plane[i].width;
- plane_state->color_plane[i].stride = pitch_tiles * tile_width * cpp;
+ plane_state->view.color_plane[i].pitch = pitch_tiles * tile_width * cpp;
}
/*
@@ -880,9 +880,9 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
gtt_offset += info->plane[i].width * info->plane[i].height;
- plane_state->color_plane[i].offset = 0;
- plane_state->color_plane[i].x = x;
- plane_state->color_plane[i].y = y;
+ plane_state->view.color_plane[i].offset = 0;
+ plane_state->view.color_plane[i].x = x;
+ plane_state->view.color_plane[i].y = y;
}
}
@@ -895,7 +895,7 @@ void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
view->type = I915_GGTT_VIEW_NORMAL;
if (drm_rotation_90_or_270(rotation)) {
view->type = I915_GGTT_VIEW_ROTATED;
- view->rotated = to_intel_framebuffer(fb)->rot_info;
+ view->rotated = to_intel_framebuffer(fb)->rotated_view.gtt.rotated;
}
}
@@ -917,7 +917,7 @@ static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
return 0;
/* FIXME other color planes? */
- stride = plane_state->color_plane[0].stride;
+ stride = plane_state->view.color_plane[0].pitch;
max_stride = plane->max_stride(plane, fb->format->format,
fb->modifier, rotation);
@@ -955,18 +955,18 @@ int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
return intel_plane_check_stride(plane_state);
}
- intel_fill_fb_ggtt_view(&plane_state->view, &fb->base, rotation);
+ intel_fill_fb_ggtt_view(&plane_state->view.gtt, &fb->base, rotation);
for (i = 0; i < num_planes; i++) {
- plane_state->color_plane[i].stride = intel_fb_pitch(&fb->base, i, rotation);
- plane_state->color_plane[i].offset = 0;
+ plane_state->view.color_plane[i].pitch = intel_fb_pitch(&fb->base, i, rotation);
+ plane_state->view.color_plane[i].offset = 0;
if (drm_rotation_90_or_270(rotation)) {
- plane_state->color_plane[i].x = fb->rotated[i].x;
- plane_state->color_plane[i].y = fb->rotated[i].y;
+ plane_state->view.color_plane[i].x = fb->rotated_view.color_plane[i].x;
+ plane_state->view.color_plane[i].y = fb->rotated_view.color_plane[i].y;
} else {
- plane_state->color_plane[i].x = fb->normal[i].x;
- plane_state->color_plane[i].y = fb->normal[i].y;
+ plane_state->view.color_plane[i].x = fb->normal_view.color_plane[i].x;
+ plane_state->view.color_plane[i].y = fb->normal_view.color_plane[i].y;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index bd1551c694eb3..8ffc883a83c34 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -14,8 +14,11 @@ struct drm_i915_private;
struct i915_ggtt_view;
+struct intel_fb_view;
struct intel_plane_state;
+enum i915_ggtt_view_type;
+
bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 88e02ee3a6312..f95794bda52ed 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -716,8 +716,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
*/
cache->plane.src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
- cache->plane.adjusted_x = plane_state->color_plane[0].x;
- cache->plane.adjusted_y = plane_state->color_plane[0].y;
+ cache->plane.adjusted_x = plane_state->view.color_plane[0].x;
+ cache->plane.adjusted_y = plane_state->view.color_plane[0].y;
cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode;
@@ -725,7 +725,7 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
cache->fb.modifier = fb->modifier;
/* FIXME is this correct? */
- cache->fb.stride = plane_state->color_plane[0].stride;
+ cache->fb.stride = plane_state->view.color_plane[0].pitch;
if (drm_rotation_90_or_270(plane_state->hw.rotation))
cache->fb.stride *= fb->format->cpp[0];
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index af2d617d9eb2b..2ace363f5aac1 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -423,15 +423,15 @@ vlv_update_plane(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
- u32 sprsurf_offset = plane_state->color_plane[0].offset;
+ u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
u32 linear_offset;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
- u32 x = plane_state->color_plane[0].x;
- u32 y = plane_state->color_plane[0].y;
+ u32 x = plane_state->view.color_plane[0].x;
+ u32 y = plane_state->view.color_plane[0].y;
unsigned long irqflags;
u32 sprctl;
@@ -446,7 +446,7 @@ vlv_update_plane(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),
- plane_state->color_plane[0].stride);
+ plane_state->view.color_plane[0].pitch);
intel_de_write_fw(dev_priv, SPPOS(pipe, plane_id),
(crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),
@@ -840,15 +840,15 @@ ivb_update_plane(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
- u32 sprsurf_offset = plane_state->color_plane[0].offset;
+ u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
u32 linear_offset;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
- u32 x = plane_state->color_plane[0].x;
- u32 y = plane_state->color_plane[0].y;
+ u32 x = plane_state->view.color_plane[0].x;
+ u32 y = plane_state->view.color_plane[0].y;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u32 sprctl, sprscale = 0;
@@ -870,7 +870,7 @@ ivb_update_plane(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPRSTRIDE(pipe),
- plane_state->color_plane[0].stride);
+ plane_state->view.color_plane[0].pitch);
intel_de_write_fw(dev_priv, SPRPOS(pipe), (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
if (IS_IVYBRIDGE(dev_priv))
@@ -1168,15 +1168,15 @@ g4x_update_plane(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
- u32 dvssurf_offset = plane_state->color_plane[0].offset;
+ u32 dvssurf_offset = plane_state->view.color_plane[0].offset;
u32 linear_offset;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
- u32 x = plane_state->color_plane[0].x;
- u32 y = plane_state->color_plane[0].y;
+ u32 x = plane_state->view.color_plane[0].x;
+ u32 y = plane_state->view.color_plane[0].y;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u32 dvscntr, dvsscale = 0;
@@ -1198,7 +1198,7 @@ g4x_update_plane(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DVSSTRIDE(pipe),
- plane_state->color_plane[0].stride);
+ plane_state->view.color_plane[0].pitch);
intel_de_write_fw(dev_priv, DVSPOS(pipe), (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, DVSSIZE(pipe), (crtc_h << 16) | crtc_w);
intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale);
@@ -1298,7 +1298,7 @@ g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,
int src_x, src_w, src_h, crtc_w, crtc_h;
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
- unsigned int stride = plane_state->color_plane[0].stride;
+ unsigned int stride = plane_state->view.color_plane[0].pitch;
unsigned int cpp = fb->format->cpp[0];
unsigned int width_bytes;
int min_width, min_height;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 22f7a13020189..00a11fb516e52 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -582,7 +582,7 @@ static u32 skl_plane_stride(const struct intel_plane_state *plane_state,
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
- u32 stride = plane_state->color_plane[color_plane].stride;
+ u32 stride = plane_state->view.color_plane[color_plane].pitch;
if (color_plane >= fb->format->num_planes)
return 0;
@@ -919,14 +919,14 @@ skl_program_plane(struct intel_plane *plane,
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
- u32 surf_addr = plane_state->color_plane[color_plane].offset;
+ u32 surf_addr = plane_state->view.color_plane[color_plane].offset;
u32 stride = skl_plane_stride(plane_state, color_plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int aux_plane = skl_main_to_aux_plane(fb, color_plane);
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
- u32 x = plane_state->color_plane[color_plane].x;
- u32 y = plane_state->color_plane[color_plane].y;
+ u32 x = plane_state->view.color_plane[color_plane].x;
+ u32 y = plane_state->view.color_plane[color_plane].y;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u8 alpha = plane_state->hw.alpha >> 8;
@@ -958,7 +958,7 @@ skl_program_plane(struct intel_plane *plane,
}
if (aux_plane) {
- aux_dist = plane_state->color_plane[aux_plane].offset - surf_addr;
+ aux_dist = plane_state->view.color_plane[aux_plane].offset - surf_addr;
if (DISPLAY_VER(dev_priv) < 12)
aux_dist |= skl_plane_stride(plane_state, aux_plane);
@@ -1001,7 +1001,8 @@ skl_program_plane(struct intel_plane *plane,
if (DISPLAY_VER(dev_priv) < 11)
intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
- (plane_state->color_plane[1].y << 16) | plane_state->color_plane[1].x);
+ (plane_state->view.color_plane[1].y << 16) |
+ plane_state->view.color_plane[1].x);
if (!drm_atomic_crtc_needs_modeset(&crtc_state->uapi))
intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
@@ -1031,7 +1032,7 @@ skl_plane_async_flip(struct intel_plane *plane,
unsigned long irqflags;
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
- u32 surf_addr = plane_state->color_plane[0].offset;
+ u32 surf_addr = plane_state->view.color_plane[0].offset;
u32 plane_ctl = plane_state->ctl;
plane_ctl |= skl_plane_ctl_crtc(crtc_state);
@@ -1269,9 +1270,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
int ccs_plane)
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
- int aux_x = plane_state->color_plane[ccs_plane].x;
- int aux_y = plane_state->color_plane[ccs_plane].y;
- u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
+ int aux_x = plane_state->view.color_plane[ccs_plane].x;
+ int aux_y = plane_state->view.color_plane[ccs_plane].y;
+ u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
u32 alignment = intel_surf_alignment(fb, ccs_plane);
int hsub;
int vsub;
@@ -1301,9 +1302,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
if (aux_x != main_x || aux_y != main_y)
return false;
- plane_state->color_plane[ccs_plane].offset = aux_offset;
- plane_state->color_plane[ccs_plane].x = aux_x;
- plane_state->color_plane[ccs_plane].y = aux_y;
+ plane_state->view.color_plane[ccs_plane].offset = aux_offset;
+ plane_state->view.color_plane[ccs_plane].x = aux_x;
+ plane_state->view.color_plane[ccs_plane].y = aux_y;
return true;
}
@@ -1316,7 +1317,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
const int aux_plane = skl_main_to_aux_plane(fb, 0);
- const u32 aux_offset = plane_state->color_plane[aux_plane].offset;
+ const u32 aux_offset = plane_state->view.color_plane[aux_plane].offset;
const u32 alignment = intel_surf_alignment(fb, 0);
const int w = drm_rect_width(&plane_state->uapi.src) >> 16;
@@ -1344,7 +1345,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
int cpp = fb->format->cpp[0];
- while ((*x + w) * cpp > plane_state->color_plane[0].stride) {
+ while ((*x + w) * cpp > plane_state->view.color_plane[0].pitch) {
if (*offset == 0) {
drm_dbg_kms(&dev_priv->drm,
"Unable to find suitable display surface offset due to X-tiling\n");
@@ -1403,8 +1404,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
offset, offset - alignment);
}
- if (x != plane_state->color_plane[aux_plane].x ||
- y != plane_state->color_plane[aux_plane].y) {
+ if (x != plane_state->view.color_plane[aux_plane].x ||
+ y != plane_state->view.color_plane[aux_plane].y) {
drm_dbg_kms(&dev_priv->drm,
"Unable to find suitable display surface offset due to CCS\n");
return -EINVAL;
@@ -1413,9 +1414,9 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
- plane_state->color_plane[0].offset = offset;
- plane_state->color_plane[0].x = x;
- plane_state->color_plane[0].y = y;
+ plane_state->view.color_plane[0].offset = 0;
+ plane_state->view.color_plane[0].x = x;
+ plane_state->view.color_plane[0].y = y;
/*
* Put the final coordinates back so that the src
@@ -1456,7 +1457,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
if (is_ccs_modifier(fb->modifier)) {
int ccs_plane = main_to_ccs_plane(fb, uv_plane);
- u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
+ u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
u32 alignment = intel_surf_alignment(fb, uv_plane);
if (offset > aux_offset)
@@ -1477,8 +1478,8 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
offset, offset - alignment);
}
- if (x != plane_state->color_plane[ccs_plane].x ||
- y != plane_state->color_plane[ccs_plane].y) {
+ if (x != plane_state->view.color_plane[ccs_plane].x ||
+ y != plane_state->view.color_plane[ccs_plane].y) {
drm_dbg_kms(&i915->drm,
"Unable to find suitable display surface offset due to CCS\n");
return -EINVAL;
@@ -1487,9 +1488,9 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
- plane_state->color_plane[uv_plane].offset = offset;
- plane_state->color_plane[uv_plane].x = x;
- plane_state->color_plane[uv_plane].y = y;
+ plane_state->view.color_plane[uv_plane].offset = 0;
+ plane_state->view.color_plane[uv_plane].x = x;
+ plane_state->view.color_plane[uv_plane].y = y;
return 0;
}
@@ -1526,13 +1527,9 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state)
plane_state,
ccs_plane);
- plane_state->color_plane[ccs_plane].offset = offset;
- plane_state->color_plane[ccs_plane].x = (x * hsub +
- src_x % hsub) /
- main_hsub;
- plane_state->color_plane[ccs_plane].y = (y * vsub +
- src_y % vsub) /
- main_vsub;
+ plane_state->view.color_plane[ccs_plane].offset = offset;
+ plane_state->view.color_plane[ccs_plane].x = (x * hsub + src_x % hsub) / main_hsub;
+ plane_state->view.color_plane[ccs_plane].y = (y * vsub + src_y % vsub) / main_vsub;
}
return 0;
@@ -1567,10 +1564,10 @@ static int skl_check_plane_surface(struct intel_plane_state *plane_state)
return ret;
}
- for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->color_plane); i++) {
- plane_state->color_plane[i].offset = 0;
- plane_state->color_plane[i].x = 0;
- plane_state->color_plane[i].y = 0;
+ for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->view.color_plane); i++) {
+ plane_state->view.color_plane[i].offset = 0;
+ plane_state->view.color_plane[i].x = 0;
+ plane_state->view.color_plane[i].y = 0;
}
ret = skl_check_main_surface(plane_state);
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 17/25] drm/i915: Store the normal view FB pitch in FB's intel_fb_view
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (15 preceding siblings ...)
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 16/25] drm/i915: Unify the FB and plane state view information into one struct Imre Deak
@ 2021-03-25 21:48 ` Imre Deak
2021-03-26 16:34 ` Ville Syrjälä
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 18/25] drm/i915: Simplify copying the FB view state to the plane state Imre Deak
` (23 subsequent siblings)
40 siblings, 1 reply; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:48 UTC (permalink / raw)
To: intel-gfx
Instead of special casing getting the pitch for the normal view, store
it during FB creation to the FB normal view struct and retrive it from
there during atomic check, as it's done for the rotated view. A
follow-up patch does the same for a new FB remapped view.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index b223e16eb6a22..31fd8480f707e 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -484,12 +484,14 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
return true;
}
-int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation)
+int intel_fb_pitch(const struct drm_framebuffer *drm_fb, int color_plane, unsigned int rotation)
{
+ struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
+
if (drm_rotation_90_or_270(rotation))
- return to_intel_framebuffer(fb)->rotated_view.color_plane[color_plane].pitch;
+ return fb->rotated_view.color_plane[color_plane].pitch;
else
- return fb->pitches[color_plane];
+ return fb->normal_view.color_plane[color_plane].pitch;
}
static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
@@ -744,6 +746,7 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
*/
intel_fb->normal_view.color_plane[i].x = x;
intel_fb->normal_view.color_plane[i].y = y;
+ intel_fb->normal_view.color_plane[i].pitch = intel_fb->base.pitches[i];
offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
--
2.25.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 18/25] drm/i915: Simplify copying the FB view state to the plane state
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (16 preceding siblings ...)
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 17/25] drm/i915: Store the normal view FB pitch in FB's intel_fb_view Imre Deak
@ 2021-03-25 21:48 ` Imre Deak
2021-03-26 16:42 ` Ville Syrjälä
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 19/25] drm/i915/intel_fb: Factor out calc_plane_remap_info() Imre Deak
` (22 subsequent siblings)
40 siblings, 1 reply; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:48 UTC (permalink / raw)
To: intel-gfx
Instead of copying separately the GTT remapped and color plane view info
from the FB to the plane state, do this by copying the whole
intel_fb_view struct. For this we make sure the FB view state is fully
inited (that is also including the view type) already during FB
creation, so this init is not required during atomic check time. This
also means the we don't need to reset the unused color plane info during
atomic check, as these are already reset during FB creation.
I noticed that initial FBs will only work atm if they are page aligned
(which BIOS most probably always ensures), but add a comment to sanitize
this part once. Also we won't disable the plane if
get_initial_plane_config() failed for some reason (for instance due to
unsupported rotation), add a TODO: comment for this too.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 11 ++--
drivers/gpu/drm/i915/display/intel_fb.c | 59 ++++++++-----------
drivers/gpu/drm/i915/display/intel_fb.h | 7 +--
.../drm/i915/display/skl_universal_plane.c | 8 +--
4 files changed, 34 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 4ee7e72142a5f..48b8e2083e14a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1629,6 +1629,11 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
struct drm_framebuffer *fb;
struct i915_vma *vma;
+ /*
+ * TODO:
+ * Disable planes if get_initial_plane_config() failed.
+ * Make sure things work if the surface base is not page aligned.
+ */
if (!plane_config->fb)
return;
@@ -1680,10 +1685,8 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
valid_fb:
plane_state->rotation = plane_config->rotation;
- intel_fill_fb_ggtt_view(&intel_state->view.gtt, fb,
- plane_state->rotation);
- intel_state->view.color_plane[0].pitch =
- intel_fb_pitch(fb, 0, plane_state->rotation);
+ intel_fb_fill_view(to_intel_framebuffer(fb), plane_state->rotation,
+ &intel_state->view);
__i915_vma_pin(vma);
intel_state->vma = i915_vma_get(vma);
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 31fd8480f707e..16dcfb538b448 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -484,10 +484,8 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
return true;
}
-int intel_fb_pitch(const struct drm_framebuffer *drm_fb, int color_plane, unsigned int rotation)
+static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
{
- struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
-
if (drm_rotation_90_or_270(rotation))
return fb->rotated_view.color_plane[color_plane].pitch;
else
@@ -497,7 +495,7 @@ int intel_fb_pitch(const struct drm_framebuffer *drm_fb, int color_plane, unsign
static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- const struct drm_framebuffer *fb = plane_state->hw.fb;
+ const struct intel_framebuffer *fb = to_intel_framebuffer(plane_state->hw.fb);
unsigned int rotation = plane_state->hw.rotation;
u32 stride, max_stride;
@@ -516,8 +514,8 @@ static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
* unclear in Bspec, for now no checking.
*/
stride = intel_fb_pitch(fb, 0, rotation);
- max_stride = plane->max_stride(plane, fb->format->format,
- fb->modifier, rotation);
+ max_stride = plane->max_stride(plane, fb->base.format->format,
+ fb->base.modifier, rotation);
return stride > max_stride;
}
@@ -702,6 +700,12 @@ calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
return tiles;
}
+static void intel_fb_view_init(struct intel_fb_view *view, enum i915_ggtt_view_type view_type)
+{
+ memset(view, 0, sizeof(*view));
+ view->gtt.type = view_type;
+}
+
int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb)
{
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
@@ -711,6 +715,9 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
int i, num_planes = fb->format->num_planes;
unsigned int tile_size = intel_tile_size(i915);
+ intel_fb_view_init(&intel_fb->normal_view, I915_GGTT_VIEW_NORMAL);
+ intel_fb_view_init(&intel_fb->rotated_view, I915_GGTT_VIEW_ROTATED);
+
for (i = 0; i < num_planes; i++) {
struct fb_plane_view_dims view_dims;
unsigned int width, height;
@@ -796,9 +803,9 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
unsigned int src_w, src_h;
u32 gtt_offset = 0;
- memset(&plane_state->view.gtt, 0, sizeof(plane_state->view.gtt));
- plane_state->view.gtt.type = drm_rotation_90_or_270(rotation) ?
- I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
+ intel_fb_view_init(&plane_state->view,
+ drm_rotation_90_or_270(rotation) ? I915_GGTT_VIEW_ROTATED :
+ I915_GGTT_VIEW_REMAPPED);
src_x = plane_state->uapi.src.x1 >> 16;
src_y = plane_state->uapi.src.y1 >> 16;
@@ -889,17 +896,13 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
}
}
-void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
- const struct drm_framebuffer *fb,
- unsigned int rotation)
+void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotation,
+ struct intel_fb_view *view)
{
- memset(view, 0, sizeof(*view));
-
- view->type = I915_GGTT_VIEW_NORMAL;
- if (drm_rotation_90_or_270(rotation)) {
- view->type = I915_GGTT_VIEW_ROTATED;
- view->rotated = to_intel_framebuffer(fb)->rotated_view.gtt.rotated;
- }
+ if (drm_rotation_90_or_270(rotation))
+ *view = fb->rotated_view;
+ else
+ *view = fb->normal_view;
}
static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
@@ -939,13 +942,10 @@ int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
const struct intel_framebuffer *fb =
to_intel_framebuffer(plane_state->hw.fb);
unsigned int rotation = plane_state->hw.rotation;
- int i, num_planes;
if (!fb)
return 0;
- num_planes = fb->base.format->num_planes;
-
if (intel_plane_needs_remap(plane_state)) {
intel_plane_remap_gtt(plane_state);
@@ -958,20 +958,7 @@ int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
return intel_plane_check_stride(plane_state);
}
- intel_fill_fb_ggtt_view(&plane_state->view.gtt, &fb->base, rotation);
-
- for (i = 0; i < num_planes; i++) {
- plane_state->view.color_plane[i].pitch = intel_fb_pitch(&fb->base, i, rotation);
- plane_state->view.color_plane[i].offset = 0;
-
- if (drm_rotation_90_or_270(rotation)) {
- plane_state->view.color_plane[i].x = fb->rotated_view.color_plane[i].x;
- plane_state->view.color_plane[i].y = fb->rotated_view.color_plane[i].y;
- } else {
- plane_state->view.color_plane[i].x = fb->normal_view.color_plane[i].x;
- plane_state->view.color_plane[i].y = fb->normal_view.color_plane[i].y;
- }
- }
+ intel_fb_fill_view(fb, rotation, &plane_state->view);
/* Rotate src coordinates to match rotated GTT view */
if (drm_rotation_90_or_270(rotation))
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index 8ffc883a83c34..0ea9da360450d 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -15,6 +15,7 @@ struct drm_i915_private;
struct i915_ggtt_view;
struct intel_fb_view;
+struct intel_framebuffer;
struct intel_plane_state;
enum i915_ggtt_view_type;
@@ -49,11 +50,9 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
const struct intel_plane_state *state,
int color_plane);
-int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation);
-
int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb);
-void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view, const struct drm_framebuffer *fb,
- unsigned int rotation);
+void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotation,
+ struct intel_fb_view *view);
int intel_plane_compute_gtt(struct intel_plane_state *plane_state);
#endif /* __INTEL_FB_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 00a11fb516e52..00a53512ef6cd 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1538,7 +1538,7 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state)
static int skl_check_plane_surface(struct intel_plane_state *plane_state)
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
- int ret, i;
+ int ret;
ret = intel_plane_compute_gtt(plane_state);
if (ret)
@@ -1564,12 +1564,6 @@ static int skl_check_plane_surface(struct intel_plane_state *plane_state)
return ret;
}
- for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->view.color_plane); i++) {
- plane_state->view.color_plane[i].offset = 0;
- plane_state->view.color_plane[i].x = 0;
- plane_state->view.color_plane[i].y = 0;
- }
-
ret = skl_check_main_surface(plane_state);
if (ret)
return ret;
--
2.25.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 19/25] drm/i915/intel_fb: Factor out calc_plane_remap_info()
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (17 preceding siblings ...)
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 18/25] drm/i915: Simplify copying the FB view state to the plane state Imre Deak
@ 2021-03-25 21:48 ` Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 20/25] drm/i915: Shrink the size of intel_remapped_plane_info struct Imre Deak
` (21 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:48 UTC (permalink / raw)
To: intel-gfx
Factor out to a new function the logic to calculate the FB remapping
parameters both during creating the FB and when flipping to it.
Add a new intel_fb_plane_remap_info struct that can be used in a
follow-up patch to add a new remapped view when creating an FB. Also
move intel_framebuffer::rot_info into this new struct, to better group
all the remapping related info.
v2:
- Keep stride next to offset calculation. (Ville)
- Enclose check_array_bounds macro arguments in parentheses.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 203 +++++++++---------------
1 file changed, 77 insertions(+), 126 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 16dcfb538b448..b56c432e0415f 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -9,6 +9,8 @@
#include "intel_display_types.h"
#include "intel_fb.h"
+#define check_array_bounds(i915, a, i) drm_WARN_ON(&(i915)->drm, (i) >= ARRAY_SIZE(a))
+
bool is_ccs_plane(const struct drm_framebuffer *fb, int plane)
{
if (!is_ccs_modifier(fb->modifier))
@@ -572,66 +574,6 @@ static u32 calc_plane_aligned_offset(const struct intel_framebuffer *fb, int col
return offset / tile_size;
}
-/*
- * Setup the rotated view for an FB plane and return the size the GTT mapping
- * requires for this view.
- */
-static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *plane_info,
- u32 gtt_offset_rotated, int x, int y,
- unsigned int width, unsigned int height,
- unsigned int tile_size,
- unsigned int tile_width, unsigned int tile_height,
- struct drm_framebuffer *fb)
-{
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct intel_rotation_info *rot_info = &intel_fb->rotated_view.gtt.rotated;
- unsigned int pitch_tiles;
- struct drm_rect r;
-
- /* Y or Yf modifiers required for 90/270 rotation */
- if (fb->modifier != I915_FORMAT_MOD_Y_TILED &&
- fb->modifier != I915_FORMAT_MOD_Yf_TILED)
- return 0;
-
- if (drm_WARN_ON(fb->dev, plane >= ARRAY_SIZE(rot_info->plane)))
- return 0;
-
- rot_info->plane[plane] = *plane_info;
-
- intel_fb->rotated_view.color_plane[plane].pitch = plane_info->height * tile_height;
-
- /* rotate the x/y offsets to match the GTT view */
- drm_rect_init(&r, x, y, width, height);
- drm_rect_rotate(&r,
- plane_info->width * tile_width,
- plane_info->height * tile_height,
- DRM_MODE_ROTATE_270);
- x = r.x1;
- y = r.y1;
-
- /* rotate the tile dimensions to match the GTT view */
- pitch_tiles = intel_fb->rotated_view.color_plane[plane].pitch / tile_height;
- swap(tile_width, tile_height);
-
- /*
- * We only keep the x/y offsets, so push all of the
- * gtt offset into the x/y offsets.
- */
- intel_adjust_tile_offset(&x, &y,
- tile_width, tile_height,
- tile_size, pitch_tiles,
- gtt_offset_rotated * tile_size, 0);
-
- /*
- * First pixel of the framebuffer from
- * the start of the rotated gtt mapping.
- */
- intel_fb->rotated_view.color_plane[plane].x = x;
- intel_fb->rotated_view.color_plane[plane].y = y;
-
- return plane_info->width * plane_info->height;
-}
-
struct fb_plane_view_dims {
unsigned int width, height;
unsigned int tile_width, tile_height;
@@ -671,6 +613,69 @@ plane_view_height_tiles(const struct intel_framebuffer *fb, int color_plane,
return DIV_ROUND_UP(y + dims->height, dims->tile_height);
}
+static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_plane,
+ const struct fb_plane_view_dims *dims,
+ u32 obj_offset, u32 gtt_offset, int x, int y,
+ struct intel_fb_view *view)
+{
+ struct drm_i915_private *i915 = to_i915(fb->base.dev);
+ struct intel_remapped_plane_info *remap_info = &view->gtt.remapped.plane[color_plane];
+ struct i915_color_plane_view *color_plane_info = &view->color_plane[color_plane];
+ unsigned int tile_width = dims->tile_width;
+ unsigned int tile_height = dims->tile_height;
+ unsigned int tile_size = intel_tile_size(i915);
+ unsigned int pitch_tiles;
+ struct drm_rect r;
+
+ remap_info->offset = obj_offset;
+ remap_info->stride = plane_view_stride_tiles(fb, color_plane, dims);
+ remap_info->width = plane_view_width_tiles(fb, color_plane, dims, x);
+ remap_info->height = plane_view_height_tiles(fb, color_plane, dims, y);
+
+ if (view->gtt.type == I915_GGTT_VIEW_ROTATED) {
+ check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
+
+ /* rotate the x/y offsets to match the GTT view */
+ drm_rect_init(&r, x, y, dims->width, dims->height);
+ drm_rect_rotate(&r,
+ remap_info->width * tile_width,
+ remap_info->height * tile_height,
+ DRM_MODE_ROTATE_270);
+
+ color_plane_info->x = r.x1;
+ color_plane_info->y = r.y1;
+
+ pitch_tiles = remap_info->height;
+ color_plane_info->pitch = pitch_tiles * tile_height;
+
+ /* rotate the tile dimensions to match the GTT view */
+ swap(tile_width, tile_height);
+ } else {
+ drm_WARN_ON(&i915->drm, view->gtt.type != I915_GGTT_VIEW_REMAPPED);
+
+ check_array_bounds(i915, view->gtt.remapped.plane, color_plane);
+
+ color_plane_info->x = x;
+ color_plane_info->y = y;
+
+ pitch_tiles = remap_info->width;
+ color_plane_info->pitch = pitch_tiles * tile_width *
+ fb->base.format->cpp[color_plane];
+ }
+
+ /*
+ * We only keep the x/y offsets, so push all of the gtt offset into
+ * the x/y offsets. x,y will hold the first pixel of the framebuffer
+ * plane from the start of the remapped/rotated gtt mapping.
+ */
+ intel_adjust_tile_offset(&color_plane_info->x, &color_plane_info->y,
+ tile_width, tile_height,
+ tile_size, pitch_tiles,
+ gtt_offset * tile_size, 0);
+
+ return remap_info->width * remap_info->height;
+}
+
/* Return number of tiles @color_plane needs. */
static unsigned int
calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
@@ -757,22 +762,12 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
- if (!is_surface_linear(fb, i)) {
- struct intel_remapped_plane_info plane_info;
-
- plane_info.offset = offset;
- plane_info.stride = plane_view_stride_tiles(intel_fb, i, &view_dims);
- plane_info.width = plane_view_width_tiles(intel_fb, i, &view_dims, x);
- plane_info.height = plane_view_height_tiles(intel_fb, i, &view_dims, y);
-
- gtt_offset_rotated +=
- setup_fb_rotation(i, &plane_info,
- gtt_offset_rotated,
- x, y, width, height,
- tile_size,
- view_dims.tile_width, view_dims.tile_height,
- fb);
- }
+ /* Y or Yf modifiers required for 90/270 rotation */
+ if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+ fb->modifier == I915_FORMAT_MOD_Yf_TILED)
+ gtt_offset_rotated += calc_plane_remap_info(intel_fb, i, &view_dims,
+ offset, gtt_offset_rotated, x, y,
+ &intel_fb->rotated_view);
size = calc_plane_normal_size(intel_fb, i, &view_dims, x, y);
/* how many tiles in total needed in the bo */
@@ -795,10 +790,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
to_i915(plane_state->uapi.plane->dev);
struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct intel_rotation_info *info = &plane_state->view.gtt.rotated;
unsigned int rotation = plane_state->hw.rotation;
int i, num_planes = fb->format->num_planes;
- unsigned int tile_size = intel_tile_size(i915);
unsigned int src_x, src_y;
unsigned int src_w, src_h;
u32 gtt_offset = 0;
@@ -827,20 +820,18 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
for (i = 0; i < num_planes; i++) {
unsigned int hsub = i ? fb->format->hsub : 1;
unsigned int vsub = i ? fb->format->vsub : 1;
- unsigned int cpp = fb->format->cpp[i];
- unsigned int tile_width, tile_height;
+ struct fb_plane_view_dims view_dims;
unsigned int width, height;
- unsigned int pitch_tiles;
unsigned int x, y;
u32 offset;
- intel_tile_dims(fb, i, &tile_width, &tile_height);
-
x = src_x / hsub;
y = src_y / vsub;
width = src_w / hsub;
height = src_h / vsub;
+ init_plane_view_dims(intel_fb, i, width, height, &view_dims);
+
/*
* First pixel of the src viewport from the
* start of the normal gtt mapping.
@@ -850,49 +841,9 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
- drm_WARN_ON(&i915->drm, i >= ARRAY_SIZE(info->plane));
- info->plane[i].offset = offset;
- info->plane[i].stride = DIV_ROUND_UP(fb->pitches[i],
- tile_width * cpp);
- info->plane[i].width = DIV_ROUND_UP(x + width, tile_width);
- info->plane[i].height = DIV_ROUND_UP(y + height, tile_height);
-
- if (drm_rotation_90_or_270(rotation)) {
- struct drm_rect r;
-
- /* rotate the x/y offsets to match the GTT view */
- drm_rect_init(&r, x, y, width, height);
- drm_rect_rotate(&r,
- info->plane[i].width * tile_width,
- info->plane[i].height * tile_height,
- DRM_MODE_ROTATE_270);
- x = r.x1;
- y = r.y1;
-
- pitch_tiles = info->plane[i].height;
- plane_state->view.color_plane[i].pitch = pitch_tiles * tile_height;
-
- /* rotate the tile dimensions to match the GTT view */
- swap(tile_width, tile_height);
- } else {
- pitch_tiles = info->plane[i].width;
- plane_state->view.color_plane[i].pitch = pitch_tiles * tile_width * cpp;
- }
-
- /*
- * We only keep the x/y offsets, so push all of the
- * gtt offset into the x/y offsets.
- */
- intel_adjust_tile_offset(&x, &y,
- tile_width, tile_height,
- tile_size, pitch_tiles,
- gtt_offset * tile_size, 0);
-
- gtt_offset += info->plane[i].width * info->plane[i].height;
-
- plane_state->view.color_plane[i].offset = 0;
- plane_state->view.color_plane[i].x = x;
- plane_state->view.color_plane[i].y = y;
+ gtt_offset += calc_plane_remap_info(intel_fb, i, &view_dims,
+ offset, gtt_offset, x, y,
+ &plane_state->view);
}
}
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 20/25] drm/i915: Shrink the size of intel_remapped_plane_info struct
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (18 preceding siblings ...)
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 19/25] drm/i915/intel_fb: Factor out calc_plane_remap_info() Imre Deak
@ 2021-03-25 21:48 ` Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 21/25] drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap() Imre Deak
` (20 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:48 UTC (permalink / raw)
To: intel-gfx
Save some place in the GTT VMAs by using a u16 instead of unsigned int
to store the view dimensions. The maximum FB stride is 256kB which is
4096 tiles in the worst case (yf-tiles), the maximum FB height is 16k
pixels, which is 16384 tiles in the worst case (linear 4x1 tiled FB).
v2:
- Fix worst case tile height formula in commit log. (Ville)
- Add an assign_chk_ovf helper to simplify the related assignments.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 15 +++++++++++----
drivers/gpu/drm/i915/i915_vma_types.h | 12 ++++++++----
2 files changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index b56c432e0415f..e153f6ae1298c 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -613,6 +613,11 @@ plane_view_height_tiles(const struct intel_framebuffer *fb, int color_plane,
return DIV_ROUND_UP(y + dims->height, dims->tile_height);
}
+#define assign_chk_ovf(i915, var, val) ({ \
+ drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
+ var = val; \
+})
+
static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_plane,
const struct fb_plane_view_dims *dims,
u32 obj_offset, u32 gtt_offset, int x, int y,
@@ -627,10 +632,10 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
unsigned int pitch_tiles;
struct drm_rect r;
- remap_info->offset = obj_offset;
- remap_info->stride = plane_view_stride_tiles(fb, color_plane, dims);
- remap_info->width = plane_view_width_tiles(fb, color_plane, dims, x);
- remap_info->height = plane_view_height_tiles(fb, color_plane, dims, y);
+ assign_chk_ovf(i915, remap_info->offset, obj_offset);
+ assign_chk_ovf(i915, remap_info->stride, plane_view_stride_tiles(fb, color_plane, dims));
+ assign_chk_ovf(i915, remap_info->width, plane_view_width_tiles(fb, color_plane, dims, x));
+ assign_chk_ovf(i915, remap_info->height, plane_view_height_tiles(fb, color_plane, dims, y));
if (view->gtt.type == I915_GGTT_VIEW_ROTATED) {
check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
@@ -676,6 +681,8 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
return remap_info->width * remap_info->height;
}
+#undef assign_chk_ovf
+
/* Return number of tiles @color_plane needs. */
static unsigned int
calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
index f5cb848b7a7eb..358b4306fc002 100644
--- a/drivers/gpu/drm/i915/i915_vma_types.h
+++ b/drivers/gpu/drm/i915/i915_vma_types.h
@@ -97,12 +97,16 @@ enum i915_cache_level;
struct intel_remapped_plane_info {
/* in gtt pages */
- unsigned int width, height, stride, offset;
+ u32 offset;
+ u16 width;
+ u16 height;
+ u16 stride;
+ u16 unused_mbz;
} __packed;
struct intel_remapped_info {
struct intel_remapped_plane_info plane[2];
- unsigned int unused_mbz;
+ u32 unused_mbz;
} __packed;
struct intel_rotation_info {
@@ -123,9 +127,9 @@ enum i915_ggtt_view_type {
static inline void assert_i915_gem_gtt_types(void)
{
- BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 8*sizeof(unsigned int));
+ BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 2 * sizeof(u32) + 8 * sizeof(u16));
BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
- BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 9*sizeof(unsigned int));
+ BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 3 * sizeof(u32) + 8 * sizeof(u16));
/* Check that rotation/remapped shares offsets for simplicity */
BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
--
2.25.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 21/25] drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap()
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (19 preceding siblings ...)
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 20/25] drm/i915: Shrink the size of intel_remapped_plane_info struct Imre Deak
@ 2021-03-25 21:48 ` Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 22/25] drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct Imre Deak
` (19 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:48 UTC (permalink / raw)
To: intel-gfx
Always use the modified copy of the intel_remapped_plane_info variables.
An upcoming patch updates the dst_stride field in these copies after
which we can't use the original versions.
v2: Init view in igt_vma_rotate_remap() when declaring it. (Ville)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/selftests/i915_vma.c | 63 ++++++++++++-----------
1 file changed, 34 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 9dd6799105e66..95dd6712ac905 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -515,22 +515,24 @@ static int igt_vma_rotate_remap(void *arg)
for (t = types; *t; t++) {
for (a = planes; a->width; a++) {
for (b = planes + ARRAY_SIZE(planes); b-- != planes; ) {
- struct i915_ggtt_view view = {};
+ struct i915_ggtt_view view = {
+ .type = *t,
+ .remapped.plane[0] = *a,
+ .remapped.plane[1] = *b,
+ };
+ struct intel_remapped_plane_info *plane_info = view.remapped.plane;
unsigned int n, max_offset;
- max_offset = max(a->stride * a->height,
- b->stride * b->height);
+ max_offset = max(plane_info[0].stride * plane_info[0].height,
+ plane_info[1].stride * plane_info[1].height);
GEM_BUG_ON(max_offset > max_pages);
max_offset = max_pages - max_offset;
- view.type = *t;
- view.rotated.plane[0] = *a;
- view.rotated.plane[1] = *b;
-
- for_each_prime_number_from(view.rotated.plane[0].offset, 0, max_offset) {
- for_each_prime_number_from(view.rotated.plane[1].offset, 0, max_offset) {
+ for_each_prime_number_from(plane_info[0].offset, 0, max_offset) {
+ for_each_prime_number_from(plane_info[1].offset, 0, max_offset) {
struct scatterlist *sg;
struct i915_vma *vma;
+ unsigned int expected_pages;
vma = checked_vma_instance(obj, vm, &view);
if (IS_ERR(vma)) {
@@ -544,25 +546,27 @@ static int igt_vma_rotate_remap(void *arg)
goto out_object;
}
+ expected_pages = rotated_size(&plane_info[0], &plane_info[1]);
+
if (view.type == I915_GGTT_VIEW_ROTATED &&
- vma->size != rotated_size(a, b) * PAGE_SIZE) {
+ vma->size != expected_pages * PAGE_SIZE) {
pr_err("VMA is wrong size, expected %lu, found %llu\n",
- PAGE_SIZE * rotated_size(a, b), vma->size);
+ PAGE_SIZE * expected_pages, vma->size);
err = -EINVAL;
goto out_object;
}
if (view.type == I915_GGTT_VIEW_REMAPPED &&
- vma->size > rotated_size(a, b) * PAGE_SIZE) {
+ vma->size > expected_pages * PAGE_SIZE) {
pr_err("VMA is wrong size, expected %lu, found %llu\n",
- PAGE_SIZE * rotated_size(a, b), vma->size);
+ PAGE_SIZE * expected_pages, vma->size);
err = -EINVAL;
goto out_object;
}
- if (vma->pages->nents > rotated_size(a, b)) {
+ if (vma->pages->nents > expected_pages) {
pr_err("sg table is wrong sizeo, expected %u, found %u nents\n",
- rotated_size(a, b), vma->pages->nents);
+ expected_pages, vma->pages->nents);
err = -EINVAL;
goto out_object;
}
@@ -590,14 +594,14 @@ static int igt_vma_rotate_remap(void *arg)
pr_err("Inconsistent %s VMA pages for plane %d: [(%d, %d, %d, %d), (%d, %d, %d, %d)]\n",
view.type == I915_GGTT_VIEW_ROTATED ?
"rotated" : "remapped", n,
- view.rotated.plane[0].width,
- view.rotated.plane[0].height,
- view.rotated.plane[0].stride,
- view.rotated.plane[0].offset,
- view.rotated.plane[1].width,
- view.rotated.plane[1].height,
- view.rotated.plane[1].stride,
- view.rotated.plane[1].offset);
+ plane_info[0].width,
+ plane_info[0].height,
+ plane_info[0].stride,
+ plane_info[0].offset,
+ plane_info[1].width,
+ plane_info[1].height,
+ plane_info[1].stride,
+ plane_info[1].offset);
err = -EINVAL;
goto out_object;
}
@@ -887,6 +891,7 @@ static int igt_vma_remapped_gtt(void *arg)
.type = *t,
.rotated.plane[0] = *p,
};
+ struct intel_remapped_plane_info *plane_info = view.rotated.plane;
struct i915_vma *vma;
u32 __iomem *map;
unsigned int x, y;
@@ -912,15 +917,15 @@ static int igt_vma_remapped_gtt(void *arg)
goto out;
}
- for (y = 0 ; y < p->height; y++) {
- for (x = 0 ; x < p->width; x++) {
+ for (y = 0 ; y < plane_info[0].height; y++) {
+ for (x = 0 ; x < plane_info[0].width; x++) {
unsigned int offset;
u32 val = y << 16 | x;
if (*t == I915_GGTT_VIEW_ROTATED)
- offset = (x * p->height + y) * PAGE_SIZE;
+ offset = (x * plane_info[0].height + y) * PAGE_SIZE;
else
- offset = (y * p->width + x) * PAGE_SIZE;
+ offset = (y * plane_info[0].width + x) * PAGE_SIZE;
iowrite32(val, &map[offset / sizeof(*map)]);
}
@@ -943,8 +948,8 @@ static int igt_vma_remapped_gtt(void *arg)
goto out;
}
- for (y = 0 ; y < p->height; y++) {
- for (x = 0 ; x < p->width; x++) {
+ for (y = 0 ; y < plane_info[0].height; y++) {
+ for (x = 0 ; x < plane_info[0].width; x++) {
unsigned int offset, src_idx;
u32 exp = y << 16 | x;
u32 val;
--
2.25.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 22/25] drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (20 preceding siblings ...)
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 21/25] drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap() Imre Deak
@ 2021-03-25 21:48 ` Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 23/25] drm/i915: Add support for FBs requiring a POT stride alignment Imre Deak
` (18 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:48 UTC (permalink / raw)
To: intel-gfx
An upcoming patch adds a new dst_stride field to the
intel_remapped_plane_info struct, so for clarity rename the current
stride field to src_stride.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 8 +--
drivers/gpu/drm/i915/gt/intel_ggtt.c | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 8 +--
drivers/gpu/drm/i915/i915_vma_types.h | 2 +-
drivers/gpu/drm/i915/selftests/i915_vma.c | 60 +++++++++++------------
5 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index e153f6ae1298c..dcf7e811d1425 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -590,8 +590,8 @@ static void init_plane_view_dims(const struct intel_framebuffer *fb, int color_p
}
static unsigned int
-plane_view_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
- const struct fb_plane_view_dims *dims)
+plane_view_src_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
+ const struct fb_plane_view_dims *dims)
{
return DIV_ROUND_UP(fb->base.pitches[color_plane],
dims->tile_width * fb->base.format->cpp[color_plane]);
@@ -633,7 +633,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
struct drm_rect r;
assign_chk_ovf(i915, remap_info->offset, obj_offset);
- assign_chk_ovf(i915, remap_info->stride, plane_view_stride_tiles(fb, color_plane, dims));
+ assign_chk_ovf(i915, remap_info->src_stride, plane_view_src_stride_tiles(fb, color_plane, dims));
assign_chk_ovf(i915, remap_info->width, plane_view_width_tiles(fb, color_plane, dims, x));
assign_chk_ovf(i915, remap_info->height, plane_view_height_tiles(fb, color_plane, dims, y));
@@ -699,7 +699,7 @@ calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
x * fb->base.format->cpp[color_plane];
tiles = DIV_ROUND_UP(size, intel_tile_size(i915));
} else {
- tiles = plane_view_stride_tiles(fb, color_plane, dims) *
+ tiles = plane_view_src_stride_tiles(fb, color_plane, dims) *
plane_view_height_tiles(fb, color_plane, dims, y);
/*
* If the plane isn't horizontally tile aligned,
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index c2fc49495029b..cb048d0e369ce 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1320,7 +1320,7 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++) {
sg = rotate_pages(obj, rot_info->plane[i].offset,
rot_info->plane[i].width, rot_info->plane[i].height,
- rot_info->plane[i].stride, st, sg);
+ rot_info->plane[i].src_stride, st, sg);
}
return st;
@@ -1404,7 +1404,7 @@ intel_remap_pages(struct intel_remapped_info *rem_info,
for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
sg = remap_pages(obj, rem_info->plane[i].offset,
rem_info->plane[i].width, rem_info->plane[i].height,
- rem_info->plane[i].stride, st, sg);
+ rem_info->plane[i].src_stride, st, sg);
}
i915_sg_trim(st);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index b00c828f90a7f..9c4b9d475793b 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -176,11 +176,11 @@ i915_debugfs_describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
seq_printf(m, ", rotated [(%ux%u, stride=%u, offset=%u), (%ux%u, stride=%u, offset=%u)]",
vma->ggtt_view.rotated.plane[0].width,
vma->ggtt_view.rotated.plane[0].height,
- vma->ggtt_view.rotated.plane[0].stride,
+ vma->ggtt_view.rotated.plane[0].src_stride,
vma->ggtt_view.rotated.plane[0].offset,
vma->ggtt_view.rotated.plane[1].width,
vma->ggtt_view.rotated.plane[1].height,
- vma->ggtt_view.rotated.plane[1].stride,
+ vma->ggtt_view.rotated.plane[1].src_stride,
vma->ggtt_view.rotated.plane[1].offset);
break;
@@ -188,11 +188,11 @@ i915_debugfs_describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
seq_printf(m, ", remapped [(%ux%u, stride=%u, offset=%u), (%ux%u, stride=%u, offset=%u)]",
vma->ggtt_view.remapped.plane[0].width,
vma->ggtt_view.remapped.plane[0].height,
- vma->ggtt_view.remapped.plane[0].stride,
+ vma->ggtt_view.remapped.plane[0].src_stride,
vma->ggtt_view.remapped.plane[0].offset,
vma->ggtt_view.remapped.plane[1].width,
vma->ggtt_view.remapped.plane[1].height,
- vma->ggtt_view.remapped.plane[1].stride,
+ vma->ggtt_view.remapped.plane[1].src_stride,
vma->ggtt_view.remapped.plane[1].offset);
break;
diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
index 358b4306fc002..f7f2aa168c9ef 100644
--- a/drivers/gpu/drm/i915/i915_vma_types.h
+++ b/drivers/gpu/drm/i915/i915_vma_types.h
@@ -100,7 +100,7 @@ struct intel_remapped_plane_info {
u32 offset;
u16 width;
u16 height;
- u16 stride;
+ u16 src_stride;
u16 unused_mbz;
} __packed;
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 95dd6712ac905..9aaf7201e2421 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -361,7 +361,7 @@ static unsigned long rotated_index(const struct intel_rotation_info *r,
unsigned int x,
unsigned int y)
{
- return (r->plane[n].stride * (r->plane[n].height - y - 1) +
+ return (r->plane[n].src_stride * (r->plane[n].height - y - 1) +
r->plane[n].offset + x);
}
@@ -411,7 +411,7 @@ static unsigned long remapped_index(const struct intel_remapped_info *r,
unsigned int x,
unsigned int y)
{
- return (r->plane[n].stride * y +
+ return (r->plane[n].src_stride * y +
r->plane[n].offset + x);
}
@@ -479,21 +479,21 @@ static int igt_vma_rotate_remap(void *arg)
struct i915_address_space *vm = &ggtt->vm;
struct drm_i915_gem_object *obj;
const struct intel_remapped_plane_info planes[] = {
- { .width = 1, .height = 1, .stride = 1 },
- { .width = 2, .height = 2, .stride = 2 },
- { .width = 4, .height = 4, .stride = 4 },
- { .width = 8, .height = 8, .stride = 8 },
+ { .width = 1, .height = 1, .src_stride = 1 },
+ { .width = 2, .height = 2, .src_stride = 2 },
+ { .width = 4, .height = 4, .src_stride = 4 },
+ { .width = 8, .height = 8, .src_stride = 8 },
- { .width = 3, .height = 5, .stride = 3 },
- { .width = 3, .height = 5, .stride = 4 },
- { .width = 3, .height = 5, .stride = 5 },
+ { .width = 3, .height = 5, .src_stride = 3 },
+ { .width = 3, .height = 5, .src_stride = 4 },
+ { .width = 3, .height = 5, .src_stride = 5 },
- { .width = 5, .height = 3, .stride = 5 },
- { .width = 5, .height = 3, .stride = 7 },
- { .width = 5, .height = 3, .stride = 9 },
+ { .width = 5, .height = 3, .src_stride = 5 },
+ { .width = 5, .height = 3, .src_stride = 7 },
+ { .width = 5, .height = 3, .src_stride = 9 },
- { .width = 4, .height = 6, .stride = 6 },
- { .width = 6, .height = 4, .stride = 6 },
+ { .width = 4, .height = 6, .src_stride = 6 },
+ { .width = 6, .height = 4, .src_stride = 6 },
{ }
}, *a, *b;
enum i915_ggtt_view_type types[] = {
@@ -523,8 +523,8 @@ static int igt_vma_rotate_remap(void *arg)
struct intel_remapped_plane_info *plane_info = view.remapped.plane;
unsigned int n, max_offset;
- max_offset = max(plane_info[0].stride * plane_info[0].height,
- plane_info[1].stride * plane_info[1].height);
+ max_offset = max(plane_info[0].src_stride * plane_info[0].height,
+ plane_info[1].src_stride * plane_info[1].height);
GEM_BUG_ON(max_offset > max_pages);
max_offset = max_pages - max_offset;
@@ -596,11 +596,11 @@ static int igt_vma_rotate_remap(void *arg)
"rotated" : "remapped", n,
plane_info[0].width,
plane_info[0].height,
- plane_info[0].stride,
+ plane_info[0].src_stride,
plane_info[0].offset,
plane_info[1].width,
plane_info[1].height,
- plane_info[1].stride,
+ plane_info[1].src_stride,
plane_info[1].offset);
err = -EINVAL;
goto out_object;
@@ -853,21 +853,21 @@ static int igt_vma_remapped_gtt(void *arg)
{
struct drm_i915_private *i915 = arg;
const struct intel_remapped_plane_info planes[] = {
- { .width = 1, .height = 1, .stride = 1 },
- { .width = 2, .height = 2, .stride = 2 },
- { .width = 4, .height = 4, .stride = 4 },
- { .width = 8, .height = 8, .stride = 8 },
+ { .width = 1, .height = 1, .src_stride = 1 },
+ { .width = 2, .height = 2, .src_stride = 2 },
+ { .width = 4, .height = 4, .src_stride = 4 },
+ { .width = 8, .height = 8, .src_stride = 8 },
- { .width = 3, .height = 5, .stride = 3 },
- { .width = 3, .height = 5, .stride = 4 },
- { .width = 3, .height = 5, .stride = 5 },
+ { .width = 3, .height = 5, .src_stride = 3 },
+ { .width = 3, .height = 5, .src_stride = 4 },
+ { .width = 3, .height = 5, .src_stride = 5 },
- { .width = 5, .height = 3, .stride = 5 },
- { .width = 5, .height = 3, .stride = 7 },
- { .width = 5, .height = 3, .stride = 9 },
+ { .width = 5, .height = 3, .src_stride = 5 },
+ { .width = 5, .height = 3, .src_stride = 7 },
+ { .width = 5, .height = 3, .src_stride = 9 },
- { .width = 4, .height = 6, .stride = 6 },
- { .width = 6, .height = 4, .stride = 6 },
+ { .width = 4, .height = 6, .src_stride = 6 },
+ { .width = 6, .height = 4, .src_stride = 6 },
{ }
}, *p;
enum i915_ggtt_view_type types[] = {
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 23/25] drm/i915: Add support for FBs requiring a POT stride alignment
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (21 preceding siblings ...)
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 22/25] drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct Imre Deak
@ 2021-03-25 21:48 ` Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 24/25] drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height Imre Deak
` (17 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:48 UTC (permalink / raw)
To: intel-gfx
An upcoming platform has a restriction that the FB stride must be
power-of-two aligned. To support framebuffer layouts that are not in
this layout add a logic that pads the tile rows to the POT aligned size.
The HW won't read the padding PTEs, so these don't have to point to an
allocated address, or even have their valid flag set. So use a NULL PTE
instead for instance the scratch page, which is simple and keeps the SG
table compact.
v2:
- Simplify plane_view_dst_stride(). (Ville)
- Pass pitch_tiles as unsigned int.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +-
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_fb.c | 49 +++++++++++++---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 58 +++++++++++++++----
drivers/gpu/drm/i915/i915_debugfs.c | 8 ++-
drivers/gpu/drm/i915/i915_vma_types.h | 2 +-
drivers/gpu/drm/i915/selftests/i915_vma.c | 13 +++++
7 files changed, 113 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 48b8e2083e14a..3550db51ab7ae 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -933,7 +933,7 @@ unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info
int i;
for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++)
- size += rot_info->plane[i].width * rot_info->plane[i].height;
+ size += rot_info->plane[i].dst_stride * rot_info->plane[i].width;
return size;
}
@@ -944,7 +944,7 @@ unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info
int i;
for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)
- size += rem_info->plane[i].width * rem_info->plane[i].height;
+ size += rem_info->plane[i].dst_stride * rem_info->plane[i].height;
return size;
}
@@ -1685,7 +1685,7 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
valid_fb:
plane_state->rotation = plane_config->rotation;
- intel_fb_fill_view(to_intel_framebuffer(fb), plane_state->rotation,
+ intel_fb_fill_view(to_intel_framebuffer(fb), plane_config->rotation,
&intel_state->view);
__i915_vma_pin(vma);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index b72861f6f68a7..586976c1a9701 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -128,6 +128,7 @@ struct intel_framebuffer {
/* Params to remap the FB pages and program the plane registers in each view. */
struct intel_fb_view normal_view;
struct intel_fb_view rotated_view;
+ struct intel_fb_view remapped_view;
};
struct intel_fbdev {
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index dcf7e811d1425..a8fced4570e30 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -486,10 +486,17 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
return true;
}
+static bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
+{
+ return false;
+}
+
static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
{
if (drm_rotation_90_or_270(rotation))
return fb->rotated_view.color_plane[color_plane].pitch;
+ else if (intel_fb_needs_pot_stride_remap(fb))
+ return fb->remapped_view.color_plane[color_plane].pitch;
else
return fb->normal_view.color_plane[color_plane].pitch;
}
@@ -597,6 +604,16 @@ plane_view_src_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
dims->tile_width * fb->base.format->cpp[color_plane]);
}
+static unsigned int
+plane_view_dst_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
+ unsigned int pitch_tiles)
+{
+ if (intel_fb_needs_pot_stride_remap(fb))
+ return roundup_pow_of_two(pitch_tiles);
+ else
+ return pitch_tiles;
+}
+
static unsigned int
plane_view_width_tiles(const struct intel_framebuffer *fb, int color_plane,
const struct fb_plane_view_dims *dims,
@@ -629,8 +646,8 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
unsigned int tile_width = dims->tile_width;
unsigned int tile_height = dims->tile_height;
unsigned int tile_size = intel_tile_size(i915);
- unsigned int pitch_tiles;
struct drm_rect r;
+ u32 size;
assign_chk_ovf(i915, remap_info->offset, obj_offset);
assign_chk_ovf(i915, remap_info->src_stride, plane_view_src_stride_tiles(fb, color_plane, dims));
@@ -640,6 +657,9 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
if (view->gtt.type == I915_GGTT_VIEW_ROTATED) {
check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
+ assign_chk_ovf(i915, remap_info->dst_stride,
+ plane_view_dst_stride_tiles(fb, color_plane, remap_info->height));
+
/* rotate the x/y offsets to match the GTT view */
drm_rect_init(&r, x, y, dims->width, dims->height);
drm_rect_rotate(&r,
@@ -650,22 +670,26 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
color_plane_info->x = r.x1;
color_plane_info->y = r.y1;
- pitch_tiles = remap_info->height;
- color_plane_info->pitch = pitch_tiles * tile_height;
+ color_plane_info->pitch = remap_info->dst_stride * tile_height;
+
+ size = remap_info->dst_stride * remap_info->width;
/* rotate the tile dimensions to match the GTT view */
swap(tile_width, tile_height);
} else {
drm_WARN_ON(&i915->drm, view->gtt.type != I915_GGTT_VIEW_REMAPPED);
-
check_array_bounds(i915, view->gtt.remapped.plane, color_plane);
+ assign_chk_ovf(i915, remap_info->dst_stride,
+ plane_view_dst_stride_tiles(fb, color_plane, remap_info->width));
+
color_plane_info->x = x;
color_plane_info->y = y;
- pitch_tiles = remap_info->width;
- color_plane_info->pitch = pitch_tiles * tile_width *
+ color_plane_info->pitch = remap_info->dst_stride * tile_width *
fb->base.format->cpp[color_plane];
+
+ size = remap_info->dst_stride * remap_info->height;
}
/*
@@ -675,10 +699,10 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
*/
intel_adjust_tile_offset(&color_plane_info->x, &color_plane_info->y,
tile_width, tile_height,
- tile_size, pitch_tiles,
+ tile_size, remap_info->dst_stride,
gtt_offset * tile_size, 0);
- return remap_info->width * remap_info->height;
+ return size;
}
#undef assign_chk_ovf
@@ -723,12 +747,14 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
struct drm_i915_gem_object *obj = intel_fb_obj(fb);
u32 gtt_offset_rotated = 0;
+ u32 gtt_offset_remapped = 0;
unsigned int max_size = 0;
int i, num_planes = fb->format->num_planes;
unsigned int tile_size = intel_tile_size(i915);
intel_fb_view_init(&intel_fb->normal_view, I915_GGTT_VIEW_NORMAL);
intel_fb_view_init(&intel_fb->rotated_view, I915_GGTT_VIEW_ROTATED);
+ intel_fb_view_init(&intel_fb->remapped_view, I915_GGTT_VIEW_REMAPPED);
for (i = 0; i < num_planes; i++) {
struct fb_plane_view_dims view_dims;
@@ -776,6 +802,11 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
offset, gtt_offset_rotated, x, y,
&intel_fb->rotated_view);
+ if (intel_fb_needs_pot_stride_remap(intel_fb))
+ gtt_offset_remapped += calc_plane_remap_info(intel_fb, i, &view_dims,
+ offset, gtt_offset_remapped, x, y,
+ &intel_fb->remapped_view);
+
size = calc_plane_normal_size(intel_fb, i, &view_dims, x, y);
/* how many tiles in total needed in the bo */
max_size = max(max_size, offset + size);
@@ -859,6 +890,8 @@ void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotatio
{
if (drm_rotation_90_or_270(rotation))
*view = fb->rotated_view;
+ else if (intel_fb_needs_pot_stride_remap(fb))
+ *view = fb->remapped_view;
else
*view = fb->normal_view;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index cb048d0e369ce..6114f5c99ce71 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1267,14 +1267,16 @@ void i915_ggtt_resume(struct i915_ggtt *ggtt)
static struct scatterlist *
rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,
unsigned int width, unsigned int height,
- unsigned int stride,
+ unsigned int src_stride, unsigned int dst_stride,
struct sg_table *st, struct scatterlist *sg)
{
unsigned int column, row;
unsigned int src_idx;
for (column = 0; column < width; column++) {
- src_idx = stride * (height - 1) + column + offset;
+ unsigned int left;
+
+ src_idx = src_stride * (height - 1) + column + offset;
for (row = 0; row < height; row++) {
st->nents++;
/*
@@ -1286,9 +1288,27 @@ rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,
sg_dma_address(sg) =
i915_gem_object_get_dma_address(obj, src_idx);
sg_dma_len(sg) = I915_GTT_PAGE_SIZE;
+
sg = sg_next(sg);
- src_idx -= stride;
+ src_idx -= src_stride;
}
+
+ left = (dst_stride - height) * I915_GTT_PAGE_SIZE;
+
+ if (!left)
+ continue;
+
+ st->nents++;
+
+ /*
+ * The DE ignores the PTEs for the padding tiles, the sg entry
+ * here is just a conenience to indicate how many padding PTEs
+ * to insert at this spot.
+ */
+ sg_set_page(sg, NULL, left, 0);
+ sg_dma_address(sg) = 0;
+ sg_dma_len(sg) = left;
+ sg = sg_next(sg);
}
return sg;
@@ -1317,11 +1337,12 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
st->nents = 0;
sg = st->sgl;
- for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++) {
+ for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++)
sg = rotate_pages(obj, rot_info->plane[i].offset,
rot_info->plane[i].width, rot_info->plane[i].height,
- rot_info->plane[i].src_stride, st, sg);
- }
+ rot_info->plane[i].src_stride,
+ rot_info->plane[i].dst_stride,
+ st, sg);
return st;
@@ -1339,7 +1360,7 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
static struct scatterlist *
remap_pages(struct drm_i915_gem_object *obj, unsigned int offset,
unsigned int width, unsigned int height,
- unsigned int stride,
+ unsigned int src_stride, unsigned int dst_stride,
struct sg_table *st, struct scatterlist *sg)
{
unsigned int row;
@@ -1356,7 +1377,6 @@ remap_pages(struct drm_i915_gem_object *obj, unsigned int offset,
* the entries so the sg list can be happily traversed.
* The only thing we need are DMA addresses.
*/
-
addr = i915_gem_object_get_dma_address_len(obj, offset, &length);
length = min(left, length);
@@ -1372,7 +1392,24 @@ remap_pages(struct drm_i915_gem_object *obj, unsigned int offset,
left -= length;
}
- offset += stride - width;
+ offset += src_stride - width;
+
+ left = (dst_stride - width) * I915_GTT_PAGE_SIZE;
+
+ if (!left)
+ continue;
+
+ st->nents++;
+
+ /*
+ * The DE ignores the PTEs for the padding tiles, the sg entry
+ * here is just a conenience to indicate how many padding PTEs
+ * to insert at this spot.
+ */
+ sg_set_page(sg, NULL, left, 0);
+ sg_dma_address(sg) = 0;
+ sg_dma_len(sg) = left;
+ sg = sg_next(sg);
}
return sg;
@@ -1404,7 +1441,8 @@ intel_remap_pages(struct intel_remapped_info *rem_info,
for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
sg = remap_pages(obj, rem_info->plane[i].offset,
rem_info->plane[i].width, rem_info->plane[i].height,
- rem_info->plane[i].src_stride, st, sg);
+ rem_info->plane[i].src_stride, rem_info->plane[i].dst_stride,
+ st, sg);
}
i915_sg_trim(st);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 9c4b9d475793b..b654b7498bcde 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -173,26 +173,30 @@ i915_debugfs_describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
break;
case I915_GGTT_VIEW_ROTATED:
- seq_printf(m, ", rotated [(%ux%u, stride=%u, offset=%u), (%ux%u, stride=%u, offset=%u)]",
+ seq_printf(m, ", rotated [(%ux%u, src_stride=%u, dst_stride=%u, offset=%u), (%ux%u, src_stride=%u, dst_stride=%u, offset=%u)]",
vma->ggtt_view.rotated.plane[0].width,
vma->ggtt_view.rotated.plane[0].height,
vma->ggtt_view.rotated.plane[0].src_stride,
+ vma->ggtt_view.rotated.plane[0].dst_stride,
vma->ggtt_view.rotated.plane[0].offset,
vma->ggtt_view.rotated.plane[1].width,
vma->ggtt_view.rotated.plane[1].height,
vma->ggtt_view.rotated.plane[1].src_stride,
+ vma->ggtt_view.rotated.plane[1].dst_stride,
vma->ggtt_view.rotated.plane[1].offset);
break;
case I915_GGTT_VIEW_REMAPPED:
- seq_printf(m, ", remapped [(%ux%u, stride=%u, offset=%u), (%ux%u, stride=%u, offset=%u)]",
+ seq_printf(m, ", remapped [(%ux%u, src_stride=%u, dst_stride=%u, offset=%u), (%ux%u, src_stride=%u, dst_stride=%u, offset=%u)]",
vma->ggtt_view.remapped.plane[0].width,
vma->ggtt_view.remapped.plane[0].height,
vma->ggtt_view.remapped.plane[0].src_stride,
+ vma->ggtt_view.remapped.plane[0].dst_stride,
vma->ggtt_view.remapped.plane[0].offset,
vma->ggtt_view.remapped.plane[1].width,
vma->ggtt_view.remapped.plane[1].height,
vma->ggtt_view.remapped.plane[1].src_stride,
+ vma->ggtt_view.remapped.plane[1].dst_stride,
vma->ggtt_view.remapped.plane[1].offset);
break;
diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
index f7f2aa168c9ef..6b1bfa230b825 100644
--- a/drivers/gpu/drm/i915/i915_vma_types.h
+++ b/drivers/gpu/drm/i915/i915_vma_types.h
@@ -101,7 +101,7 @@ struct intel_remapped_plane_info {
u16 width;
u16 height;
u16 src_stride;
- u16 unused_mbz;
+ u16 dst_stride;
} __packed;
struct intel_remapped_info {
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 9aaf7201e2421..6aadcd31d75a9 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -528,6 +528,15 @@ static int igt_vma_rotate_remap(void *arg)
GEM_BUG_ON(max_offset > max_pages);
max_offset = max_pages - max_offset;
+ if (!plane_info[0].dst_stride)
+ plane_info[0].dst_stride = view.type == I915_GGTT_VIEW_ROTATED ?
+ plane_info[0].height :
+ plane_info[0].width;
+ if (!plane_info[1].dst_stride)
+ plane_info[1].dst_stride = view.type == I915_GGTT_VIEW_ROTATED ?
+ plane_info[1].height :
+ plane_info[1].width;
+
for_each_prime_number_from(plane_info[0].offset, 0, max_offset) {
for_each_prime_number_from(plane_info[1].offset, 0, max_offset) {
struct scatterlist *sg;
@@ -902,6 +911,10 @@ static int igt_vma_remapped_gtt(void *arg)
if (err)
goto out;
+ if (!plane_info[0].dst_stride)
+ plane_info[0].dst_stride = *t == I915_GGTT_VIEW_ROTATED ?
+ p->height : p->width;
+
vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
--
2.25.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 24/25] drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (22 preceding siblings ...)
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 23/25] drm/i915: Add support for FBs requiring a POT stride alignment Imre Deak
@ 2021-03-25 21:48 ` Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 25/25] drm/i915: For-CI: Force remapping the FB with a POT aligned stride Imre Deak
` (16 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:48 UTC (permalink / raw)
To: intel-gfx
Add selftests to test the POT stride padding functionality added in the
previous patch.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/selftests/i915_vma.c | 93 +++++++++++++++++++++--
1 file changed, 86 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 6aadcd31d75a9..5fe7b80ca0bd9 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -373,6 +373,8 @@ assert_rotated(struct drm_i915_gem_object *obj,
unsigned int x, y;
for (x = 0; x < r->plane[n].width; x++) {
+ unsigned int left;
+
for (y = 0; y < r->plane[n].height; y++) {
unsigned long src_idx;
dma_addr_t src;
@@ -401,6 +403,31 @@ assert_rotated(struct drm_i915_gem_object *obj,
sg = sg_next(sg);
}
+
+ left = (r->plane[n].dst_stride - y) * PAGE_SIZE;
+
+ if (!left)
+ continue;
+
+ if (!sg) {
+ pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ n, x, y);
+ return ERR_PTR(-EINVAL);
+ }
+
+ if (sg_dma_len(sg) != left) {
+ pr_err("Invalid sg.length, found %d, expected %u for rotated page (%d, %d)\n",
+ sg_dma_len(sg), left, x, y);
+ return ERR_PTR(-EINVAL);
+ }
+
+ if (sg_dma_address(sg) != 0) {
+ pr_err("Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
+ &sg_dma_address(sg), x, y);
+ return ERR_PTR(-EINVAL);
+ }
+
+ sg = sg_next(sg);
}
return sg;
@@ -462,15 +489,55 @@ assert_remapped(struct drm_i915_gem_object *obj,
if (!left)
sg = sg_next(sg);
}
+
+ if (left) {
+ pr_err("Unexpected sg tail with %d size for remapped page (%d, %d)\n",
+ left,
+ x, y);
+ return ERR_PTR(-EINVAL);
+ }
+
+ left = (r->plane[n].dst_stride - r->plane[n].width) * PAGE_SIZE;
+
+ if (!left)
+ continue;
+
+ if (!sg) {
+ pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ n, x, y);
+ return ERR_PTR(-EINVAL);
+ }
+
+ if (sg_dma_len(sg) != left) {
+ pr_err("Invalid sg.length, found %u, expected %u for remapped page (%d, %d)\n",
+ sg_dma_len(sg), left,
+ x, y);
+ return ERR_PTR(-EINVAL);
+ }
+
+ if (sg_dma_address(sg) != 0) {
+ pr_err("Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
+ &sg_dma_address(sg),
+ x, y);
+ return ERR_PTR(-EINVAL);
+ }
+
+ sg = sg_next(sg);
+ left = 0;
}
return sg;
}
-static unsigned int rotated_size(const struct intel_remapped_plane_info *a,
- const struct intel_remapped_plane_info *b)
+static unsigned int remapped_size(enum i915_ggtt_view_type view_type,
+ const struct intel_remapped_plane_info *a,
+ const struct intel_remapped_plane_info *b)
{
- return a->width * a->height + b->width * b->height;
+
+ if (view_type == I915_GGTT_VIEW_ROTATED)
+ return a->dst_stride * a->width + b->dst_stride * b->width;
+ else
+ return a->dst_stride * a->height + b->dst_stride * b->height;
}
static int igt_vma_rotate_remap(void *arg)
@@ -494,6 +561,11 @@ static int igt_vma_rotate_remap(void *arg)
{ .width = 4, .height = 6, .src_stride = 6 },
{ .width = 6, .height = 4, .src_stride = 6 },
+
+ { .width = 2, .height = 2, .src_stride = 2, .dst_stride = 2 },
+ { .width = 3, .height = 3, .src_stride = 3, .dst_stride = 4 },
+ { .width = 5, .height = 6, .src_stride = 7, .dst_stride = 8 },
+
{ }
}, *a, *b;
enum i915_ggtt_view_type types[] = {
@@ -555,7 +627,7 @@ static int igt_vma_rotate_remap(void *arg)
goto out_object;
}
- expected_pages = rotated_size(&plane_info[0], &plane_info[1]);
+ expected_pages = remapped_size(view.type, &plane_info[0], &plane_info[1]);
if (view.type == I915_GGTT_VIEW_ROTATED &&
vma->size != expected_pages * PAGE_SIZE) {
@@ -600,16 +672,18 @@ static int igt_vma_rotate_remap(void *arg)
else
sg = assert_remapped(obj, &view.remapped, n, sg);
if (IS_ERR(sg)) {
- pr_err("Inconsistent %s VMA pages for plane %d: [(%d, %d, %d, %d), (%d, %d, %d, %d)]\n",
+ pr_err("Inconsistent %s VMA pages for plane %d: [(%d, %d, %d, %d, %d), (%d, %d, %d, %d, %d)]\n",
view.type == I915_GGTT_VIEW_ROTATED ?
"rotated" : "remapped", n,
plane_info[0].width,
plane_info[0].height,
plane_info[0].src_stride,
+ plane_info[0].dst_stride,
plane_info[0].offset,
plane_info[1].width,
plane_info[1].height,
plane_info[1].src_stride,
+ plane_info[1].dst_stride,
plane_info[1].offset);
err = -EINVAL;
goto out_object;
@@ -877,6 +951,11 @@ static int igt_vma_remapped_gtt(void *arg)
{ .width = 4, .height = 6, .src_stride = 6 },
{ .width = 6, .height = 4, .src_stride = 6 },
+
+ { .width = 2, .height = 2, .src_stride = 2, .dst_stride = 2 },
+ { .width = 3, .height = 3, .src_stride = 3, .dst_stride = 4 },
+ { .width = 5, .height = 6, .src_stride = 7, .dst_stride = 8 },
+
{ }
}, *p;
enum i915_ggtt_view_type types[] = {
@@ -936,9 +1015,9 @@ static int igt_vma_remapped_gtt(void *arg)
u32 val = y << 16 | x;
if (*t == I915_GGTT_VIEW_ROTATED)
- offset = (x * plane_info[0].height + y) * PAGE_SIZE;
+ offset = (x * plane_info[0].dst_stride + y) * PAGE_SIZE;
else
- offset = (y * plane_info[0].width + x) * PAGE_SIZE;
+ offset = (y * plane_info[0].dst_stride + x) * PAGE_SIZE;
iowrite32(val, &map[offset / sizeof(*map)]);
}
--
2.25.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v2 25/25] drm/i915: For-CI: Force remapping the FB with a POT aligned stride
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (23 preceding siblings ...)
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 24/25] drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height Imre Deak
@ 2021-03-25 21:48 ` Imre Deak
2021-03-26 22:35 ` [Intel-gfx] [PATCH v3 " Imre Deak
2021-03-26 1:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev2) Patchwork
` (15 subsequent siblings)
40 siblings, 1 reply; 53+ messages in thread
From: Imre Deak @ 2021-03-25 21:48 UTC (permalink / raw)
To: intel-gfx
To test the POT stride padding functionality until it's taken into use
by the actual platform needing it, enable the padding whenever the FB
remapping is possible. An exception is to pad linear FBs when this would
be otherwise possible (stride is page size aligned), because this won't
be anyway needed. Padding of linear FBs will be still tested whenever
a big stride requires remapping (so by igt/kms_big_fb).
By this both the FB creation time and commit time remapping setup will
be tested.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index a8fced4570e30..2094fb9b5ecab 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -446,17 +446,25 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
return 0;
}
+static bool intel_fb_can_remap(const struct drm_framebuffer *fb);
+
static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
- int i;
/* We don't want to deal with remapping with cursors */
if (plane->id == PLANE_CURSOR)
return false;
+ return intel_fb_can_remap(fb);
+}
+
+static bool intel_fb_can_remap(const struct drm_framebuffer *fb)
+{
+ struct drm_i915_private *i915 = to_i915(fb->dev);
+ int i;
+
/*
* The display engine limits already match/exceed the
* render engine limits, so not much point in remapping.
@@ -486,9 +494,13 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
return true;
}
+#define FORCE_POT_STRIDE_REMAP true
+
static bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
{
- return false;
+ return FORCE_POT_STRIDE_REMAP &&
+ fb->base.modifier != DRM_FORMAT_MOD_LINEAR &&
+ intel_fb_can_remap(&fb->base);
}
static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
--
2.25.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev2)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (24 preceding siblings ...)
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 25/25] drm/i915: For-CI: Force remapping the FB with a POT aligned stride Imre Deak
@ 2021-03-26 1:31 ` Patchwork
2021-03-26 1:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (14 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-26 1:31 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev2)
URL : https://patchwork.freedesktop.org/series/87859/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b96999775f53 drm/i915: Fix rotation setup during plane HW readout
839db6023edd drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()
882e8bffda0a drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()
216d1439b4d6 drm/i915: Make sure i915_ggtt_view is inited when creating an FB
fc86089318ab drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap()
375f0a62f577 drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h
-:78: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 95 lines checked
07af54575ea2 drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c
0bb703ff29fe drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c
577959d8fc0b drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c
75c769f06db9 drm/i915/intel_fb: Pull FB plane functions from intel_display.c
-:1341: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1341: FILE: drivers/gpu/drm/i915/display/intel_fb.c:435:
+ drm_dbg_kms(&i915->drm,
+ "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
total: 0 errors, 0 warnings, 1 checks, 1780 lines checked
805971e3be7a drm/i915/intel_fb: Unexport intel_fb_check_stride()
17ff50f84603 drm/i915/intel_fb: s/dev_priv/i915/
4d810e6cea9d drm/i915/intel_fb: Factor out convert_plane_offset_to_xy()
-:67: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#67: FILE: drivers/gpu/drm/i915/display/intel_fb.c:551:
+ (*x + plane_width) * fb->base.format->cpp[color_plane] > fb->base.pitches[color_plane]) {
total: 0 errors, 1 warnings, 0 checks, 92 lines checked
d2627b052235 drm/i915/intel_fb: Factor out calc_plane_aligned_offset()
-:25: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#25: FILE: drivers/gpu/drm/i915/display/intel_fb.c:561:
+static u32 calc_plane_aligned_offset(const struct intel_framebuffer *fb, int color_plane, int *x, int *y)
total: 0 errors, 1 warnings, 0 checks, 43 lines checked
69a2c13f45f1 drm/i915/intel_fb: Factor out calc_plane_normal_size()
-:22: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#22:
- Add back the +1 tile adjustment for x!=0 in calc_plane_normal_size(). (Ville)
total: 0 errors, 1 warnings, 0 checks, 132 lines checked
6bdf1a98f034 drm/i915: Unify the FB and plane state view information into one struct
9d7a5bf9a603 drm/i915: Store the normal view FB pitch in FB's intel_fb_view
-:11: WARNING:TYPO_SPELLING: 'retrive' may be misspelled - perhaps 'retrieve'?
#11:
it during FB creation to the FB normal view struct and retrive it from
^^^^^^^
total: 0 errors, 1 warnings, 0 checks, 24 lines checked
8f2daa82f5c6 drm/i915: Simplify copying the FB view state to the plane state
-:65: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#65: FILE: drivers/gpu/drm/i915/display/intel_fb.c:487:
+static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
total: 0 errors, 1 warnings, 0 checks, 182 lines checked
87513f08b16f drm/i915/intel_fb: Factor out calc_plane_remap_info()
-:198: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#198: FILE: drivers/gpu/drm/i915/display/intel_fb.c:769:
+ offset, gtt_offset_rotated, x, y,
total: 0 errors, 1 warnings, 0 checks, 256 lines checked
f512c0321559 drm/i915: Shrink the size of intel_remapped_plane_info struct
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'var' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/display/intel_fb.c:616:
+#define assign_chk_ovf(i915, var, val) ({ \
+ drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
+ var = val; \
+})
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'val' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/display/intel_fb.c:616:
+#define assign_chk_ovf(i915, var, val) ({ \
+ drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
+ var = val; \
+})
total: 0 errors, 0 warnings, 2 checks, 62 lines checked
1246ab4e7f34 drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap()
-:61: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#61: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:549:
+ expected_pages = rotated_size(&plane_info[0], &plane_info[1]);
total: 0 errors, 1 warnings, 0 checks, 124 lines checked
1b14a1eea28c drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct
-:37: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#37: FILE: drivers/gpu/drm/i915/display/intel_fb.c:636:
+ assign_chk_ovf(i915, remap_info->src_stride, plane_view_src_stride_tiles(fb, color_plane, dims));
total: 0 errors, 1 warnings, 0 checks, 181 lines checked
6c0b22fa513b drm/i915: Add support for FBs requiring a POT stride alignment
-:194: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#194: FILE: drivers/gpu/drm/i915/display/intel_fb.c:807:
+ offset, gtt_offset_remapped, x, y,
total: 0 errors, 1 warnings, 0 checks, 333 lines checked
6cc2ddf9efdd drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height
-:112: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#112: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:536:
{
+
-:137: WARNING:LONG_LINE: line length of 114 exceeds 100 columns
#137: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:630:
+ expected_pages = remapped_size(view.type, &plane_info[0], &plane_info[1]);
-:178: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#178: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:1018:
+ offset = (x * plane_info[0].dst_stride + y) * PAGE_SIZE;
-:181: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#181: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:1020:
+ offset = (y * plane_info[0].dst_stride + x) * PAGE_SIZE;
total: 0 errors, 3 warnings, 1 checks, 157 lines checked
976ec37918b8 drm/i915: For-CI: Force remapping the FB with a POT aligned stride
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev2)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (25 preceding siblings ...)
2021-03-26 1:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev2) Patchwork
@ 2021-03-26 1:32 ` Patchwork
2021-03-26 1:36 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
` (13 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-26 1:32 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev2)
URL : https://patchwork.freedesktop.org/series/87859/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1329:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_ring_submission.c:1203:24: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/gvt/mmio.c:295:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1434:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1488:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/intel_wakeref.c:137:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev2)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (26 preceding siblings ...)
2021-03-26 1:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2021-03-26 1:36 ` Patchwork
2021-03-26 2:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (12 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-26 1:36 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev2)
URL : https://patchwork.freedesktop.org/series/87859/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
/home/cidrm/kernel/Documentation/gpu/i915:22: ./drivers/gpu/drm/i915/intel_runtime_pm.c:423: WARNING: Inline strong start-string without end-string.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add support for FBs requiring a POT stride padding (rev2)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (27 preceding siblings ...)
2021-03-26 1:36 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
@ 2021-03-26 2:02 ` Patchwork
2021-03-26 7:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
` (11 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-26 2:02 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 5035 bytes --]
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev2)
URL : https://patchwork.freedesktop.org/series/87859/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9898 -> Patchwork_19860
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/index.html
Known issues
------------
Here are the changes found in Patchwork_19860 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_flink_basic@bad-flink:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/fi-tgl-y/igt@gem_flink_basic@bad-flink.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/fi-tgl-y/igt@gem_flink_basic@bad-flink.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([i915#1372])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_chamelium@hdmi-crc-fast:
- fi-kbl-7500u: [PASS][5] -> [DMESG-FAIL][6] ([i915#165])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
#### Possible fixes ####
* igt@gem_render_tiled_blits@basic:
- fi-tgl-y: [DMESG-WARN][7] ([i915#402]) -> [PASS][8] +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/fi-tgl-y/igt@gem_render_tiled_blits@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/fi-tgl-y/igt@gem_render_tiled_blits@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1222]: https://gitlab.freedesktop.org/drm/intel/issues/1222
[i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
[i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (46 -> 42)
------------------------------
Missing (4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_9898 -> Patchwork_19860
CI-20190529: 20190529
CI_DRM_9898: 7563bf7465e47b8e4da44b8893bf84138c73ae03 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6046: e76039273b1524147c43dba061756f06003d56ae @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19860: 976ec37918b8b9c7874a1c0c23dd36c2c60937be @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
976ec37918b8 drm/i915: For-CI: Force remapping the FB with a POT aligned stride
6cc2ddf9efdd drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height
6c0b22fa513b drm/i915: Add support for FBs requiring a POT stride alignment
1b14a1eea28c drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct
1246ab4e7f34 drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap()
f512c0321559 drm/i915: Shrink the size of intel_remapped_plane_info struct
87513f08b16f drm/i915/intel_fb: Factor out calc_plane_remap_info()
8f2daa82f5c6 drm/i915: Simplify copying the FB view state to the plane state
9d7a5bf9a603 drm/i915: Store the normal view FB pitch in FB's intel_fb_view
6bdf1a98f034 drm/i915: Unify the FB and plane state view information into one struct
69a2c13f45f1 drm/i915/intel_fb: Factor out calc_plane_normal_size()
d2627b052235 drm/i915/intel_fb: Factor out calc_plane_aligned_offset()
4d810e6cea9d drm/i915/intel_fb: Factor out convert_plane_offset_to_xy()
17ff50f84603 drm/i915/intel_fb: s/dev_priv/i915/
805971e3be7a drm/i915/intel_fb: Unexport intel_fb_check_stride()
75c769f06db9 drm/i915/intel_fb: Pull FB plane functions from intel_display.c
577959d8fc0b drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c
0bb703ff29fe drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c
07af54575ea2 drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c
375f0a62f577 drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h
fc86089318ab drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap()
216d1439b4d6 drm/i915: Make sure i915_ggtt_view is inited when creating an FB
882e8bffda0a drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()
839db6023edd drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()
b96999775f53 drm/i915: Fix rotation setup during plane HW readout
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/index.html
[-- Attachment #1.2: Type: text/html, Size: 5807 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add support for FBs requiring a POT stride padding (rev2)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (28 preceding siblings ...)
2021-03-26 2:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-03-26 7:41 ` Patchwork
2021-03-26 22:27 ` Imre Deak
2021-03-26 23:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev3) Patchwork
` (10 subsequent siblings)
40 siblings, 1 reply; 53+ messages in thread
From: Patchwork @ 2021-03-26 7:41 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30290 bytes --]
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev2)
URL : https://patchwork.freedesktop.org/series/87859/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9898_full -> Patchwork_19860_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_19860_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19860_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19860_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_userptr_blits@set-cache-level:
- shard-skl: NOTRUN -> [FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@gem_userptr_blits@set-cache-level.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-snb: NOTRUN -> [FAIL][2] +14 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-snb: [PASS][3] -> [FAIL][4] +29 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-snb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt:
- shard-glk: NOTRUN -> [FAIL][5] +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
- shard-apl: NOTRUN -> [FAIL][6] +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
- shard-kbl: [PASS][7] -> [FAIL][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt:
- shard-apl: [PASS][9] -> [FAIL][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-apl6/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
- shard-glk: [PASS][11] -> [FAIL][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk7/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk2/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt:
- shard-iclb: [PASS][13] -> [FAIL][14] +4 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb2/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb2/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
- shard-skl: [PASS][15] -> [FAIL][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl8/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl7/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
* igt@kms_plane@plane-panning-bottom-right-pipe-b-planes:
- shard-tglb: [PASS][17] -> [FAIL][18] +8 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb7/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html
#### Warnings ####
* igt@kms_fbcon_fbt@fbc:
- shard-snb: [SKIP][19] ([fdo#109271]) -> [FAIL][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-snb7/igt@kms_fbcon_fbt@fbc.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb2/igt@kms_fbcon_fbt@fbc.html
* igt@runner@aborted:
- shard-skl: ([FAIL][21], [FAIL][22], [FAIL][23], [FAIL][24], [FAIL][25]) ([i915#2029] / [i915#2263] / [i915#3002]) -> ([FAIL][26], [FAIL][27], [FAIL][28], [FAIL][29], [FAIL][30], [FAIL][31]) ([i915#1814] / [i915#2029] / [i915#3002])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl9/igt@runner@aborted.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl3/igt@runner@aborted.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl4/igt@runner@aborted.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl2/igt@runner@aborted.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl3/igt@runner@aborted.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl2/igt@runner@aborted.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@runner@aborted.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl8/igt@runner@aborted.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@runner@aborted.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@runner@aborted.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_19860_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@engines-mixed:
- shard-snb: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#1099]) +2 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb2/igt@gem_ctx_persistence@engines-mixed.html
* igt@gem_ctx_persistence@many-contexts:
- shard-tglb: [PASS][33] -> [FAIL][34] ([i915#2410])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb8/igt@gem_ctx_persistence@many-contexts.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb1/igt@gem_ctx_persistence@many-contexts.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][35] -> [TIMEOUT][36] ([i915#2369] / [i915#3063])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb2/igt@gem_eio@unwedge-stress.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb3/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [PASS][37] -> [FAIL][38] ([i915#2846])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl6/igt@gem_exec_fair@basic-deadline.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl2/igt@gem_exec_fair@basic-deadline.html
- shard-apl: NOTRUN -> [FAIL][39] ([i915#2846])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl7/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_parallel@contexts@vecs0:
- shard-skl: [PASS][40] -> [INCOMPLETE][41] ([i915#2369] / [i915#2624])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl8/igt@gem_exec_parallel@contexts@vecs0.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@gem_exec_parallel@contexts@vecs0.html
* igt@gem_mmap_gtt@cpuset-big-copy:
- shard-iclb: [PASS][42] -> [FAIL][43] ([i915#307])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb1/igt@gem_mmap_gtt@cpuset-big-copy.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb1/igt@gem_mmap_gtt@cpuset-big-copy.html
* igt@gem_mmap_gtt@cpuset-big-copy-odd:
- shard-iclb: [PASS][44] -> [FAIL][45] ([i915#2428])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb3/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
* igt@gem_pwrite@basic-exhaustion:
- shard-snb: NOTRUN -> [WARN][46] ([i915#2658])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb7/igt@gem_pwrite@basic-exhaustion.html
- shard-apl: NOTRUN -> [WARN][47] ([i915#2658])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_userptr_blits@input-checking:
- shard-kbl: NOTRUN -> [DMESG-WARN][48] ([i915#3002])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl4/igt@gem_userptr_blits@input-checking.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: NOTRUN -> [INCOMPLETE][49] ([i915#2782])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb5/igt@i915_selftest@live@hangcheck.html
* igt@kms_async_flips@test-time-stamp:
- shard-tglb: [PASS][50] -> [FAIL][51] ([i915#2574])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb3/igt@kms_async_flips@test-time-stamp.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb7/igt@kms_async_flips@test-time-stamp.html
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-glk: NOTRUN -> [SKIP][52] ([fdo#109271]) +30 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo:
- shard-snb: NOTRUN -> [SKIP][53] ([fdo#109271]) +322 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb5/igt@kms_ccs@pipe-a-ccs-on-another-bo.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic:
- shard-skl: NOTRUN -> [SKIP][54] ([fdo#109271] / [fdo#111304])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html
* igt@kms_chamelium@dp-crc-multiple:
- shard-apl: NOTRUN -> [SKIP][55] ([fdo#109271] / [fdo#111827]) +19 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_chamelium@dp-crc-multiple.html
- shard-skl: NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) +7 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_chamelium@dp-crc-multiple.html
* igt@kms_chamelium@hdmi-hpd-enable-disable-mode:
- shard-snb: NOTRUN -> [SKIP][57] ([fdo#109271] / [fdo#111827]) +19 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb2/igt@kms_chamelium@hdmi-hpd-enable-disable-mode.html
* igt@kms_chamelium@hdmi-hpd-storm:
- shard-kbl: NOTRUN -> [SKIP][58] ([fdo#109271] / [fdo#111827]) +6 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_chamelium@hdmi-hpd-storm.html
* igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
- shard-glk: NOTRUN -> [SKIP][59] ([fdo#109271] / [fdo#111827]) +3 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html
* igt@kms_content_protection@atomic:
- shard-kbl: NOTRUN -> [TIMEOUT][60] ([i915#1319]) +2 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@legacy:
- shard-apl: NOTRUN -> [TIMEOUT][61] ([i915#1319])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_content_protection@legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: NOTRUN -> [FAIL][62] ([i915#2346])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
- shard-kbl: NOTRUN -> [DMESG-FAIL][63] ([IGT#6])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl2/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-apl: NOTRUN -> [DMESG-WARN][64] ([i915#180])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_flip@flip-vs-suspend@a-dp1.html
* igt@kms_flip@plain-flip-fb-recreate@c-edp1:
- shard-skl: [PASS][65] -> [FAIL][66] ([i915#2122])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl7/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
- shard-kbl: NOTRUN -> [FAIL][67] ([i915#2641])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-kbl: NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#2672])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
- shard-skl: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#2672])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
- shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#2672])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile:
- shard-apl: NOTRUN -> [FAIL][71] ([i915#2641])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt:
- shard-apl: NOTRUN -> [FAIL][72] ([i915#49]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc:
- shard-glk: [PASS][73] -> [FAIL][74] ([i915#49]) +32 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk8/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
- shard-kbl: [PASS][75] -> [FAIL][76] ([i915#2546] / [i915#49]) +11 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
- shard-kbl: NOTRUN -> [FAIL][77] ([i915#2546] / [i915#49])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt:
- shard-apl: [PASS][78] -> [FAIL][79] ([i915#49]) +3 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-apl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt:
- shard-kbl: [PASS][80] -> [FAIL][81] ([i915#2546])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt:
- shard-kbl: NOTRUN -> [SKIP][82] ([fdo#109271]) +70 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-gtt:
- shard-iclb: [PASS][83] -> [FAIL][84] ([i915#49]) +44 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-gtt.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
- shard-skl: NOTRUN -> [FAIL][85] ([i915#49])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-tglb: [PASS][86] -> [FAIL][87] ([i915#2416]) +44 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render:
- shard-skl: [PASS][88] -> [FAIL][89] ([i915#49]) +13 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl9/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d:
- shard-skl: NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#533])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@kms_pipe_crc_basic@read-crc-pipe-d.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-glk: NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#533])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
- shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#533]) +1 similar issue
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][93] -> [DMESG-WARN][94] ([i915#180]) +1 similar issue
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane@plane-panning-bottom-right-pipe-b-planes:
- shard-skl: NOTRUN -> [FAIL][95] ([i915#1036])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl6/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html
* igt@kms_plane@plane-panning-bottom-right-pipe-c-planes:
- shard-kbl: [PASS][96] -> [FAIL][97] ([i915#1036]) +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-pipe-c-planes.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-pipe-c-planes.html
- shard-apl: [PASS][98] -> [FAIL][99] ([i915#1036]) +2 similar issues
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-apl7/igt@kms_plane@plane-panning-bottom-right-pipe-c-planes.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl8/igt@kms_plane@plane-panning-bottom-right-pipe-c-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-tglb: [PASS][100] -> [FAIL][101] ([i915#2411] / [i915#533])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
- shard-glk: [PASS][102] -> [FAIL][103] ([i915#1036] / [i915#533])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
- shard-apl: [PASS][104] -> [FAIL][105] ([i915#1036] / [i915#533])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
- shard-kbl: [PASS][106] -> [FAIL][107] ([i915#1036] / [i915#533])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
- shard-skl: [PASS][108] -> [FAIL][109] ([i915#1036] / [i915#533])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl9/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-iclb: [PASS][110] -> [FAIL][111] ([i915#1036]) +5 similar issues
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
- shard-apl: NOTRUN -> [FAIL][112] ([i915#1036])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
- shard-glk: [PASS][113] -> [FAIL][114] ([i915#1036]) +4 similar issues
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
- shard-tglb: [PASS][115] -> [FAIL][116] ([i915#2411]) +2 similar issues
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-skl: [PASS][117] -> [FAIL][118] ([i915#1036]) +2 similar issues
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
- shard-kbl: NOTRUN -> [FAIL][119] ([i915#1036]) +1 similar issue
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-kbl: NOTRUN -> [FAIL][120] ([fdo#108145] / [i915#265])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][121] ([i915#265])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
- shard-kbl: NOTRUN -> [FAIL][122] ([i915#265])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
- shard-skl: NOTRUN -> [FAIL][123] ([i915#265])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: NOTRUN -> [FAIL][124] ([fdo#108145] / [i915#265]) +1 similar issue
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
- shard-glk: NOTRUN -> [SKIP][125] ([fdo#109271] / [i915#658])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
- shard-kbl: NOTRUN -> [SKIP][126] ([fdo#109271] / [i915#658]) +1 similar issue
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1:
- shard-skl: NOTRUN -> [SKIP][127] ([fdo#109271] / [i915#658]) +2 similar issues
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1.html
- shard-apl: NOTRUN -> [SKIP][128] ([fdo#109271] / [i915#658]) +5 similar issues
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [PASS][129] -> [SKIP][130] ([fdo#109642] / [fdo#111068] / [i915#658])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb2/igt@kms_psr2_su@page_flip.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb5/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [PASS][131] -> [SKIP][132] ([fdo#109441])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb5/igt@kms_psr@psr2_sprite_blt.html
* igt@kms_setmode@basic:
- shard-snb: NOTRUN -> [FAIL][133] ([i915#31])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb7/igt@kms_setmode@basic.html
* igt@kms_sysfs_edid_timing:
- shard-apl: NOTRUN -> [FAIL][134] ([IGT#2])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_sysfs_edid_timing.html
* igt@kms_vblank@pipe-d-wait-forked-hang:
- shard-apl: NOTRUN -> [SKIP][135] ([fdo#109271]) +173 similar issues
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@kms_vblank@pipe-d-wait-forked-hang.html
* igt@perf@gen12-mi-rpc:
- shard-skl: NOTRUN -> [SKIP][136] ([fdo#109271]) +80 similar issues
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@perf@gen12-mi-rpc.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-kbl: [SKIP][137] ([fdo#109271]) -> [PASS][138]
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl6/igt@gem_exec_fair@basic-flow@rcs0.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl4/igt@gem_exec_fair@basic-flow@rcs0.html
- shard-tglb: [FAIL][139] ([i915#2842]) -> [PASS][140]
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-glk: [FAIL][141] ([i915#2842]) -> [PASS][142]
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk9/igt@gem_exec_fair@basic-none-rrul@rcs0.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-kbl: [FAIL][143] ([i915#2842]) -> [PASS][144] +1 similar issue
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl2/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl4/igt@gem_exec
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/index.html
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^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Intel-gfx] [PATCH v2 15/25] drm/i915/intel_fb: Factor out calc_plane_normal_size()
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 15/25] drm/i915/intel_fb: Factor out calc_plane_normal_size() Imre Deak
@ 2021-03-26 16:22 ` Ville Syrjälä
0 siblings, 0 replies; 53+ messages in thread
From: Ville Syrjälä @ 2021-03-26 16:22 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
On Thu, Mar 25, 2021 at 11:47:58PM +0200, Imre Deak wrote:
> Factor out to a new function the logic to calculate an FB plane's
> normal-view size.
>
> Instead of using intel_remapped_plane_info, which is related only to
> remapping, add a helper to get the tile pitch and rows for an FB plane,
> so these helpers can be used both by the normal size calculation and the
> remapping code.
>
> Also add a new fb_plane_view_dims struct in which we can pass around the
> view (either FB plane or plane source) and tile dimensions conveniently
> to functions calculating further view parameters.
>
> v2:
> - Add back the +1 tile adjustment for x!=0 in calc_plane_normal_size(). (Ville)
> - s/pages/tiles/ in calc_plane_normal_size(). (Ville)
> - Add a helper for the plane view width calculation. (Ville)
> - Return tiles as unsigned int from calc_plane_normal_size().
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fb.c | 97 +++++++++++++++++++------
> 1 file changed, 76 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index 1400a31f0dd6b..6f8206769c3df 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -632,6 +632,74 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
> return plane_info->width * plane_info->height;
> }
>
> +struct fb_plane_view_dims {
> + unsigned int width, height;
> + unsigned int tile_width, tile_height;
> +};
> +
> +static void init_plane_view_dims(const struct intel_framebuffer *fb, int color_plane,
> + unsigned int width, unsigned int height,
> + struct fb_plane_view_dims *dims)
> +{
> + dims->width = width;
> + dims->height = height;
> +
> + intel_tile_dims(&fb->base, color_plane, &dims->tile_width, &dims->tile_height);
> +}
> +
> +static unsigned int
> +plane_view_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
> + const struct fb_plane_view_dims *dims)
> +{
> + return DIV_ROUND_UP(fb->base.pitches[color_plane],
> + dims->tile_width * fb->base.format->cpp[color_plane]);
> +}
> +
> +static unsigned int
> +plane_view_width_tiles(const struct intel_framebuffer *fb, int color_plane,
> + const struct fb_plane_view_dims *dims,
> + int x)
> +{
> + return DIV_ROUND_UP(x + dims->width, dims->tile_width);
> +}
> +
> +static unsigned int
> +plane_view_height_tiles(const struct intel_framebuffer *fb, int color_plane,
> + const struct fb_plane_view_dims *dims,
> + int y)
> +{
> + return DIV_ROUND_UP(y + dims->height, dims->tile_height);
> +}
> +
> +/* Return number of tiles @color_plane needs. */
> +static unsigned int
> +calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
> + const struct fb_plane_view_dims *dims,
> + int x, int y)
> +{
> + struct drm_i915_private *i915 = to_i915(fb->base.dev);
> + unsigned int tiles;
> +
> + if (is_surface_linear(&fb->base, color_plane)) {
> + unsigned int size;
> +
> + size = (y + dims->height) * fb->base.pitches[color_plane] +
> + x * fb->base.format->cpp[color_plane];
> + tiles = DIV_ROUND_UP(size, intel_tile_size(i915));
> + } else {
> + tiles = plane_view_stride_tiles(fb, color_plane, dims) *
> + plane_view_height_tiles(fb, color_plane, dims, y);
> + /*
> + * If the plane isn't horizontally tile aligned,
> + * we need one more tile.
> + */
> + if (x != 0)
> + tiles++;
> + }
> +
> + return tiles;
> +}
> +
> int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb)
> {
> struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> @@ -642,6 +710,7 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
> unsigned int tile_size = intel_tile_size(i915);
>
> for (i = 0; i < num_planes; i++) {
> + struct fb_plane_view_dims view_dims;
> unsigned int width, height;
> unsigned int cpp, size;
> u32 offset;
> @@ -667,6 +736,8 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
> if (ret)
> return ret;
>
> + init_plane_view_dims(intel_fb, i, width, height, &view_dims);
> +
> /*
> * First pixel of the framebuffer from
> * the start of the normal gtt mapping.
> @@ -678,38 +749,22 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
>
> if (!is_surface_linear(fb, i)) {
> struct intel_remapped_plane_info plane_info;
> - unsigned int tile_width, tile_height;
> -
> - intel_tile_dims(fb, i, &tile_width, &tile_height);
>
> plane_info.offset = offset;
> - plane_info.stride = DIV_ROUND_UP(fb->pitches[i],
> - tile_width * cpp);
> - plane_info.width = DIV_ROUND_UP(x + width, tile_width);
> - plane_info.height = DIV_ROUND_UP(y + height,
> - tile_height);
> -
> - /* how many tiles does this plane need */
> - size = plane_info.stride * plane_info.height;
> - /*
> - * If the plane isn't horizontally tile aligned,
> - * we need one more tile.
> - */
> - if (x != 0)
> - size++;
> + plane_info.stride = plane_view_stride_tiles(intel_fb, i, &view_dims);
> + plane_info.width = plane_view_width_tiles(intel_fb, i, &view_dims, x);
> + plane_info.height = plane_view_height_tiles(intel_fb, i, &view_dims, y);
>
> gtt_offset_rotated +=
> setup_fb_rotation(i, &plane_info,
> gtt_offset_rotated,
> x, y, width, height,
> tile_size,
> - tile_width, tile_height,
> + view_dims.tile_width, view_dims.tile_height,
> fb);
> - } else {
> - size = DIV_ROUND_UP((y + height) * fb->pitches[i] +
> - x * cpp, tile_size);
> }
>
> + size = calc_plane_normal_size(intel_fb, i, &view_dims, x, y);
> /* how many tiles in total needed in the bo */
> max_size = max(max_size, offset + size);
> }
> --
> 2.25.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Intel-gfx] [PATCH v2 16/25] drm/i915: Unify the FB and plane state view information into one struct
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 16/25] drm/i915: Unify the FB and plane state view information into one struct Imre Deak
@ 2021-03-26 16:33 ` Ville Syrjälä
2021-03-26 16:37 ` Imre Deak
2021-03-27 22:09 ` [Intel-gfx] [PATCH v3 " Imre Deak
1 sibling, 1 reply; 53+ messages in thread
From: Ville Syrjälä @ 2021-03-26 16:33 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
On Thu, Mar 25, 2021 at 11:47:59PM +0200, Imre Deak wrote:
> To allow the simplification of FB/plane view computation in the
> follow-up patches, unify the corresponding state in the
> intel_framebuffer and intel_plane_state structs into a new intel_fb_view
> struct.
>
> This adds some overhead to intel_framebuffer as the rotated view will
> have now space for 4 color planes instead of the required 2 and it'll
> also contain the unused offset for each color_plane info. Imo this is an
> acceptable trade-off to get a simplified way of the remap computation.
>
> Use the new intel_fb_view struct for the FB normal view as well, so (in
> the follow-up patches) we can remove the special casing for normal view
> calculation wrt. the calculation of remapped/rotated views. This also
> adds an overhead to the intel_framebuffer struct, as the gtt remap info
> and per-color plane offset/pitch is not required for the normal view,
> but imo this is an acceptable trade-off as above. The per-color plane
> pitch filed will be used by a follow-up patch, so we can retrieve the
> pitch for each view in the same way.
>
> No functional changes in this patch.
>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_plane.c | 20 +++---
> drivers/gpu/drm/i915/display/intel_cursor.c | 14 ++--
> drivers/gpu/drm/i915/display/intel_display.c | 22 +++---
> .../drm/i915/display/intel_display_types.h | 61 ++++++++++------
> drivers/gpu/drm/i915/display/intel_fb.c | 66 ++++++++---------
> drivers/gpu/drm/i915/display/intel_fb.h | 3 +
> drivers/gpu/drm/i915/display/intel_fbc.c | 6 +-
> drivers/gpu/drm/i915/display/intel_sprite.c | 26 +++----
> .../drm/i915/display/skl_universal_plane.c | 71 +++++++++----------
> 9 files changed, 153 insertions(+), 136 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
> index 40266b78247b2..8ee59490c027a 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> @@ -271,7 +271,7 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
> u32 alignment = intel_surf_alignment(fb, 0);
> int cpp = fb->format->cpp[0];
>
> - while ((src_x + src_w) * cpp > plane_state->color_plane[0].stride) {
> + while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].pitch) {
> if (offset == 0) {
> drm_dbg_kms(&dev_priv->drm,
> "Unable to find suitable display surface offset due to X-tiling\n");
> @@ -311,9 +311,9 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
> drm_WARN_ON(&dev_priv->drm, src_x > 4095 || src_y > 4095);
> }
>
> - plane_state->color_plane[0].offset = offset;
> - plane_state->color_plane[0].x = src_x;
> - plane_state->color_plane[0].y = src_y;
> + plane_state->view.color_plane[0].offset = offset;
> + plane_state->view.color_plane[0].x = src_x;
> + plane_state->view.color_plane[0].y = src_y;
>
> return 0;
> }
> @@ -424,8 +424,8 @@ static void i9xx_update_plane(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> u32 linear_offset;
> - int x = plane_state->color_plane[0].x;
> - int y = plane_state->color_plane[0].y;
> + int x = plane_state->view.color_plane[0].x;
> + int y = plane_state->view.color_plane[0].y;
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_y = plane_state->uapi.dst.y1;
> int crtc_w = drm_rect_width(&plane_state->uapi.dst);
> @@ -439,14 +439,14 @@ static void i9xx_update_plane(struct intel_plane *plane,
> linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> if (DISPLAY_VER(dev_priv) >= 4)
> - dspaddr_offset = plane_state->color_plane[0].offset;
> + dspaddr_offset = plane_state->view.color_plane[0].offset;
> else
> dspaddr_offset = linear_offset;
>
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, DSPSTRIDE(i9xx_plane),
> - plane_state->color_plane[0].stride);
> + plane_state->view.color_plane[0].pitch);
>
> if (DISPLAY_VER(dev_priv) < 4) {
> /*
> @@ -531,7 +531,7 @@ g4x_primary_async_flip(struct intel_plane *plane,
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> u32 dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state);
> - u32 dspaddr_offset = plane_state->color_plane[0].offset;
> + u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
> enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> unsigned long irqflags;
>
> @@ -552,7 +552,7 @@ vlv_primary_async_flip(struct intel_plane *plane,
> bool async_flip)
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> - u32 dspaddr_offset = plane_state->color_plane[0].offset;
> + u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
> enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> unsigned long irqflags;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
> index 84099b7f5c358..03dad12cf78fc 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -45,7 +45,7 @@ static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
> else
> base = intel_plane_ggtt_offset(plane_state);
>
> - return base + plane_state->color_plane[0].offset;
> + return base + plane_state->view.color_plane[0].offset;
> }
>
> static u32 intel_cursor_position(const struct intel_plane_state *plane_state)
> @@ -125,9 +125,9 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
> offset += (src_h * src_w - 1) * fb->format->cpp[0];
> }
>
> - plane_state->color_plane[0].offset = offset;
> - plane_state->color_plane[0].x = src_x;
> - plane_state->color_plane[0].y = src_y;
> + plane_state->view.color_plane[0].offset = offset;
> + plane_state->view.color_plane[0].x = src_x;
> + plane_state->view.color_plane[0].y = src_y;
>
> return 0;
> }
> @@ -194,7 +194,7 @@ static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state,
> {
> return CURSOR_ENABLE |
> CURSOR_FORMAT_ARGB |
> - CURSOR_STRIDE(plane_state->color_plane[0].stride);
> + CURSOR_STRIDE(plane_state->view.color_plane[0].pitch);
> }
>
> static bool i845_cursor_size_ok(const struct intel_plane_state *plane_state)
> @@ -233,7 +233,7 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
> }
>
> drm_WARN_ON(&i915->drm, plane_state->uapi.visible &&
> - plane_state->color_plane[0].stride != fb->pitches[0]);
> + plane_state->view.color_plane[0].pitch != fb->pitches[0]);
>
> switch (fb->pitches[0]) {
> case 256:
> @@ -450,7 +450,7 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
> }
>
> drm_WARN_ON(&dev_priv->drm, plane_state->uapi.visible &&
> - plane_state->color_plane[0].stride != fb->pitches[0]);
> + plane_state->view.color_plane[0].pitch != fb->pitches[0]);
>
> if (fb->pitches[0] !=
> drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 25eaa8a44baa8..4ee7e72142a5f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1013,7 +1013,7 @@ static bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
>
> return DISPLAY_VER(dev_priv) < 4 ||
> (plane->has_fbc &&
> - plane_state->view.type == I915_GGTT_VIEW_NORMAL);
> + plane_state->view.gtt.type == I915_GGTT_VIEW_NORMAL);
> }
>
> struct i915_vma *
> @@ -1161,7 +1161,7 @@ u32 intel_fb_xy_to_linear(int x, int y,
> {
> const struct drm_framebuffer *fb = state->hw.fb;
> unsigned int cpp = fb->format->cpp[color_plane];
> - unsigned int pitch = state->color_plane[color_plane].stride;
> + unsigned int pitch = state->view.color_plane[color_plane].pitch;
>
> return y * pitch + x * cpp;
> }
> @@ -1176,8 +1176,8 @@ void intel_add_fb_offsets(int *x, int *y,
> int color_plane)
>
> {
> - *x += state->color_plane[color_plane].x;
> - *y += state->color_plane[color_plane].y;
> + *x += state->view.color_plane[color_plane].x;
> + *y += state->view.color_plane[color_plane].y;
> }
>
> static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)
> @@ -1680,9 +1680,9 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
>
> valid_fb:
> plane_state->rotation = plane_config->rotation;
> - intel_fill_fb_ggtt_view(&intel_state->view, fb,
> + intel_fill_fb_ggtt_view(&intel_state->view.gtt, fb,
> plane_state->rotation);
> - intel_state->color_plane[0].stride =
> + intel_state->view.color_plane[0].pitch =
> intel_fb_pitch(fb, 0, plane_state->rotation);
>
> __i915_vma_pin(vma);
> @@ -1723,7 +1723,7 @@ intel_plane_fence_y_offset(const struct intel_plane_state *plane_state)
> int x = 0, y = 0;
>
> intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
> - plane_state->color_plane[0].offset, 0);
> + plane_state->view.color_plane[0].offset, 0);
>
> return y;
> }
> @@ -6787,8 +6787,6 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
> linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE;
> linked_state->color_ctl = plane_state->color_ctl;
> linked_state->view = plane_state->view;
> - memcpy(linked_state->color_plane, plane_state->color_plane,
> - sizeof(linked_state->color_plane));
>
> intel_plane_copy_hw_state(linked_state, plane_state);
> linked_state->uapi.src = plane_state->uapi.src;
> @@ -9320,8 +9318,8 @@ static int intel_atomic_check_async(struct intel_atomic_state *state)
> return -EINVAL;
> }
>
> - if (old_plane_state->color_plane[0].stride !=
> - new_plane_state->color_plane[0].stride) {
> + if (old_plane_state->view.color_plane[0].pitch !=
> + new_plane_state->view.color_plane[0].pitch) {
> drm_dbg_kms(&i915->drm, "Stride cannot be changed in async flip\n");
> return -EINVAL;
> }
> @@ -10546,7 +10544,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state)
> INTEL_INFO(dev_priv)->display.cursor_needs_physical;
>
> vma = intel_pin_and_fence_fb_obj(fb, phys_cursor,
> - &plane_state->view,
> + &plane_state->view.gtt,
> intel_plane_uses_fence(plane_state),
> &plane_state->flags);
> if (IS_ERR(vma))
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 80983cfe9d3b0..b72861f6f68a7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -85,20 +85,49 @@ enum intel_broadcast_rgb {
> INTEL_BROADCAST_RGB_LIMITED,
> };
>
> +struct intel_fb_view {
> + /*
> + * The remap information used in the remapped and rotated views to
> + * create the DMA scatter-gather list for each FB color plane. This sg
> + * list is created along with the view type (gtt.type) specific
> + * i915_vma object and contains the list of FB object pages (reordered
> + * in the rotated view) that are visible in the view.
> + * In the normal view the FB object's backing store sg list is used
> + * directly and hence the remap information here is not used.
> + */
> + struct i915_ggtt_view gtt;
> +
> + /*
> + * The GTT view (gtt.type) specific information for each FB color
> + * plane. In the normal GTT view all formats (up to 4 color planes),
> + * in the rotated and remapped GTT view all no-CCS formats (up to 2
> + * color planes) are supported.
> + *
> + * TODO: add support for CCS formats in the remapped GTT view.
> + *
> + * The view information shared by all FB color planes in the FB,
> + * like dst x/y and src/dst width, is stored separately in
> + * intel_plane_state.
> + */
> + struct i915_color_plane_view {
> + u32 offset;
> + unsigned int x, y;
> + /*
> + * Plane pitch (stride) in:
> + * bytes for 0/180 degree rotation
> + * pixels for 90/270 degree rotation
> + */
> + unsigned int pitch;
I've been trying to do a bit of s/pitch/stride/ in general
since that's the terminology our hw uses. So I would call this
'stride'.
But if this is easier then I guess it's fine. We could do
a followup pass to unify the naming more.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> + } color_plane[4];
> +};
> +
> struct intel_framebuffer {
> struct drm_framebuffer base;
> struct intel_frontbuffer *frontbuffer;
> - struct intel_rotation_info rot_info;
>
> - /* for each plane in the normal GTT view */
> - struct {
> - unsigned int x, y;
> - } normal[4];
> - /* for each plane in the rotated GTT view for no-CCS formats */
> - struct {
> - unsigned int x, y;
> - unsigned int pitch; /* pixels */
> - } rotated[2];
> + /* Params to remap the FB pages and program the plane registers in each view. */
> + struct intel_fb_view normal_view;
> + struct intel_fb_view rotated_view;
> };
>
> struct intel_fbdev {
> @@ -581,21 +610,11 @@ struct intel_plane_state {
> enum drm_scaling_filter scaling_filter;
> } hw;
>
> - struct i915_ggtt_view view;
> struct i915_vma *vma;
> unsigned long flags;
> #define PLANE_HAS_FENCE BIT(0)
>
> - struct {
> - u32 offset;
> - /*
> - * Plane stride in:
> - * bytes for 0/180 degree rotation
> - * pixels for 90/270 degree rotation
> - */
> - u32 stride;
> - int x, y;
> - } color_plane[4];
> + struct intel_fb_view view;
>
> /* plane control register */
> u32 ctl;
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index 6f8206769c3df..b223e16eb6a22 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -259,7 +259,7 @@ u32 intel_plane_adjust_aligned_offset(int *x, int *y,
> {
> return intel_adjust_aligned_offset(x, y, state->hw.fb, color_plane,
> state->hw.rotation,
> - state->color_plane[color_plane].stride,
> + state->view.color_plane[color_plane].pitch,
> old_offset, new_offset);
> }
>
> @@ -340,7 +340,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
> struct drm_i915_private *i915 = to_i915(intel_plane->base.dev);
> const struct drm_framebuffer *fb = state->hw.fb;
> unsigned int rotation = state->hw.rotation;
> - int pitch = state->color_plane[color_plane].stride;
> + int pitch = state->view.color_plane[color_plane].pitch;
> u32 alignment;
>
> if (intel_plane->id == PLANE_CURSOR)
> @@ -423,8 +423,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
> ccs_y = (y * vsub) % tile_height;
>
> main_plane = skl_ccs_to_main_plane(fb, ccs_plane);
> - main_x = intel_fb->normal[main_plane].x % tile_width;
> - main_y = intel_fb->normal[main_plane].y % tile_height;
> + main_x = intel_fb->normal_view.color_plane[main_plane].x % tile_width;
> + main_y = intel_fb->normal_view.color_plane[main_plane].y % tile_height;
>
> /*
> * CCS doesn't have its own x/y offset register, so the intra CCS tile
> @@ -435,8 +435,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
> "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
> main_x, main_y,
> ccs_x, ccs_y,
> - intel_fb->normal[main_plane].x,
> - intel_fb->normal[main_plane].y,
> + intel_fb->normal_view.color_plane[main_plane].x,
> + intel_fb->normal_view.color_plane[main_plane].y,
> x, y);
> return -EINVAL;
> }
> @@ -487,7 +487,7 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
> int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation)
> {
> if (drm_rotation_90_or_270(rotation))
> - return to_intel_framebuffer(fb)->rotated[color_plane].pitch;
> + return to_intel_framebuffer(fb)->rotated_view.color_plane[color_plane].pitch;
> else
> return fb->pitches[color_plane];
> }
> @@ -584,7 +584,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
> struct drm_framebuffer *fb)
> {
> struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> - struct intel_rotation_info *rot_info = &intel_fb->rot_info;
> + struct intel_rotation_info *rot_info = &intel_fb->rotated_view.gtt.rotated;
> unsigned int pitch_tiles;
> struct drm_rect r;
>
> @@ -598,7 +598,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
>
> rot_info->plane[plane] = *plane_info;
>
> - intel_fb->rotated[plane].pitch = plane_info->height * tile_height;
> + intel_fb->rotated_view.color_plane[plane].pitch = plane_info->height * tile_height;
>
> /* rotate the x/y offsets to match the GTT view */
> drm_rect_init(&r, x, y, width, height);
> @@ -610,7 +610,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
> y = r.y1;
>
> /* rotate the tile dimensions to match the GTT view */
> - pitch_tiles = intel_fb->rotated[plane].pitch / tile_height;
> + pitch_tiles = intel_fb->rotated_view.color_plane[plane].pitch / tile_height;
> swap(tile_width, tile_height);
>
> /*
> @@ -626,8 +626,8 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
> * First pixel of the framebuffer from
> * the start of the rotated gtt mapping.
> */
> - intel_fb->rotated[plane].x = x;
> - intel_fb->rotated[plane].y = y;
> + intel_fb->rotated_view.color_plane[plane].x = x;
> + intel_fb->rotated_view.color_plane[plane].y = y;
>
> return plane_info->width * plane_info->height;
> }
> @@ -742,8 +742,8 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
> * First pixel of the framebuffer from
> * the start of the normal gtt mapping.
> */
> - intel_fb->normal[i].x = x;
> - intel_fb->normal[i].y = y;
> + intel_fb->normal_view.color_plane[i].x = x;
> + intel_fb->normal_view.color_plane[i].y = y;
>
> offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
>
> @@ -785,7 +785,7 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> to_i915(plane_state->uapi.plane->dev);
> struct drm_framebuffer *fb = plane_state->hw.fb;
> struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> - struct intel_rotation_info *info = &plane_state->view.rotated;
> + struct intel_rotation_info *info = &plane_state->view.gtt.rotated;
> unsigned int rotation = plane_state->hw.rotation;
> int i, num_planes = fb->format->num_planes;
> unsigned int tile_size = intel_tile_size(i915);
> @@ -793,8 +793,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> unsigned int src_w, src_h;
> u32 gtt_offset = 0;
>
> - memset(&plane_state->view, 0, sizeof(plane_state->view));
> - plane_state->view.type = drm_rotation_90_or_270(rotation) ?
> + memset(&plane_state->view.gtt, 0, sizeof(plane_state->view.gtt));
> + plane_state->view.gtt.type = drm_rotation_90_or_270(rotation) ?
> I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
>
> src_x = plane_state->uapi.src.x1 >> 16;
> @@ -835,8 +835,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> * First pixel of the src viewport from the
> * start of the normal gtt mapping.
> */
> - x += intel_fb->normal[i].x;
> - y += intel_fb->normal[i].y;
> + x += intel_fb->normal_view.color_plane[i].x;
> + y += intel_fb->normal_view.color_plane[i].y;
>
> offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
>
> @@ -860,13 +860,13 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> y = r.y1;
>
> pitch_tiles = info->plane[i].height;
> - plane_state->color_plane[i].stride = pitch_tiles * tile_height;
> + plane_state->view.color_plane[i].pitch = pitch_tiles * tile_height;
>
> /* rotate the tile dimensions to match the GTT view */
> swap(tile_width, tile_height);
> } else {
> pitch_tiles = info->plane[i].width;
> - plane_state->color_plane[i].stride = pitch_tiles * tile_width * cpp;
> + plane_state->view.color_plane[i].pitch = pitch_tiles * tile_width * cpp;
> }
>
> /*
> @@ -880,9 +880,9 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
>
> gtt_offset += info->plane[i].width * info->plane[i].height;
>
> - plane_state->color_plane[i].offset = 0;
> - plane_state->color_plane[i].x = x;
> - plane_state->color_plane[i].y = y;
> + plane_state->view.color_plane[i].offset = 0;
> + plane_state->view.color_plane[i].x = x;
> + plane_state->view.color_plane[i].y = y;
> }
> }
>
> @@ -895,7 +895,7 @@ void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
> view->type = I915_GGTT_VIEW_NORMAL;
> if (drm_rotation_90_or_270(rotation)) {
> view->type = I915_GGTT_VIEW_ROTATED;
> - view->rotated = to_intel_framebuffer(fb)->rot_info;
> + view->rotated = to_intel_framebuffer(fb)->rotated_view.gtt.rotated;
> }
> }
>
> @@ -917,7 +917,7 @@ static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
> return 0;
>
> /* FIXME other color planes? */
> - stride = plane_state->color_plane[0].stride;
> + stride = plane_state->view.color_plane[0].pitch;
> max_stride = plane->max_stride(plane, fb->format->format,
> fb->modifier, rotation);
>
> @@ -955,18 +955,18 @@ int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
> return intel_plane_check_stride(plane_state);
> }
>
> - intel_fill_fb_ggtt_view(&plane_state->view, &fb->base, rotation);
> + intel_fill_fb_ggtt_view(&plane_state->view.gtt, &fb->base, rotation);
>
> for (i = 0; i < num_planes; i++) {
> - plane_state->color_plane[i].stride = intel_fb_pitch(&fb->base, i, rotation);
> - plane_state->color_plane[i].offset = 0;
> + plane_state->view.color_plane[i].pitch = intel_fb_pitch(&fb->base, i, rotation);
> + plane_state->view.color_plane[i].offset = 0;
>
> if (drm_rotation_90_or_270(rotation)) {
> - plane_state->color_plane[i].x = fb->rotated[i].x;
> - plane_state->color_plane[i].y = fb->rotated[i].y;
> + plane_state->view.color_plane[i].x = fb->rotated_view.color_plane[i].x;
> + plane_state->view.color_plane[i].y = fb->rotated_view.color_plane[i].y;
> } else {
> - plane_state->color_plane[i].x = fb->normal[i].x;
> - plane_state->color_plane[i].y = fb->normal[i].y;
> + plane_state->view.color_plane[i].x = fb->normal_view.color_plane[i].x;
> + plane_state->view.color_plane[i].y = fb->normal_view.color_plane[i].y;
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
> index bd1551c694eb3..8ffc883a83c34 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb.h
> @@ -14,8 +14,11 @@ struct drm_i915_private;
>
> struct i915_ggtt_view;
>
> +struct intel_fb_view;
> struct intel_plane_state;
>
> +enum i915_ggtt_view_type;
> +
> bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
> bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
> bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 88e02ee3a6312..f95794bda52ed 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -716,8 +716,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
> */
> cache->plane.src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> - cache->plane.adjusted_x = plane_state->color_plane[0].x;
> - cache->plane.adjusted_y = plane_state->color_plane[0].y;
> + cache->plane.adjusted_x = plane_state->view.color_plane[0].x;
> + cache->plane.adjusted_y = plane_state->view.color_plane[0].y;
>
> cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode;
>
> @@ -725,7 +725,7 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
> cache->fb.modifier = fb->modifier;
>
> /* FIXME is this correct? */
> - cache->fb.stride = plane_state->color_plane[0].stride;
> + cache->fb.stride = plane_state->view.color_plane[0].pitch;
> if (drm_rotation_90_or_270(plane_state->hw.rotation))
> cache->fb.stride *= fb->format->cpp[0];
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index af2d617d9eb2b..2ace363f5aac1 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -423,15 +423,15 @@ vlv_update_plane(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum pipe pipe = plane->pipe;
> enum plane_id plane_id = plane->id;
> - u32 sprsurf_offset = plane_state->color_plane[0].offset;
> + u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
> u32 linear_offset;
> const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_y = plane_state->uapi.dst.y1;
> u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
> u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
> - u32 x = plane_state->color_plane[0].x;
> - u32 y = plane_state->color_plane[0].y;
> + u32 x = plane_state->view.color_plane[0].x;
> + u32 y = plane_state->view.color_plane[0].y;
> unsigned long irqflags;
> u32 sprctl;
>
> @@ -446,7 +446,7 @@ vlv_update_plane(struct intel_plane *plane,
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),
> - plane_state->color_plane[0].stride);
> + plane_state->view.color_plane[0].pitch);
> intel_de_write_fw(dev_priv, SPPOS(pipe, plane_id),
> (crtc_y << 16) | crtc_x);
> intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),
> @@ -840,15 +840,15 @@ ivb_update_plane(struct intel_plane *plane,
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum pipe pipe = plane->pipe;
> - u32 sprsurf_offset = plane_state->color_plane[0].offset;
> + u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
> u32 linear_offset;
> const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_y = plane_state->uapi.dst.y1;
> u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
> u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
> - u32 x = plane_state->color_plane[0].x;
> - u32 y = plane_state->color_plane[0].y;
> + u32 x = plane_state->view.color_plane[0].x;
> + u32 y = plane_state->view.color_plane[0].y;
> u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> u32 sprctl, sprscale = 0;
> @@ -870,7 +870,7 @@ ivb_update_plane(struct intel_plane *plane,
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, SPRSTRIDE(pipe),
> - plane_state->color_plane[0].stride);
> + plane_state->view.color_plane[0].pitch);
> intel_de_write_fw(dev_priv, SPRPOS(pipe), (crtc_y << 16) | crtc_x);
> intel_de_write_fw(dev_priv, SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
> if (IS_IVYBRIDGE(dev_priv))
> @@ -1168,15 +1168,15 @@ g4x_update_plane(struct intel_plane *plane,
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum pipe pipe = plane->pipe;
> - u32 dvssurf_offset = plane_state->color_plane[0].offset;
> + u32 dvssurf_offset = plane_state->view.color_plane[0].offset;
> u32 linear_offset;
> const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_y = plane_state->uapi.dst.y1;
> u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
> u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
> - u32 x = plane_state->color_plane[0].x;
> - u32 y = plane_state->color_plane[0].y;
> + u32 x = plane_state->view.color_plane[0].x;
> + u32 y = plane_state->view.color_plane[0].y;
> u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> u32 dvscntr, dvsscale = 0;
> @@ -1198,7 +1198,7 @@ g4x_update_plane(struct intel_plane *plane,
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, DVSSTRIDE(pipe),
> - plane_state->color_plane[0].stride);
> + plane_state->view.color_plane[0].pitch);
> intel_de_write_fw(dev_priv, DVSPOS(pipe), (crtc_y << 16) | crtc_x);
> intel_de_write_fw(dev_priv, DVSSIZE(pipe), (crtc_h << 16) | crtc_w);
> intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale);
> @@ -1298,7 +1298,7 @@ g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,
> int src_x, src_w, src_h, crtc_w, crtc_h;
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> - unsigned int stride = plane_state->color_plane[0].stride;
> + unsigned int stride = plane_state->view.color_plane[0].pitch;
> unsigned int cpp = fb->format->cpp[0];
> unsigned int width_bytes;
> int min_width, min_height;
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 22f7a13020189..00a11fb516e52 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -582,7 +582,7 @@ static u32 skl_plane_stride(const struct intel_plane_state *plane_state,
> {
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> unsigned int rotation = plane_state->hw.rotation;
> - u32 stride = plane_state->color_plane[color_plane].stride;
> + u32 stride = plane_state->view.color_plane[color_plane].pitch;
>
> if (color_plane >= fb->format->num_planes)
> return 0;
> @@ -919,14 +919,14 @@ skl_program_plane(struct intel_plane *plane,
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> - u32 surf_addr = plane_state->color_plane[color_plane].offset;
> + u32 surf_addr = plane_state->view.color_plane[color_plane].offset;
> u32 stride = skl_plane_stride(plane_state, color_plane);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> int aux_plane = skl_main_to_aux_plane(fb, color_plane);
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_y = plane_state->uapi.dst.y1;
> - u32 x = plane_state->color_plane[color_plane].x;
> - u32 y = plane_state->color_plane[color_plane].y;
> + u32 x = plane_state->view.color_plane[color_plane].x;
> + u32 y = plane_state->view.color_plane[color_plane].y;
> u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> u8 alpha = plane_state->hw.alpha >> 8;
> @@ -958,7 +958,7 @@ skl_program_plane(struct intel_plane *plane,
> }
>
> if (aux_plane) {
> - aux_dist = plane_state->color_plane[aux_plane].offset - surf_addr;
> + aux_dist = plane_state->view.color_plane[aux_plane].offset - surf_addr;
>
> if (DISPLAY_VER(dev_priv) < 12)
> aux_dist |= skl_plane_stride(plane_state, aux_plane);
> @@ -1001,7 +1001,8 @@ skl_program_plane(struct intel_plane *plane,
>
> if (DISPLAY_VER(dev_priv) < 11)
> intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
> - (plane_state->color_plane[1].y << 16) | plane_state->color_plane[1].x);
> + (plane_state->view.color_plane[1].y << 16) |
> + plane_state->view.color_plane[1].x);
>
> if (!drm_atomic_crtc_needs_modeset(&crtc_state->uapi))
> intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
> @@ -1031,7 +1032,7 @@ skl_plane_async_flip(struct intel_plane *plane,
> unsigned long irqflags;
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> - u32 surf_addr = plane_state->color_plane[0].offset;
> + u32 surf_addr = plane_state->view.color_plane[0].offset;
> u32 plane_ctl = plane_state->ctl;
>
> plane_ctl |= skl_plane_ctl_crtc(crtc_state);
> @@ -1269,9 +1270,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
> int ccs_plane)
> {
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> - int aux_x = plane_state->color_plane[ccs_plane].x;
> - int aux_y = plane_state->color_plane[ccs_plane].y;
> - u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
> + int aux_x = plane_state->view.color_plane[ccs_plane].x;
> + int aux_y = plane_state->view.color_plane[ccs_plane].y;
> + u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
> u32 alignment = intel_surf_alignment(fb, ccs_plane);
> int hsub;
> int vsub;
> @@ -1301,9 +1302,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
> if (aux_x != main_x || aux_y != main_y)
> return false;
>
> - plane_state->color_plane[ccs_plane].offset = aux_offset;
> - plane_state->color_plane[ccs_plane].x = aux_x;
> - plane_state->color_plane[ccs_plane].y = aux_y;
> + plane_state->view.color_plane[ccs_plane].offset = aux_offset;
> + plane_state->view.color_plane[ccs_plane].x = aux_x;
> + plane_state->view.color_plane[ccs_plane].y = aux_y;
>
> return true;
> }
> @@ -1316,7 +1317,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> const int aux_plane = skl_main_to_aux_plane(fb, 0);
> - const u32 aux_offset = plane_state->color_plane[aux_plane].offset;
> + const u32 aux_offset = plane_state->view.color_plane[aux_plane].offset;
> const u32 alignment = intel_surf_alignment(fb, 0);
> const int w = drm_rect_width(&plane_state->uapi.src) >> 16;
>
> @@ -1344,7 +1345,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
> if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
> int cpp = fb->format->cpp[0];
>
> - while ((*x + w) * cpp > plane_state->color_plane[0].stride) {
> + while ((*x + w) * cpp > plane_state->view.color_plane[0].pitch) {
> if (*offset == 0) {
> drm_dbg_kms(&dev_priv->drm,
> "Unable to find suitable display surface offset due to X-tiling\n");
> @@ -1403,8 +1404,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
> offset, offset - alignment);
> }
>
> - if (x != plane_state->color_plane[aux_plane].x ||
> - y != plane_state->color_plane[aux_plane].y) {
> + if (x != plane_state->view.color_plane[aux_plane].x ||
> + y != plane_state->view.color_plane[aux_plane].y) {
> drm_dbg_kms(&dev_priv->drm,
> "Unable to find suitable display surface offset due to CCS\n");
> return -EINVAL;
> @@ -1413,9 +1414,9 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
>
> drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
>
> - plane_state->color_plane[0].offset = offset;
> - plane_state->color_plane[0].x = x;
> - plane_state->color_plane[0].y = y;
> + plane_state->view.color_plane[0].offset = 0;
> + plane_state->view.color_plane[0].x = x;
> + plane_state->view.color_plane[0].y = y;
>
> /*
> * Put the final coordinates back so that the src
> @@ -1456,7 +1457,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
>
> if (is_ccs_modifier(fb->modifier)) {
> int ccs_plane = main_to_ccs_plane(fb, uv_plane);
> - u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
> + u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
> u32 alignment = intel_surf_alignment(fb, uv_plane);
>
> if (offset > aux_offset)
> @@ -1477,8 +1478,8 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
> offset, offset - alignment);
> }
>
> - if (x != plane_state->color_plane[ccs_plane].x ||
> - y != plane_state->color_plane[ccs_plane].y) {
> + if (x != plane_state->view.color_plane[ccs_plane].x ||
> + y != plane_state->view.color_plane[ccs_plane].y) {
> drm_dbg_kms(&i915->drm,
> "Unable to find suitable display surface offset due to CCS\n");
> return -EINVAL;
> @@ -1487,9 +1488,9 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
>
> drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
>
> - plane_state->color_plane[uv_plane].offset = offset;
> - plane_state->color_plane[uv_plane].x = x;
> - plane_state->color_plane[uv_plane].y = y;
> + plane_state->view.color_plane[uv_plane].offset = 0;
> + plane_state->view.color_plane[uv_plane].x = x;
> + plane_state->view.color_plane[uv_plane].y = y;
>
> return 0;
> }
> @@ -1526,13 +1527,9 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state)
> plane_state,
> ccs_plane);
>
> - plane_state->color_plane[ccs_plane].offset = offset;
> - plane_state->color_plane[ccs_plane].x = (x * hsub +
> - src_x % hsub) /
> - main_hsub;
> - plane_state->color_plane[ccs_plane].y = (y * vsub +
> - src_y % vsub) /
> - main_vsub;
> + plane_state->view.color_plane[ccs_plane].offset = offset;
> + plane_state->view.color_plane[ccs_plane].x = (x * hsub + src_x % hsub) / main_hsub;
> + plane_state->view.color_plane[ccs_plane].y = (y * vsub + src_y % vsub) / main_vsub;
> }
>
> return 0;
> @@ -1567,10 +1564,10 @@ static int skl_check_plane_surface(struct intel_plane_state *plane_state)
> return ret;
> }
>
> - for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->color_plane); i++) {
> - plane_state->color_plane[i].offset = 0;
> - plane_state->color_plane[i].x = 0;
> - plane_state->color_plane[i].y = 0;
> + for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->view.color_plane); i++) {
> + plane_state->view.color_plane[i].offset = 0;
> + plane_state->view.color_plane[i].x = 0;
> + plane_state->view.color_plane[i].y = 0;
> }
>
> ret = skl_check_main_surface(plane_state);
> --
> 2.25.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Intel-gfx] [PATCH v2 17/25] drm/i915: Store the normal view FB pitch in FB's intel_fb_view
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 17/25] drm/i915: Store the normal view FB pitch in FB's intel_fb_view Imre Deak
@ 2021-03-26 16:34 ` Ville Syrjälä
0 siblings, 0 replies; 53+ messages in thread
From: Ville Syrjälä @ 2021-03-26 16:34 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
On Thu, Mar 25, 2021 at 11:48:00PM +0200, Imre Deak wrote:
> Instead of special casing getting the pitch for the normal view, store
> it during FB creation to the FB normal view struct and retrive it from
> there during atomic check, as it's done for the rotated view. A
> follow-up patch does the same for a new FB remapped view.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fb.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index b223e16eb6a22..31fd8480f707e 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -484,12 +484,14 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
> return true;
> }
>
> -int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation)
> +int intel_fb_pitch(const struct drm_framebuffer *drm_fb, int color_plane, unsigned int rotation)
> {
> + struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
> +
> if (drm_rotation_90_or_270(rotation))
> - return to_intel_framebuffer(fb)->rotated_view.color_plane[color_plane].pitch;
> + return fb->rotated_view.color_plane[color_plane].pitch;
> else
> - return fb->pitches[color_plane];
> + return fb->normal_view.color_plane[color_plane].pitch;
> }
>
> static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
> @@ -744,6 +746,7 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
> */
> intel_fb->normal_view.color_plane[i].x = x;
> intel_fb->normal_view.color_plane[i].y = y;
> + intel_fb->normal_view.color_plane[i].pitch = intel_fb->base.pitches[i];
>
> offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
>
> --
> 2.25.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Intel-gfx] [PATCH v2 16/25] drm/i915: Unify the FB and plane state view information into one struct
2021-03-26 16:33 ` Ville Syrjälä
@ 2021-03-26 16:37 ` Imre Deak
0 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-26 16:37 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, Mar 26, 2021 at 06:33:43PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 25, 2021 at 11:47:59PM +0200, Imre Deak wrote:
> > To allow the simplification of FB/plane view computation in the
> > follow-up patches, unify the corresponding state in the
> > intel_framebuffer and intel_plane_state structs into a new intel_fb_view
> > struct.
> >
> > This adds some overhead to intel_framebuffer as the rotated view will
> > have now space for 4 color planes instead of the required 2 and it'll
> > also contain the unused offset for each color_plane info. Imo this is an
> > acceptable trade-off to get a simplified way of the remap computation.
> >
> > Use the new intel_fb_view struct for the FB normal view as well, so (in
> > the follow-up patches) we can remove the special casing for normal view
> > calculation wrt. the calculation of remapped/rotated views. This also
> > adds an overhead to the intel_framebuffer struct, as the gtt remap info
> > and per-color plane offset/pitch is not required for the normal view,
> > but imo this is an acceptable trade-off as above. The per-color plane
> > pitch filed will be used by a follow-up patch, so we can retrieve the
> > pitch for each view in the same way.
> >
> > No functional changes in this patch.
> >
> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/i9xx_plane.c | 20 +++---
> > drivers/gpu/drm/i915/display/intel_cursor.c | 14 ++--
> > drivers/gpu/drm/i915/display/intel_display.c | 22 +++---
> > .../drm/i915/display/intel_display_types.h | 61 ++++++++++------
> > drivers/gpu/drm/i915/display/intel_fb.c | 66 ++++++++---------
> > drivers/gpu/drm/i915/display/intel_fb.h | 3 +
> > drivers/gpu/drm/i915/display/intel_fbc.c | 6 +-
> > drivers/gpu/drm/i915/display/intel_sprite.c | 26 +++----
> > .../drm/i915/display/skl_universal_plane.c | 71 +++++++++----------
> > 9 files changed, 153 insertions(+), 136 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
> > index 40266b78247b2..8ee59490c027a 100644
> > --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> > +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> > @@ -271,7 +271,7 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
> > u32 alignment = intel_surf_alignment(fb, 0);
> > int cpp = fb->format->cpp[0];
> >
> > - while ((src_x + src_w) * cpp > plane_state->color_plane[0].stride) {
> > + while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].pitch) {
> > if (offset == 0) {
> > drm_dbg_kms(&dev_priv->drm,
> > "Unable to find suitable display surface offset due to X-tiling\n");
> > @@ -311,9 +311,9 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
> > drm_WARN_ON(&dev_priv->drm, src_x > 4095 || src_y > 4095);
> > }
> >
> > - plane_state->color_plane[0].offset = offset;
> > - plane_state->color_plane[0].x = src_x;
> > - plane_state->color_plane[0].y = src_y;
> > + plane_state->view.color_plane[0].offset = offset;
> > + plane_state->view.color_plane[0].x = src_x;
> > + plane_state->view.color_plane[0].y = src_y;
> >
> > return 0;
> > }
> > @@ -424,8 +424,8 @@ static void i9xx_update_plane(struct intel_plane *plane,
> > struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> > u32 linear_offset;
> > - int x = plane_state->color_plane[0].x;
> > - int y = plane_state->color_plane[0].y;
> > + int x = plane_state->view.color_plane[0].x;
> > + int y = plane_state->view.color_plane[0].y;
> > int crtc_x = plane_state->uapi.dst.x1;
> > int crtc_y = plane_state->uapi.dst.y1;
> > int crtc_w = drm_rect_width(&plane_state->uapi.dst);
> > @@ -439,14 +439,14 @@ static void i9xx_update_plane(struct intel_plane *plane,
> > linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
> >
> > if (DISPLAY_VER(dev_priv) >= 4)
> > - dspaddr_offset = plane_state->color_plane[0].offset;
> > + dspaddr_offset = plane_state->view.color_plane[0].offset;
> > else
> > dspaddr_offset = linear_offset;
> >
> > spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> >
> > intel_de_write_fw(dev_priv, DSPSTRIDE(i9xx_plane),
> > - plane_state->color_plane[0].stride);
> > + plane_state->view.color_plane[0].pitch);
> >
> > if (DISPLAY_VER(dev_priv) < 4) {
> > /*
> > @@ -531,7 +531,7 @@ g4x_primary_async_flip(struct intel_plane *plane,
> > {
> > struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > u32 dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state);
> > - u32 dspaddr_offset = plane_state->color_plane[0].offset;
> > + u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
> > enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> > unsigned long irqflags;
> >
> > @@ -552,7 +552,7 @@ vlv_primary_async_flip(struct intel_plane *plane,
> > bool async_flip)
> > {
> > struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > - u32 dspaddr_offset = plane_state->color_plane[0].offset;
> > + u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
> > enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> > unsigned long irqflags;
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
> > index 84099b7f5c358..03dad12cf78fc 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> > @@ -45,7 +45,7 @@ static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
> > else
> > base = intel_plane_ggtt_offset(plane_state);
> >
> > - return base + plane_state->color_plane[0].offset;
> > + return base + plane_state->view.color_plane[0].offset;
> > }
> >
> > static u32 intel_cursor_position(const struct intel_plane_state *plane_state)
> > @@ -125,9 +125,9 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
> > offset += (src_h * src_w - 1) * fb->format->cpp[0];
> > }
> >
> > - plane_state->color_plane[0].offset = offset;
> > - plane_state->color_plane[0].x = src_x;
> > - plane_state->color_plane[0].y = src_y;
> > + plane_state->view.color_plane[0].offset = offset;
> > + plane_state->view.color_plane[0].x = src_x;
> > + plane_state->view.color_plane[0].y = src_y;
> >
> > return 0;
> > }
> > @@ -194,7 +194,7 @@ static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state,
> > {
> > return CURSOR_ENABLE |
> > CURSOR_FORMAT_ARGB |
> > - CURSOR_STRIDE(plane_state->color_plane[0].stride);
> > + CURSOR_STRIDE(plane_state->view.color_plane[0].pitch);
> > }
> >
> > static bool i845_cursor_size_ok(const struct intel_plane_state *plane_state)
> > @@ -233,7 +233,7 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
> > }
> >
> > drm_WARN_ON(&i915->drm, plane_state->uapi.visible &&
> > - plane_state->color_plane[0].stride != fb->pitches[0]);
> > + plane_state->view.color_plane[0].pitch != fb->pitches[0]);
> >
> > switch (fb->pitches[0]) {
> > case 256:
> > @@ -450,7 +450,7 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
> > }
> >
> > drm_WARN_ON(&dev_priv->drm, plane_state->uapi.visible &&
> > - plane_state->color_plane[0].stride != fb->pitches[0]);
> > + plane_state->view.color_plane[0].pitch != fb->pitches[0]);
> >
> > if (fb->pitches[0] !=
> > drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 25eaa8a44baa8..4ee7e72142a5f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -1013,7 +1013,7 @@ static bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
> >
> > return DISPLAY_VER(dev_priv) < 4 ||
> > (plane->has_fbc &&
> > - plane_state->view.type == I915_GGTT_VIEW_NORMAL);
> > + plane_state->view.gtt.type == I915_GGTT_VIEW_NORMAL);
> > }
> >
> > struct i915_vma *
> > @@ -1161,7 +1161,7 @@ u32 intel_fb_xy_to_linear(int x, int y,
> > {
> > const struct drm_framebuffer *fb = state->hw.fb;
> > unsigned int cpp = fb->format->cpp[color_plane];
> > - unsigned int pitch = state->color_plane[color_plane].stride;
> > + unsigned int pitch = state->view.color_plane[color_plane].pitch;
> >
> > return y * pitch + x * cpp;
> > }
> > @@ -1176,8 +1176,8 @@ void intel_add_fb_offsets(int *x, int *y,
> > int color_plane)
> >
> > {
> > - *x += state->color_plane[color_plane].x;
> > - *y += state->color_plane[color_plane].y;
> > + *x += state->view.color_plane[color_plane].x;
> > + *y += state->view.color_plane[color_plane].y;
> > }
> >
> > static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)
> > @@ -1680,9 +1680,9 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
> >
> > valid_fb:
> > plane_state->rotation = plane_config->rotation;
> > - intel_fill_fb_ggtt_view(&intel_state->view, fb,
> > + intel_fill_fb_ggtt_view(&intel_state->view.gtt, fb,
> > plane_state->rotation);
> > - intel_state->color_plane[0].stride =
> > + intel_state->view.color_plane[0].pitch =
> > intel_fb_pitch(fb, 0, plane_state->rotation);
> >
> > __i915_vma_pin(vma);
> > @@ -1723,7 +1723,7 @@ intel_plane_fence_y_offset(const struct intel_plane_state *plane_state)
> > int x = 0, y = 0;
> >
> > intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
> > - plane_state->color_plane[0].offset, 0);
> > + plane_state->view.color_plane[0].offset, 0);
> >
> > return y;
> > }
> > @@ -6787,8 +6787,6 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
> > linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE;
> > linked_state->color_ctl = plane_state->color_ctl;
> > linked_state->view = plane_state->view;
> > - memcpy(linked_state->color_plane, plane_state->color_plane,
> > - sizeof(linked_state->color_plane));
> >
> > intel_plane_copy_hw_state(linked_state, plane_state);
> > linked_state->uapi.src = plane_state->uapi.src;
> > @@ -9320,8 +9318,8 @@ static int intel_atomic_check_async(struct intel_atomic_state *state)
> > return -EINVAL;
> > }
> >
> > - if (old_plane_state->color_plane[0].stride !=
> > - new_plane_state->color_plane[0].stride) {
> > + if (old_plane_state->view.color_plane[0].pitch !=
> > + new_plane_state->view.color_plane[0].pitch) {
> > drm_dbg_kms(&i915->drm, "Stride cannot be changed in async flip\n");
> > return -EINVAL;
> > }
> > @@ -10546,7 +10544,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state)
> > INTEL_INFO(dev_priv)->display.cursor_needs_physical;
> >
> > vma = intel_pin_and_fence_fb_obj(fb, phys_cursor,
> > - &plane_state->view,
> > + &plane_state->view.gtt,
> > intel_plane_uses_fence(plane_state),
> > &plane_state->flags);
> > if (IS_ERR(vma))
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 80983cfe9d3b0..b72861f6f68a7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -85,20 +85,49 @@ enum intel_broadcast_rgb {
> > INTEL_BROADCAST_RGB_LIMITED,
> > };
> >
> > +struct intel_fb_view {
> > + /*
> > + * The remap information used in the remapped and rotated views to
> > + * create the DMA scatter-gather list for each FB color plane. This sg
> > + * list is created along with the view type (gtt.type) specific
> > + * i915_vma object and contains the list of FB object pages (reordered
> > + * in the rotated view) that are visible in the view.
> > + * In the normal view the FB object's backing store sg list is used
> > + * directly and hence the remap information here is not used.
> > + */
> > + struct i915_ggtt_view gtt;
> > +
> > + /*
> > + * The GTT view (gtt.type) specific information for each FB color
> > + * plane. In the normal GTT view all formats (up to 4 color planes),
> > + * in the rotated and remapped GTT view all no-CCS formats (up to 2
> > + * color planes) are supported.
> > + *
> > + * TODO: add support for CCS formats in the remapped GTT view.
> > + *
> > + * The view information shared by all FB color planes in the FB,
> > + * like dst x/y and src/dst width, is stored separately in
> > + * intel_plane_state.
> > + */
> > + struct i915_color_plane_view {
> > + u32 offset;
> > + unsigned int x, y;
> > + /*
> > + * Plane pitch (stride) in:
> > + * bytes for 0/180 degree rotation
> > + * pixels for 90/270 degree rotation
> > + */
> > + unsigned int pitch;
>
> I've been trying to do a bit of s/pitch/stride/ in general
> since that's the terminology our hw uses. So I would call this
> 'stride'.
Ah ok. I was wondering what's the difference between the two, I thought
first that pitch is always pixels and stride is bytes, but not sure. And
here it can be both. I'll use then stride.
> But if this is easier then I guess it's fine. We could do
> a followup pass to unify the naming more.
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> > + } color_plane[4];
> > +};
> > +
> > struct intel_framebuffer {
> > struct drm_framebuffer base;
> > struct intel_frontbuffer *frontbuffer;
> > - struct intel_rotation_info rot_info;
> >
> > - /* for each plane in the normal GTT view */
> > - struct {
> > - unsigned int x, y;
> > - } normal[4];
> > - /* for each plane in the rotated GTT view for no-CCS formats */
> > - struct {
> > - unsigned int x, y;
> > - unsigned int pitch; /* pixels */
> > - } rotated[2];
> > + /* Params to remap the FB pages and program the plane registers in each view. */
> > + struct intel_fb_view normal_view;
> > + struct intel_fb_view rotated_view;
> > };
> >
> > struct intel_fbdev {
> > @@ -581,21 +610,11 @@ struct intel_plane_state {
> > enum drm_scaling_filter scaling_filter;
> > } hw;
> >
> > - struct i915_ggtt_view view;
> > struct i915_vma *vma;
> > unsigned long flags;
> > #define PLANE_HAS_FENCE BIT(0)
> >
> > - struct {
> > - u32 offset;
> > - /*
> > - * Plane stride in:
> > - * bytes for 0/180 degree rotation
> > - * pixels for 90/270 degree rotation
> > - */
> > - u32 stride;
> > - int x, y;
> > - } color_plane[4];
> > + struct intel_fb_view view;
> >
> > /* plane control register */
> > u32 ctl;
> > diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> > index 6f8206769c3df..b223e16eb6a22 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > @@ -259,7 +259,7 @@ u32 intel_plane_adjust_aligned_offset(int *x, int *y,
> > {
> > return intel_adjust_aligned_offset(x, y, state->hw.fb, color_plane,
> > state->hw.rotation,
> > - state->color_plane[color_plane].stride,
> > + state->view.color_plane[color_plane].pitch,
> > old_offset, new_offset);
> > }
> >
> > @@ -340,7 +340,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
> > struct drm_i915_private *i915 = to_i915(intel_plane->base.dev);
> > const struct drm_framebuffer *fb = state->hw.fb;
> > unsigned int rotation = state->hw.rotation;
> > - int pitch = state->color_plane[color_plane].stride;
> > + int pitch = state->view.color_plane[color_plane].pitch;
> > u32 alignment;
> >
> > if (intel_plane->id == PLANE_CURSOR)
> > @@ -423,8 +423,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
> > ccs_y = (y * vsub) % tile_height;
> >
> > main_plane = skl_ccs_to_main_plane(fb, ccs_plane);
> > - main_x = intel_fb->normal[main_plane].x % tile_width;
> > - main_y = intel_fb->normal[main_plane].y % tile_height;
> > + main_x = intel_fb->normal_view.color_plane[main_plane].x % tile_width;
> > + main_y = intel_fb->normal_view.color_plane[main_plane].y % tile_height;
> >
> > /*
> > * CCS doesn't have its own x/y offset register, so the intra CCS tile
> > @@ -435,8 +435,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
> > "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
> > main_x, main_y,
> > ccs_x, ccs_y,
> > - intel_fb->normal[main_plane].x,
> > - intel_fb->normal[main_plane].y,
> > + intel_fb->normal_view.color_plane[main_plane].x,
> > + intel_fb->normal_view.color_plane[main_plane].y,
> > x, y);
> > return -EINVAL;
> > }
> > @@ -487,7 +487,7 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
> > int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation)
> > {
> > if (drm_rotation_90_or_270(rotation))
> > - return to_intel_framebuffer(fb)->rotated[color_plane].pitch;
> > + return to_intel_framebuffer(fb)->rotated_view.color_plane[color_plane].pitch;
> > else
> > return fb->pitches[color_plane];
> > }
> > @@ -584,7 +584,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
> > struct drm_framebuffer *fb)
> > {
> > struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> > - struct intel_rotation_info *rot_info = &intel_fb->rot_info;
> > + struct intel_rotation_info *rot_info = &intel_fb->rotated_view.gtt.rotated;
> > unsigned int pitch_tiles;
> > struct drm_rect r;
> >
> > @@ -598,7 +598,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
> >
> > rot_info->plane[plane] = *plane_info;
> >
> > - intel_fb->rotated[plane].pitch = plane_info->height * tile_height;
> > + intel_fb->rotated_view.color_plane[plane].pitch = plane_info->height * tile_height;
> >
> > /* rotate the x/y offsets to match the GTT view */
> > drm_rect_init(&r, x, y, width, height);
> > @@ -610,7 +610,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
> > y = r.y1;
> >
> > /* rotate the tile dimensions to match the GTT view */
> > - pitch_tiles = intel_fb->rotated[plane].pitch / tile_height;
> > + pitch_tiles = intel_fb->rotated_view.color_plane[plane].pitch / tile_height;
> > swap(tile_width, tile_height);
> >
> > /*
> > @@ -626,8 +626,8 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
> > * First pixel of the framebuffer from
> > * the start of the rotated gtt mapping.
> > */
> > - intel_fb->rotated[plane].x = x;
> > - intel_fb->rotated[plane].y = y;
> > + intel_fb->rotated_view.color_plane[plane].x = x;
> > + intel_fb->rotated_view.color_plane[plane].y = y;
> >
> > return plane_info->width * plane_info->height;
> > }
> > @@ -742,8 +742,8 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
> > * First pixel of the framebuffer from
> > * the start of the normal gtt mapping.
> > */
> > - intel_fb->normal[i].x = x;
> > - intel_fb->normal[i].y = y;
> > + intel_fb->normal_view.color_plane[i].x = x;
> > + intel_fb->normal_view.color_plane[i].y = y;
> >
> > offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
> >
> > @@ -785,7 +785,7 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> > to_i915(plane_state->uapi.plane->dev);
> > struct drm_framebuffer *fb = plane_state->hw.fb;
> > struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> > - struct intel_rotation_info *info = &plane_state->view.rotated;
> > + struct intel_rotation_info *info = &plane_state->view.gtt.rotated;
> > unsigned int rotation = plane_state->hw.rotation;
> > int i, num_planes = fb->format->num_planes;
> > unsigned int tile_size = intel_tile_size(i915);
> > @@ -793,8 +793,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> > unsigned int src_w, src_h;
> > u32 gtt_offset = 0;
> >
> > - memset(&plane_state->view, 0, sizeof(plane_state->view));
> > - plane_state->view.type = drm_rotation_90_or_270(rotation) ?
> > + memset(&plane_state->view.gtt, 0, sizeof(plane_state->view.gtt));
> > + plane_state->view.gtt.type = drm_rotation_90_or_270(rotation) ?
> > I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
> >
> > src_x = plane_state->uapi.src.x1 >> 16;
> > @@ -835,8 +835,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> > * First pixel of the src viewport from the
> > * start of the normal gtt mapping.
> > */
> > - x += intel_fb->normal[i].x;
> > - y += intel_fb->normal[i].y;
> > + x += intel_fb->normal_view.color_plane[i].x;
> > + y += intel_fb->normal_view.color_plane[i].y;
> >
> > offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
> >
> > @@ -860,13 +860,13 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> > y = r.y1;
> >
> > pitch_tiles = info->plane[i].height;
> > - plane_state->color_plane[i].stride = pitch_tiles * tile_height;
> > + plane_state->view.color_plane[i].pitch = pitch_tiles * tile_height;
> >
> > /* rotate the tile dimensions to match the GTT view */
> > swap(tile_width, tile_height);
> > } else {
> > pitch_tiles = info->plane[i].width;
> > - plane_state->color_plane[i].stride = pitch_tiles * tile_width * cpp;
> > + plane_state->view.color_plane[i].pitch = pitch_tiles * tile_width * cpp;
> > }
> >
> > /*
> > @@ -880,9 +880,9 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> >
> > gtt_offset += info->plane[i].width * info->plane[i].height;
> >
> > - plane_state->color_plane[i].offset = 0;
> > - plane_state->color_plane[i].x = x;
> > - plane_state->color_plane[i].y = y;
> > + plane_state->view.color_plane[i].offset = 0;
> > + plane_state->view.color_plane[i].x = x;
> > + plane_state->view.color_plane[i].y = y;
> > }
> > }
> >
> > @@ -895,7 +895,7 @@ void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
> > view->type = I915_GGTT_VIEW_NORMAL;
> > if (drm_rotation_90_or_270(rotation)) {
> > view->type = I915_GGTT_VIEW_ROTATED;
> > - view->rotated = to_intel_framebuffer(fb)->rot_info;
> > + view->rotated = to_intel_framebuffer(fb)->rotated_view.gtt.rotated;
> > }
> > }
> >
> > @@ -917,7 +917,7 @@ static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
> > return 0;
> >
> > /* FIXME other color planes? */
> > - stride = plane_state->color_plane[0].stride;
> > + stride = plane_state->view.color_plane[0].pitch;
> > max_stride = plane->max_stride(plane, fb->format->format,
> > fb->modifier, rotation);
> >
> > @@ -955,18 +955,18 @@ int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
> > return intel_plane_check_stride(plane_state);
> > }
> >
> > - intel_fill_fb_ggtt_view(&plane_state->view, &fb->base, rotation);
> > + intel_fill_fb_ggtt_view(&plane_state->view.gtt, &fb->base, rotation);
> >
> > for (i = 0; i < num_planes; i++) {
> > - plane_state->color_plane[i].stride = intel_fb_pitch(&fb->base, i, rotation);
> > - plane_state->color_plane[i].offset = 0;
> > + plane_state->view.color_plane[i].pitch = intel_fb_pitch(&fb->base, i, rotation);
> > + plane_state->view.color_plane[i].offset = 0;
> >
> > if (drm_rotation_90_or_270(rotation)) {
> > - plane_state->color_plane[i].x = fb->rotated[i].x;
> > - plane_state->color_plane[i].y = fb->rotated[i].y;
> > + plane_state->view.color_plane[i].x = fb->rotated_view.color_plane[i].x;
> > + plane_state->view.color_plane[i].y = fb->rotated_view.color_plane[i].y;
> > } else {
> > - plane_state->color_plane[i].x = fb->normal[i].x;
> > - plane_state->color_plane[i].y = fb->normal[i].y;
> > + plane_state->view.color_plane[i].x = fb->normal_view.color_plane[i].x;
> > + plane_state->view.color_plane[i].y = fb->normal_view.color_plane[i].y;
> > }
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
> > index bd1551c694eb3..8ffc883a83c34 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb.h
> > +++ b/drivers/gpu/drm/i915/display/intel_fb.h
> > @@ -14,8 +14,11 @@ struct drm_i915_private;
> >
> > struct i915_ggtt_view;
> >
> > +struct intel_fb_view;
> > struct intel_plane_state;
> >
> > +enum i915_ggtt_view_type;
> > +
> > bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
> > bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
> > bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 88e02ee3a6312..f95794bda52ed 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -716,8 +716,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
> > */
> > cache->plane.src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> > cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> > - cache->plane.adjusted_x = plane_state->color_plane[0].x;
> > - cache->plane.adjusted_y = plane_state->color_plane[0].y;
> > + cache->plane.adjusted_x = plane_state->view.color_plane[0].x;
> > + cache->plane.adjusted_y = plane_state->view.color_plane[0].y;
> >
> > cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode;
> >
> > @@ -725,7 +725,7 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
> > cache->fb.modifier = fb->modifier;
> >
> > /* FIXME is this correct? */
> > - cache->fb.stride = plane_state->color_plane[0].stride;
> > + cache->fb.stride = plane_state->view.color_plane[0].pitch;
> > if (drm_rotation_90_or_270(plane_state->hw.rotation))
> > cache->fb.stride *= fb->format->cpp[0];
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> > index af2d617d9eb2b..2ace363f5aac1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> > @@ -423,15 +423,15 @@ vlv_update_plane(struct intel_plane *plane,
> > struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > enum pipe pipe = plane->pipe;
> > enum plane_id plane_id = plane->id;
> > - u32 sprsurf_offset = plane_state->color_plane[0].offset;
> > + u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
> > u32 linear_offset;
> > const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> > int crtc_x = plane_state->uapi.dst.x1;
> > int crtc_y = plane_state->uapi.dst.y1;
> > u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
> > u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
> > - u32 x = plane_state->color_plane[0].x;
> > - u32 y = plane_state->color_plane[0].y;
> > + u32 x = plane_state->view.color_plane[0].x;
> > + u32 y = plane_state->view.color_plane[0].y;
> > unsigned long irqflags;
> > u32 sprctl;
> >
> > @@ -446,7 +446,7 @@ vlv_update_plane(struct intel_plane *plane,
> > spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> >
> > intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),
> > - plane_state->color_plane[0].stride);
> > + plane_state->view.color_plane[0].pitch);
> > intel_de_write_fw(dev_priv, SPPOS(pipe, plane_id),
> > (crtc_y << 16) | crtc_x);
> > intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),
> > @@ -840,15 +840,15 @@ ivb_update_plane(struct intel_plane *plane,
> > {
> > struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > enum pipe pipe = plane->pipe;
> > - u32 sprsurf_offset = plane_state->color_plane[0].offset;
> > + u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
> > u32 linear_offset;
> > const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> > int crtc_x = plane_state->uapi.dst.x1;
> > int crtc_y = plane_state->uapi.dst.y1;
> > u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
> > u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
> > - u32 x = plane_state->color_plane[0].x;
> > - u32 y = plane_state->color_plane[0].y;
> > + u32 x = plane_state->view.color_plane[0].x;
> > + u32 y = plane_state->view.color_plane[0].y;
> > u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> > u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> > u32 sprctl, sprscale = 0;
> > @@ -870,7 +870,7 @@ ivb_update_plane(struct intel_plane *plane,
> > spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> >
> > intel_de_write_fw(dev_priv, SPRSTRIDE(pipe),
> > - plane_state->color_plane[0].stride);
> > + plane_state->view.color_plane[0].pitch);
> > intel_de_write_fw(dev_priv, SPRPOS(pipe), (crtc_y << 16) | crtc_x);
> > intel_de_write_fw(dev_priv, SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
> > if (IS_IVYBRIDGE(dev_priv))
> > @@ -1168,15 +1168,15 @@ g4x_update_plane(struct intel_plane *plane,
> > {
> > struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > enum pipe pipe = plane->pipe;
> > - u32 dvssurf_offset = plane_state->color_plane[0].offset;
> > + u32 dvssurf_offset = plane_state->view.color_plane[0].offset;
> > u32 linear_offset;
> > const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> > int crtc_x = plane_state->uapi.dst.x1;
> > int crtc_y = plane_state->uapi.dst.y1;
> > u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
> > u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
> > - u32 x = plane_state->color_plane[0].x;
> > - u32 y = plane_state->color_plane[0].y;
> > + u32 x = plane_state->view.color_plane[0].x;
> > + u32 y = plane_state->view.color_plane[0].y;
> > u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> > u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> > u32 dvscntr, dvsscale = 0;
> > @@ -1198,7 +1198,7 @@ g4x_update_plane(struct intel_plane *plane,
> > spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> >
> > intel_de_write_fw(dev_priv, DVSSTRIDE(pipe),
> > - plane_state->color_plane[0].stride);
> > + plane_state->view.color_plane[0].pitch);
> > intel_de_write_fw(dev_priv, DVSPOS(pipe), (crtc_y << 16) | crtc_x);
> > intel_de_write_fw(dev_priv, DVSSIZE(pipe), (crtc_h << 16) | crtc_w);
> > intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale);
> > @@ -1298,7 +1298,7 @@ g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,
> > int src_x, src_w, src_h, crtc_w, crtc_h;
> > const struct drm_display_mode *adjusted_mode =
> > &crtc_state->hw.adjusted_mode;
> > - unsigned int stride = plane_state->color_plane[0].stride;
> > + unsigned int stride = plane_state->view.color_plane[0].pitch;
> > unsigned int cpp = fb->format->cpp[0];
> > unsigned int width_bytes;
> > int min_width, min_height;
> > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > index 22f7a13020189..00a11fb516e52 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > @@ -582,7 +582,7 @@ static u32 skl_plane_stride(const struct intel_plane_state *plane_state,
> > {
> > const struct drm_framebuffer *fb = plane_state->hw.fb;
> > unsigned int rotation = plane_state->hw.rotation;
> > - u32 stride = plane_state->color_plane[color_plane].stride;
> > + u32 stride = plane_state->view.color_plane[color_plane].pitch;
> >
> > if (color_plane >= fb->format->num_planes)
> > return 0;
> > @@ -919,14 +919,14 @@ skl_program_plane(struct intel_plane *plane,
> > enum plane_id plane_id = plane->id;
> > enum pipe pipe = plane->pipe;
> > const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> > - u32 surf_addr = plane_state->color_plane[color_plane].offset;
> > + u32 surf_addr = plane_state->view.color_plane[color_plane].offset;
> > u32 stride = skl_plane_stride(plane_state, color_plane);
> > const struct drm_framebuffer *fb = plane_state->hw.fb;
> > int aux_plane = skl_main_to_aux_plane(fb, color_plane);
> > int crtc_x = plane_state->uapi.dst.x1;
> > int crtc_y = plane_state->uapi.dst.y1;
> > - u32 x = plane_state->color_plane[color_plane].x;
> > - u32 y = plane_state->color_plane[color_plane].y;
> > + u32 x = plane_state->view.color_plane[color_plane].x;
> > + u32 y = plane_state->view.color_plane[color_plane].y;
> > u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> > u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> > u8 alpha = plane_state->hw.alpha >> 8;
> > @@ -958,7 +958,7 @@ skl_program_plane(struct intel_plane *plane,
> > }
> >
> > if (aux_plane) {
> > - aux_dist = plane_state->color_plane[aux_plane].offset - surf_addr;
> > + aux_dist = plane_state->view.color_plane[aux_plane].offset - surf_addr;
> >
> > if (DISPLAY_VER(dev_priv) < 12)
> > aux_dist |= skl_plane_stride(plane_state, aux_plane);
> > @@ -1001,7 +1001,8 @@ skl_program_plane(struct intel_plane *plane,
> >
> > if (DISPLAY_VER(dev_priv) < 11)
> > intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
> > - (plane_state->color_plane[1].y << 16) | plane_state->color_plane[1].x);
> > + (plane_state->view.color_plane[1].y << 16) |
> > + plane_state->view.color_plane[1].x);
> >
> > if (!drm_atomic_crtc_needs_modeset(&crtc_state->uapi))
> > intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
> > @@ -1031,7 +1032,7 @@ skl_plane_async_flip(struct intel_plane *plane,
> > unsigned long irqflags;
> > enum plane_id plane_id = plane->id;
> > enum pipe pipe = plane->pipe;
> > - u32 surf_addr = plane_state->color_plane[0].offset;
> > + u32 surf_addr = plane_state->view.color_plane[0].offset;
> > u32 plane_ctl = plane_state->ctl;
> >
> > plane_ctl |= skl_plane_ctl_crtc(crtc_state);
> > @@ -1269,9 +1270,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
> > int ccs_plane)
> > {
> > const struct drm_framebuffer *fb = plane_state->hw.fb;
> > - int aux_x = plane_state->color_plane[ccs_plane].x;
> > - int aux_y = plane_state->color_plane[ccs_plane].y;
> > - u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
> > + int aux_x = plane_state->view.color_plane[ccs_plane].x;
> > + int aux_y = plane_state->view.color_plane[ccs_plane].y;
> > + u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
> > u32 alignment = intel_surf_alignment(fb, ccs_plane);
> > int hsub;
> > int vsub;
> > @@ -1301,9 +1302,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
> > if (aux_x != main_x || aux_y != main_y)
> > return false;
> >
> > - plane_state->color_plane[ccs_plane].offset = aux_offset;
> > - plane_state->color_plane[ccs_plane].x = aux_x;
> > - plane_state->color_plane[ccs_plane].y = aux_y;
> > + plane_state->view.color_plane[ccs_plane].offset = aux_offset;
> > + plane_state->view.color_plane[ccs_plane].x = aux_x;
> > + plane_state->view.color_plane[ccs_plane].y = aux_y;
> >
> > return true;
> > }
> > @@ -1316,7 +1317,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
> > struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > const struct drm_framebuffer *fb = plane_state->hw.fb;
> > const int aux_plane = skl_main_to_aux_plane(fb, 0);
> > - const u32 aux_offset = plane_state->color_plane[aux_plane].offset;
> > + const u32 aux_offset = plane_state->view.color_plane[aux_plane].offset;
> > const u32 alignment = intel_surf_alignment(fb, 0);
> > const int w = drm_rect_width(&plane_state->uapi.src) >> 16;
> >
> > @@ -1344,7 +1345,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
> > if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
> > int cpp = fb->format->cpp[0];
> >
> > - while ((*x + w) * cpp > plane_state->color_plane[0].stride) {
> > + while ((*x + w) * cpp > plane_state->view.color_plane[0].pitch) {
> > if (*offset == 0) {
> > drm_dbg_kms(&dev_priv->drm,
> > "Unable to find suitable display surface offset due to X-tiling\n");
> > @@ -1403,8 +1404,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
> > offset, offset - alignment);
> > }
> >
> > - if (x != plane_state->color_plane[aux_plane].x ||
> > - y != plane_state->color_plane[aux_plane].y) {
> > + if (x != plane_state->view.color_plane[aux_plane].x ||
> > + y != plane_state->view.color_plane[aux_plane].y) {
> > drm_dbg_kms(&dev_priv->drm,
> > "Unable to find suitable display surface offset due to CCS\n");
> > return -EINVAL;
> > @@ -1413,9 +1414,9 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
> >
> > drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
> >
> > - plane_state->color_plane[0].offset = offset;
> > - plane_state->color_plane[0].x = x;
> > - plane_state->color_plane[0].y = y;
> > + plane_state->view.color_plane[0].offset = 0;
> > + plane_state->view.color_plane[0].x = x;
> > + plane_state->view.color_plane[0].y = y;
> >
> > /*
> > * Put the final coordinates back so that the src
> > @@ -1456,7 +1457,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
> >
> > if (is_ccs_modifier(fb->modifier)) {
> > int ccs_plane = main_to_ccs_plane(fb, uv_plane);
> > - u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
> > + u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
> > u32 alignment = intel_surf_alignment(fb, uv_plane);
> >
> > if (offset > aux_offset)
> > @@ -1477,8 +1478,8 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
> > offset, offset - alignment);
> > }
> >
> > - if (x != plane_state->color_plane[ccs_plane].x ||
> > - y != plane_state->color_plane[ccs_plane].y) {
> > + if (x != plane_state->view.color_plane[ccs_plane].x ||
> > + y != plane_state->view.color_plane[ccs_plane].y) {
> > drm_dbg_kms(&i915->drm,
> > "Unable to find suitable display surface offset due to CCS\n");
> > return -EINVAL;
> > @@ -1487,9 +1488,9 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
> >
> > drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
> >
> > - plane_state->color_plane[uv_plane].offset = offset;
> > - plane_state->color_plane[uv_plane].x = x;
> > - plane_state->color_plane[uv_plane].y = y;
> > + plane_state->view.color_plane[uv_plane].offset = 0;
> > + plane_state->view.color_plane[uv_plane].x = x;
> > + plane_state->view.color_plane[uv_plane].y = y;
> >
> > return 0;
> > }
> > @@ -1526,13 +1527,9 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state)
> > plane_state,
> > ccs_plane);
> >
> > - plane_state->color_plane[ccs_plane].offset = offset;
> > - plane_state->color_plane[ccs_plane].x = (x * hsub +
> > - src_x % hsub) /
> > - main_hsub;
> > - plane_state->color_plane[ccs_plane].y = (y * vsub +
> > - src_y % vsub) /
> > - main_vsub;
> > + plane_state->view.color_plane[ccs_plane].offset = offset;
> > + plane_state->view.color_plane[ccs_plane].x = (x * hsub + src_x % hsub) / main_hsub;
> > + plane_state->view.color_plane[ccs_plane].y = (y * vsub + src_y % vsub) / main_vsub;
> > }
> >
> > return 0;
> > @@ -1567,10 +1564,10 @@ static int skl_check_plane_surface(struct intel_plane_state *plane_state)
> > return ret;
> > }
> >
> > - for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->color_plane); i++) {
> > - plane_state->color_plane[i].offset = 0;
> > - plane_state->color_plane[i].x = 0;
> > - plane_state->color_plane[i].y = 0;
> > + for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->view.color_plane); i++) {
> > + plane_state->view.color_plane[i].offset = 0;
> > + plane_state->view.color_plane[i].x = 0;
> > + plane_state->view.color_plane[i].y = 0;
> > }
> >
> > ret = skl_check_main_surface(plane_state);
> > --
> > 2.25.1
>
> --
> Ville Syrjälä
> Intel
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^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Intel-gfx] [PATCH v2 18/25] drm/i915: Simplify copying the FB view state to the plane state
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 18/25] drm/i915: Simplify copying the FB view state to the plane state Imre Deak
@ 2021-03-26 16:42 ` Ville Syrjälä
0 siblings, 0 replies; 53+ messages in thread
From: Ville Syrjälä @ 2021-03-26 16:42 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
On Thu, Mar 25, 2021 at 11:48:01PM +0200, Imre Deak wrote:
> Instead of copying separately the GTT remapped and color plane view info
> from the FB to the plane state, do this by copying the whole
> intel_fb_view struct. For this we make sure the FB view state is fully
> inited (that is also including the view type) already during FB
> creation, so this init is not required during atomic check time. This
> also means the we don't need to reset the unused color plane info during
> atomic check, as these are already reset during FB creation.
>
> I noticed that initial FBs will only work atm if they are page aligned
> (which BIOS most probably always ensures), but add a comment to sanitize
> this part once. Also we won't disable the plane if
> get_initial_plane_config() failed for some reason (for instance due to
> unsupported rotation), add a TODO: comment for this too.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 11 ++--
> drivers/gpu/drm/i915/display/intel_fb.c | 59 ++++++++-----------
> drivers/gpu/drm/i915/display/intel_fb.h | 7 +--
> .../drm/i915/display/skl_universal_plane.c | 8 +--
> 4 files changed, 34 insertions(+), 51 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 4ee7e72142a5f..48b8e2083e14a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1629,6 +1629,11 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
> struct drm_framebuffer *fb;
> struct i915_vma *vma;
>
> + /*
> + * TODO:
> + * Disable planes if get_initial_plane_config() failed.
> + * Make sure things work if the surface base is not page aligned.
> + */
> if (!plane_config->fb)
> return;
>
> @@ -1680,10 +1685,8 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
>
> valid_fb:
> plane_state->rotation = plane_config->rotation;
> - intel_fill_fb_ggtt_view(&intel_state->view.gtt, fb,
> - plane_state->rotation);
> - intel_state->view.color_plane[0].pitch =
> - intel_fb_pitch(fb, 0, plane_state->rotation);
> + intel_fb_fill_view(to_intel_framebuffer(fb), plane_state->rotation,
> + &intel_state->view);
>
> __i915_vma_pin(vma);
> intel_state->vma = i915_vma_get(vma);
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index 31fd8480f707e..16dcfb538b448 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -484,10 +484,8 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
> return true;
> }
>
> -int intel_fb_pitch(const struct drm_framebuffer *drm_fb, int color_plane, unsigned int rotation)
> +static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
> {
> - struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
> -
> if (drm_rotation_90_or_270(rotation))
> return fb->rotated_view.color_plane[color_plane].pitch;
> else
> @@ -497,7 +495,7 @@ int intel_fb_pitch(const struct drm_framebuffer *drm_fb, int color_plane, unsign
> static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
> {
> struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> - const struct drm_framebuffer *fb = plane_state->hw.fb;
> + const struct intel_framebuffer *fb = to_intel_framebuffer(plane_state->hw.fb);
> unsigned int rotation = plane_state->hw.rotation;
> u32 stride, max_stride;
>
> @@ -516,8 +514,8 @@ static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
> * unclear in Bspec, for now no checking.
> */
> stride = intel_fb_pitch(fb, 0, rotation);
> - max_stride = plane->max_stride(plane, fb->format->format,
> - fb->modifier, rotation);
> + max_stride = plane->max_stride(plane, fb->base.format->format,
> + fb->base.modifier, rotation);
>
> return stride > max_stride;
> }
> @@ -702,6 +700,12 @@ calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
> return tiles;
> }
>
> +static void intel_fb_view_init(struct intel_fb_view *view, enum i915_ggtt_view_type view_type)
> +{
> + memset(view, 0, sizeof(*view));
> + view->gtt.type = view_type;
> +}
> +
> int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb)
> {
> struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> @@ -711,6 +715,9 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
> int i, num_planes = fb->format->num_planes;
> unsigned int tile_size = intel_tile_size(i915);
>
> + intel_fb_view_init(&intel_fb->normal_view, I915_GGTT_VIEW_NORMAL);
> + intel_fb_view_init(&intel_fb->rotated_view, I915_GGTT_VIEW_ROTATED);
> +
> for (i = 0; i < num_planes; i++) {
> struct fb_plane_view_dims view_dims;
> unsigned int width, height;
> @@ -796,9 +803,9 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> unsigned int src_w, src_h;
> u32 gtt_offset = 0;
>
> - memset(&plane_state->view.gtt, 0, sizeof(plane_state->view.gtt));
> - plane_state->view.gtt.type = drm_rotation_90_or_270(rotation) ?
> - I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
> + intel_fb_view_init(&plane_state->view,
> + drm_rotation_90_or_270(rotation) ? I915_GGTT_VIEW_ROTATED :
> + I915_GGTT_VIEW_REMAPPED);
>
> src_x = plane_state->uapi.src.x1 >> 16;
> src_y = plane_state->uapi.src.y1 >> 16;
> @@ -889,17 +896,13 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
> }
> }
>
> -void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
> - const struct drm_framebuffer *fb,
> - unsigned int rotation)
> +void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotation,
> + struct intel_fb_view *view)
> {
> - memset(view, 0, sizeof(*view));
> -
> - view->type = I915_GGTT_VIEW_NORMAL;
> - if (drm_rotation_90_or_270(rotation)) {
> - view->type = I915_GGTT_VIEW_ROTATED;
> - view->rotated = to_intel_framebuffer(fb)->rotated_view.gtt.rotated;
> - }
> + if (drm_rotation_90_or_270(rotation))
> + *view = fb->rotated_view;
> + else
> + *view = fb->normal_view;
> }
>
> static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
> @@ -939,13 +942,10 @@ int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
> const struct intel_framebuffer *fb =
> to_intel_framebuffer(plane_state->hw.fb);
> unsigned int rotation = plane_state->hw.rotation;
> - int i, num_planes;
>
> if (!fb)
> return 0;
>
> - num_planes = fb->base.format->num_planes;
> -
> if (intel_plane_needs_remap(plane_state)) {
> intel_plane_remap_gtt(plane_state);
>
> @@ -958,20 +958,7 @@ int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
> return intel_plane_check_stride(plane_state);
> }
>
> - intel_fill_fb_ggtt_view(&plane_state->view.gtt, &fb->base, rotation);
> -
> - for (i = 0; i < num_planes; i++) {
> - plane_state->view.color_plane[i].pitch = intel_fb_pitch(&fb->base, i, rotation);
> - plane_state->view.color_plane[i].offset = 0;
> -
> - if (drm_rotation_90_or_270(rotation)) {
> - plane_state->view.color_plane[i].x = fb->rotated_view.color_plane[i].x;
> - plane_state->view.color_plane[i].y = fb->rotated_view.color_plane[i].y;
> - } else {
> - plane_state->view.color_plane[i].x = fb->normal_view.color_plane[i].x;
> - plane_state->view.color_plane[i].y = fb->normal_view.color_plane[i].y;
> - }
> - }
> + intel_fb_fill_view(fb, rotation, &plane_state->view);
>
> /* Rotate src coordinates to match rotated GTT view */
> if (drm_rotation_90_or_270(rotation))
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
> index 8ffc883a83c34..0ea9da360450d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb.h
> @@ -15,6 +15,7 @@ struct drm_i915_private;
> struct i915_ggtt_view;
>
> struct intel_fb_view;
> +struct intel_framebuffer;
> struct intel_plane_state;
>
> enum i915_ggtt_view_type;
> @@ -49,11 +50,9 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
> const struct intel_plane_state *state,
> int color_plane);
>
> -int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation);
> -
> int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb);
> -void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view, const struct drm_framebuffer *fb,
> - unsigned int rotation);
> +void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotation,
> + struct intel_fb_view *view);
> int intel_plane_compute_gtt(struct intel_plane_state *plane_state);
>
> #endif /* __INTEL_FB_H__ */
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 00a11fb516e52..00a53512ef6cd 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1538,7 +1538,7 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state)
> static int skl_check_plane_surface(struct intel_plane_state *plane_state)
> {
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> - int ret, i;
> + int ret;
>
> ret = intel_plane_compute_gtt(plane_state);
> if (ret)
> @@ -1564,12 +1564,6 @@ static int skl_check_plane_surface(struct intel_plane_state *plane_state)
> return ret;
> }
>
> - for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->view.color_plane); i++) {
> - plane_state->view.color_plane[i].offset = 0;
> - plane_state->view.color_plane[i].x = 0;
> - plane_state->view.color_plane[i].y = 0;
> - }
> -
> ret = skl_check_main_surface(plane_state);
> if (ret)
> return ret;
> --
> 2.25.1
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add support for FBs requiring a POT stride padding (rev2)
2021-03-26 7:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-03-26 22:27 ` Imre Deak
0 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-26 22:27 UTC (permalink / raw)
To: intel-gfx, Chris Wilson
+Chris for the gem_userptr_blits error:
On Fri, Mar 26, 2021 at 07:41:06AM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Add support for FBs requiring a POT stride padding (rev2)
> URL : https://patchwork.freedesktop.org/series/87859/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_9898_full -> Patchwork_19860_full
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_19860_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_19860_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_19860_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@gem_userptr_blits@set-cache-level:
> - shard-skl: NOTRUN -> [FAIL][1]
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@gem_userptr_blits@set-cache-level.html
The above tries to set I915_CACHE_NONE, which is incorrect according the
kernel, so should the test be fixed?
> * igt@kms_fbcon_fbt@fbc-suspend:
> - shard-snb: NOTRUN -> [FAIL][2] +14 similar issues
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb7/igt@kms_fbcon_fbt@fbc-suspend.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
> - shard-snb: [PASS][3] -> [FAIL][4] +29 similar issues
> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-snb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt:
> - shard-glk: NOTRUN -> [FAIL][5] +1 similar issue
> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
> - shard-apl: NOTRUN -> [FAIL][6] +1 similar issue
> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
> - shard-kbl: [PASS][7] -> [FAIL][8]
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt:
> - shard-apl: [PASS][9] -> [FAIL][10]
> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-apl6/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
> - shard-glk: [PASS][11] -> [FAIL][12]
> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk7/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk2/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt:
> - shard-iclb: [PASS][13] -> [FAIL][14] +4 similar issues
> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb2/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb2/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
> - shard-skl: [PASS][15] -> [FAIL][16]
> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl8/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl7/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
>
> * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes:
> - shard-tglb: [PASS][17] -> [FAIL][18] +8 similar issues
> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html
> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb7/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html
>
>
> #### Warnings ####
>
> * igt@kms_fbcon_fbt@fbc:
> - shard-snb: [SKIP][19] ([fdo#109271]) -> [FAIL][20]
> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-snb7/igt@kms_fbcon_fbt@fbc.html
> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb2/igt@kms_fbcon_fbt@fbc.html
All the above fail b/c the kernel won't install a fence for
!I915_GGTT_VIEW_NORMAL vmas and this patchset forces the remapping on
whenever possible. This will need some solution on ADL_P in any case,
since there all (or most) tiled surfaces will need to be remapped. But
for now we can ignore these, as a pre-existing issue for remapped
surfaces.
> * igt@runner@aborted:
> - shard-skl: ([FAIL][21], [FAIL][22], [FAIL][23], [FAIL][24], [FAIL][25]) ([i915#2029] / [i915#2263] / [i915#3002]) -> ([FAIL][26], [FAIL][27], [FAIL][28], [FAIL][29], [FAIL][30], [FAIL][31]) ([i915#1814] / [i915#2029] / [i915#3002])
> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl9/igt@runner@aborted.html
> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl3/igt@runner@aborted.html
> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl4/igt@runner@aborted.html
> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl2/igt@runner@aborted.html
> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl3/igt@runner@aborted.html
> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl2/igt@runner@aborted.html
> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@runner@aborted.html
> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl8/igt@runner@aborted.html
> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@runner@aborted.html
> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@runner@aborted.html
> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@runner@aborted.html
All the above should be fixed by:
https://patchwork.freedesktop.org/patch/426295/?series=88503&rev=1
> Known issues
> ------------
>
> Here are the changes found in Patchwork_19860_full that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@gem_ctx_persistence@engines-mixed:
> - shard-snb: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#1099]) +2 similar issues
> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb2/igt@gem_ctx_persistence@engines-mixed.html
>
> * igt@gem_ctx_persistence@many-contexts:
> - shard-tglb: [PASS][33] -> [FAIL][34] ([i915#2410])
> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb8/igt@gem_ctx_persistence@many-contexts.html
> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb1/igt@gem_ctx_persistence@many-contexts.html
>
> * igt@gem_eio@unwedge-stress:
> - shard-tglb: [PASS][35] -> [TIMEOUT][36] ([i915#2369] / [i915#3063])
> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb2/igt@gem_eio@unwedge-stress.html
> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb3/igt@gem_eio@unwedge-stress.html
>
> * igt@gem_exec_fair@basic-deadline:
> - shard-kbl: [PASS][37] -> [FAIL][38] ([i915#2846])
> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl6/igt@gem_exec_fair@basic-deadline.html
> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl2/igt@gem_exec_fair@basic-deadline.html
> - shard-apl: NOTRUN -> [FAIL][39] ([i915#2846])
> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl7/igt@gem_exec_fair@basic-deadline.html
>
> * igt@gem_exec_parallel@contexts@vecs0:
> - shard-skl: [PASS][40] -> [INCOMPLETE][41] ([i915#2369] / [i915#2624])
> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl8/igt@gem_exec_parallel@contexts@vecs0.html
> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl3/igt@gem_exec_parallel@contexts@vecs0.html
>
> * igt@gem_mmap_gtt@cpuset-big-copy:
> - shard-iclb: [PASS][42] -> [FAIL][43] ([i915#307])
> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb1/igt@gem_mmap_gtt@cpuset-big-copy.html
> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb1/igt@gem_mmap_gtt@cpuset-big-copy.html
>
> * igt@gem_mmap_gtt@cpuset-big-copy-odd:
> - shard-iclb: [PASS][44] -> [FAIL][45] ([i915#2428])
> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb3/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
>
> * igt@gem_pwrite@basic-exhaustion:
> - shard-snb: NOTRUN -> [WARN][46] ([i915#2658])
> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb7/igt@gem_pwrite@basic-exhaustion.html
> - shard-apl: NOTRUN -> [WARN][47] ([i915#2658])
> [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@gem_pwrite@basic-exhaustion.html
>
> * igt@gem_userptr_blits@input-checking:
> - shard-kbl: NOTRUN -> [DMESG-WARN][48] ([i915#3002])
> [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl4/igt@gem_userptr_blits@input-checking.html
>
> * igt@i915_selftest@live@hangcheck:
> - shard-snb: NOTRUN -> [INCOMPLETE][49] ([i915#2782])
> [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb5/igt@i915_selftest@live@hangcheck.html
>
> * igt@kms_async_flips@test-time-stamp:
> - shard-tglb: [PASS][50] -> [FAIL][51] ([i915#2574])
> [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb3/igt@kms_async_flips@test-time-stamp.html
> [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb7/igt@kms_async_flips@test-time-stamp.html
>
> * igt@kms_big_fb@linear-16bpp-rotate-90:
> - shard-glk: NOTRUN -> [SKIP][52] ([fdo#109271]) +30 similar issues
> [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_big_fb@linear-16bpp-rotate-90.html
>
> * igt@kms_ccs@pipe-a-ccs-on-another-bo:
> - shard-snb: NOTRUN -> [SKIP][53] ([fdo#109271]) +322 similar issues
> [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb5/igt@kms_ccs@pipe-a-ccs-on-another-bo.html
>
> * igt@kms_ccs@pipe-c-crc-sprite-planes-basic:
> - shard-skl: NOTRUN -> [SKIP][54] ([fdo#109271] / [fdo#111304])
> [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html
>
> * igt@kms_chamelium@dp-crc-multiple:
> - shard-apl: NOTRUN -> [SKIP][55] ([fdo#109271] / [fdo#111827]) +19 similar issues
> [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_chamelium@dp-crc-multiple.html
> - shard-skl: NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) +7 similar issues
> [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_chamelium@dp-crc-multiple.html
>
> * igt@kms_chamelium@hdmi-hpd-enable-disable-mode:
> - shard-snb: NOTRUN -> [SKIP][57] ([fdo#109271] / [fdo#111827]) +19 similar issues
> [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb2/igt@kms_chamelium@hdmi-hpd-enable-disable-mode.html
>
> * igt@kms_chamelium@hdmi-hpd-storm:
> - shard-kbl: NOTRUN -> [SKIP][58] ([fdo#109271] / [fdo#111827]) +6 similar issues
> [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_chamelium@hdmi-hpd-storm.html
>
> * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
> - shard-glk: NOTRUN -> [SKIP][59] ([fdo#109271] / [fdo#111827]) +3 similar issues
> [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html
>
> * igt@kms_content_protection@atomic:
> - shard-kbl: NOTRUN -> [TIMEOUT][60] ([i915#1319]) +2 similar issues
> [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_content_protection@atomic.html
>
> * igt@kms_content_protection@legacy:
> - shard-apl: NOTRUN -> [TIMEOUT][61] ([i915#1319])
> [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_content_protection@legacy.html
>
> * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
> - shard-skl: NOTRUN -> [FAIL][62] ([i915#2346])
> [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
>
> * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
> - shard-kbl: NOTRUN -> [DMESG-FAIL][63] ([IGT#6])
> [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl2/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
>
> * igt@kms_flip@flip-vs-suspend@a-dp1:
> - shard-apl: NOTRUN -> [DMESG-WARN][64] ([i915#180])
> [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_flip@flip-vs-suspend@a-dp1.html
>
> * igt@kms_flip@plain-flip-fb-recreate@c-edp1:
> - shard-skl: [PASS][65] -> [FAIL][66] ([i915#2122])
> [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl7/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
> [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
> - shard-kbl: NOTRUN -> [FAIL][67] ([i915#2641])
> [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
> - shard-kbl: NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#2672])
> [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
> - shard-skl: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#2672])
> [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
> - shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#2672])
> [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
>
> * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile:
> - shard-apl: NOTRUN -> [FAIL][71] ([i915#2641])
> [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt:
> - shard-apl: NOTRUN -> [FAIL][72] ([i915#49]) +1 similar issue
> [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc:
> - shard-glk: [PASS][73] -> [FAIL][74] ([i915#49]) +32 similar issues
> [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk8/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
> [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
> - shard-kbl: [PASS][75] -> [FAIL][76] ([i915#2546] / [i915#49]) +11 similar issues
> [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
> [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
> - shard-kbl: NOTRUN -> [FAIL][77] ([i915#2546] / [i915#49])
> [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt:
> - shard-apl: [PASS][78] -> [FAIL][79] ([i915#49]) +3 similar issues
> [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-apl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
> [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
>
> * igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt:
> - shard-kbl: [PASS][80] -> [FAIL][81] ([i915#2546])
> [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
> [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt:
> - shard-kbl: NOTRUN -> [SKIP][82] ([fdo#109271]) +70 similar issues
> [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-gtt:
> - shard-iclb: [PASS][83] -> [FAIL][84] ([i915#49]) +44 similar issues
> [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-gtt.html
> [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
> - shard-skl: NOTRUN -> [FAIL][85] ([i915#49])
> [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
>
> * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
> - shard-tglb: [PASS][86] -> [FAIL][87] ([i915#2416]) +44 similar issues
> [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
> [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
>
> * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render:
> - shard-skl: [PASS][88] -> [FAIL][89] ([i915#49]) +13 similar issues
> [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html
> [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl9/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html
>
> * igt@kms_pipe_crc_basic@read-crc-pipe-d:
> - shard-skl: NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#533])
> [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@kms_pipe_crc_basic@read-crc-pipe-d.html
>
> * igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
> - shard-glk: NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#533])
> [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
> - shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#533]) +1 similar issue
> [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
>
> * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
> - shard-kbl: [PASS][93] -> [DMESG-WARN][94] ([i915#180]) +1 similar issue
> [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
> [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
>
> * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes:
> - shard-skl: NOTRUN -> [FAIL][95] ([i915#1036])
> [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl6/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html
>
> * igt@kms_plane@plane-panning-bottom-right-pipe-c-planes:
> - shard-kbl: [PASS][96] -> [FAIL][97] ([i915#1036]) +1 similar issue
> [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-pipe-c-planes.html
> [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-pipe-c-planes.html
> - shard-apl: [PASS][98] -> [FAIL][99] ([i915#1036]) +2 similar issues
> [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-apl7/igt@kms_plane@plane-panning-bottom-right-pipe-c-planes.html
> [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl8/igt@kms_plane@plane-panning-bottom-right-pipe-c-planes.html
>
> * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
> - shard-tglb: [PASS][100] -> [FAIL][101] ([i915#2411] / [i915#533])
> [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> - shard-glk: [PASS][102] -> [FAIL][103] ([i915#1036] / [i915#533])
> [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> - shard-apl: [PASS][104] -> [FAIL][105] ([i915#1036] / [i915#533])
> [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> - shard-kbl: [PASS][106] -> [FAIL][107] ([i915#1036] / [i915#533])
> [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> - shard-skl: [PASS][108] -> [FAIL][109] ([i915#1036] / [i915#533])
> [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl9/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
>
> * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
> - shard-iclb: [PASS][110] -> [FAIL][111] ([i915#1036]) +5 similar issues
> [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
> [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
> - shard-apl: NOTRUN -> [FAIL][112] ([i915#1036])
> [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
> - shard-glk: [PASS][113] -> [FAIL][114] ([i915#1036]) +4 similar issues
> [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
> [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
> - shard-tglb: [PASS][115] -> [FAIL][116] ([i915#2411]) +2 similar issues
> [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
> [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
>
> * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
> - shard-skl: [PASS][117] -> [FAIL][118] ([i915#1036]) +2 similar issues
> [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-skl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
> [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
> - shard-kbl: NOTRUN -> [FAIL][119] ([i915#1036]) +1 similar issue
> [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
>
> * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
> - shard-kbl: NOTRUN -> [FAIL][120] ([fdo#108145] / [i915#265])
> [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
>
> * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
> - shard-apl: NOTRUN -> [FAIL][121] ([i915#265])
> [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
> - shard-kbl: NOTRUN -> [FAIL][122] ([i915#265])
> [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
> - shard-skl: NOTRUN -> [FAIL][123] ([i915#265])
> [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
>
> * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
> - shard-skl: NOTRUN -> [FAIL][124] ([fdo#108145] / [i915#265]) +1 similar issue
> [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>
> * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
> - shard-glk: NOTRUN -> [SKIP][125] ([fdo#109271] / [i915#658])
> [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
>
> * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
> - shard-kbl: NOTRUN -> [SKIP][126] ([fdo#109271] / [i915#658]) +1 similar issue
> [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl6/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
>
> * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1:
> - shard-skl: NOTRUN -> [SKIP][127] ([fdo#109271] / [i915#658]) +2 similar issues
> [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl10/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1.html
> - shard-apl: NOTRUN -> [SKIP][128] ([fdo#109271] / [i915#658]) +5 similar issues
> [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1.html
>
> * igt@kms_psr2_su@page_flip:
> - shard-iclb: [PASS][129] -> [SKIP][130] ([fdo#109642] / [fdo#111068] / [i915#658])
> [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb2/igt@kms_psr2_su@page_flip.html
> [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb5/igt@kms_psr2_su@page_flip.html
>
> * igt@kms_psr@psr2_sprite_blt:
> - shard-iclb: [PASS][131] -> [SKIP][132] ([fdo#109441])
> [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
> [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-iclb5/igt@kms_psr@psr2_sprite_blt.html
>
> * igt@kms_setmode@basic:
> - shard-snb: NOTRUN -> [FAIL][133] ([i915#31])
> [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-snb7/igt@kms_setmode@basic.html
>
> * igt@kms_sysfs_edid_timing:
> - shard-apl: NOTRUN -> [FAIL][134] ([IGT#2])
> [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl3/igt@kms_sysfs_edid_timing.html
>
> * igt@kms_vblank@pipe-d-wait-forked-hang:
> - shard-apl: NOTRUN -> [SKIP][135] ([fdo#109271]) +173 similar issues
> [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-apl2/igt@kms_vblank@pipe-d-wait-forked-hang.html
>
> * igt@perf@gen12-mi-rpc:
> - shard-skl: NOTRUN -> [SKIP][136] ([fdo#109271]) +80 similar issues
> [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-skl1/igt@perf@gen12-mi-rpc.html
>
>
> #### Possible fixes ####
>
> * igt@gem_exec_fair@basic-flow@rcs0:
> - shard-kbl: [SKIP][137] ([fdo#109271]) -> [PASS][138]
> [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl6/igt@gem_exec_fair@basic-flow@rcs0.html
> [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl4/igt@gem_exec_fair@basic-flow@rcs0.html
> - shard-tglb: [FAIL][139] ([i915#2842]) -> [PASS][140]
> [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html
> [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html
>
> * igt@gem_exec_fair@basic-none-rrul@rcs0:
> - shard-glk: [FAIL][141] ([i915#2842]) -> [PASS][142]
> [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-glk9/igt@gem_exec_fair@basic-none-rrul@rcs0.html
> [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-glk7/igt@gem_exec_fair@basic-none-rrul@rcs0.html
>
> * igt@gem_exec_fair@basic-pace-solo@rcs0:
> - shard-kbl: [FAIL][143] ([i915#2842]) -> [PASS][144] +1 similar issue
> [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9898/shard-kbl2/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/shard-kbl4/igt@gem_exec
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19860/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v3 25/25] drm/i915: For-CI: Force remapping the FB with a POT aligned stride
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 25/25] drm/i915: For-CI: Force remapping the FB with a POT aligned stride Imre Deak
@ 2021-03-26 22:35 ` Imre Deak
0 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-26 22:35 UTC (permalink / raw)
To: intel-gfx
To test the POT stride padding functionality until it's taken into use
by the actual platform needing it, enable the padding whenever the FB
remapping is possible. An exception is to pad linear FBs when this would
be otherwise possible (stride is page size aligned), because this won't
be anyway needed. Padding of linear FBs will be still tested whenever
a big stride requires remapping (so by igt/kms_big_fb).
By this both the FB creation time and commit time remapping setup will
be tested.
v3:
- Test now without forcing the remapping on, which is the actual case
for all platforms before ADL_P.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index a8fced4570e30..175a1271e7db9 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -446,17 +446,25 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
return 0;
}
+static bool intel_fb_can_remap(const struct drm_framebuffer *fb);
+
static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
- int i;
/* We don't want to deal with remapping with cursors */
if (plane->id == PLANE_CURSOR)
return false;
+ return intel_fb_can_remap(fb);
+}
+
+static bool intel_fb_can_remap(const struct drm_framebuffer *fb)
+{
+ struct drm_i915_private *i915 = to_i915(fb->dev);
+ int i;
+
/*
* The display engine limits already match/exceed the
* render engine limits, so not much point in remapping.
@@ -486,9 +494,13 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
return true;
}
+#define FORCE_POT_STRIDE_REMAP false
+
static bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
{
- return false;
+ return FORCE_POT_STRIDE_REMAP &&
+ fb->base.modifier != DRM_FORMAT_MOD_LINEAR &&
+ intel_fb_can_remap(&fb->base);
}
static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev3)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (29 preceding siblings ...)
2021-03-26 7:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-03-26 23:18 ` Patchwork
2021-03-26 23:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (9 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-26 23:18 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev3)
URL : https://patchwork.freedesktop.org/series/87859/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
09b57964ee1a drm/i915: Fix rotation setup during plane HW readout
1add1c1e3590 drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()
c8f8f224a2f4 drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()
d69907b34f92 drm/i915: Make sure i915_ggtt_view is inited when creating an FB
432c34011eb7 drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap()
d36175b1b932 drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h
-:78: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 95 lines checked
0d7a1a670b95 drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c
c6464f4378de drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c
397e72df537f drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c
f0cc6bc131c9 drm/i915/intel_fb: Pull FB plane functions from intel_display.c
-:1341: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1341: FILE: drivers/gpu/drm/i915/display/intel_fb.c:435:
+ drm_dbg_kms(&i915->drm,
+ "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
total: 0 errors, 0 warnings, 1 checks, 1780 lines checked
b8f83dc1f235 drm/i915/intel_fb: Unexport intel_fb_check_stride()
12cb02ede602 drm/i915/intel_fb: s/dev_priv/i915/
848242f45a3f drm/i915/intel_fb: Factor out convert_plane_offset_to_xy()
-:67: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#67: FILE: drivers/gpu/drm/i915/display/intel_fb.c:551:
+ (*x + plane_width) * fb->base.format->cpp[color_plane] > fb->base.pitches[color_plane]) {
total: 0 errors, 1 warnings, 0 checks, 92 lines checked
8e9ea612941d drm/i915/intel_fb: Factor out calc_plane_aligned_offset()
-:25: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#25: FILE: drivers/gpu/drm/i915/display/intel_fb.c:561:
+static u32 calc_plane_aligned_offset(const struct intel_framebuffer *fb, int color_plane, int *x, int *y)
total: 0 errors, 1 warnings, 0 checks, 43 lines checked
2ba06d265715 drm/i915/intel_fb: Factor out calc_plane_normal_size()
-:22: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#22:
- Add back the +1 tile adjustment for x!=0 in calc_plane_normal_size(). (Ville)
total: 0 errors, 1 warnings, 0 checks, 132 lines checked
9b0815c4a082 drm/i915: Unify the FB and plane state view information into one struct
cf97dd091bb2 drm/i915: Store the normal view FB pitch in FB's intel_fb_view
-:11: WARNING:TYPO_SPELLING: 'retrive' may be misspelled - perhaps 'retrieve'?
#11:
it during FB creation to the FB normal view struct and retrive it from
^^^^^^^
total: 0 errors, 1 warnings, 0 checks, 24 lines checked
dc4b4a551b93 drm/i915: Simplify copying the FB view state to the plane state
-:66: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#66: FILE: drivers/gpu/drm/i915/display/intel_fb.c:487:
+static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
total: 0 errors, 1 warnings, 0 checks, 182 lines checked
0435822005cc drm/i915/intel_fb: Factor out calc_plane_remap_info()
-:198: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#198: FILE: drivers/gpu/drm/i915/display/intel_fb.c:769:
+ offset, gtt_offset_rotated, x, y,
total: 0 errors, 1 warnings, 0 checks, 256 lines checked
04760a228df9 drm/i915: Shrink the size of intel_remapped_plane_info struct
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'var' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/display/intel_fb.c:616:
+#define assign_chk_ovf(i915, var, val) ({ \
+ drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
+ var = val; \
+})
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'val' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/display/intel_fb.c:616:
+#define assign_chk_ovf(i915, var, val) ({ \
+ drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
+ var = val; \
+})
total: 0 errors, 0 warnings, 2 checks, 62 lines checked
93d0281c4ba3 drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap()
-:61: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#61: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:549:
+ expected_pages = rotated_size(&plane_info[0], &plane_info[1]);
total: 0 errors, 1 warnings, 0 checks, 124 lines checked
8d44da0209c1 drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct
-:37: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#37: FILE: drivers/gpu/drm/i915/display/intel_fb.c:636:
+ assign_chk_ovf(i915, remap_info->src_stride, plane_view_src_stride_tiles(fb, color_plane, dims));
total: 0 errors, 1 warnings, 0 checks, 181 lines checked
8b68c1f5e3ce drm/i915: Add support for FBs requiring a POT stride alignment
-:194: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#194: FILE: drivers/gpu/drm/i915/display/intel_fb.c:807:
+ offset, gtt_offset_remapped, x, y,
total: 0 errors, 1 warnings, 0 checks, 333 lines checked
81fb2f0a6835 drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height
-:112: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#112: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:536:
{
+
-:137: WARNING:LONG_LINE: line length of 114 exceeds 100 columns
#137: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:630:
+ expected_pages = remapped_size(view.type, &plane_info[0], &plane_info[1]);
-:178: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#178: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:1018:
+ offset = (x * plane_info[0].dst_stride + y) * PAGE_SIZE;
-:181: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#181: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:1020:
+ offset = (y * plane_info[0].dst_stride + x) * PAGE_SIZE;
total: 0 errors, 3 warnings, 1 checks, 157 lines checked
589eb635f86d drm/i915: For-CI: Force remapping the FB with a POT aligned stride
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev3)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (30 preceding siblings ...)
2021-03-26 23:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev3) Patchwork
@ 2021-03-26 23:20 ` Patchwork
2021-03-26 23:23 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
` (8 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-26 23:20 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev3)
URL : https://patchwork.freedesktop.org/series/87859/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1329:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_ring_submission.c:1203:24: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/gvt/mmio.c:295:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1434:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1488:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/intel_wakeref.c:137:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev3)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (31 preceding siblings ...)
2021-03-26 23:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2021-03-26 23:23 ` Patchwork
2021-03-26 23:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (7 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-26 23:23 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev3)
URL : https://patchwork.freedesktop.org/series/87859/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
/home/cidrm/kernel/Documentation/gpu/i915:22: ./drivers/gpu/drm/i915/intel_runtime_pm.c:423: WARNING: Inline strong start-string without end-string.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add support for FBs requiring a POT stride padding (rev3)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (32 preceding siblings ...)
2021-03-26 23:23 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
@ 2021-03-26 23:48 ` Patchwork
2021-03-27 2:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
` (6 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-26 23:48 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 7722 bytes --]
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev3)
URL : https://patchwork.freedesktop.org/series/87859/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9909 -> Patchwork_19871
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/index.html
Known issues
------------
Here are the changes found in Patchwork_19871 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@query-info:
- fi-bsw-kefka: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-bsw-kefka/igt@amdgpu/amd_basic@query-info.html
* igt@amdgpu/amd_basic@semaphore:
- fi-icl-y: NOTRUN -> [SKIP][2] ([fdo#109315]) +17 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-icl-y/igt@amdgpu/amd_basic@semaphore.html
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-tgl-y/igt@debugfs_test@read_all_entries.html
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [PASS][5] -> [FAIL][6] ([i915#1888])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_huc_copy@huc-copy:
- fi-icl-y: NOTRUN -> [SKIP][7] ([i915#2190])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-icl-y/igt@gem_huc_copy@huc-copy.html
* igt@kms_chamelium@dp-crc-fast:
- fi-icl-y: NOTRUN -> [SKIP][8] ([fdo#109284] / [fdo#111827]) +8 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-icl-y/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-icl-y: NOTRUN -> [SKIP][9] ([fdo#109285])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-icl-y/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-icl-y: NOTRUN -> [SKIP][10] ([fdo#109278])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-icl-y/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@primary_mmap_gtt:
- fi-icl-y: NOTRUN -> [SKIP][11] ([fdo#110189]) +3 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-icl-y/igt@kms_psr@primary_mmap_gtt.html
* igt@prime_vgem@basic-userptr:
- fi-icl-y: NOTRUN -> [SKIP][12] ([i915#3301])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-icl-y/igt@prime_vgem@basic-userptr.html
#### Possible fixes ####
* igt@gem_render_tiled_blits@basic:
- fi-tgl-y: [DMESG-WARN][13] ([i915#402]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/fi-tgl-y/igt@gem_render_tiled_blits@basic.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-tgl-y/igt@gem_render_tiled_blits@basic.html
* igt@i915_selftest@live@execlists:
- fi-bsw-kefka: [INCOMPLETE][15] ([i915#2782] / [i915#2940]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/fi-bsw-kefka/igt@i915_selftest@live@execlists.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-bsw-kefka/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@hangcheck:
- fi-byt-j1900: [DMESG-WARN][17] ([i915#3303]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/fi-byt-j1900/igt@i915_selftest@live@hangcheck.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/fi-byt-j1900/igt@i915_selftest@live@hangcheck.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (46 -> 43)
------------------------------
Additional (1): fi-icl-y
Missing (4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_9909 -> Patchwork_19871
CI-20190529: 20190529
CI_DRM_9909: 3a920a8e00db74289e0bb268c587b11852c1f0b2 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6047: 3887134e739f480cefe1dc7f13eb54f7bf3ca27f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19871: 589eb635f86deb1d1bade7d766c2db23cc16e094 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
589eb635f86d drm/i915: For-CI: Force remapping the FB with a POT aligned stride
81fb2f0a6835 drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height
8b68c1f5e3ce drm/i915: Add support for FBs requiring a POT stride alignment
8d44da0209c1 drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct
93d0281c4ba3 drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap()
04760a228df9 drm/i915: Shrink the size of intel_remapped_plane_info struct
0435822005cc drm/i915/intel_fb: Factor out calc_plane_remap_info()
dc4b4a551b93 drm/i915: Simplify copying the FB view state to the plane state
cf97dd091bb2 drm/i915: Store the normal view FB pitch in FB's intel_fb_view
9b0815c4a082 drm/i915: Unify the FB and plane state view information into one struct
2ba06d265715 drm/i915/intel_fb: Factor out calc_plane_normal_size()
8e9ea612941d drm/i915/intel_fb: Factor out calc_plane_aligned_offset()
848242f45a3f drm/i915/intel_fb: Factor out convert_plane_offset_to_xy()
12cb02ede602 drm/i915/intel_fb: s/dev_priv/i915/
b8f83dc1f235 drm/i915/intel_fb: Unexport intel_fb_check_stride()
f0cc6bc131c9 drm/i915/intel_fb: Pull FB plane functions from intel_display.c
397e72df537f drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c
c6464f4378de drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c
0d7a1a670b95 drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c
d36175b1b932 drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h
432c34011eb7 drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap()
d69907b34f92 drm/i915: Make sure i915_ggtt_view is inited when creating an FB
c8f8f224a2f4 drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()
1add1c1e3590 drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()
09b57964ee1a drm/i915: Fix rotation setup during plane HW readout
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/index.html
[-- Attachment #1.2: Type: text/html, Size: 8856 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add support for FBs requiring a POT stride padding (rev3)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (33 preceding siblings ...)
2021-03-26 23:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-03-27 2:25 ` Patchwork
2021-03-27 22:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev4) Patchwork
` (5 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-27 2:25 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30289 bytes --]
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev3)
URL : https://patchwork.freedesktop.org/series/87859/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9909_full -> Patchwork_19871_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_19871_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19871_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19871_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_userptr_blits@vma-merge:
- shard-apl: NOTRUN -> [FAIL][1] +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl7/igt@gem_userptr_blits@vma-merge.html
* igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt:
- shard-kbl: [PASS][2] -> [FAIL][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt:
- shard-glk: [PASS][4] -> [FAIL][5] +2 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk2/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-glk7/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt:
- shard-iclb: [PASS][6] -> [FAIL][7] +4 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb6/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
* igt@kms_plane@plane-panning-bottom-right-pipe-b-planes:
- shard-tglb: [PASS][8] -> [FAIL][9] +8 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-tglb3/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html
Known issues
------------
Here are the changes found in Patchwork_19871_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][10] ([i915#3002])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl9/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@smoketest:
- shard-snb: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1099]) +4 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-snb6/igt@gem_ctx_persistence@smoketest.html
* igt@gem_exec_create@madvise:
- shard-glk: [PASS][12] -> [DMESG-WARN][13] ([i915#118] / [i915#95])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@gem_exec_create@madvise.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-glk3/igt@gem_exec_create@madvise.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-skl: NOTRUN -> [SKIP][14] ([fdo#109271]) +97 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl8/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk: [PASS][15] -> [FAIL][16] ([i915#2842])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace@rcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-glk6/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][17] ([i915#2842])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb2/igt@gem_exec_fair@basic-pace@vcs1.html
- shard-tglb: [PASS][18] -> [FAIL][19] ([i915#2842])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs1.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_pread@exhaustion:
- shard-apl: NOTRUN -> [WARN][20] ([i915#2658])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl7/igt@gem_pread@exhaustion.html
* igt@gem_vm_create@destroy-race:
- shard-tglb: [PASS][21] -> [TIMEOUT][22] ([i915#2795])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb5/igt@gem_vm_create@destroy-race.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-tglb6/igt@gem_vm_create@destroy-race.html
* igt@gen9_exec_parse@bb-large:
- shard-apl: NOTRUN -> [FAIL][23] ([i915#3296])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl2/igt@gen9_exec_parse@bb-large.html
* igt@i915_pm_dc@dc6-dpms:
- shard-skl: NOTRUN -> [FAIL][24] ([i915#454])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl9/igt@i915_pm_dc@dc6-dpms.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][25] ([fdo#110725] / [fdo#111614])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb1/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- shard-iclb: NOTRUN -> [SKIP][26] ([fdo#110723])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb1/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
* igt@kms_big_joiner@invalid-modeset:
- shard-apl: NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#2705])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl7/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_ccs@pipe-c-crc-primary-basic:
- shard-skl: NOTRUN -> [SKIP][28] ([fdo#109271] / [fdo#111304])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl8/igt@kms_ccs@pipe-c-crc-primary-basic.html
* igt@kms_chamelium@dp-audio-edid:
- shard-skl: NOTRUN -> [SKIP][29] ([fdo#109271] / [fdo#111827]) +8 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl10/igt@kms_chamelium@dp-audio-edid.html
* igt@kms_chamelium@hdmi-hpd-enable-disable-mode:
- shard-snb: NOTRUN -> [SKIP][30] ([fdo#109271] / [fdo#111827]) +18 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-snb6/igt@kms_chamelium@hdmi-hpd-enable-disable-mode.html
* igt@kms_chamelium@hdmi-hpd-for-each-pipe:
- shard-iclb: NOTRUN -> [SKIP][31] ([fdo#109284] / [fdo#111827]) +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb1/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html
* igt@kms_color_chamelium@pipe-c-ctm-0-25:
- shard-apl: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111827]) +23 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl7/igt@kms_color_chamelium@pipe-c-ctm-0-25.html
* igt@kms_content_protection@atomic:
- shard-apl: NOTRUN -> [TIMEOUT][33] ([i915#1319]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl2/igt@kms_content_protection@atomic.html
* igt@kms_cursor_crc@pipe-d-cursor-256x256-random:
- shard-iclb: NOTRUN -> [SKIP][34] ([fdo#109278]) +1 similar issue
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb1/igt@kms_cursor_crc@pipe-d-cursor-256x256-random.html
* igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size:
- shard-skl: [PASS][35] -> [DMESG-WARN][36] ([i915#1982])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl7/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-iclb: NOTRUN -> [SKIP][37] ([fdo#109274] / [fdo#109278])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@pipe-d-torture-bo:
- shard-apl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#533]) +2 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl2/igt@kms_cursor_legacy@pipe-d-torture-bo.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled:
- shard-glk: [PASS][39] -> [FAIL][40] ([i915#52] / [i915#54])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-glk6/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
- shard-skl: NOTRUN -> [FAIL][41] ([i915#2122])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1:
- shard-skl: [PASS][42] -> [FAIL][43] ([i915#2122])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl2/igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-apl: NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#2672])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
- shard-apl: NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#2642])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
- shard-skl: NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#2642])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt:
- shard-kbl: [PASS][47] -> [FAIL][48] ([i915#2546] / [i915#49]) +13 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-apl: NOTRUN -> [FAIL][49] ([i915#49]) +3 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl8/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc:
- shard-glk: [PASS][50] -> [FAIL][51] ([i915#49]) +33 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-glk8/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-render:
- shard-iclb: NOTRUN -> [FAIL][52] ([i915#49])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt:
- shard-apl: [PASS][53] -> [FAIL][54] ([i915#49]) +4 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-iclb: NOTRUN -> [SKIP][55] ([fdo#109280]) +3 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt:
- shard-kbl: [PASS][56] -> [FAIL][57] ([i915#2546])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc:
- shard-iclb: [PASS][58] -> [FAIL][59] ([i915#49]) +46 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-tglb: [PASS][60] -> [FAIL][61] ([i915#2416]) +47 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render:
- shard-skl: [PASS][62] -> [FAIL][63] ([i915#49]) +14 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: NOTRUN -> [FAIL][64] ([i915#1188])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl8/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-kbl: [PASS][65] -> [DMESG-WARN][66] ([i915#180]) +2 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl4/igt@kms_hdr@bpc-switch-suspend.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-kbl4/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-skl: NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#533])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl8/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_plane@plane-panning-bottom-right-pipe-a-planes:
- shard-kbl: [PASS][68] -> [FAIL][69] ([i915#1036])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-pipe-a-planes.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-pipe-a-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-tglb: [PASS][70] -> [FAIL][71] ([i915#2411] / [i915#533])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-tglb2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
- shard-glk: [PASS][72] -> [FAIL][73] ([i915#1036] / [i915#533])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-glk5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
- shard-apl: [PASS][74] -> [FAIL][75] ([i915#1036] / [i915#533])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
- shard-kbl: [PASS][76] -> [FAIL][77] ([i915#1036] / [i915#533])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
- shard-skl: [PASS][78] -> [FAIL][79] ([i915#1036] / [i915#533])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl10/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-iclb: [PASS][80] -> [FAIL][81] ([i915#1036]) +5 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
- shard-apl: [PASS][82] -> [FAIL][83] ([i915#1036]) +2 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
- shard-glk: [PASS][84] -> [FAIL][85] ([i915#1036]) +4 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-glk4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
- shard-tglb: [PASS][86] -> [FAIL][87] ([i915#2411]) +2 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-tglb7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-skl: [PASS][88] -> [FAIL][89] ([i915#1036]) +4 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][90] ([fdo#108145] / [i915#265]) +1 similar issue
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl2/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][91] -> [FAIL][92] ([fdo#108145] / [i915#265])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][93] ([i915#265]) +1 similar issue
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl7/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
- shard-apl: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2733])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl7/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
- shard-skl: NOTRUN -> [SKIP][95] ([fdo#109271] / [i915#658]) +1 similar issue
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl10/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
- shard-apl: NOTRUN -> [SKIP][96] ([fdo#109271] / [i915#658]) +4 similar issues
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl1/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html
* igt@kms_psr@psr2_sprite_mmap_cpu:
- shard-iclb: [PASS][97] -> [SKIP][98] ([fdo#109441])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_cpu.html
* igt@kms_vblank@pipe-d-query-forked-hang:
- shard-snb: NOTRUN -> [SKIP][99] ([fdo#109271]) +316 similar issues
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-snb6/igt@kms_vblank@pipe-d-query-forked-hang.html
* igt@kms_vblank@pipe-d-ts-continuation-idle:
- shard-apl: NOTRUN -> [SKIP][100] ([fdo#109271]) +225 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl7/igt@kms_vblank@pipe-d-ts-continuation-idle.html
* igt@kms_writeback@writeback-check-output:
- shard-apl: NOTRUN -> [SKIP][101] ([fdo#109271] / [i915#2437]) +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-apl7/igt@kms_writeback@writeback-check-output.html
- shard-skl: NOTRUN -> [SKIP][102] ([fdo#109271] / [i915#2437])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl8/igt@kms_writeback@writeback-check-output.html
* igt@nouveau_crc@pipe-a-source-outp-inactive:
- shard-iclb: NOTRUN -> [SKIP][103] ([i915#2530])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb1/igt@nouveau_crc@pipe-a-source-outp-inactive.html
* igt@perf@polling:
- shard-skl: [PASS][104] -> [FAIL][105] ([i915#1542])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@perf@polling.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl3/igt@perf@polling.html
* igt@perf@polling-small-buf:
- shard-skl: [PASS][106] -> [FAIL][107] ([i915#1722])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@perf@polling-small-buf.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl10/igt@perf@polling-small-buf.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [FAIL][108] ([i915#2846]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-kbl2/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-glk: [FAIL][110] ([i915#2842]) -> [PASS][111] +1 similar issue
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-glk6/igt@gem_exec_fair@basic-pace-solo@rcs0.html
- shard-kbl: [FAIL][112] ([i915#2842]) -> [PASS][113] +2 similar issues
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-tglb: [FAIL][114] ([i915#2842]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_exec_fair@basic-pace@rcs0.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-tglb8/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_whisper@basic-fds-priority:
- shard-glk: [DMESG-WARN][116] ([i915#118] / [i915#95]) -> [PASS][117] +1 similar issue
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk4/igt@gem_exec_whisper@basic-fds-priority.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-glk1/igt@gem_exec_whisper@basic-fds-priority.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [DMESG-WARN][118] ([i915#1436] / [i915#716]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl6/igt@gen9_exec_parse@allowed-single.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl10/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- shard-skl: [INCOMPLETE][120] ([i915#151]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@i915_pm_rpm@modeset-lpsp-stress.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl10/igt@i915_pm_rpm@modeset-lpsp-stress.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [FAIL][122] ([i915#2521]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@kms_async_flips@alternate-sync-async-flip.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl9/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_color@pipe-a-ctm-0-5:
- shard-skl: [DMESG-WARN][124] ([i915#1982]) -> [PASS][125] +1 similar issue
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl7/igt@kms_color@pipe-a-ctm-0-5.html
* igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen:
- shard-skl: [FAIL][126] ([i915#54]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-skl: [FAIL][128] ([i915#2122]) -> [PASS][129]
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl10/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [FAIL][130] ([i915#1188]) -> [PASS][131]
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl6/igt@kms_hdr@bpc-switch-suspend.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl4/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- shard-skl: [FAIL][132] ([i915#53]) -> [PASS][133]
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl10/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][134] ([fdo#108145] / [i915#265]) -> [PASS][135] +1 similar issue
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_plane_cursor@pipe-c-primary-size-64:
- shard-iclb: [INCOMPLETE][136] -> [PASS][137]
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_plane_cursor@pipe-c-primary-size-64.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb1/igt@kms_plane_cursor@pipe-c-primary-size-64.html
* igt@kms_psr@psr2_basic:
- shard-iclb: [SKIP][138] ([fdo#109441]) -> [PASS][139] +1 similar issue
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb5/igt@kms_psr@psr2_basic.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb2/igt@kms_psr@psr2_basic.html
#### Warnings ####
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-iclb: [FAIL][140] ([i915#2842]) -> [FAIL][141] ([i915#2852])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@gem_exec_fair@basic-none-rrul@rcs0.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/shard-iclb7/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@i915_pm_rc6_residency@rc6-fence:
-
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19871/index.html
[-- Attachment #1.2: Type: text/html, Size: 33261 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] [PATCH v3 16/25] drm/i915: Unify the FB and plane state view information into one struct
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 16/25] drm/i915: Unify the FB and plane state view information into one struct Imre Deak
2021-03-26 16:33 ` Ville Syrjälä
@ 2021-03-27 22:09 ` Imre Deak
1 sibling, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-27 22:09 UTC (permalink / raw)
To: intel-gfx
To allow the simplification of FB/plane view computation in the
follow-up patches, unify the corresponding state in the
intel_framebuffer and intel_plane_state structs into a new intel_fb_view
struct.
This adds some overhead to intel_framebuffer as the rotated view will
have now space for 4 color planes instead of the required 2 and it'll
also contain the unused offset for each color_plane info. Imo this is an
acceptable trade-off to get a simplified way of the remap computation.
Use the new intel_fb_view struct for the FB normal view as well, so (in
the follow-up patches) we can remove the special casing for normal view
calculation wrt. the calculation of remapped/rotated views. This also
adds an overhead to the intel_framebuffer struct, as the gtt remap info
and per-color plane offset/pitch is not required for the normal view,
but imo this is an acceptable trade-off as above. The per-color plane
pitch filed will be used by a follow-up patch, so we can retrieve the
pitch for each view in the same way.
No functional changes in this patch.
v2:
- Make the patch have _no functional change_.
(fix skl_check_nv12_aux_surface() and skl_check_main_surface()).
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 20 +++---
drivers/gpu/drm/i915/display/intel_cursor.c | 14 ++--
drivers/gpu/drm/i915/display/intel_display.c | 22 +++---
.../drm/i915/display/intel_display_types.h | 61 ++++++++++------
drivers/gpu/drm/i915/display/intel_fb.c | 66 ++++++++---------
drivers/gpu/drm/i915/display/intel_fb.h | 3 +
drivers/gpu/drm/i915/display/intel_fbc.c | 6 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 26 +++----
.../drm/i915/display/skl_universal_plane.c | 71 +++++++++----------
9 files changed, 153 insertions(+), 136 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 40266b78247b2..8ee59490c027a 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -271,7 +271,7 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
u32 alignment = intel_surf_alignment(fb, 0);
int cpp = fb->format->cpp[0];
- while ((src_x + src_w) * cpp > plane_state->color_plane[0].stride) {
+ while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].pitch) {
if (offset == 0) {
drm_dbg_kms(&dev_priv->drm,
"Unable to find suitable display surface offset due to X-tiling\n");
@@ -311,9 +311,9 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
drm_WARN_ON(&dev_priv->drm, src_x > 4095 || src_y > 4095);
}
- plane_state->color_plane[0].offset = offset;
- plane_state->color_plane[0].x = src_x;
- plane_state->color_plane[0].y = src_y;
+ plane_state->view.color_plane[0].offset = offset;
+ plane_state->view.color_plane[0].x = src_x;
+ plane_state->view.color_plane[0].y = src_y;
return 0;
}
@@ -424,8 +424,8 @@ static void i9xx_update_plane(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
u32 linear_offset;
- int x = plane_state->color_plane[0].x;
- int y = plane_state->color_plane[0].y;
+ int x = plane_state->view.color_plane[0].x;
+ int y = plane_state->view.color_plane[0].y;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
int crtc_w = drm_rect_width(&plane_state->uapi.dst);
@@ -439,14 +439,14 @@ static void i9xx_update_plane(struct intel_plane *plane,
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
if (DISPLAY_VER(dev_priv) >= 4)
- dspaddr_offset = plane_state->color_plane[0].offset;
+ dspaddr_offset = plane_state->view.color_plane[0].offset;
else
dspaddr_offset = linear_offset;
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DSPSTRIDE(i9xx_plane),
- plane_state->color_plane[0].stride);
+ plane_state->view.color_plane[0].pitch);
if (DISPLAY_VER(dev_priv) < 4) {
/*
@@ -531,7 +531,7 @@ g4x_primary_async_flip(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
u32 dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state);
- u32 dspaddr_offset = plane_state->color_plane[0].offset;
+ u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
unsigned long irqflags;
@@ -552,7 +552,7 @@ vlv_primary_async_flip(struct intel_plane *plane,
bool async_flip)
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- u32 dspaddr_offset = plane_state->color_plane[0].offset;
+ u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
unsigned long irqflags;
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 84099b7f5c358..03dad12cf78fc 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -45,7 +45,7 @@ static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
else
base = intel_plane_ggtt_offset(plane_state);
- return base + plane_state->color_plane[0].offset;
+ return base + plane_state->view.color_plane[0].offset;
}
static u32 intel_cursor_position(const struct intel_plane_state *plane_state)
@@ -125,9 +125,9 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
offset += (src_h * src_w - 1) * fb->format->cpp[0];
}
- plane_state->color_plane[0].offset = offset;
- plane_state->color_plane[0].x = src_x;
- plane_state->color_plane[0].y = src_y;
+ plane_state->view.color_plane[0].offset = offset;
+ plane_state->view.color_plane[0].x = src_x;
+ plane_state->view.color_plane[0].y = src_y;
return 0;
}
@@ -194,7 +194,7 @@ static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state,
{
return CURSOR_ENABLE |
CURSOR_FORMAT_ARGB |
- CURSOR_STRIDE(plane_state->color_plane[0].stride);
+ CURSOR_STRIDE(plane_state->view.color_plane[0].pitch);
}
static bool i845_cursor_size_ok(const struct intel_plane_state *plane_state)
@@ -233,7 +233,7 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
}
drm_WARN_ON(&i915->drm, plane_state->uapi.visible &&
- plane_state->color_plane[0].stride != fb->pitches[0]);
+ plane_state->view.color_plane[0].pitch != fb->pitches[0]);
switch (fb->pitches[0]) {
case 256:
@@ -450,7 +450,7 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
}
drm_WARN_ON(&dev_priv->drm, plane_state->uapi.visible &&
- plane_state->color_plane[0].stride != fb->pitches[0]);
+ plane_state->view.color_plane[0].pitch != fb->pitches[0]);
if (fb->pitches[0] !=
drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 25eaa8a44baa8..4ee7e72142a5f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1013,7 +1013,7 @@ static bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
return DISPLAY_VER(dev_priv) < 4 ||
(plane->has_fbc &&
- plane_state->view.type == I915_GGTT_VIEW_NORMAL);
+ plane_state->view.gtt.type == I915_GGTT_VIEW_NORMAL);
}
struct i915_vma *
@@ -1161,7 +1161,7 @@ u32 intel_fb_xy_to_linear(int x, int y,
{
const struct drm_framebuffer *fb = state->hw.fb;
unsigned int cpp = fb->format->cpp[color_plane];
- unsigned int pitch = state->color_plane[color_plane].stride;
+ unsigned int pitch = state->view.color_plane[color_plane].pitch;
return y * pitch + x * cpp;
}
@@ -1176,8 +1176,8 @@ void intel_add_fb_offsets(int *x, int *y,
int color_plane)
{
- *x += state->color_plane[color_plane].x;
- *y += state->color_plane[color_plane].y;
+ *x += state->view.color_plane[color_plane].x;
+ *y += state->view.color_plane[color_plane].y;
}
static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)
@@ -1680,9 +1680,9 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
valid_fb:
plane_state->rotation = plane_config->rotation;
- intel_fill_fb_ggtt_view(&intel_state->view, fb,
+ intel_fill_fb_ggtt_view(&intel_state->view.gtt, fb,
plane_state->rotation);
- intel_state->color_plane[0].stride =
+ intel_state->view.color_plane[0].pitch =
intel_fb_pitch(fb, 0, plane_state->rotation);
__i915_vma_pin(vma);
@@ -1723,7 +1723,7 @@ intel_plane_fence_y_offset(const struct intel_plane_state *plane_state)
int x = 0, y = 0;
intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
- plane_state->color_plane[0].offset, 0);
+ plane_state->view.color_plane[0].offset, 0);
return y;
}
@@ -6787,8 +6787,6 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE;
linked_state->color_ctl = plane_state->color_ctl;
linked_state->view = plane_state->view;
- memcpy(linked_state->color_plane, plane_state->color_plane,
- sizeof(linked_state->color_plane));
intel_plane_copy_hw_state(linked_state, plane_state);
linked_state->uapi.src = plane_state->uapi.src;
@@ -9320,8 +9318,8 @@ static int intel_atomic_check_async(struct intel_atomic_state *state)
return -EINVAL;
}
- if (old_plane_state->color_plane[0].stride !=
- new_plane_state->color_plane[0].stride) {
+ if (old_plane_state->view.color_plane[0].pitch !=
+ new_plane_state->view.color_plane[0].pitch) {
drm_dbg_kms(&i915->drm, "Stride cannot be changed in async flip\n");
return -EINVAL;
}
@@ -10546,7 +10544,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state)
INTEL_INFO(dev_priv)->display.cursor_needs_physical;
vma = intel_pin_and_fence_fb_obj(fb, phys_cursor,
- &plane_state->view,
+ &plane_state->view.gtt,
intel_plane_uses_fence(plane_state),
&plane_state->flags);
if (IS_ERR(vma))
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 80983cfe9d3b0..b72861f6f68a7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -85,20 +85,49 @@ enum intel_broadcast_rgb {
INTEL_BROADCAST_RGB_LIMITED,
};
+struct intel_fb_view {
+ /*
+ * The remap information used in the remapped and rotated views to
+ * create the DMA scatter-gather list for each FB color plane. This sg
+ * list is created along with the view type (gtt.type) specific
+ * i915_vma object and contains the list of FB object pages (reordered
+ * in the rotated view) that are visible in the view.
+ * In the normal view the FB object's backing store sg list is used
+ * directly and hence the remap information here is not used.
+ */
+ struct i915_ggtt_view gtt;
+
+ /*
+ * The GTT view (gtt.type) specific information for each FB color
+ * plane. In the normal GTT view all formats (up to 4 color planes),
+ * in the rotated and remapped GTT view all no-CCS formats (up to 2
+ * color planes) are supported.
+ *
+ * TODO: add support for CCS formats in the remapped GTT view.
+ *
+ * The view information shared by all FB color planes in the FB,
+ * like dst x/y and src/dst width, is stored separately in
+ * intel_plane_state.
+ */
+ struct i915_color_plane_view {
+ u32 offset;
+ unsigned int x, y;
+ /*
+ * Plane pitch (stride) in:
+ * bytes for 0/180 degree rotation
+ * pixels for 90/270 degree rotation
+ */
+ unsigned int pitch;
+ } color_plane[4];
+};
+
struct intel_framebuffer {
struct drm_framebuffer base;
struct intel_frontbuffer *frontbuffer;
- struct intel_rotation_info rot_info;
- /* for each plane in the normal GTT view */
- struct {
- unsigned int x, y;
- } normal[4];
- /* for each plane in the rotated GTT view for no-CCS formats */
- struct {
- unsigned int x, y;
- unsigned int pitch; /* pixels */
- } rotated[2];
+ /* Params to remap the FB pages and program the plane registers in each view. */
+ struct intel_fb_view normal_view;
+ struct intel_fb_view rotated_view;
};
struct intel_fbdev {
@@ -581,21 +610,11 @@ struct intel_plane_state {
enum drm_scaling_filter scaling_filter;
} hw;
- struct i915_ggtt_view view;
struct i915_vma *vma;
unsigned long flags;
#define PLANE_HAS_FENCE BIT(0)
- struct {
- u32 offset;
- /*
- * Plane stride in:
- * bytes for 0/180 degree rotation
- * pixels for 90/270 degree rotation
- */
- u32 stride;
- int x, y;
- } color_plane[4];
+ struct intel_fb_view view;
/* plane control register */
u32 ctl;
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 6f8206769c3df..b223e16eb6a22 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -259,7 +259,7 @@ u32 intel_plane_adjust_aligned_offset(int *x, int *y,
{
return intel_adjust_aligned_offset(x, y, state->hw.fb, color_plane,
state->hw.rotation,
- state->color_plane[color_plane].stride,
+ state->view.color_plane[color_plane].pitch,
old_offset, new_offset);
}
@@ -340,7 +340,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
struct drm_i915_private *i915 = to_i915(intel_plane->base.dev);
const struct drm_framebuffer *fb = state->hw.fb;
unsigned int rotation = state->hw.rotation;
- int pitch = state->color_plane[color_plane].stride;
+ int pitch = state->view.color_plane[color_plane].pitch;
u32 alignment;
if (intel_plane->id == PLANE_CURSOR)
@@ -423,8 +423,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
ccs_y = (y * vsub) % tile_height;
main_plane = skl_ccs_to_main_plane(fb, ccs_plane);
- main_x = intel_fb->normal[main_plane].x % tile_width;
- main_y = intel_fb->normal[main_plane].y % tile_height;
+ main_x = intel_fb->normal_view.color_plane[main_plane].x % tile_width;
+ main_y = intel_fb->normal_view.color_plane[main_plane].y % tile_height;
/*
* CCS doesn't have its own x/y offset register, so the intra CCS tile
@@ -435,8 +435,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
"Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
main_x, main_y,
ccs_x, ccs_y,
- intel_fb->normal[main_plane].x,
- intel_fb->normal[main_plane].y,
+ intel_fb->normal_view.color_plane[main_plane].x,
+ intel_fb->normal_view.color_plane[main_plane].y,
x, y);
return -EINVAL;
}
@@ -487,7 +487,7 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
int intel_fb_pitch(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation)
{
if (drm_rotation_90_or_270(rotation))
- return to_intel_framebuffer(fb)->rotated[color_plane].pitch;
+ return to_intel_framebuffer(fb)->rotated_view.color_plane[color_plane].pitch;
else
return fb->pitches[color_plane];
}
@@ -584,7 +584,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
struct drm_framebuffer *fb)
{
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct intel_rotation_info *rot_info = &intel_fb->rot_info;
+ struct intel_rotation_info *rot_info = &intel_fb->rotated_view.gtt.rotated;
unsigned int pitch_tiles;
struct drm_rect r;
@@ -598,7 +598,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
rot_info->plane[plane] = *plane_info;
- intel_fb->rotated[plane].pitch = plane_info->height * tile_height;
+ intel_fb->rotated_view.color_plane[plane].pitch = plane_info->height * tile_height;
/* rotate the x/y offsets to match the GTT view */
drm_rect_init(&r, x, y, width, height);
@@ -610,7 +610,7 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
y = r.y1;
/* rotate the tile dimensions to match the GTT view */
- pitch_tiles = intel_fb->rotated[plane].pitch / tile_height;
+ pitch_tiles = intel_fb->rotated_view.color_plane[plane].pitch / tile_height;
swap(tile_width, tile_height);
/*
@@ -626,8 +626,8 @@ static u32 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *
* First pixel of the framebuffer from
* the start of the rotated gtt mapping.
*/
- intel_fb->rotated[plane].x = x;
- intel_fb->rotated[plane].y = y;
+ intel_fb->rotated_view.color_plane[plane].x = x;
+ intel_fb->rotated_view.color_plane[plane].y = y;
return plane_info->width * plane_info->height;
}
@@ -742,8 +742,8 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer *fb
* First pixel of the framebuffer from
* the start of the normal gtt mapping.
*/
- intel_fb->normal[i].x = x;
- intel_fb->normal[i].y = y;
+ intel_fb->normal_view.color_plane[i].x = x;
+ intel_fb->normal_view.color_plane[i].y = y;
offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
@@ -785,7 +785,7 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
to_i915(plane_state->uapi.plane->dev);
struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct intel_rotation_info *info = &plane_state->view.rotated;
+ struct intel_rotation_info *info = &plane_state->view.gtt.rotated;
unsigned int rotation = plane_state->hw.rotation;
int i, num_planes = fb->format->num_planes;
unsigned int tile_size = intel_tile_size(i915);
@@ -793,8 +793,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
unsigned int src_w, src_h;
u32 gtt_offset = 0;
- memset(&plane_state->view, 0, sizeof(plane_state->view));
- plane_state->view.type = drm_rotation_90_or_270(rotation) ?
+ memset(&plane_state->view.gtt, 0, sizeof(plane_state->view.gtt));
+ plane_state->view.gtt.type = drm_rotation_90_or_270(rotation) ?
I915_GGTT_VIEW_ROTATED : I915_GGTT_VIEW_REMAPPED;
src_x = plane_state->uapi.src.x1 >> 16;
@@ -835,8 +835,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
* First pixel of the src viewport from the
* start of the normal gtt mapping.
*/
- x += intel_fb->normal[i].x;
- y += intel_fb->normal[i].y;
+ x += intel_fb->normal_view.color_plane[i].x;
+ y += intel_fb->normal_view.color_plane[i].y;
offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);
@@ -860,13 +860,13 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
y = r.y1;
pitch_tiles = info->plane[i].height;
- plane_state->color_plane[i].stride = pitch_tiles * tile_height;
+ plane_state->view.color_plane[i].pitch = pitch_tiles * tile_height;
/* rotate the tile dimensions to match the GTT view */
swap(tile_width, tile_height);
} else {
pitch_tiles = info->plane[i].width;
- plane_state->color_plane[i].stride = pitch_tiles * tile_width * cpp;
+ plane_state->view.color_plane[i].pitch = pitch_tiles * tile_width * cpp;
}
/*
@@ -880,9 +880,9 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
gtt_offset += info->plane[i].width * info->plane[i].height;
- plane_state->color_plane[i].offset = 0;
- plane_state->color_plane[i].x = x;
- plane_state->color_plane[i].y = y;
+ plane_state->view.color_plane[i].offset = 0;
+ plane_state->view.color_plane[i].x = x;
+ plane_state->view.color_plane[i].y = y;
}
}
@@ -895,7 +895,7 @@ void intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
view->type = I915_GGTT_VIEW_NORMAL;
if (drm_rotation_90_or_270(rotation)) {
view->type = I915_GGTT_VIEW_ROTATED;
- view->rotated = to_intel_framebuffer(fb)->rot_info;
+ view->rotated = to_intel_framebuffer(fb)->rotated_view.gtt.rotated;
}
}
@@ -917,7 +917,7 @@ static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
return 0;
/* FIXME other color planes? */
- stride = plane_state->color_plane[0].stride;
+ stride = plane_state->view.color_plane[0].pitch;
max_stride = plane->max_stride(plane, fb->format->format,
fb->modifier, rotation);
@@ -955,18 +955,18 @@ int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
return intel_plane_check_stride(plane_state);
}
- intel_fill_fb_ggtt_view(&plane_state->view, &fb->base, rotation);
+ intel_fill_fb_ggtt_view(&plane_state->view.gtt, &fb->base, rotation);
for (i = 0; i < num_planes; i++) {
- plane_state->color_plane[i].stride = intel_fb_pitch(&fb->base, i, rotation);
- plane_state->color_plane[i].offset = 0;
+ plane_state->view.color_plane[i].pitch = intel_fb_pitch(&fb->base, i, rotation);
+ plane_state->view.color_plane[i].offset = 0;
if (drm_rotation_90_or_270(rotation)) {
- plane_state->color_plane[i].x = fb->rotated[i].x;
- plane_state->color_plane[i].y = fb->rotated[i].y;
+ plane_state->view.color_plane[i].x = fb->rotated_view.color_plane[i].x;
+ plane_state->view.color_plane[i].y = fb->rotated_view.color_plane[i].y;
} else {
- plane_state->color_plane[i].x = fb->normal[i].x;
- plane_state->color_plane[i].y = fb->normal[i].y;
+ plane_state->view.color_plane[i].x = fb->normal_view.color_plane[i].x;
+ plane_state->view.color_plane[i].y = fb->normal_view.color_plane[i].y;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index bd1551c694eb3..8ffc883a83c34 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -14,8 +14,11 @@ struct drm_i915_private;
struct i915_ggtt_view;
+struct intel_fb_view;
struct intel_plane_state;
+enum i915_ggtt_view_type;
+
bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 88e02ee3a6312..f95794bda52ed 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -716,8 +716,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
*/
cache->plane.src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
- cache->plane.adjusted_x = plane_state->color_plane[0].x;
- cache->plane.adjusted_y = plane_state->color_plane[0].y;
+ cache->plane.adjusted_x = plane_state->view.color_plane[0].x;
+ cache->plane.adjusted_y = plane_state->view.color_plane[0].y;
cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode;
@@ -725,7 +725,7 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
cache->fb.modifier = fb->modifier;
/* FIXME is this correct? */
- cache->fb.stride = plane_state->color_plane[0].stride;
+ cache->fb.stride = plane_state->view.color_plane[0].pitch;
if (drm_rotation_90_or_270(plane_state->hw.rotation))
cache->fb.stride *= fb->format->cpp[0];
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index af2d617d9eb2b..2ace363f5aac1 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -423,15 +423,15 @@ vlv_update_plane(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
- u32 sprsurf_offset = plane_state->color_plane[0].offset;
+ u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
u32 linear_offset;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
- u32 x = plane_state->color_plane[0].x;
- u32 y = plane_state->color_plane[0].y;
+ u32 x = plane_state->view.color_plane[0].x;
+ u32 y = plane_state->view.color_plane[0].y;
unsigned long irqflags;
u32 sprctl;
@@ -446,7 +446,7 @@ vlv_update_plane(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),
- plane_state->color_plane[0].stride);
+ plane_state->view.color_plane[0].pitch);
intel_de_write_fw(dev_priv, SPPOS(pipe, plane_id),
(crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),
@@ -840,15 +840,15 @@ ivb_update_plane(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
- u32 sprsurf_offset = plane_state->color_plane[0].offset;
+ u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
u32 linear_offset;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
- u32 x = plane_state->color_plane[0].x;
- u32 y = plane_state->color_plane[0].y;
+ u32 x = plane_state->view.color_plane[0].x;
+ u32 y = plane_state->view.color_plane[0].y;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u32 sprctl, sprscale = 0;
@@ -870,7 +870,7 @@ ivb_update_plane(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPRSTRIDE(pipe),
- plane_state->color_plane[0].stride);
+ plane_state->view.color_plane[0].pitch);
intel_de_write_fw(dev_priv, SPRPOS(pipe), (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
if (IS_IVYBRIDGE(dev_priv))
@@ -1168,15 +1168,15 @@ g4x_update_plane(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
- u32 dvssurf_offset = plane_state->color_plane[0].offset;
+ u32 dvssurf_offset = plane_state->view.color_plane[0].offset;
u32 linear_offset;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
- u32 x = plane_state->color_plane[0].x;
- u32 y = plane_state->color_plane[0].y;
+ u32 x = plane_state->view.color_plane[0].x;
+ u32 y = plane_state->view.color_plane[0].y;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u32 dvscntr, dvsscale = 0;
@@ -1198,7 +1198,7 @@ g4x_update_plane(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DVSSTRIDE(pipe),
- plane_state->color_plane[0].stride);
+ plane_state->view.color_plane[0].pitch);
intel_de_write_fw(dev_priv, DVSPOS(pipe), (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, DVSSIZE(pipe), (crtc_h << 16) | crtc_w);
intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale);
@@ -1298,7 +1298,7 @@ g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,
int src_x, src_w, src_h, crtc_w, crtc_h;
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
- unsigned int stride = plane_state->color_plane[0].stride;
+ unsigned int stride = plane_state->view.color_plane[0].pitch;
unsigned int cpp = fb->format->cpp[0];
unsigned int width_bytes;
int min_width, min_height;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 22f7a13020189..e0dc9018d9735 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -582,7 +582,7 @@ static u32 skl_plane_stride(const struct intel_plane_state *plane_state,
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
- u32 stride = plane_state->color_plane[color_plane].stride;
+ u32 stride = plane_state->view.color_plane[color_plane].pitch;
if (color_plane >= fb->format->num_planes)
return 0;
@@ -919,14 +919,14 @@ skl_program_plane(struct intel_plane *plane,
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
- u32 surf_addr = plane_state->color_plane[color_plane].offset;
+ u32 surf_addr = plane_state->view.color_plane[color_plane].offset;
u32 stride = skl_plane_stride(plane_state, color_plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int aux_plane = skl_main_to_aux_plane(fb, color_plane);
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
- u32 x = plane_state->color_plane[color_plane].x;
- u32 y = plane_state->color_plane[color_plane].y;
+ u32 x = plane_state->view.color_plane[color_plane].x;
+ u32 y = plane_state->view.color_plane[color_plane].y;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u8 alpha = plane_state->hw.alpha >> 8;
@@ -958,7 +958,7 @@ skl_program_plane(struct intel_plane *plane,
}
if (aux_plane) {
- aux_dist = plane_state->color_plane[aux_plane].offset - surf_addr;
+ aux_dist = plane_state->view.color_plane[aux_plane].offset - surf_addr;
if (DISPLAY_VER(dev_priv) < 12)
aux_dist |= skl_plane_stride(plane_state, aux_plane);
@@ -1001,7 +1001,8 @@ skl_program_plane(struct intel_plane *plane,
if (DISPLAY_VER(dev_priv) < 11)
intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
- (plane_state->color_plane[1].y << 16) | plane_state->color_plane[1].x);
+ (plane_state->view.color_plane[1].y << 16) |
+ plane_state->view.color_plane[1].x);
if (!drm_atomic_crtc_needs_modeset(&crtc_state->uapi))
intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
@@ -1031,7 +1032,7 @@ skl_plane_async_flip(struct intel_plane *plane,
unsigned long irqflags;
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
- u32 surf_addr = plane_state->color_plane[0].offset;
+ u32 surf_addr = plane_state->view.color_plane[0].offset;
u32 plane_ctl = plane_state->ctl;
plane_ctl |= skl_plane_ctl_crtc(crtc_state);
@@ -1269,9 +1270,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
int ccs_plane)
{
const struct drm_framebuffer *fb = plane_state->hw.fb;
- int aux_x = plane_state->color_plane[ccs_plane].x;
- int aux_y = plane_state->color_plane[ccs_plane].y;
- u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
+ int aux_x = plane_state->view.color_plane[ccs_plane].x;
+ int aux_y = plane_state->view.color_plane[ccs_plane].y;
+ u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
u32 alignment = intel_surf_alignment(fb, ccs_plane);
int hsub;
int vsub;
@@ -1301,9 +1302,9 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
if (aux_x != main_x || aux_y != main_y)
return false;
- plane_state->color_plane[ccs_plane].offset = aux_offset;
- plane_state->color_plane[ccs_plane].x = aux_x;
- plane_state->color_plane[ccs_plane].y = aux_y;
+ plane_state->view.color_plane[ccs_plane].offset = aux_offset;
+ plane_state->view.color_plane[ccs_plane].x = aux_x;
+ plane_state->view.color_plane[ccs_plane].y = aux_y;
return true;
}
@@ -1316,7 +1317,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
const int aux_plane = skl_main_to_aux_plane(fb, 0);
- const u32 aux_offset = plane_state->color_plane[aux_plane].offset;
+ const u32 aux_offset = plane_state->view.color_plane[aux_plane].offset;
const u32 alignment = intel_surf_alignment(fb, 0);
const int w = drm_rect_width(&plane_state->uapi.src) >> 16;
@@ -1344,7 +1345,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
int cpp = fb->format->cpp[0];
- while ((*x + w) * cpp > plane_state->color_plane[0].stride) {
+ while ((*x + w) * cpp > plane_state->view.color_plane[0].pitch) {
if (*offset == 0) {
drm_dbg_kms(&dev_priv->drm,
"Unable to find suitable display surface offset due to X-tiling\n");
@@ -1403,8 +1404,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
offset, offset - alignment);
}
- if (x != plane_state->color_plane[aux_plane].x ||
- y != plane_state->color_plane[aux_plane].y) {
+ if (x != plane_state->view.color_plane[aux_plane].x ||
+ y != plane_state->view.color_plane[aux_plane].y) {
drm_dbg_kms(&dev_priv->drm,
"Unable to find suitable display surface offset due to CCS\n");
return -EINVAL;
@@ -1413,9 +1414,9 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
- plane_state->color_plane[0].offset = offset;
- plane_state->color_plane[0].x = x;
- plane_state->color_plane[0].y = y;
+ plane_state->view.color_plane[0].offset = offset;
+ plane_state->view.color_plane[0].x = x;
+ plane_state->view.color_plane[0].y = y;
/*
* Put the final coordinates back so that the src
@@ -1456,7 +1457,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
if (is_ccs_modifier(fb->modifier)) {
int ccs_plane = main_to_ccs_plane(fb, uv_plane);
- u32 aux_offset = plane_state->color_plane[ccs_plane].offset;
+ u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;
u32 alignment = intel_surf_alignment(fb, uv_plane);
if (offset > aux_offset)
@@ -1477,8 +1478,8 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
offset, offset - alignment);
}
- if (x != plane_state->color_plane[ccs_plane].x ||
- y != plane_state->color_plane[ccs_plane].y) {
+ if (x != plane_state->view.color_plane[ccs_plane].x ||
+ y != plane_state->view.color_plane[ccs_plane].y) {
drm_dbg_kms(&i915->drm,
"Unable to find suitable display surface offset due to CCS\n");
return -EINVAL;
@@ -1487,9 +1488,9 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
- plane_state->color_plane[uv_plane].offset = offset;
- plane_state->color_plane[uv_plane].x = x;
- plane_state->color_plane[uv_plane].y = y;
+ plane_state->view.color_plane[uv_plane].offset = offset;
+ plane_state->view.color_plane[uv_plane].x = x;
+ plane_state->view.color_plane[uv_plane].y = y;
return 0;
}
@@ -1526,13 +1527,9 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state)
plane_state,
ccs_plane);
- plane_state->color_plane[ccs_plane].offset = offset;
- plane_state->color_plane[ccs_plane].x = (x * hsub +
- src_x % hsub) /
- main_hsub;
- plane_state->color_plane[ccs_plane].y = (y * vsub +
- src_y % vsub) /
- main_vsub;
+ plane_state->view.color_plane[ccs_plane].offset = offset;
+ plane_state->view.color_plane[ccs_plane].x = (x * hsub + src_x % hsub) / main_hsub;
+ plane_state->view.color_plane[ccs_plane].y = (y * vsub + src_y % vsub) / main_vsub;
}
return 0;
@@ -1567,10 +1564,10 @@ static int skl_check_plane_surface(struct intel_plane_state *plane_state)
return ret;
}
- for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->color_plane); i++) {
- plane_state->color_plane[i].offset = 0;
- plane_state->color_plane[i].x = 0;
- plane_state->color_plane[i].y = 0;
+ for (i = fb->format->num_planes; i < ARRAY_SIZE(plane_state->view.color_plane); i++) {
+ plane_state->view.color_plane[i].offset = 0;
+ plane_state->view.color_plane[i].x = 0;
+ plane_state->view.color_plane[i].y = 0;
}
ret = skl_check_main_surface(plane_state);
--
2.27.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (34 preceding siblings ...)
2021-03-27 2:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-03-27 22:33 ` Patchwork
2021-03-27 22:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (4 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-27 22:33 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev4)
URL : https://patchwork.freedesktop.org/series/87859/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7f8aa42d58f8 drm/i915: Fix rotation setup during plane HW readout
da8685b5ab0e drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()
050ed8bd287a drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()
f7ab7a353234 drm/i915: Make sure i915_ggtt_view is inited when creating an FB
54177780a12e drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap()
ee05cd39dd80 drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h
-:78: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 95 lines checked
428b08208692 drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c
f6085ad454b5 drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c
6e8d7fa1a6e1 drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c
61d2cd2a1854 drm/i915/intel_fb: Pull FB plane functions from intel_display.c
-:1341: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1341: FILE: drivers/gpu/drm/i915/display/intel_fb.c:435:
+ drm_dbg_kms(&i915->drm,
+ "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
total: 0 errors, 0 warnings, 1 checks, 1780 lines checked
e7c0be630a7b drm/i915/intel_fb: Unexport intel_fb_check_stride()
f6cb9843d256 drm/i915/intel_fb: s/dev_priv/i915/
20d4c79e52e4 drm/i915/intel_fb: Factor out convert_plane_offset_to_xy()
-:67: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#67: FILE: drivers/gpu/drm/i915/display/intel_fb.c:551:
+ (*x + plane_width) * fb->base.format->cpp[color_plane] > fb->base.pitches[color_plane]) {
total: 0 errors, 1 warnings, 0 checks, 92 lines checked
859847278a5b drm/i915/intel_fb: Factor out calc_plane_aligned_offset()
-:25: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#25: FILE: drivers/gpu/drm/i915/display/intel_fb.c:561:
+static u32 calc_plane_aligned_offset(const struct intel_framebuffer *fb, int color_plane, int *x, int *y)
total: 0 errors, 1 warnings, 0 checks, 43 lines checked
f145b820ccfb drm/i915/intel_fb: Factor out calc_plane_normal_size()
-:22: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#22:
- Add back the +1 tile adjustment for x!=0 in calc_plane_normal_size(). (Ville)
total: 0 errors, 1 warnings, 0 checks, 132 lines checked
d305f307559d drm/i915: Unify the FB and plane state view information into one struct
4a36bf1a6c32 drm/i915: Store the normal view FB pitch in FB's intel_fb_view
-:11: WARNING:TYPO_SPELLING: 'retrive' may be misspelled - perhaps 'retrieve'?
#11:
it during FB creation to the FB normal view struct and retrive it from
^^^^^^^
total: 0 errors, 1 warnings, 0 checks, 24 lines checked
00828f1cdef2 drm/i915: Simplify copying the FB view state to the plane state
-:66: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#66: FILE: drivers/gpu/drm/i915/display/intel_fb.c:487:
+static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
total: 0 errors, 1 warnings, 0 checks, 182 lines checked
935e85fd1fef drm/i915/intel_fb: Factor out calc_plane_remap_info()
-:198: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#198: FILE: drivers/gpu/drm/i915/display/intel_fb.c:769:
+ offset, gtt_offset_rotated, x, y,
total: 0 errors, 1 warnings, 0 checks, 256 lines checked
4a0ea0ed0fa1 drm/i915: Shrink the size of intel_remapped_plane_info struct
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'var' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/display/intel_fb.c:616:
+#define assign_chk_ovf(i915, var, val) ({ \
+ drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
+ var = val; \
+})
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'val' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/display/intel_fb.c:616:
+#define assign_chk_ovf(i915, var, val) ({ \
+ drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
+ var = val; \
+})
total: 0 errors, 0 warnings, 2 checks, 62 lines checked
f761e5d5d33f drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap()
-:61: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#61: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:549:
+ expected_pages = rotated_size(&plane_info[0], &plane_info[1]);
total: 0 errors, 1 warnings, 0 checks, 124 lines checked
baed812ca07d drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct
-:37: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#37: FILE: drivers/gpu/drm/i915/display/intel_fb.c:636:
+ assign_chk_ovf(i915, remap_info->src_stride, plane_view_src_stride_tiles(fb, color_plane, dims));
total: 0 errors, 1 warnings, 0 checks, 181 lines checked
05bdbe24aeb7 drm/i915: Add support for FBs requiring a POT stride alignment
-:194: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#194: FILE: drivers/gpu/drm/i915/display/intel_fb.c:807:
+ offset, gtt_offset_remapped, x, y,
total: 0 errors, 1 warnings, 0 checks, 333 lines checked
c18502274537 drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height
-:112: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#112: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:536:
{
+
-:137: WARNING:LONG_LINE: line length of 114 exceeds 100 columns
#137: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:630:
+ expected_pages = remapped_size(view.type, &plane_info[0], &plane_info[1]);
-:178: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#178: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:1018:
+ offset = (x * plane_info[0].dst_stride + y) * PAGE_SIZE;
-:181: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#181: FILE: drivers/gpu/drm/i915/selftests/i915_vma.c:1020:
+ offset = (y * plane_info[0].dst_stride + x) * PAGE_SIZE;
total: 0 errors, 3 warnings, 1 checks, 157 lines checked
e03129edeba3 drm/i915: For-CI: Force remapping the FB with a POT aligned stride
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (35 preceding siblings ...)
2021-03-27 22:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev4) Patchwork
@ 2021-03-27 22:35 ` Patchwork
2021-03-27 22:38 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
` (3 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-27 22:35 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev4)
URL : https://patchwork.freedesktop.org/series/87859/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1329:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_ring_submission.c:1203:24: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/gvt/mmio.c:295:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1434:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1488:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/intel_wakeref.c:137:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (36 preceding siblings ...)
2021-03-27 22:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2021-03-27 22:38 ` Patchwork
2021-03-27 23:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-27 22:38 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev4)
URL : https://patchwork.freedesktop.org/series/87859/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
/home/cidrm/kernel/Documentation/gpu/i915:22: ./drivers/gpu/drm/i915/intel_runtime_pm.c:423: WARNING: Inline strong start-string without end-string.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (37 preceding siblings ...)
2021-03-27 22:38 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
@ 2021-03-27 23:01 ` Patchwork
2021-03-28 0:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-03-29 16:28 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
40 siblings, 0 replies; 53+ messages in thread
From: Patchwork @ 2021-03-27 23:01 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 5608 bytes --]
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev4)
URL : https://patchwork.freedesktop.org/series/87859/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9909 -> Patchwork_19873
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/index.html
Known issues
------------
Here are the changes found in Patchwork_19873 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@query-info:
- fi-bsw-kefka: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/fi-bsw-kefka/igt@amdgpu/amd_basic@query-info.html
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [PASS][2] -> [DMESG-WARN][3] ([i915#402]) +2 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/fi-tgl-y/igt@debugfs_test@read_all_entries.html
#### Possible fixes ####
* igt@i915_selftest@live@execlists:
- fi-bsw-kefka: [INCOMPLETE][4] ([i915#2782] / [i915#2940]) -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/fi-bsw-kefka/igt@i915_selftest@live@execlists.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/fi-bsw-kefka/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@hangcheck:
- {fi-hsw-gt1}: [DMESG-WARN][6] ([i915#3303]) -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
* igt@prime_self_import@basic-with_one_bo_two_files:
- fi-tgl-y: [DMESG-WARN][8] ([i915#402]) -> [PASS][9] +1 similar issue
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
[i915#3278]: https://gitlab.freedesktop.org/drm/intel/issues/3278
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (46 -> 40)
------------------------------
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-skl-guc fi-bsw-cyan fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9909 -> Patchwork_19873
CI-20190529: 20190529
CI_DRM_9909: 3a920a8e00db74289e0bb268c587b11852c1f0b2 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6047: 3887134e739f480cefe1dc7f13eb54f7bf3ca27f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19873: e03129edeba3163e957e3b253a829ff6da9e2879 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e03129edeba3 drm/i915: For-CI: Force remapping the FB with a POT aligned stride
c18502274537 drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height
05bdbe24aeb7 drm/i915: Add support for FBs requiring a POT stride alignment
baed812ca07d drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct
f761e5d5d33f drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap()
4a0ea0ed0fa1 drm/i915: Shrink the size of intel_remapped_plane_info struct
935e85fd1fef drm/i915/intel_fb: Factor out calc_plane_remap_info()
00828f1cdef2 drm/i915: Simplify copying the FB view state to the plane state
4a36bf1a6c32 drm/i915: Store the normal view FB pitch in FB's intel_fb_view
d305f307559d drm/i915: Unify the FB and plane state view information into one struct
f145b820ccfb drm/i915/intel_fb: Factor out calc_plane_normal_size()
859847278a5b drm/i915/intel_fb: Factor out calc_plane_aligned_offset()
20d4c79e52e4 drm/i915/intel_fb: Factor out convert_plane_offset_to_xy()
f6cb9843d256 drm/i915/intel_fb: s/dev_priv/i915/
e7c0be630a7b drm/i915/intel_fb: Unexport intel_fb_check_stride()
61d2cd2a1854 drm/i915/intel_fb: Pull FB plane functions from intel_display.c
6e8d7fa1a6e1 drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c
f6085ad454b5 drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c
428b08208692 drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c
ee05cd39dd80 drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h
54177780a12e drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap()
f7ab7a353234 drm/i915: Make sure i915_ggtt_view is inited when creating an FB
050ed8bd287a drm/i915/selftest: Fix debug message in igt_vma_remapped_gtt()
da8685b5ab0e drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt()
7f8aa42d58f8 drm/i915: Fix rotation setup during plane HW readout
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/index.html
[-- Attachment #1.2: Type: text/html, Size: 6344 bytes --]
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (38 preceding siblings ...)
2021-03-27 23:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-03-28 0:22 ` Patchwork
2021-03-29 15:46 ` Imre Deak
2021-03-29 16:28 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
40 siblings, 1 reply; 53+ messages in thread
From: Patchwork @ 2021-03-28 0:22 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30290 bytes --]
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev4)
URL : https://patchwork.freedesktop.org/series/87859/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9909_full -> Patchwork_19873_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_19873_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19873_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19873_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_ctx_ringsize@active@bcs0:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@gem_ctx_ringsize@active@bcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@gem_ctx_ringsize@active@bcs0.html
* igt@gem_userptr_blits@vma-merge:
- shard-apl: NOTRUN -> [FAIL][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@gem_userptr_blits@vma-merge.html
### Piglit changes ###
#### Possible regressions ####
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2 (NEW):
- {pig-icl-1065g7}: NOTRUN -> [CRASH][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2.html
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint (NEW):
- {pig-icl-1065g7}: NOTRUN -> [INCOMPLETE][5] +7 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint.html
New tests
---------
New tests have been introduced between CI_DRM_9909_full and Patchwork_19873_full:
### New Piglit tests (9) ###
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-asin-vec2:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-degrees-vec4:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2:
- Statuses : 1 crash(s)
- Exec time: [0.50] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-rshift-uint-uint:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitxor-neg-uvec3-uvec3:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-div-uvec3-uvec3:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-rshift-uint-int:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-outerproduct-vec4-vec2:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_19873_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][6] ([i915#3002])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@many-contexts:
- shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2410])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb1/igt@gem_ctx_persistence@many-contexts.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/igt@gem_ctx_persistence@many-contexts.html
* igt@gem_ctx_persistence@smoketest:
- shard-snb: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#1099]) +2 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb7/igt@gem_ctx_persistence@smoketest.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-skl: NOTRUN -> [SKIP][10] ([fdo#109271]) +97 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk: [PASS][11] -> [FAIL][12] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace@rcs0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk9/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-tglb: [PASS][13] -> [FAIL][14] ([i915#2842])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs1.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_flush@basic-wb-rw-default:
- shard-glk: [PASS][15] -> [INCOMPLETE][16] ([i915#2055])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk1/igt@gem_exec_flush@basic-wb-rw-default.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/igt@gem_exec_flush@basic-wb-rw-default.html
* igt@gem_mmap_gtt@cpuset-basic-small-copy-xy:
- shard-iclb: [PASS][17] -> [FAIL][18] ([i915#2428])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
* igt@gem_mmap_gtt@cpuset-medium-copy-odd:
- shard-iclb: [PASS][19] -> [FAIL][20] ([i915#307])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb6/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
* igt@gem_pread@exhaustion:
- shard-apl: NOTRUN -> [WARN][21] ([i915#2658])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@gem_pread@exhaustion.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [PASS][22] -> [DMESG-WARN][23] ([i915#1436] / [i915#716])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@gen9_exec_parse@allowed-all.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@bb-large:
- shard-apl: NOTRUN -> [FAIL][24] ([i915#3296])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@gen9_exec_parse@bb-large.html
* igt@i915_pm_dc@dc6-dpms:
- shard-skl: NOTRUN -> [FAIL][25] ([i915#454])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@i915_pm_dc@dc6-dpms.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][26] ([fdo#110725] / [fdo#111614])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- shard-iclb: NOTRUN -> [SKIP][27] ([fdo#110723])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
* igt@kms_big_joiner@invalid-modeset:
- shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#2705])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_ccs@pipe-a-random-ccs-data:
- shard-iclb: [PASS][29] -> [DMESG-WARN][30] ([i915#3219])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_ccs@pipe-a-random-ccs-data.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/igt@kms_ccs@pipe-a-random-ccs-data.html
* igt@kms_ccs@pipe-b-bad-aux-stride:
- shard-snb: NOTRUN -> [SKIP][31] ([fdo#109271]) +260 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/igt@kms_ccs@pipe-b-bad-aux-stride.html
* igt@kms_ccs@pipe-c-crc-primary-basic:
- shard-skl: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111304])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_ccs@pipe-c-crc-primary-basic.html
* igt@kms_chamelium@dp-audio-edid:
- shard-skl: NOTRUN -> [SKIP][33] ([fdo#109271] / [fdo#111827]) +8 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_chamelium@dp-audio-edid.html
* igt@kms_chamelium@hdmi-hpd-for-each-pipe:
- shard-iclb: NOTRUN -> [SKIP][34] ([fdo#109284] / [fdo#111827]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html
* igt@kms_color@pipe-a-gamma:
- shard-tglb: [PASS][35] -> [FAIL][36] ([i915#1149])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb7/igt@kms_color@pipe-a-gamma.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/igt@kms_color@pipe-a-gamma.html
* igt@kms_color_chamelium@pipe-c-ctm-0-25:
- shard-apl: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827]) +22 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_color_chamelium@pipe-c-ctm-0-25.html
* igt@kms_color_chamelium@pipe-c-ctm-green-to-red:
- shard-snb: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +15 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/igt@kms_color_chamelium@pipe-c-ctm-green-to-red.html
* igt@kms_content_protection@atomic:
- shard-apl: NOTRUN -> [TIMEOUT][39] ([i915#1319]) +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@kms_content_protection@atomic.html
* igt@kms_cursor_crc@pipe-d-cursor-256x256-random:
- shard-iclb: NOTRUN -> [SKIP][40] ([fdo#109278]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_cursor_crc@pipe-d-cursor-256x256-random.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [PASS][41] -> [FAIL][42] ([i915#72])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-iclb: NOTRUN -> [SKIP][43] ([fdo#109274] / [fdo#109278])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: NOTRUN -> [FAIL][44] ([i915#2346])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_draw_crc@draw-method-rgb565-blt-ytiled:
- shard-glk: [PASS][45] -> [FAIL][46] ([i915#52] / [i915#54])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][47] -> [FAIL][48] ([i915#79])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-skl: [PASS][49] -> [FAIL][50] ([i915#79])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@nonexisting-fb@a-edp1:
- shard-skl: [PASS][51] -> [DMESG-WARN][52] ([i915#1982])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_flip@nonexisting-fb@a-edp1.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl4/igt@kms_flip@nonexisting-fb@a-edp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: NOTRUN -> [FAIL][53] ([i915#2122])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
- shard-skl: [PASS][54] -> [FAIL][55] ([i915#2122]) +2 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl2/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2672])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
- shard-apl: NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#2642])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
- shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#2642])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109280]) +3 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [PASS][60] -> [DMESG-WARN][61] ([i915#180]) +1 similar issue
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][62] -> [FAIL][63] ([i915#1188])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_hdr@bpc-switch.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: NOTRUN -> [FAIL][64] ([i915#1188])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- shard-apl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#533]) +4 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-skl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#533])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-apl: [PASS][67] -> [DMESG-WARN][68] ([i915#180])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][69] ([fdo#108145] / [i915#265]) +2 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][70] ([i915#265]) +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
- shard-skl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#658]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
- shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#658]) +5 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html
* igt@kms_psr@psr2_sprite_mmap_cpu:
- shard-iclb: [PASS][74] -> [SKIP][75] ([fdo#109441])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_cpu.html
* igt@kms_psr@sprite_mmap_gtt:
- shard-iclb: [PASS][76] -> [SKIP][77] ([i915#668]) +4 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_psr@sprite_mmap_gtt.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/igt@kms_psr@sprite_mmap_gtt.html
* igt@kms_vblank@pipe-d-ts-continuation-idle:
- shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271]) +216 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_vblank@pipe-d-ts-continuation-idle.html
* igt@kms_writeback@writeback-check-output:
- shard-apl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2437]) +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_writeback@writeback-check-output.html
- shard-skl: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#2437])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_writeback@writeback-check-output.html
* igt@nouveau_crc@pipe-a-source-outp-inactive:
- shard-iclb: NOTRUN -> [SKIP][81] ([i915#2530])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@nouveau_crc@pipe-a-source-outp-inactive.html
* igt@perf@polling-parameterized:
- shard-tglb: [PASS][82] -> [FAIL][83] ([i915#1542])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@perf@polling-parameterized.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/igt@perf@polling-parameterized.html
#### Possible fixes ####
* igt@gem_eio@unwedge-stress:
- shard-tglb: [TIMEOUT][84] ([i915#2369] / [i915#3063]) -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_eio@unwedge-stress.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [FAIL][86] ([i915#2846]) -> [PASS][87]
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-tglb: [FAIL][88] ([i915#2842]) -> [PASS][89]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-glk: [FAIL][90] ([i915#2842]) -> [PASS][91] +2 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
- shard-kbl: [FAIL][92] ([i915#2842]) -> [PASS][93] +2 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-iclb: [FAIL][94] ([i915#2842]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb5/igt@gem_exec_fair@basic-pace@bcs0.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb8/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_mmap_gtt@cpuset-big-copy-xy:
- shard-glk: [FAIL][96] ([i915#307]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk2/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk8/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [DMESG-WARN][98] ([i915#1436] / [i915#716]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl6/igt@gen9_exec_parse@allowed-single.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- shard-skl: [INCOMPLETE][100] ([i915#151]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@i915_pm_rpm@modeset-lpsp-stress.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@i915_pm_rpm@modeset-lpsp-stress.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [FAIL][102] ([i915#2521]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@kms_async_flips@alternate-sync-async-flip.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_color@pipe-a-ctm-0-5:
- shard-skl: [DMESG-WARN][104] ([i915#1982]) -> [PASS][105] +2 similar issues
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@kms_color@pipe-a-ctm-0-5.html
* igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen:
- shard-skl: [FAIL][106] ([i915#54]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-apl: [DMESG-WARN][108] ([i915#180]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip@plain-flip-ts-check@a-edp1:
- shard-skl: [FAIL][110] ([i915#2122]) -> [PASS][111] +1 similar issue
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl10/igt@kms_flip@plain-flip-ts-check@a-edp1.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl3/igt@kms_flip@plain-flip-ts-check@a-edp1.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- shard-skl: [FAIL][112] ([i915#53]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][114] ([fdo#108145] / [i915#265]) -> [PASS][115] +1 similar issue
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_cursor@pipe-c-primary-size-64:
- shard-iclb: [INCOMPLETE][116] -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_plane_cursor@pipe-c-primary-size-64.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_plane_cursor@pipe-c-primary-size-64.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [SKIP][118] ([fdo#109441]) -> [PASS][119] +2 similar issues
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr@psr2_suspend.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/igt@kms_psr@psr2_suspend.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][120] ([i915#2681] / [i915#2684]) -> [WARN][121] ([i915#2684])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][122] ([i915#2681] / [i915#2684]) -> [WARN][123] ([i915#1804] / [i915#2684])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
- shard-iclb: [SKIP][124] ([i915#658]) -> [SKIP][125] ([i915#2920]) +2 similar issues
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
- shard-iclb: [SKIP][126] ([i915#2920]) -> [SKIP][127] ([i915#658]) +2 similar issues
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][128], [FAIL][129]) ([i915#3002]) -> ([FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl2/igt@runner@aborted.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl3/igt@runner@aborted.html
- shard-apl: ([FAIL][134], [FAIL][135], [FAIL][136]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002]) -> [FAIL][137] ([fdo#109271] / [i915#1814])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl6/igt@runner@aborted.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl3/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@runner@aborted.html
- shard-glk: ([FAIL][138], [FAIL][139]) ([i915#3002] / [k.org#202321]) -> ([FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143]) ([i915#2722] / [i915#3002] / [k.org#202321])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@runner@aborte
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/index.html
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^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
2021-03-28 0:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-03-29 15:46 ` Imre Deak
2021-03-29 18:01 ` Vudum, Lakshminarayana
0 siblings, 1 reply; 53+ messages in thread
From: Imre Deak @ 2021-03-29 15:46 UTC (permalink / raw)
To: intel-gfx, Lakshminarayana Vudum
Hi Lakshmi,
On Sun, Mar 28, 2021 at 12:22:46AM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Add support for FBs requiring a POT stride padding (rev4)
> URL : https://patchwork.freedesktop.org/series/87859/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_9909_full -> Patchwork_19873_full
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_19873_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_19873_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_19873_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@gem_ctx_ringsize@active@bcs0:
> - shard-skl: [PASS][1] -> [INCOMPLETE][2]
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@gem_ctx_ringsize@active@bcs0.html
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@gem_ctx_ringsize@active@bcs0.html
This is
<5> [538.363114] Fence expiration time out i915-0000:00:02.0:gem_ctx_ringsiz[5142]:7e20!
> * igt@gem_userptr_blits@vma-merge:
> - shard-apl: NOTRUN -> [FAIL][3]
> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@gem_userptr_blits@vma-merge.html
and this one is
<5>[ 102.393743] Fence expiration time out i915-0000:00:02.0:gem_userptr_bli[1018]:2!
The same timeouts happen now on all IGT runs, see
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Don't zero out the Y plane's watermarks
and
[Intel-gfx] ✗ Fi.CI.IGT: failure for Introduce Intel PXP (rev3)
Looks like it is happening since the
drm/i915: Fail too long user submissions by default
commit merged on Friday.
I'm quite sure now that this change should not affect anything (the
remapping feature is disabled for now). Could we add a ticket for these
failures as a known issue?
> ### Piglit changes ###
>
> #### Possible regressions ####
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2 (NEW):
> - {pig-icl-1065g7}: NOTRUN -> [CRASH][4]
> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2.html
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint (NEW):
> - {pig-icl-1065g7}: NOTRUN -> [INCOMPLETE][5] +7 similar issues
> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint.html
These are new tests, not sure why they are reported as a regression.
Something similar also was reported on
Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Don't zero out the Y plane's watermarks
The tests don't seem to do any modesets (the remapping is disabled in
any case in the change), so I can't see how the failures would be
related. Can we open tickets for these too?
Thanks,
Imre
> New tests
> ---------
>
> New tests have been introduced between CI_DRM_9909_full and Patchwork_19873_full:
>
> ### New Piglit tests (9) ###
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-asin-vec2:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-degrees-vec4:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2:
> - Statuses : 1 crash(s)
> - Exec time: [0.50] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-rshift-uint-uint:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitxor-neg-uvec3-uvec3:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-div-uvec3-uvec3:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-rshift-uint-int:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-outerproduct-vec4-vec2:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
>
>
> Known issues
> ------------
>
> Here are the changes found in Patchwork_19873_full that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@gem_create@create-massive:
> - shard-skl: NOTRUN -> [DMESG-WARN][6] ([i915#3002])
> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@gem_create@create-massive.html
>
> * igt@gem_ctx_persistence@many-contexts:
> - shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2410])
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb1/igt@gem_ctx_persistence@many-contexts.html
> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/igt@gem_ctx_persistence@many-contexts.html
>
> * igt@gem_ctx_persistence@smoketest:
> - shard-snb: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#1099]) +2 similar issues
> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb7/igt@gem_ctx_persistence@smoketest.html
>
> * igt@gem_exec_fair@basic-flow@rcs0:
> - shard-skl: NOTRUN -> [SKIP][10] ([fdo#109271]) +97 similar issues
> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@gem_exec_fair@basic-flow@rcs0.html
>
> * igt@gem_exec_fair@basic-pace@rcs0:
> - shard-glk: [PASS][11] -> [FAIL][12] ([i915#2842])
> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace@rcs0.html
> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk9/igt@gem_exec_fair@basic-pace@rcs0.html
>
> * igt@gem_exec_fair@basic-pace@vcs1:
> - shard-tglb: [PASS][13] -> [FAIL][14] ([i915#2842])
> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs1.html
> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/igt@gem_exec_fair@basic-pace@vcs1.html
>
> * igt@gem_exec_flush@basic-wb-rw-default:
> - shard-glk: [PASS][15] -> [INCOMPLETE][16] ([i915#2055])
> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk1/igt@gem_exec_flush@basic-wb-rw-default.html
> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/igt@gem_exec_flush@basic-wb-rw-default.html
>
> * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy:
> - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#2428])
> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
>
> * igt@gem_mmap_gtt@cpuset-medium-copy-odd:
> - shard-iclb: [PASS][19] -> [FAIL][20] ([i915#307])
> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb6/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
>
> * igt@gem_pread@exhaustion:
> - shard-apl: NOTRUN -> [WARN][21] ([i915#2658])
> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@gem_pread@exhaustion.html
>
> * igt@gen9_exec_parse@allowed-all:
> - shard-glk: [PASS][22] -> [DMESG-WARN][23] ([i915#1436] / [i915#716])
> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@gen9_exec_parse@allowed-all.html
> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@gen9_exec_parse@allowed-all.html
>
> * igt@gen9_exec_parse@bb-large:
> - shard-apl: NOTRUN -> [FAIL][24] ([i915#3296])
> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@gen9_exec_parse@bb-large.html
>
> * igt@i915_pm_dc@dc6-dpms:
> - shard-skl: NOTRUN -> [FAIL][25] ([i915#454])
> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@i915_pm_dc@dc6-dpms.html
>
> * igt@kms_big_fb@linear-8bpp-rotate-90:
> - shard-iclb: NOTRUN -> [SKIP][26] ([fdo#110725] / [fdo#111614])
> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_big_fb@linear-8bpp-rotate-90.html
>
> * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
> - shard-iclb: NOTRUN -> [SKIP][27] ([fdo#110723])
> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
>
> * igt@kms_big_joiner@invalid-modeset:
> - shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#2705])
> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_big_joiner@invalid-modeset.html
>
> * igt@kms_ccs@pipe-a-random-ccs-data:
> - shard-iclb: [PASS][29] -> [DMESG-WARN][30] ([i915#3219])
> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_ccs@pipe-a-random-ccs-data.html
> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/igt@kms_ccs@pipe-a-random-ccs-data.html
>
> * igt@kms_ccs@pipe-b-bad-aux-stride:
> - shard-snb: NOTRUN -> [SKIP][31] ([fdo#109271]) +260 similar issues
> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/igt@kms_ccs@pipe-b-bad-aux-stride.html
>
> * igt@kms_ccs@pipe-c-crc-primary-basic:
> - shard-skl: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111304])
> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_ccs@pipe-c-crc-primary-basic.html
>
> * igt@kms_chamelium@dp-audio-edid:
> - shard-skl: NOTRUN -> [SKIP][33] ([fdo#109271] / [fdo#111827]) +8 similar issues
> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_chamelium@dp-audio-edid.html
>
> * igt@kms_chamelium@hdmi-hpd-for-each-pipe:
> - shard-iclb: NOTRUN -> [SKIP][34] ([fdo#109284] / [fdo#111827]) +2 similar issues
> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html
>
> * igt@kms_color@pipe-a-gamma:
> - shard-tglb: [PASS][35] -> [FAIL][36] ([i915#1149])
> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb7/igt@kms_color@pipe-a-gamma.html
> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/igt@kms_color@pipe-a-gamma.html
>
> * igt@kms_color_chamelium@pipe-c-ctm-0-25:
> - shard-apl: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827]) +22 similar issues
> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_color_chamelium@pipe-c-ctm-0-25.html
>
> * igt@kms_color_chamelium@pipe-c-ctm-green-to-red:
> - shard-snb: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +15 similar issues
> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/igt@kms_color_chamelium@pipe-c-ctm-green-to-red.html
>
> * igt@kms_content_protection@atomic:
> - shard-apl: NOTRUN -> [TIMEOUT][39] ([i915#1319]) +1 similar issue
> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@kms_content_protection@atomic.html
>
> * igt@kms_cursor_crc@pipe-d-cursor-256x256-random:
> - shard-iclb: NOTRUN -> [SKIP][40] ([fdo#109278]) +1 similar issue
> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_cursor_crc@pipe-d-cursor-256x256-random.html
>
> * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
> - shard-glk: [PASS][41] -> [FAIL][42] ([i915#72])
> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
>
> * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
> - shard-iclb: NOTRUN -> [SKIP][43] ([fdo#109274] / [fdo#109278])
> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
>
> * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
> - shard-skl: NOTRUN -> [FAIL][44] ([i915#2346])
> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
>
> * igt@kms_draw_crc@draw-method-rgb565-blt-ytiled:
> - shard-glk: [PASS][45] -> [FAIL][46] ([i915#52] / [i915#54])
> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
>
> * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
> - shard-glk: [PASS][47] -> [FAIL][48] ([i915#79])
> [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
> [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
>
> * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
> - shard-skl: [PASS][49] -> [FAIL][50] ([i915#79])
> [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
> [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
>
> * igt@kms_flip@nonexisting-fb@a-edp1:
> - shard-skl: [PASS][51] -> [DMESG-WARN][52] ([i915#1982])
> [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_flip@nonexisting-fb@a-edp1.html
> [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl4/igt@kms_flip@nonexisting-fb@a-edp1.html
>
> * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
> - shard-skl: NOTRUN -> [FAIL][53] ([i915#2122])
> [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
>
> * igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
> - shard-skl: [PASS][54] -> [FAIL][55] ([i915#2122]) +2 similar issues
> [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
> [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl2/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
> - shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2672])
> [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
> - shard-apl: NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#2642])
> [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
> - shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#2642])
> [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
> - shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109280]) +3 similar issues
> [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
>
> * igt@kms_frontbuffer_tracking@fbc-suspend:
> - shard-kbl: [PASS][60] -> [DMESG-WARN][61] ([i915#180]) +1 similar issue
> [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
> [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
>
> * igt@kms_hdr@bpc-switch:
> - shard-skl: [PASS][62] -> [FAIL][63] ([i915#1188])
> [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_hdr@bpc-switch.html
> [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/igt@kms_hdr@bpc-switch.html
>
> * igt@kms_hdr@bpc-switch-dpms:
> - shard-skl: NOTRUN -> [FAIL][64] ([i915#1188])
> [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html
>
> * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
> - shard-apl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#533]) +4 similar issues
> [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
>
> * igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
> - shard-skl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#533])
> [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
>
> * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
> - shard-apl: [PASS][67] -> [DMESG-WARN][68] ([i915#180])
> [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
> [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
>
> * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
> - shard-apl: NOTRUN -> [FAIL][69] ([fdo#108145] / [i915#265]) +2 similar issues
> [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
>
> * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
> - shard-apl: NOTRUN -> [FAIL][70] ([i915#265]) +1 similar issue
> [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
>
> * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
> - shard-skl: NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265])
> [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>
> * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
> - shard-skl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#658]) +1 similar issue
> [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
>
> * igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
> - shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#658]) +5 similar issues
> [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html
>
> * igt@kms_psr@psr2_sprite_mmap_cpu:
> - shard-iclb: [PASS][74] -> [SKIP][75] ([fdo#109441])
> [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
> [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_cpu.html
>
> * igt@kms_psr@sprite_mmap_gtt:
> - shard-iclb: [PASS][76] -> [SKIP][77] ([i915#668]) +4 similar issues
> [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_psr@sprite_mmap_gtt.html
> [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/igt@kms_psr@sprite_mmap_gtt.html
>
> * igt@kms_vblank@pipe-d-ts-continuation-idle:
> - shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271]) +216 similar issues
> [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_vblank@pipe-d-ts-continuation-idle.html
>
> * igt@kms_writeback@writeback-check-output:
> - shard-apl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2437]) +1 similar issue
> [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_writeback@writeback-check-output.html
> - shard-skl: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#2437])
> [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_writeback@writeback-check-output.html
>
> * igt@nouveau_crc@pipe-a-source-outp-inactive:
> - shard-iclb: NOTRUN -> [SKIP][81] ([i915#2530])
> [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@nouveau_crc@pipe-a-source-outp-inactive.html
>
> * igt@perf@polling-parameterized:
> - shard-tglb: [PASS][82] -> [FAIL][83] ([i915#1542])
> [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@perf@polling-parameterized.html
> [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/igt@perf@polling-parameterized.html
>
>
> #### Possible fixes ####
>
> * igt@gem_eio@unwedge-stress:
> - shard-tglb: [TIMEOUT][84] ([i915#2369] / [i915#3063]) -> [PASS][85]
> [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_eio@unwedge-stress.html
> [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/igt@gem_eio@unwedge-stress.html
>
> * igt@gem_exec_fair@basic-deadline:
> - shard-kbl: [FAIL][86] ([i915#2846]) -> [PASS][87]
> [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
> [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
>
> * igt@gem_exec_fair@basic-none-share@rcs0:
> - shard-tglb: [FAIL][88] ([i915#2842]) -> [PASS][89]
> [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
> [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/igt@gem_exec_fair@basic-none-share@rcs0.html
>
> * igt@gem_exec_fair@basic-pace-solo@rcs0:
> - shard-glk: [FAIL][90] ([i915#2842]) -> [PASS][91] +2 similar issues
> [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> - shard-kbl: [FAIL][92] ([i915#2842]) -> [PASS][93] +2 similar issues
> [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
>
> * igt@gem_exec_fair@basic-pace@bcs0:
> - shard-iclb: [FAIL][94] ([i915#2842]) -> [PASS][95]
> [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb5/igt@gem_exec_fair@basic-pace@bcs0.html
> [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb8/igt@gem_exec_fair@basic-pace@bcs0.html
>
> * igt@gem_mmap_gtt@cpuset-big-copy-xy:
> - shard-glk: [FAIL][96] ([i915#307]) -> [PASS][97]
> [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk2/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
> [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk8/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
>
> * igt@gen9_exec_parse@allowed-single:
> - shard-skl: [DMESG-WARN][98] ([i915#1436] / [i915#716]) -> [PASS][99]
> [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl6/igt@gen9_exec_parse@allowed-single.html
> [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@gen9_exec_parse@allowed-single.html
>
> * igt@i915_pm_rpm@modeset-lpsp-stress:
> - shard-skl: [INCOMPLETE][100] ([i915#151]) -> [PASS][101]
> [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@i915_pm_rpm@modeset-lpsp-stress.html
> [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@i915_pm_rpm@modeset-lpsp-stress.html
>
> * igt@kms_async_flips@alternate-sync-async-flip:
> - shard-skl: [FAIL][102] ([i915#2521]) -> [PASS][103]
> [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@kms_async_flips@alternate-sync-async-flip.html
> [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@kms_async_flips@alternate-sync-async-flip.html
>
> * igt@kms_color@pipe-a-ctm-0-5:
> - shard-skl: [DMESG-WARN][104] ([i915#1982]) -> [PASS][105] +2 similar issues
> [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html
> [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@kms_color@pipe-a-ctm-0-5.html
>
> * igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen:
> - shard-skl: [FAIL][106] ([i915#54]) -> [PASS][107]
> [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
> [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
>
> * igt@kms_flip@flip-vs-suspend@c-dp1:
> - shard-apl: [DMESG-WARN][108] ([i915#180]) -> [PASS][109]
> [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
> [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/igt@kms_flip@flip-vs-suspend@c-dp1.html
>
> * igt@kms_flip@plain-flip-ts-check@a-edp1:
> - shard-skl: [FAIL][110] ([i915#2122]) -> [PASS][111] +1 similar issue
> [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl10/igt@kms_flip@plain-flip-ts-check@a-edp1.html
> [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl3/igt@kms_flip@plain-flip-ts-check@a-edp1.html
>
> * igt@kms_pipe_crc_basic@read-crc-pipe-c:
> - shard-skl: [FAIL][112] ([i915#53]) -> [PASS][113]
> [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
> [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
>
> * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
> - shard-skl: [FAIL][114] ([fdo#108145] / [i915#265]) -> [PASS][115] +1 similar issue
> [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
> [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
>
> * igt@kms_plane_cursor@pipe-c-primary-size-64:
> - shard-iclb: [INCOMPLETE][116] -> [PASS][117]
> [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_plane_cursor@pipe-c-primary-size-64.html
> [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_plane_cursor@pipe-c-primary-size-64.html
>
> * igt@kms_psr@psr2_suspend:
> - shard-iclb: [SKIP][118] ([fdo#109441]) -> [PASS][119] +2 similar issues
> [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr@psr2_suspend.html
> [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/igt@kms_psr@psr2_suspend.html
>
>
> #### Warnings ####
>
> * igt@i915_pm_rc6_residency@rc6-fence:
> - shard-iclb: [WARN][120] ([i915#2681] / [i915#2684]) -> [WARN][121] ([i915#2684])
> [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
> [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/igt@i915_pm_rc6_residency@rc6-fence.html
>
> * igt@i915_pm_rc6_residency@rc6-idle:
> - shard-iclb: [WARN][122] ([i915#2681] / [i915#2684]) -> [WARN][123] ([i915#1804] / [i915#2684])
> [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
> [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
>
> * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
> - shard-iclb: [SKIP][124] ([i915#658]) -> [SKIP][125] ([i915#2920]) +2 similar issues
> [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
> [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
>
> * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
> - shard-iclb: [SKIP][126] ([i915#2920]) -> [SKIP][127] ([i915#658]) +2 similar issues
> [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
> [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
>
> * igt@runner@aborted:
> - shard-kbl: ([FAIL][128], [FAIL][129]) ([i915#3002]) -> ([FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002])
> [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
> [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
> [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
> [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
> [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl2/igt@runner@aborted.html
> [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl3/igt@runner@aborted.html
> - shard-apl: ([FAIL][134], [FAIL][135], [FAIL][136]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002]) -> [FAIL][137] ([fdo#109271] / [i915#1814])
> [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl6/igt@runner@aborted.html
> [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@runner@aborted.html
> [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl3/igt@runner@aborted.html
> [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@runner@aborted.html
> - shard-glk: ([FAIL][138], [FAIL][139]) ([i915#3002] / [k.org#202321]) -> ([FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143]) ([i915#2722] / [i915#3002] / [k.org#202321])
> [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@runner@aborted.html
> [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@runner@aborted.html
> [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/igt@runner@aborted.html
> [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@runner@aborte
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
` (39 preceding siblings ...)
2021-03-28 0:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-03-29 16:28 ` Patchwork
2021-03-29 20:48 ` Imre Deak
40 siblings, 1 reply; 53+ messages in thread
From: Patchwork @ 2021-03-29 16:28 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30290 bytes --]
== Series Details ==
Series: drm/i915: Add support for FBs requiring a POT stride padding (rev4)
URL : https://patchwork.freedesktop.org/series/87859/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9909_full -> Patchwork_19873_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19873_full:
### Piglit changes ###
#### Possible regressions ####
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2 (NEW):
- {pig-icl-1065g7}: NOTRUN -> [CRASH][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2.html
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint (NEW):
- {pig-icl-1065g7}: NOTRUN -> [INCOMPLETE][2] +7 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint.html
New tests
---------
New tests have been introduced between CI_DRM_9909_full and Patchwork_19873_full:
### New Piglit tests (9) ###
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-asin-vec2:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-degrees-vec4:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2:
- Statuses : 1 crash(s)
- Exec time: [0.50] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-rshift-uint-uint:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitxor-neg-uvec3-uvec3:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-div-uvec3-uvec3:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-rshift-uint-int:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_tessellation_shader@execution@built-in-functions@tcs-outerproduct-vec4-vec2:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_19873_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][3] ([i915#3002])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@many-contexts:
- shard-tglb: [PASS][4] -> [FAIL][5] ([i915#2410])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb1/igt@gem_ctx_persistence@many-contexts.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/igt@gem_ctx_persistence@many-contexts.html
* igt@gem_ctx_persistence@smoketest:
- shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +2 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb7/igt@gem_ctx_persistence@smoketest.html
* igt@gem_ctx_ringsize@active@bcs0:
- shard-skl: [PASS][7] -> [INCOMPLETE][8] ([i915#3316])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@gem_ctx_ringsize@active@bcs0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@gem_ctx_ringsize@active@bcs0.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-skl: NOTRUN -> [SKIP][9] ([fdo#109271]) +97 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace@rcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk9/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-tglb: [PASS][12] -> [FAIL][13] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs1.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_flush@basic-wb-rw-default:
- shard-glk: [PASS][14] -> [INCOMPLETE][15] ([i915#2055])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk1/igt@gem_exec_flush@basic-wb-rw-default.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/igt@gem_exec_flush@basic-wb-rw-default.html
* igt@gem_mmap_gtt@cpuset-basic-small-copy-xy:
- shard-iclb: [PASS][16] -> [FAIL][17] ([i915#2428])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
* igt@gem_mmap_gtt@cpuset-medium-copy-odd:
- shard-iclb: [PASS][18] -> [FAIL][19] ([i915#307])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb6/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
* igt@gem_pread@exhaustion:
- shard-apl: NOTRUN -> [WARN][20] ([i915#2658])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@gem_pread@exhaustion.html
* igt@gem_userptr_blits@vma-merge:
- shard-apl: NOTRUN -> [FAIL][21] ([i915#3318])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@gem_userptr_blits@vma-merge.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [PASS][22] -> [DMESG-WARN][23] ([i915#1436] / [i915#716])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@gen9_exec_parse@allowed-all.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@bb-large:
- shard-apl: NOTRUN -> [FAIL][24] ([i915#3296])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@gen9_exec_parse@bb-large.html
* igt@i915_pm_dc@dc6-dpms:
- shard-skl: NOTRUN -> [FAIL][25] ([i915#454])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@i915_pm_dc@dc6-dpms.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][26] ([fdo#110725] / [fdo#111614])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- shard-iclb: NOTRUN -> [SKIP][27] ([fdo#110723])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
* igt@kms_big_joiner@invalid-modeset:
- shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#2705])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_ccs@pipe-a-random-ccs-data:
- shard-iclb: [PASS][29] -> [DMESG-WARN][30] ([i915#3219])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_ccs@pipe-a-random-ccs-data.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/igt@kms_ccs@pipe-a-random-ccs-data.html
* igt@kms_ccs@pipe-b-bad-aux-stride:
- shard-snb: NOTRUN -> [SKIP][31] ([fdo#109271]) +260 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/igt@kms_ccs@pipe-b-bad-aux-stride.html
* igt@kms_ccs@pipe-c-crc-primary-basic:
- shard-skl: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111304])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_ccs@pipe-c-crc-primary-basic.html
* igt@kms_chamelium@dp-audio-edid:
- shard-skl: NOTRUN -> [SKIP][33] ([fdo#109271] / [fdo#111827]) +8 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_chamelium@dp-audio-edid.html
* igt@kms_chamelium@hdmi-hpd-for-each-pipe:
- shard-iclb: NOTRUN -> [SKIP][34] ([fdo#109284] / [fdo#111827]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html
* igt@kms_color@pipe-a-gamma:
- shard-tglb: [PASS][35] -> [FAIL][36] ([i915#1149])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb7/igt@kms_color@pipe-a-gamma.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/igt@kms_color@pipe-a-gamma.html
* igt@kms_color_chamelium@pipe-c-ctm-0-25:
- shard-apl: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827]) +22 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_color_chamelium@pipe-c-ctm-0-25.html
* igt@kms_color_chamelium@pipe-c-ctm-green-to-red:
- shard-snb: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +15 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/igt@kms_color_chamelium@pipe-c-ctm-green-to-red.html
* igt@kms_content_protection@atomic:
- shard-apl: NOTRUN -> [TIMEOUT][39] ([i915#1319]) +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@kms_content_protection@atomic.html
* igt@kms_cursor_crc@pipe-d-cursor-256x256-random:
- shard-iclb: NOTRUN -> [SKIP][40] ([fdo#109278]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_cursor_crc@pipe-d-cursor-256x256-random.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [PASS][41] -> [FAIL][42] ([i915#72])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-iclb: NOTRUN -> [SKIP][43] ([fdo#109274] / [fdo#109278])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: NOTRUN -> [FAIL][44] ([i915#2346])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_draw_crc@draw-method-rgb565-blt-ytiled:
- shard-glk: [PASS][45] -> [FAIL][46] ([i915#52] / [i915#54])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][47] -> [FAIL][48] ([i915#79])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-skl: [PASS][49] -> [FAIL][50] ([i915#79])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@nonexisting-fb@a-edp1:
- shard-skl: [PASS][51] -> [DMESG-WARN][52] ([i915#1982])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_flip@nonexisting-fb@a-edp1.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl4/igt@kms_flip@nonexisting-fb@a-edp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: NOTRUN -> [FAIL][53] ([i915#2122])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
- shard-skl: [PASS][54] -> [FAIL][55] ([i915#2122]) +2 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl2/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2672])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
- shard-apl: NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#2642])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
- shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#2642])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109280]) +3 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [PASS][60] -> [DMESG-WARN][61] ([i915#180]) +1 similar issue
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][62] -> [FAIL][63] ([i915#1188])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_hdr@bpc-switch.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: NOTRUN -> [FAIL][64] ([i915#1188])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- shard-apl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#533]) +4 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-skl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#533])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-apl: [PASS][67] -> [DMESG-WARN][68] ([i915#180])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][69] ([fdo#108145] / [i915#265]) +2 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][70] ([i915#265]) +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
- shard-skl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#658]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
- shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#658]) +5 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html
* igt@kms_psr@psr2_sprite_mmap_cpu:
- shard-iclb: [PASS][74] -> [SKIP][75] ([fdo#109441])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_cpu.html
* igt@kms_psr@sprite_mmap_gtt:
- shard-iclb: [PASS][76] -> [SKIP][77] ([i915#668]) +4 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_psr@sprite_mmap_gtt.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/igt@kms_psr@sprite_mmap_gtt.html
* igt@kms_vblank@pipe-d-ts-continuation-idle:
- shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271]) +216 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_vblank@pipe-d-ts-continuation-idle.html
* igt@kms_writeback@writeback-check-output:
- shard-apl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2437]) +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_writeback@writeback-check-output.html
- shard-skl: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#2437])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_writeback@writeback-check-output.html
* igt@nouveau_crc@pipe-a-source-outp-inactive:
- shard-iclb: NOTRUN -> [SKIP][81] ([i915#2530])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@nouveau_crc@pipe-a-source-outp-inactive.html
* igt@perf@polling-parameterized:
- shard-tglb: [PASS][82] -> [FAIL][83] ([i915#1542])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@perf@polling-parameterized.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/igt@perf@polling-parameterized.html
#### Possible fixes ####
* igt@gem_eio@unwedge-stress:
- shard-tglb: [TIMEOUT][84] ([i915#2369] / [i915#3063]) -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_eio@unwedge-stress.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [FAIL][86] ([i915#2846]) -> [PASS][87]
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-tglb: [FAIL][88] ([i915#2842]) -> [PASS][89]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-glk: [FAIL][90] ([i915#2842]) -> [PASS][91] +2 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
- shard-kbl: [FAIL][92] ([i915#2842]) -> [PASS][93] +2 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-iclb: [FAIL][94] ([i915#2842]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb5/igt@gem_exec_fair@basic-pace@bcs0.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb8/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_mmap_gtt@cpuset-big-copy-xy:
- shard-glk: [FAIL][96] ([i915#307]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk2/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk8/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [DMESG-WARN][98] ([i915#1436] / [i915#716]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl6/igt@gen9_exec_parse@allowed-single.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- shard-skl: [INCOMPLETE][100] ([i915#151]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@i915_pm_rpm@modeset-lpsp-stress.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@i915_pm_rpm@modeset-lpsp-stress.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [FAIL][102] ([i915#2521]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@kms_async_flips@alternate-sync-async-flip.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_color@pipe-a-ctm-0-5:
- shard-skl: [DMESG-WARN][104] ([i915#1982]) -> [PASS][105] +2 similar issues
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@kms_color@pipe-a-ctm-0-5.html
* igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen:
- shard-skl: [FAIL][106] ([i915#54]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-apl: [DMESG-WARN][108] ([i915#180]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip@plain-flip-ts-check@a-edp1:
- shard-skl: [FAIL][110] ([i915#2122]) -> [PASS][111] +1 similar issue
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl10/igt@kms_flip@plain-flip-ts-check@a-edp1.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl3/igt@kms_flip@plain-flip-ts-check@a-edp1.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- shard-skl: [FAIL][112] ([i915#53]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][114] ([fdo#108145] / [i915#265]) -> [PASS][115] +1 similar issue
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_cursor@pipe-c-primary-size-64:
- shard-iclb: [INCOMPLETE][116] -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_plane_cursor@pipe-c-primary-size-64.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_plane_cursor@pipe-c-primary-size-64.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [SKIP][118] ([fdo#109441]) -> [PASS][119] +2 similar issues
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr@psr2_suspend.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/igt@kms_psr@psr2_suspend.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][120] ([i915#2681] / [i915#2684]) -> [WARN][121] ([i915#2684])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][122] ([i915#2681] / [i915#2684]) -> [WARN][123] ([i915#1804] / [i915#2684])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
- shard-iclb: [SKIP][124] ([i915#658]) -> [SKIP][125] ([i915#2920]) +2 similar issues
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
- shard-iclb: [SKIP][126] ([i915#2920]) -> [SKIP][127] ([i915#658]) +2 similar issues
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][128], [FAIL][129]) ([i915#3002]) -> ([FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl2/igt@runner@aborted.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl3/igt@runner@aborted.html
- shard-apl: ([FAIL][134], [FAIL][135], [FAIL][136]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002]) -> [FAIL][137] ([fdo#109271] / [i915#1814])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl6/igt@runner@aborted.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl3/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@runner@aborted.html
- shard-glk: ([FAIL][138], [FAIL][139]) ([i915#3002] / [k.org#202321]) -> ([FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143]) ([i915#2722] / [i915#3002] / [k.org#202321])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@runner@aborted.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@runner@aborted.html
- shard-skl: ([FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149]) ([i915#1436] / [i915#181
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/index.html
[-- Attachment #1.2: Type: text/html, Size: 33460 bytes --]
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
2021-03-29 15:46 ` Imre Deak
@ 2021-03-29 18:01 ` Vudum, Lakshminarayana
0 siblings, 0 replies; 53+ messages in thread
From: Vudum, Lakshminarayana @ 2021-03-29 18:01 UTC (permalink / raw)
To: Deak, Imre, intel-gfx
Re-reported.
-----Original Message-----
From: Deak, Imre <imre.deak@intel.com>
Sent: Monday, March 29, 2021 8:47 AM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
Hi Lakshmi,
On Sun, Mar 28, 2021 at 12:22:46AM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Add support for FBs requiring a POT stride padding (rev4)
> URL : https://patchwork.freedesktop.org/series/87859/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_9909_full -> Patchwork_19873_full
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_19873_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_19873_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_19873_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@gem_ctx_ringsize@active@bcs0:
> - shard-skl: [PASS][1] -> [INCOMPLETE][2]
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@gem_ctx_ringsize@active@bcs0.html
> [2]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/ig
> t@gem_ctx_ringsize@active@bcs0.html
This is
<5> [538.363114] Fence expiration time out i915-0000:00:02.0:gem_ctx_ringsiz[5142]:7e20!
> * igt@gem_userptr_blits@vma-merge:
> - shard-apl: NOTRUN -> [FAIL][3]
> [3]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/ig
> t@gem_userptr_blits@vma-merge.html
and this one is
<5>[ 102.393743] Fence expiration time out i915-0000:00:02.0:gem_userptr_bli[1018]:2!
The same timeouts happen now on all IGT runs, see
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Don't zero out the Y plane's watermarks and
[Intel-gfx] ✗ Fi.CI.IGT: failure for Introduce Intel PXP (rev3)
Looks like it is happening since the
drm/i915: Fail too long user submissions by default
commit merged on Friday.
I'm quite sure now that this change should not affect anything (the remapping feature is disabled for now). Could we add a ticket for these failures as a known issue?
> ### Piglit changes ###
>
> #### Possible regressions ####
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2 (NEW):
> - {pig-icl-1065g7}: NOTRUN -> [CRASH][4]
> [4]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g
> 7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-ass
> ign-lshift-uvec2-uvec2.html
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint (NEW):
> - {pig-icl-1065g7}: NOTRUN -> [INCOMPLETE][5] +7 similar issues
> [5]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g
> 7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bit
> or-neg-uint-uint.html
These are new tests, not sure why they are reported as a regression.
Something similar also was reported on
Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Don't zero out the Y plane's watermarks
The tests don't seem to do any modesets (the remapping is disabled in any case in the change), so I can't see how the failures would be related. Can we open tickets for these too?
Thanks,
Imre
> New tests
> ---------
>
> New tests have been introduced between CI_DRM_9909_full and Patchwork_19873_full:
>
> ### New Piglit tests (9) ###
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-asin-vec2:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-degrees-vec4:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2:
> - Statuses : 1 crash(s)
> - Exec time: [0.50] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-rshift-uint-uint:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitxor-neg-uvec3-uvec3:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-div-uvec3-uvec3:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-rshift-uint-int:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-outerproduct-vec4-vec2:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
>
>
> Known issues
> ------------
>
> Here are the changes found in Patchwork_19873_full that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@gem_create@create-massive:
> - shard-skl: NOTRUN -> [DMESG-WARN][6] ([i915#3002])
> [6]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/i
> gt@gem_create@create-massive.html
>
> * igt@gem_ctx_persistence@many-contexts:
> - shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2410])
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb1/igt@gem_ctx_persistence@many-contexts.html
> [8]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/i
> gt@gem_ctx_persistence@many-contexts.html
>
> * igt@gem_ctx_persistence@smoketest:
> - shard-snb: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#1099]) +2 similar issues
> [9]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb7/ig
> t@gem_ctx_persistence@smoketest.html
>
> * igt@gem_exec_fair@basic-flow@rcs0:
> - shard-skl: NOTRUN -> [SKIP][10] ([fdo#109271]) +97 similar issues
> [10]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/ig
> t@gem_exec_fair@basic-flow@rcs0.html
>
> * igt@gem_exec_fair@basic-pace@rcs0:
> - shard-glk: [PASS][11] -> [FAIL][12] ([i915#2842])
> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace@rcs0.html
> [12]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk9/ig
> t@gem_exec_fair@basic-pace@rcs0.html
>
> * igt@gem_exec_fair@basic-pace@vcs1:
> - shard-tglb: [PASS][13] -> [FAIL][14] ([i915#2842])
> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs1.html
> [14]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/i
> gt@gem_exec_fair@basic-pace@vcs1.html
>
> * igt@gem_exec_flush@basic-wb-rw-default:
> - shard-glk: [PASS][15] -> [INCOMPLETE][16] ([i915#2055])
> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk1/igt@gem_exec_flush@basic-wb-rw-default.html
> [16]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/ig
> t@gem_exec_flush@basic-wb-rw-default.html
>
> * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy:
> - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#2428])
> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
> [18]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/i
> gt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
>
> * igt@gem_mmap_gtt@cpuset-medium-copy-odd:
> - shard-iclb: [PASS][19] -> [FAIL][20] ([i915#307])
> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb6/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
> [20]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/i
> gt@gem_mmap_gtt@cpuset-medium-copy-odd.html
>
> * igt@gem_pread@exhaustion:
> - shard-apl: NOTRUN -> [WARN][21] ([i915#2658])
> [21]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/ig
> t@gem_pread@exhaustion.html
>
> * igt@gen9_exec_parse@allowed-all:
> - shard-glk: [PASS][22] -> [DMESG-WARN][23] ([i915#1436] / [i915#716])
> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@gen9_exec_parse@allowed-all.html
> [23]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/ig
> t@gen9_exec_parse@allowed-all.html
>
> * igt@gen9_exec_parse@bb-large:
> - shard-apl: NOTRUN -> [FAIL][24] ([i915#3296])
> [24]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/ig
> t@gen9_exec_parse@bb-large.html
>
> * igt@i915_pm_dc@dc6-dpms:
> - shard-skl: NOTRUN -> [FAIL][25] ([i915#454])
> [25]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/i
> gt@i915_pm_dc@dc6-dpms.html
>
> * igt@kms_big_fb@linear-8bpp-rotate-90:
> - shard-iclb: NOTRUN -> [SKIP][26] ([fdo#110725] / [fdo#111614])
> [26]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/i
> gt@kms_big_fb@linear-8bpp-rotate-90.html
>
> * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
> - shard-iclb: NOTRUN -> [SKIP][27] ([fdo#110723])
> [27]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/i
> gt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
>
> * igt@kms_big_joiner@invalid-modeset:
> - shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#2705])
> [28]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/ig
> t@kms_big_joiner@invalid-modeset.html
>
> * igt@kms_ccs@pipe-a-random-ccs-data:
> - shard-iclb: [PASS][29] -> [DMESG-WARN][30] ([i915#3219])
> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_ccs@pipe-a-random-ccs-data.html
> [30]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/i
> gt@kms_ccs@pipe-a-random-ccs-data.html
>
> * igt@kms_ccs@pipe-b-bad-aux-stride:
> - shard-snb: NOTRUN -> [SKIP][31] ([fdo#109271]) +260 similar issues
> [31]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/ig
> t@kms_ccs@pipe-b-bad-aux-stride.html
>
> * igt@kms_ccs@pipe-c-crc-primary-basic:
> - shard-skl: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111304])
> [32]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/ig
> t@kms_ccs@pipe-c-crc-primary-basic.html
>
> * igt@kms_chamelium@dp-audio-edid:
> - shard-skl: NOTRUN -> [SKIP][33] ([fdo#109271] / [fdo#111827]) +8 similar issues
> [33]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/ig
> t@kms_chamelium@dp-audio-edid.html
>
> * igt@kms_chamelium@hdmi-hpd-for-each-pipe:
> - shard-iclb: NOTRUN -> [SKIP][34] ([fdo#109284] / [fdo#111827]) +2 similar issues
> [34]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/i
> gt@kms_chamelium@hdmi-hpd-for-each-pipe.html
>
> * igt@kms_color@pipe-a-gamma:
> - shard-tglb: [PASS][35] -> [FAIL][36] ([i915#1149])
> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb7/igt@kms_color@pipe-a-gamma.html
> [36]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/i
> gt@kms_color@pipe-a-gamma.html
>
> * igt@kms_color_chamelium@pipe-c-ctm-0-25:
> - shard-apl: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827]) +22 similar issues
> [37]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/ig
> t@kms_color_chamelium@pipe-c-ctm-0-25.html
>
> * igt@kms_color_chamelium@pipe-c-ctm-green-to-red:
> - shard-snb: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +15 similar issues
> [38]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/ig
> t@kms_color_chamelium@pipe-c-ctm-green-to-red.html
>
> * igt@kms_content_protection@atomic:
> - shard-apl: NOTRUN -> [TIMEOUT][39] ([i915#1319]) +1 similar issue
> [39]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/ig
> t@kms_content_protection@atomic.html
>
> * igt@kms_cursor_crc@pipe-d-cursor-256x256-random:
> - shard-iclb: NOTRUN -> [SKIP][40] ([fdo#109278]) +1 similar issue
> [40]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/i
> gt@kms_cursor_crc@pipe-d-cursor-256x256-random.html
>
> * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
> - shard-glk: [PASS][41] -> [FAIL][42] ([i915#72])
> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
> [42]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/ig
> t@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
>
> * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
> - shard-iclb: NOTRUN -> [SKIP][43] ([fdo#109274] / [fdo#109278])
> [43]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/i
> gt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
>
> * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
> - shard-skl: NOTRUN -> [FAIL][44] ([i915#2346])
> [44]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/ig
> t@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
>
> * igt@kms_draw_crc@draw-method-rgb565-blt-ytiled:
> - shard-glk: [PASS][45] -> [FAIL][46] ([i915#52] / [i915#54])
> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
> [46]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/ig
> t@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
>
> * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
> - shard-glk: [PASS][47] -> [FAIL][48] ([i915#79])
> [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
> [48]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/ig
> t@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.
> html
>
> * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
> - shard-skl: [PASS][49] -> [FAIL][50] ([i915#79])
> [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
> [50]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/ig
> t@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
>
> * igt@kms_flip@nonexisting-fb@a-edp1:
> - shard-skl: [PASS][51] -> [DMESG-WARN][52] ([i915#1982])
> [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_flip@nonexisting-fb@a-edp1.html
> [52]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl4/ig
> t@kms_flip@nonexisting-fb@a-edp1.html
>
> * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
> - shard-skl: NOTRUN -> [FAIL][53] ([i915#2122])
> [53]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/i
> gt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
>
> * igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
> - shard-skl: [PASS][54] -> [FAIL][55] ([i915#2122]) +2 similar issues
> [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
> [55]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl2/ig
> t@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
> - shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2672])
> [56]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/ig
> t@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
> - shard-apl: NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#2642])
> [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
> - shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#2642])
> [58]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/ig
> t@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
> - shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109280]) +3 similar issues
> [59]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/i
> gt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
>
> * igt@kms_frontbuffer_tracking@fbc-suspend:
> - shard-kbl: [PASS][60] -> [DMESG-WARN][61] ([i915#180]) +1 similar issue
> [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
> [61]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/ig
> t@kms_frontbuffer_tracking@fbc-suspend.html
>
> * igt@kms_hdr@bpc-switch:
> - shard-skl: [PASS][62] -> [FAIL][63] ([i915#1188])
> [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_hdr@bpc-switch.html
> [63]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/ig
> t@kms_hdr@bpc-switch.html
>
> * igt@kms_hdr@bpc-switch-dpms:
> - shard-skl: NOTRUN -> [FAIL][64] ([i915#1188])
> [64]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/ig
> t@kms_hdr@bpc-switch-dpms.html
>
> * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
> - shard-apl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#533]) +4 similar issues
> [65]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/ig
> t@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
>
> * igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
> - shard-skl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#533])
> [66]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/ig
> t@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
>
> * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
> - shard-apl: [PASS][67] -> [DMESG-WARN][68] ([i915#180])
> [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
> [68]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/ig
> t@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
>
> * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
> - shard-apl: NOTRUN -> [FAIL][69] ([fdo#108145] / [i915#265]) +2 similar issues
> [69]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/ig
> t@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
>
> * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
> - shard-apl: NOTRUN -> [FAIL][70] ([i915#265]) +1 similar issue
> [70]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/ig
> t@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
>
> * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
> - shard-skl: NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265])
> [71]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/ig
> t@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>
> * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
> - shard-skl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#658]) +1 similar issue
> [72]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/ig
> t@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
>
> * igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
> - shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#658]) +5 similar issues
> [73]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/ig
> t@kms_psr2_sf@plane-move-sf-dmg-area-2.html
>
> * igt@kms_psr@psr2_sprite_mmap_cpu:
> - shard-iclb: [PASS][74] -> [SKIP][75] ([fdo#109441])
> [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
> [75]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/i
> gt@kms_psr@psr2_sprite_mmap_cpu.html
>
> * igt@kms_psr@sprite_mmap_gtt:
> - shard-iclb: [PASS][76] -> [SKIP][77] ([i915#668]) +4 similar issues
> [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_psr@sprite_mmap_gtt.html
> [77]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/i
> gt@kms_psr@sprite_mmap_gtt.html
>
> * igt@kms_vblank@pipe-d-ts-continuation-idle:
> - shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271]) +216 similar issues
> [78]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/ig
> t@kms_vblank@pipe-d-ts-continuation-idle.html
>
> * igt@kms_writeback@writeback-check-output:
> - shard-apl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2437]) +1 similar issue
> [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_writeback@writeback-check-output.html
> - shard-skl: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#2437])
> [80]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/ig
> t@kms_writeback@writeback-check-output.html
>
> * igt@nouveau_crc@pipe-a-source-outp-inactive:
> - shard-iclb: NOTRUN -> [SKIP][81] ([i915#2530])
> [81]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/i
> gt@nouveau_crc@pipe-a-source-outp-inactive.html
>
> * igt@perf@polling-parameterized:
> - shard-tglb: [PASS][82] -> [FAIL][83] ([i915#1542])
> [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@perf@polling-parameterized.html
> [83]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/i
> gt@perf@polling-parameterized.html
>
>
> #### Possible fixes ####
>
> * igt@gem_eio@unwedge-stress:
> - shard-tglb: [TIMEOUT][84] ([i915#2369] / [i915#3063]) -> [PASS][85]
> [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_eio@unwedge-stress.html
> [85]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/i
> gt@gem_eio@unwedge-stress.html
>
> * igt@gem_exec_fair@basic-deadline:
> - shard-kbl: [FAIL][86] ([i915#2846]) -> [PASS][87]
> [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
> [87]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl7/ig
> t@gem_exec_fair@basic-deadline.html
>
> * igt@gem_exec_fair@basic-none-share@rcs0:
> - shard-tglb: [FAIL][88] ([i915#2842]) -> [PASS][89]
> [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
> [89]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/i
> gt@gem_exec_fair@basic-none-share@rcs0.html
>
> * igt@gem_exec_fair@basic-pace-solo@rcs0:
> - shard-glk: [FAIL][90] ([i915#2842]) -> [PASS][91] +2 similar issues
> [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> - shard-kbl: [FAIL][92] ([i915#2842]) -> [PASS][93] +2 similar issues
> [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> [93]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl1/ig
> t@gem_exec_fair@basic-pace-solo@rcs0.html
>
> * igt@gem_exec_fair@basic-pace@bcs0:
> - shard-iclb: [FAIL][94] ([i915#2842]) -> [PASS][95]
> [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb5/igt@gem_exec_fair@basic-pace@bcs0.html
> [95]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb8/i
> gt@gem_exec_fair@basic-pace@bcs0.html
>
> * igt@gem_mmap_gtt@cpuset-big-copy-xy:
> - shard-glk: [FAIL][96] ([i915#307]) -> [PASS][97]
> [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk2/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
> [97]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk8/ig
> t@gem_mmap_gtt@cpuset-big-copy-xy.html
>
> * igt@gen9_exec_parse@allowed-single:
> - shard-skl: [DMESG-WARN][98] ([i915#1436] / [i915#716]) -> [PASS][99]
> [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl6/igt@gen9_exec_parse@allowed-single.html
> [99]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/ig
> t@gen9_exec_parse@allowed-single.html
>
> * igt@i915_pm_rpm@modeset-lpsp-stress:
> - shard-skl: [INCOMPLETE][100] ([i915#151]) -> [PASS][101]
> [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@i915_pm_rpm@modeset-lpsp-stress.html
> [101]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/ig
> t@i915_pm_rpm@modeset-lpsp-stress.html
>
> * igt@kms_async_flips@alternate-sync-async-flip:
> - shard-skl: [FAIL][102] ([i915#2521]) -> [PASS][103]
> [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@kms_async_flips@alternate-sync-async-flip.html
> [103]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/i
> gt@kms_async_flips@alternate-sync-async-flip.html
>
> * igt@kms_color@pipe-a-ctm-0-5:
> - shard-skl: [DMESG-WARN][104] ([i915#1982]) -> [PASS][105] +2 similar issues
> [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html
> [105]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/ig
> t@kms_color@pipe-a-ctm-0-5.html
>
> * igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen:
> - shard-skl: [FAIL][106] ([i915#54]) -> [PASS][107]
> [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
> [107]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/ig
> t@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
>
> * igt@kms_flip@flip-vs-suspend@c-dp1:
> - shard-apl: [DMESG-WARN][108] ([i915#180]) -> [PASS][109]
> [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
> [109]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/ig
> t@kms_flip@flip-vs-suspend@c-dp1.html
>
> * igt@kms_flip@plain-flip-ts-check@a-edp1:
> - shard-skl: [FAIL][110] ([i915#2122]) -> [PASS][111] +1 similar issue
> [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl10/igt@kms_flip@plain-flip-ts-check@a-edp1.html
> [111]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl3/ig
> t@kms_flip@plain-flip-ts-check@a-edp1.html
>
> * igt@kms_pipe_crc_basic@read-crc-pipe-c:
> - shard-skl: [FAIL][112] ([i915#53]) -> [PASS][113]
> [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
> [113]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/ig
> t@kms_pipe_crc_basic@read-crc-pipe-c.html
>
> * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
> - shard-skl: [FAIL][114] ([fdo#108145] / [i915#265]) -> [PASS][115] +1 similar issue
> [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
> [115]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl8/ig
> t@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
>
> * igt@kms_plane_cursor@pipe-c-primary-size-64:
> - shard-iclb: [INCOMPLETE][116] -> [PASS][117]
> [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_plane_cursor@pipe-c-primary-size-64.html
> [117]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/i
> gt@kms_plane_cursor@pipe-c-primary-size-64.html
>
> * igt@kms_psr@psr2_suspend:
> - shard-iclb: [SKIP][118] ([fdo#109441]) -> [PASS][119] +2 similar issues
> [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr@psr2_suspend.html
> [119]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/i
> gt@kms_psr@psr2_suspend.html
>
>
> #### Warnings ####
>
> * igt@i915_pm_rc6_residency@rc6-fence:
> - shard-iclb: [WARN][120] ([i915#2681] / [i915#2684]) -> [WARN][121] ([i915#2684])
> [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
> [121]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/i
> gt@i915_pm_rc6_residency@rc6-fence.html
>
> * igt@i915_pm_rc6_residency@rc6-idle:
> - shard-iclb: [WARN][122] ([i915#2681] / [i915#2684]) -> [WARN][123] ([i915#1804] / [i915#2684])
> [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
> [123]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb4/i
> gt@i915_pm_rc6_residency@rc6-idle.html
>
> * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
> - shard-iclb: [SKIP][124] ([i915#658]) -> [SKIP][125] ([i915#2920]) +2 similar issues
> [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
> [125]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/i
> gt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
>
> * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
> - shard-iclb: [SKIP][126] ([i915#2920]) -> [SKIP][127] ([i915#658]) +2 similar issues
> [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
> [127]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/i
> gt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
>
> * igt@runner@aborted:
> - shard-kbl: ([FAIL][128], [FAIL][129]) ([i915#3002]) -> ([FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002])
> [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
> [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
> [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
> [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
> [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl2/igt@runner@aborted.html
> [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl3/igt@runner@aborted.html
> - shard-apl: ([FAIL][134], [FAIL][135], [FAIL][136]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002]) -> [FAIL][137] ([fdo#109271] / [i915#1814])
> [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl6/igt@runner@aborted.html
> [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@runner@aborted.html
> [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl3/igt@runner@aborted.html
> [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@runner@aborted.html
> - shard-glk: ([FAIL][138], [FAIL][139]) ([i915#3002] / [k.org#202321]) -> ([FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143]) ([i915#2722] / [i915#3002] / [k.org#202321])
> [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@runner@aborted.html
> [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@runner@aborted.html
> [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/igt@runner@aborted.html
> [141]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/ig
> t@runner@aborte
>
> == Logs ==
>
> For more details see:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add support for FBs requiring a POT stride padding (rev4)
2021-03-29 16:28 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
@ 2021-03-29 20:48 ` Imre Deak
0 siblings, 0 replies; 53+ messages in thread
From: Imre Deak @ 2021-03-29 20:48 UTC (permalink / raw)
To: intel-gfx, Ville Syrjälä, Lakshminarayana Vudum
On Mon, Mar 29, 2021 at 04:28:43PM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Add support for FBs requiring a POT stride padding (rev4)
> URL : https://patchwork.freedesktop.org/series/87859/
> State : success
Thanks for the review, pushed to -din.
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_9909_full -> Patchwork_19873_full
> ====================================================
>
> Summary
> -------
>
> **SUCCESS**
>
> No regressions found.
>
>
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_19873_full:
>
> ### Piglit changes ###
>
> #### Possible regressions ####
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2 (NEW):
> - {pig-icl-1065g7}: NOTRUN -> [CRASH][1]
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2.html
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint (NEW):
> - {pig-icl-1065g7}: NOTRUN -> [INCOMPLETE][2] +7 similar issues
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/pig-icl-1065g7/spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint.html
>
>
> New tests
> ---------
>
> New tests have been introduced between CI_DRM_9909_full and Patchwork_19873_full:
>
> ### New Piglit tests (9) ###
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-asin-vec2:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-degrees-vec4:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-lshift-uvec2-uvec2:
> - Statuses : 1 crash(s)
> - Exec time: [0.50] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-rshift-uint-uint:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitor-neg-uint-uint:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitxor-neg-uvec3-uvec3:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-div-uvec3-uvec3:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-rshift-uint-int:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
> * spec@arb_tessellation_shader@execution@built-in-functions@tcs-outerproduct-vec4-vec2:
> - Statuses : 1 incomplete(s)
> - Exec time: [0.0] s
>
>
>
> Known issues
> ------------
>
> Here are the changes found in Patchwork_19873_full that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@gem_create@create-massive:
> - shard-skl: NOTRUN -> [DMESG-WARN][3] ([i915#3002])
> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@gem_create@create-massive.html
>
> * igt@gem_ctx_persistence@many-contexts:
> - shard-tglb: [PASS][4] -> [FAIL][5] ([i915#2410])
> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb1/igt@gem_ctx_persistence@many-contexts.html
> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/igt@gem_ctx_persistence@many-contexts.html
>
> * igt@gem_ctx_persistence@smoketest:
> - shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +2 similar issues
> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb7/igt@gem_ctx_persistence@smoketest.html
>
> * igt@gem_ctx_ringsize@active@bcs0:
> - shard-skl: [PASS][7] -> [INCOMPLETE][8] ([i915#3316])
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@gem_ctx_ringsize@active@bcs0.html
> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@gem_ctx_ringsize@active@bcs0.html
>
> * igt@gem_exec_fair@basic-flow@rcs0:
> - shard-skl: NOTRUN -> [SKIP][9] ([fdo#109271]) +97 similar issues
> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@gem_exec_fair@basic-flow@rcs0.html
>
> * igt@gem_exec_fair@basic-pace@rcs0:
> - shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842])
> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace@rcs0.html
> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk9/igt@gem_exec_fair@basic-pace@rcs0.html
>
> * igt@gem_exec_fair@basic-pace@vcs1:
> - shard-tglb: [PASS][12] -> [FAIL][13] ([i915#2842])
> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs1.html
> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/igt@gem_exec_fair@basic-pace@vcs1.html
>
> * igt@gem_exec_flush@basic-wb-rw-default:
> - shard-glk: [PASS][14] -> [INCOMPLETE][15] ([i915#2055])
> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk1/igt@gem_exec_flush@basic-wb-rw-default.html
> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/igt@gem_exec_flush@basic-wb-rw-default.html
>
> * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy:
> - shard-iclb: [PASS][16] -> [FAIL][17] ([i915#2428])
> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
>
> * igt@gem_mmap_gtt@cpuset-medium-copy-odd:
> - shard-iclb: [PASS][18] -> [FAIL][19] ([i915#307])
> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb6/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
>
> * igt@gem_pread@exhaustion:
> - shard-apl: NOTRUN -> [WARN][20] ([i915#2658])
> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@gem_pread@exhaustion.html
>
> * igt@gem_userptr_blits@vma-merge:
> - shard-apl: NOTRUN -> [FAIL][21] ([i915#3318])
> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@gem_userptr_blits@vma-merge.html
>
> * igt@gen9_exec_parse@allowed-all:
> - shard-glk: [PASS][22] -> [DMESG-WARN][23] ([i915#1436] / [i915#716])
> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@gen9_exec_parse@allowed-all.html
> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@gen9_exec_parse@allowed-all.html
>
> * igt@gen9_exec_parse@bb-large:
> - shard-apl: NOTRUN -> [FAIL][24] ([i915#3296])
> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@gen9_exec_parse@bb-large.html
>
> * igt@i915_pm_dc@dc6-dpms:
> - shard-skl: NOTRUN -> [FAIL][25] ([i915#454])
> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@i915_pm_dc@dc6-dpms.html
>
> * igt@kms_big_fb@linear-8bpp-rotate-90:
> - shard-iclb: NOTRUN -> [SKIP][26] ([fdo#110725] / [fdo#111614])
> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_big_fb@linear-8bpp-rotate-90.html
>
> * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
> - shard-iclb: NOTRUN -> [SKIP][27] ([fdo#110723])
> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
>
> * igt@kms_big_joiner@invalid-modeset:
> - shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#2705])
> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_big_joiner@invalid-modeset.html
>
> * igt@kms_ccs@pipe-a-random-ccs-data:
> - shard-iclb: [PASS][29] -> [DMESG-WARN][30] ([i915#3219])
> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_ccs@pipe-a-random-ccs-data.html
> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/igt@kms_ccs@pipe-a-random-ccs-data.html
>
> * igt@kms_ccs@pipe-b-bad-aux-stride:
> - shard-snb: NOTRUN -> [SKIP][31] ([fdo#109271]) +260 similar issues
> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/igt@kms_ccs@pipe-b-bad-aux-stride.html
>
> * igt@kms_ccs@pipe-c-crc-primary-basic:
> - shard-skl: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111304])
> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_ccs@pipe-c-crc-primary-basic.html
>
> * igt@kms_chamelium@dp-audio-edid:
> - shard-skl: NOTRUN -> [SKIP][33] ([fdo#109271] / [fdo#111827]) +8 similar issues
> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_chamelium@dp-audio-edid.html
>
> * igt@kms_chamelium@hdmi-hpd-for-each-pipe:
> - shard-iclb: NOTRUN -> [SKIP][34] ([fdo#109284] / [fdo#111827]) +2 similar issues
> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html
>
> * igt@kms_color@pipe-a-gamma:
> - shard-tglb: [PASS][35] -> [FAIL][36] ([i915#1149])
> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb7/igt@kms_color@pipe-a-gamma.html
> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb2/igt@kms_color@pipe-a-gamma.html
>
> * igt@kms_color_chamelium@pipe-c-ctm-0-25:
> - shard-apl: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827]) +22 similar issues
> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_color_chamelium@pipe-c-ctm-0-25.html
>
> * igt@kms_color_chamelium@pipe-c-ctm-green-to-red:
> - shard-snb: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +15 similar issues
> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-snb2/igt@kms_color_chamelium@pipe-c-ctm-green-to-red.html
>
> * igt@kms_content_protection@atomic:
> - shard-apl: NOTRUN -> [TIMEOUT][39] ([i915#1319]) +1 similar issue
> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@kms_content_protection@atomic.html
>
> * igt@kms_cursor_crc@pipe-d-cursor-256x256-random:
> - shard-iclb: NOTRUN -> [SKIP][40] ([fdo#109278]) +1 similar issue
> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_cursor_crc@pipe-d-cursor-256x256-random.html
>
> * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
> - shard-glk: [PASS][41] -> [FAIL][42] ([i915#72])
> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
>
> * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
> - shard-iclb: NOTRUN -> [SKIP][43] ([fdo#109274] / [fdo#109278])
> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
>
> * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
> - shard-skl: NOTRUN -> [FAIL][44] ([i915#2346])
> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
>
> * igt@kms_draw_crc@draw-method-rgb565-blt-ytiled:
> - shard-glk: [PASS][45] -> [FAIL][46] ([i915#52] / [i915#54])
> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
>
> * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
> - shard-glk: [PASS][47] -> [FAIL][48] ([i915#79])
> [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
> [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
>
> * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
> - shard-skl: [PASS][49] -> [FAIL][50] ([i915#79])
> [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
> [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
>
> * igt@kms_flip@nonexisting-fb@a-edp1:
> - shard-skl: [PASS][51] -> [DMESG-WARN][52] ([i915#1982])
> [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_flip@nonexisting-fb@a-edp1.html
> [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl4/igt@kms_flip@nonexisting-fb@a-edp1.html
>
> * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
> - shard-skl: NOTRUN -> [FAIL][53] ([i915#2122])
> [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
>
> * igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
> - shard-skl: [PASS][54] -> [FAIL][55] ([i915#2122]) +2 similar issues
> [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl8/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
> [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl2/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
> - shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2672])
> [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
> - shard-apl: NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#2642])
> [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
> - shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#2642])
> [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
> - shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109280]) +3 similar issues
> [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
>
> * igt@kms_frontbuffer_tracking@fbc-suspend:
> - shard-kbl: [PASS][60] -> [DMESG-WARN][61] ([i915#180]) +1 similar issue
> [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
> [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
>
> * igt@kms_hdr@bpc-switch:
> - shard-skl: [PASS][62] -> [FAIL][63] ([i915#1188])
> [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_hdr@bpc-switch.html
> [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/igt@kms_hdr@bpc-switch.html
>
> * igt@kms_hdr@bpc-switch-dpms:
> - shard-skl: NOTRUN -> [FAIL][64] ([i915#1188])
> [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html
>
> * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
> - shard-apl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#533]) +4 similar issues
> [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
>
> * igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
> - shard-skl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#533])
> [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
>
> * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
> - shard-apl: [PASS][67] -> [DMESG-WARN][68] ([i915#180])
> [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
> [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
>
> * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
> - shard-apl: NOTRUN -> [FAIL][69] ([fdo#108145] / [i915#265]) +2 similar issues
> [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
>
> * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
> - shard-apl: NOTRUN -> [FAIL][70] ([i915#265]) +1 similar issue
> [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
>
> * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
> - shard-skl: NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265])
> [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>
> * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
> - shard-skl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#658]) +1 similar issue
> [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
>
> * igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
> - shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#658]) +5 similar issues
> [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl3/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html
>
> * igt@kms_psr@psr2_sprite_mmap_cpu:
> - shard-iclb: [PASS][74] -> [SKIP][75] ([fdo#109441])
> [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
> [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_cpu.html
>
> * igt@kms_psr@sprite_mmap_gtt:
> - shard-iclb: [PASS][76] -> [SKIP][77] ([i915#668]) +4 similar issues
> [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_psr@sprite_mmap_gtt.html
> [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb1/igt@kms_psr@sprite_mmap_gtt.html
>
> * igt@kms_vblank@pipe-d-ts-continuation-idle:
> - shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271]) +216 similar issues
> [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_vblank@pipe-d-ts-continuation-idle.html
>
> * igt@kms_writeback@writeback-check-output:
> - shard-apl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2437]) +1 similar issue
> [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl8/igt@kms_writeback@writeback-check-output.html
> - shard-skl: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#2437])
> [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl1/igt@kms_writeback@writeback-check-output.html
>
> * igt@nouveau_crc@pipe-a-source-outp-inactive:
> - shard-iclb: NOTRUN -> [SKIP][81] ([i915#2530])
> [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@nouveau_crc@pipe-a-source-outp-inactive.html
>
> * igt@perf@polling-parameterized:
> - shard-tglb: [PASS][82] -> [FAIL][83] ([i915#1542])
> [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@perf@polling-parameterized.html
> [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/igt@perf@polling-parameterized.html
>
>
> #### Possible fixes ####
>
> * igt@gem_eio@unwedge-stress:
> - shard-tglb: [TIMEOUT][84] ([i915#2369] / [i915#3063]) -> [PASS][85]
> [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb8/igt@gem_eio@unwedge-stress.html
> [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb6/igt@gem_eio@unwedge-stress.html
>
> * igt@gem_exec_fair@basic-deadline:
> - shard-kbl: [FAIL][86] ([i915#2846]) -> [PASS][87]
> [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
> [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
>
> * igt@gem_exec_fair@basic-none-share@rcs0:
> - shard-tglb: [FAIL][88] ([i915#2842]) -> [PASS][89]
> [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
> [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-tglb8/igt@gem_exec_fair@basic-none-share@rcs0.html
>
> * igt@gem_exec_fair@basic-pace-solo@rcs0:
> - shard-glk: [FAIL][90] ([i915#2842]) -> [PASS][91] +2 similar issues
> [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> - shard-kbl: [FAIL][92] ([i915#2842]) -> [PASS][93] +2 similar issues
> [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
>
> * igt@gem_exec_fair@basic-pace@bcs0:
> - shard-iclb: [FAIL][94] ([i915#2842]) -> [PASS][95]
> [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb5/igt@gem_exec_fair@basic-pace@bcs0.html
> [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb8/igt@gem_exec_fair@basic-pace@bcs0.html
>
> * igt@gem_mmap_gtt@cpuset-big-copy-xy:
> - shard-glk: [FAIL][96] ([i915#307]) -> [PASS][97]
> [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk2/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
> [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk8/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
>
> * igt@gen9_exec_parse@allowed-single:
> - shard-skl: [DMESG-WARN][98] ([i915#1436] / [i915#716]) -> [PASS][99]
> [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl6/igt@gen9_exec_parse@allowed-single.html
> [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@gen9_exec_parse@allowed-single.html
>
> * igt@i915_pm_rpm@modeset-lpsp-stress:
> - shard-skl: [INCOMPLETE][100] ([i915#151]) -> [PASS][101]
> [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@i915_pm_rpm@modeset-lpsp-stress.html
> [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@i915_pm_rpm@modeset-lpsp-stress.html
>
> * igt@kms_async_flips@alternate-sync-async-flip:
> - shard-skl: [FAIL][102] ([i915#2521]) -> [PASS][103]
> [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl3/igt@kms_async_flips@alternate-sync-async-flip.html
> [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl10/igt@kms_async_flips@alternate-sync-async-flip.html
>
> * igt@kms_color@pipe-a-ctm-0-5:
> - shard-skl: [DMESG-WARN][104] ([i915#1982]) -> [PASS][105] +2 similar issues
> [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html
> [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl7/igt@kms_color@pipe-a-ctm-0-5.html
>
> * igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen:
> - shard-skl: [FAIL][106] ([i915#54]) -> [PASS][107]
> [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
> [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
>
> * igt@kms_flip@flip-vs-suspend@c-dp1:
> - shard-apl: [DMESG-WARN][108] ([i915#180]) -> [PASS][109]
> [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
> [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl6/igt@kms_flip@flip-vs-suspend@c-dp1.html
>
> * igt@kms_flip@plain-flip-ts-check@a-edp1:
> - shard-skl: [FAIL][110] ([i915#2122]) -> [PASS][111] +1 similar issue
> [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl10/igt@kms_flip@plain-flip-ts-check@a-edp1.html
> [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl3/igt@kms_flip@plain-flip-ts-check@a-edp1.html
>
> * igt@kms_pipe_crc_basic@read-crc-pipe-c:
> - shard-skl: [FAIL][112] ([i915#53]) -> [PASS][113]
> [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl4/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
> [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl6/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
>
> * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
> - shard-skl: [FAIL][114] ([fdo#108145] / [i915#265]) -> [PASS][115] +1 similar issue
> [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
> [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
>
> * igt@kms_plane_cursor@pipe-c-primary-size-64:
> - shard-iclb: [INCOMPLETE][116] -> [PASS][117]
> [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb7/igt@kms_plane_cursor@pipe-c-primary-size-64.html
> [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb3/igt@kms_plane_cursor@pipe-c-primary-size-64.html
>
> * igt@kms_psr@psr2_suspend:
> - shard-iclb: [SKIP][118] ([fdo#109441]) -> [PASS][119] +2 similar issues
> [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr@psr2_suspend.html
> [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/igt@kms_psr@psr2_suspend.html
>
>
> #### Warnings ####
>
> * igt@i915_pm_rc6_residency@rc6-fence:
> - shard-iclb: [WARN][120] ([i915#2681] / [i915#2684]) -> [WARN][121] ([i915#2684])
> [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
> [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb5/igt@i915_pm_rc6_residency@rc6-fence.html
>
> * igt@i915_pm_rc6_residency@rc6-idle:
> - shard-iclb: [WARN][122] ([i915#2681] / [i915#2684]) -> [WARN][123] ([i915#1804] / [i915#2684])
> [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
> [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
>
> * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
> - shard-iclb: [SKIP][124] ([i915#658]) -> [SKIP][125] ([i915#2920]) +2 similar issues
> [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
> [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
>
> * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
> - shard-iclb: [SKIP][126] ([i915#2920]) -> [SKIP][127] ([i915#658]) +2 similar issues
> [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
> [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
>
> * igt@runner@aborted:
> - shard-kbl: ([FAIL][128], [FAIL][129]) ([i915#3002]) -> ([FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002])
> [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
> [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-kbl2/igt@runner@aborted.html
> [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
> [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl4/igt@runner@aborted.html
> [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl2/igt@runner@aborted.html
> [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-kbl3/igt@runner@aborted.html
> - shard-apl: ([FAIL][134], [FAIL][135], [FAIL][136]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002]) -> [FAIL][137] ([fdo#109271] / [i915#1814])
> [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl6/igt@runner@aborted.html
> [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl1/igt@runner@aborted.html
> [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-apl3/igt@runner@aborted.html
> [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-apl1/igt@runner@aborted.html
> - shard-glk: ([FAIL][138], [FAIL][139]) ([i915#3002] / [k.org#202321]) -> ([FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143]) ([i915#2722] / [i915#3002] / [k.org#202321])
> [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk3/igt@runner@aborted.html
> [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9909/shard-glk6/igt@runner@aborted.html
> [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk2/igt@runner@aborted.html
> [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@runner@aborted.html
> [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk1/igt@runner@aborted.html
> [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/shard-glk3/igt@runner@aborted.html
> - shard-skl: ([FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149]) ([i915#1436] / [i915#181
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19873/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 53+ messages in thread
end of thread, other threads:[~2021-03-29 20:49 UTC | newest]
Thread overview: 53+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-25 21:47 [Intel-gfx] [PATCH v2 00/25] drm/i915: Add support for FBs requiring a POT stride padding Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 01/25] drm/i915: Fix rotation setup during plane HW readout Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 02/25] drm/i915/selftest: Fix error handling in igt_vma_remapped_gtt() Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 03/25] drm/i915/selftest: Fix debug message " Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 04/25] drm/i915: Make sure i915_ggtt_view is inited when creating an FB Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 05/25] drm/i915/selftest: Make sure to init i915_ggtt_view in igt_vma_rotate_remap() Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 06/25] drm/i915/intel_fb: Pull FB plane functions from intel_display_types.h Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 07/25] drm/i915/intel_fb: Pull FB plane functions from skl_universal_plane.c Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 08/25] drm/i915/intel_fb: Pull is_surface_linear() from intel_display.c/skl_universal_plane.c Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 09/25] drm/i915/intel_fb: Pull FB plane functions from intel_sprite.c Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 10/25] drm/i915/intel_fb: Pull FB plane functions from intel_display.c Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 11/25] drm/i915/intel_fb: Unexport intel_fb_check_stride() Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 12/25] drm/i915/intel_fb: s/dev_priv/i915/ Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 13/25] drm/i915/intel_fb: Factor out convert_plane_offset_to_xy() Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 14/25] drm/i915/intel_fb: Factor out calc_plane_aligned_offset() Imre Deak
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 15/25] drm/i915/intel_fb: Factor out calc_plane_normal_size() Imre Deak
2021-03-26 16:22 ` Ville Syrjälä
2021-03-25 21:47 ` [Intel-gfx] [PATCH v2 16/25] drm/i915: Unify the FB and plane state view information into one struct Imre Deak
2021-03-26 16:33 ` Ville Syrjälä
2021-03-26 16:37 ` Imre Deak
2021-03-27 22:09 ` [Intel-gfx] [PATCH v3 " Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 17/25] drm/i915: Store the normal view FB pitch in FB's intel_fb_view Imre Deak
2021-03-26 16:34 ` Ville Syrjälä
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 18/25] drm/i915: Simplify copying the FB view state to the plane state Imre Deak
2021-03-26 16:42 ` Ville Syrjälä
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 19/25] drm/i915/intel_fb: Factor out calc_plane_remap_info() Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 20/25] drm/i915: Shrink the size of intel_remapped_plane_info struct Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 21/25] drm/i915/selftest: Unify use of intel_remapped_plane_info in igt_vma_rotate_remap() Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 22/25] drm/i915: s/stride/src_stride/ in the intel_remapped_plane_info struct Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 23/25] drm/i915: Add support for FBs requiring a POT stride alignment Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 24/25] drm/i915/selftest: Add remap/rotate vma subtests when dst_stride!=width/height Imre Deak
2021-03-25 21:48 ` [Intel-gfx] [PATCH v2 25/25] drm/i915: For-CI: Force remapping the FB with a POT aligned stride Imre Deak
2021-03-26 22:35 ` [Intel-gfx] [PATCH v3 " Imre Deak
2021-03-26 1:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev2) Patchwork
2021-03-26 1:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-03-26 1:36 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-03-26 2:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-26 7:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-03-26 22:27 ` Imre Deak
2021-03-26 23:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev3) Patchwork
2021-03-26 23:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-03-26 23:23 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-03-26 23:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-27 2:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-03-27 22:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for FBs requiring a POT stride padding (rev4) Patchwork
2021-03-27 22:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-03-27 22:38 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-03-27 23:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-28 0:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-03-29 15:46 ` Imre Deak
2021-03-29 18:01 ` Vudum, Lakshminarayana
2021-03-29 16:28 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2021-03-29 20:48 ` Imre Deak
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