* [Intel-gfx] [PATCH] drm/i915: Add Wa_14010733141
@ 2021-04-01 16:28 Aditya Swarup
2021-04-01 19:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Aditya Swarup @ 2021-04-01 16:28 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
The WA requires the following procedure for VDBox SFC reset:
If (MFX-SFC usage is 1) {
1.Issue a MFX-SFC forced lock
2.Wait for MFX-SFC forced lock ack
3.Check the MFX-SFC usage bit
If (MFX-SFC usage bit is 1)
Reset VDBOX and SFC
else
Reset VDBOX
Release the force lock MFX-SFC
}
else if(HCP+SFC usage is 1) {
1.Issue a VE-SFC forced lock
2.Wait for SFC forced lock ack
3.Check the VE-SFC usage bit
If (VE-SFC usage bit is 1)
Reset VDBOX
else
Reset VDBOX and SFC
Release the force lock VE-SFC.
}
else
Reset VDBOX
- Restructure: the changes to the original code flow should stay
relatively minimal; we only need to do an extra HCP check after the
usual VD-MFX check and, if true, switch the register/bit we're
performing the lock on.(MattR)
Bspec: 52890, 53509
Co-developed-by: Matt Roper <matthew.d.roper@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gt/intel_reset.c | 194 +++++++++++++++++---------
drivers/gpu/drm/i915/i915_reg.h | 6 +
2 files changed, 137 insertions(+), 63 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index a377c4588aaa..bcb3d864db11 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -338,15 +338,69 @@ static int gen6_reset_engines(struct intel_gt *gt,
return gen6_hw_domain_reset(gt, hw_mask);
}
-static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *hw_mask)
+static struct intel_engine_cs *find_sfc_paired_vecs_engine(struct intel_engine_cs *engine)
+{
+ int vecs_id;
+
+ GEM_BUG_ON(engine->class != VIDEO_DECODE_CLASS);
+
+ vecs_id = _VECS((engine->instance) / 2);
+
+ return engine->gt->engine[vecs_id];
+}
+
+struct sfc_lock_data {
+ i915_reg_t lock_reg;
+ i915_reg_t ack_reg;
+ i915_reg_t usage_reg;
+ u32 lock_bit;
+ u32 ack_bit;
+ u32 usage_bit;
+ u32 reset_bit;
+};
+
+static void get_sfc_forced_lock_data(struct intel_engine_cs *engine,
+ struct sfc_lock_data *sfc_lock)
+{
+ switch (engine->class) {
+ default:
+ MISSING_CASE(engine->class);
+ fallthrough;
+ case VIDEO_DECODE_CLASS:
+ sfc_lock->lock_reg = GEN11_VCS_SFC_FORCED_LOCK(engine);
+ sfc_lock->lock_bit = GEN11_VCS_SFC_FORCED_LOCK_BIT;
+
+ sfc_lock->ack_reg = GEN11_VCS_SFC_LOCK_STATUS(engine);
+ sfc_lock->ack_bit = GEN11_VCS_SFC_LOCK_ACK_BIT;
+
+ sfc_lock->usage_reg = GEN11_VCS_SFC_LOCK_STATUS(engine);
+ sfc_lock->usage_bit = GEN11_VCS_SFC_USAGE_BIT;
+ sfc_lock->reset_bit = GEN11_VCS_SFC_RESET_BIT(engine->instance);
+
+ break;
+ case VIDEO_ENHANCEMENT_CLASS:
+ sfc_lock->lock_reg = GEN11_VECS_SFC_FORCED_LOCK(engine);
+ sfc_lock->lock_bit = GEN11_VECS_SFC_FORCED_LOCK_BIT;
+
+ sfc_lock->ack_reg = GEN11_VECS_SFC_LOCK_ACK(engine);
+ sfc_lock->ack_bit = GEN11_VECS_SFC_LOCK_ACK_BIT;
+
+ sfc_lock->usage_reg = GEN11_VECS_SFC_USAGE(engine);
+ sfc_lock->usage_bit = GEN11_VECS_SFC_USAGE_BIT;
+ sfc_lock->reset_bit = GEN11_VECS_SFC_RESET_BIT(engine->instance);
+
+ break;
+ }
+}
+
+static int gen11_lock_sfc(struct intel_engine_cs *engine,
+ u32 *reset_mask,
+ u32 *unlock_mask)
{
struct intel_uncore *uncore = engine->uncore;
u8 vdbox_sfc_access = engine->gt->info.vdbox_sfc_access;
- i915_reg_t sfc_forced_lock, sfc_forced_lock_ack;
- u32 sfc_forced_lock_bit, sfc_forced_lock_ack_bit;
- i915_reg_t sfc_usage;
- u32 sfc_usage_bit;
- u32 sfc_reset_bit;
+ struct sfc_lock_data sfc_lock;
+ bool lock_obtained, lock_to_other = false;
int ret;
switch (engine->class) {
@@ -354,53 +408,72 @@ static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *hw_mask)
if ((BIT(engine->instance) & vdbox_sfc_access) == 0)
return 0;
- sfc_forced_lock = GEN11_VCS_SFC_FORCED_LOCK(engine);
- sfc_forced_lock_bit = GEN11_VCS_SFC_FORCED_LOCK_BIT;
-
- sfc_forced_lock_ack = GEN11_VCS_SFC_LOCK_STATUS(engine);
- sfc_forced_lock_ack_bit = GEN11_VCS_SFC_LOCK_ACK_BIT;
+ fallthrough;
+ case VIDEO_ENHANCEMENT_CLASS:
+ get_sfc_forced_lock_data(engine, &sfc_lock);
- sfc_usage = GEN11_VCS_SFC_LOCK_STATUS(engine);
- sfc_usage_bit = GEN11_VCS_SFC_USAGE_BIT;
- sfc_reset_bit = GEN11_VCS_SFC_RESET_BIT(engine->instance);
break;
+ default:
+ return 0;
+ }
- case VIDEO_ENHANCEMENT_CLASS:
- sfc_forced_lock = GEN11_VECS_SFC_FORCED_LOCK(engine);
- sfc_forced_lock_bit = GEN11_VECS_SFC_FORCED_LOCK_BIT;
+ if (!(intel_uncore_read_fw(uncore, sfc_lock.usage_reg) & sfc_lock.usage_bit)) {
+ struct intel_engine_cs *paired_vecs;
- sfc_forced_lock_ack = GEN11_VECS_SFC_LOCK_ACK(engine);
- sfc_forced_lock_ack_bit = GEN11_VECS_SFC_LOCK_ACK_BIT;
+ if (engine->class != VIDEO_DECODE_CLASS ||
+ !IS_GEN(engine->i915, 12))
+ return 0;
- sfc_usage = GEN11_VECS_SFC_USAGE(engine);
- sfc_usage_bit = GEN11_VECS_SFC_USAGE_BIT;
- sfc_reset_bit = GEN11_VECS_SFC_RESET_BIT(engine->instance);
- break;
+ /*
+ * Wa_14010733141
+ *
+ * If the VCS-MFX isn't using the SFC, we also need to check
+ * whether VCS-HCP is using it. If so, we need to issue a *VE*
+ * forced lock on the VE engine that shares the same SFC.
+ */
+ if (!(intel_uncore_read_fw(uncore,
+ GEN12_HCP_SFC_LOCK_STATUS(engine)) &
+ GEN12_HCP_SFC_USAGE_BIT))
+ return 0;
- default:
- return 0;
+ paired_vecs = find_sfc_paired_vecs_engine(engine);
+ get_sfc_forced_lock_data(paired_vecs, &sfc_lock);
+ lock_to_other = true;
+ *unlock_mask |= BIT(paired_vecs->id);
+ } else {
+ *unlock_mask |= engine->mask;
}
/*
- * If the engine is using a SFC, tell the engine that a software reset
+ * If the engine is using an SFC, tell the engine that a software reset
* is going to happen. The engine will then try to force lock the SFC.
* If SFC ends up being locked to the engine we want to reset, we have
* to reset it as well (we will unlock it once the reset sequence is
* completed).
*/
- if (!(intel_uncore_read_fw(uncore, sfc_usage) & sfc_usage_bit))
- return 0;
-
- rmw_set_fw(uncore, sfc_forced_lock, sfc_forced_lock_bit);
+ rmw_set_fw(uncore, sfc_lock.lock_reg, sfc_lock.lock_bit);
ret = __intel_wait_for_register_fw(uncore,
- sfc_forced_lock_ack,
- sfc_forced_lock_ack_bit,
- sfc_forced_lock_ack_bit,
+ sfc_lock.ack_reg,
+ sfc_lock.ack_bit,
+ sfc_lock.ack_bit,
1000, 0, NULL);
- /* Was the SFC released while we were trying to lock it? */
- if (!(intel_uncore_read_fw(uncore, sfc_usage) & sfc_usage_bit))
+ /*
+ * Was the SFC released while we were trying to lock it?
+ *
+ * We should reset both the engine and the SFC if:
+ * - We were locking the SFC to this engine and the lock succeeded
+ * OR
+ * - We were locking the SFC to a different engine (Wa_14010733141)
+ * but the SFC was released before the lock was obtained.
+ *
+ * Otherwise we need only reset the engine by itself and we can
+ * leave the SFC alone.
+ */
+ lock_obtained = (intel_uncore_read_fw(uncore, sfc_lock.usage_reg) &
+ sfc_lock.usage_bit) != 0;
+ if (lock_obtained == lock_to_other)
return 0;
if (ret) {
@@ -408,7 +481,7 @@ static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *hw_mask)
return ret;
}
- *hw_mask |= sfc_reset_bit;
+ *reset_mask |= sfc_lock.reset_bit;
return 0;
}
@@ -416,28 +489,19 @@ static void gen11_unlock_sfc(struct intel_engine_cs *engine)
{
struct intel_uncore *uncore = engine->uncore;
u8 vdbox_sfc_access = engine->gt->info.vdbox_sfc_access;
- i915_reg_t sfc_forced_lock;
- u32 sfc_forced_lock_bit;
-
- switch (engine->class) {
- case VIDEO_DECODE_CLASS:
- if ((BIT(engine->instance) & vdbox_sfc_access) == 0)
- return;
-
- sfc_forced_lock = GEN11_VCS_SFC_FORCED_LOCK(engine);
- sfc_forced_lock_bit = GEN11_VCS_SFC_FORCED_LOCK_BIT;
- break;
+ struct sfc_lock_data sfc_lock = {};
- case VIDEO_ENHANCEMENT_CLASS:
- sfc_forced_lock = GEN11_VECS_SFC_FORCED_LOCK(engine);
- sfc_forced_lock_bit = GEN11_VECS_SFC_FORCED_LOCK_BIT;
- break;
+ if (engine->class != VIDEO_DECODE_CLASS &&
+ engine->class != VIDEO_ENHANCEMENT_CLASS)
+ return;
- default:
+ if (engine->class == VIDEO_DECODE_CLASS &&
+ (BIT(engine->instance) & vdbox_sfc_access) == 0)
return;
- }
- rmw_clear_fw(uncore, sfc_forced_lock, sfc_forced_lock_bit);
+ get_sfc_forced_lock_data(engine, &sfc_lock);
+
+ rmw_clear_fw(uncore, sfc_lock.lock_reg, sfc_lock.lock_bit);
}
static int gen11_reset_engines(struct intel_gt *gt,
@@ -456,23 +520,23 @@ static int gen11_reset_engines(struct intel_gt *gt,
};
struct intel_engine_cs *engine;
intel_engine_mask_t tmp;
- u32 hw_mask;
+ u32 reset_mask, unlock_mask = 0;
int ret;
if (engine_mask == ALL_ENGINES) {
- hw_mask = GEN11_GRDOM_FULL;
+ reset_mask = GEN11_GRDOM_FULL;
} else {
- hw_mask = 0;
+ reset_mask = 0;
for_each_engine_masked(engine, gt, engine_mask, tmp) {
GEM_BUG_ON(engine->id >= ARRAY_SIZE(hw_engine_mask));
- hw_mask |= hw_engine_mask[engine->id];
- ret = gen11_lock_sfc(engine, &hw_mask);
+ reset_mask |= hw_engine_mask[engine->id];
+ ret = gen11_lock_sfc(engine, &reset_mask, &unlock_mask);
if (ret)
goto sfc_unlock;
}
}
- ret = gen6_hw_domain_reset(gt, hw_mask);
+ ret = gen6_hw_domain_reset(gt, reset_mask);
sfc_unlock:
/*
@@ -480,10 +544,14 @@ static int gen11_reset_engines(struct intel_gt *gt,
* gen11_lock_sfc to make sure that we clean properly if something
* wrong happened during the lock (e.g. lock acquired after timeout
* expiration).
+ *
+ * Due to Wa_14010733141, we may have locked an SFC to an engine that
+ * wasn't being reset. So instead of calling gen11_unlock_sfc()
+ * on engine_mask, we instead call it on the mask of engines that our
+ * gen11_lock_sfc() calls told us actually had locks attempted.
*/
- if (engine_mask != ALL_ENGINES)
- for_each_engine_masked(engine, gt, engine_mask, tmp)
- gen11_unlock_sfc(engine);
+ for_each_engine_masked(engine, gt, unlock_mask, tmp)
+ gen11_unlock_sfc(engine);
return ret;
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cbf7a60afe54..f265733979ed 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -416,6 +416,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define GEN11_VECS_SFC_USAGE(engine) _MMIO((engine)->mmio_base + 0x2014)
#define GEN11_VECS_SFC_USAGE_BIT (1 << 0)
+#define GEN12_HCP_SFC_FORCED_LOCK(engine) _MMIO((engine)->mmio_base + 0x2910)
+#define GEN12_HCP_SFC_FORCED_LOCK_BIT REG_BIT(0)
+#define GEN12_HCP_SFC_LOCK_STATUS(engine) _MMIO((engine)->mmio_base + 0x2914)
+#define GEN12_HCP_SFC_LOCK_ACK_BIT REG_BIT(1)
+#define GEN12_HCP_SFC_USAGE_BIT REG_BIT(0)
+
#define GEN12_SFC_DONE(n) _MMIO(0x1cc00 + (n) * 0x100)
#define GEN12_SFC_DONE_MAX 4
--
2.27.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Wa_14010733141
2021-04-01 16:28 [Intel-gfx] [PATCH] drm/i915: Add Wa_14010733141 Aditya Swarup
@ 2021-04-01 19:38 ` Patchwork
2021-04-01 19:43 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-04-01 19:38 UTC (permalink / raw)
To: Aditya Swarup; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add Wa_14010733141
URL : https://patchwork.freedesktop.org/series/88670/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8a3e1ee2de0c drm/i915: Add Wa_14010733141
-:38: WARNING:BAD_SIGN_OFF: Co-developed-by: must be immediately followed by Signed-off-by:
#38:
Co-developed-by: Matt Roper <matthew.d.roper@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
total: 0 errors, 1 warnings, 0 checks, 279 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Add Wa_14010733141
2021-04-01 16:28 [Intel-gfx] [PATCH] drm/i915: Add Wa_14010733141 Aditya Swarup
2021-04-01 19:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2021-04-01 19:43 ` Patchwork
2021-04-01 20:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-04-01 19:43 UTC (permalink / raw)
To: Aditya Swarup; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add Wa_14010733141
URL : https://patchwork.freedesktop.org/series/88670/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add Wa_14010733141
2021-04-01 16:28 [Intel-gfx] [PATCH] drm/i915: Add Wa_14010733141 Aditya Swarup
2021-04-01 19:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-04-01 19:43 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
@ 2021-04-01 20:06 ` Patchwork
2021-04-02 1:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-04-07 2:01 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-04-01 20:06 UTC (permalink / raw)
To: Aditya Swarup; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4857 bytes --]
== Series Details ==
Series: drm/i915: Add Wa_14010733141
URL : https://patchwork.freedesktop.org/series/88670/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9925 -> Patchwork_19888
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/index.html
Known issues
------------
Here are the changes found in Patchwork_19888 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u: NOTRUN -> [SKIP][1] ([fdo#109271]) +27 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html
* igt@core_hotunplug@unbind-rebind:
- fi-bdw-5557u: NOTRUN -> [WARN][2] ([i915#2283])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-bdw-5557u/igt@core_hotunplug@unbind-rebind.html
* igt@gem_flink_basic@basic:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@gem_flink_basic@basic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-tgl-y/igt@gem_flink_basic@basic.html
* igt@i915_module_load@reload:
- fi-kbl-7500u: [PASS][5] -> [DMESG-WARN][6] ([i915#2605])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-kbl-7500u/igt@i915_module_load@reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-kbl-7500u/igt@i915_module_load@reload.html
* igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u: NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) +8 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u: [PASS][8] -> [DMESG-WARN][9] ([i915#165]) +15 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-y: [DMESG-WARN][10] ([i915#2411] / [i915#402]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
* igt@gem_flink_basic@double-flink:
- fi-tgl-y: [DMESG-WARN][12] ([i915#402]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-tgl-y/igt@gem_flink_basic@double-flink.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-tgl-y/igt@gem_flink_basic@double-flink.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [DMESG-WARN][14] ([i915#2868]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
[i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2605]: https://gitlab.freedesktop.org/drm/intel/issues/2605
[i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (47 -> 41)
------------------------------
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-icl-y fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9925 -> Patchwork_19888
CI-20190529: 20190529
CI_DRM_9925: 44fed14ddf3ab2d108508846f385377082948d76 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6056: 84e6a7e19ccc7fafc46f372e756cad9d4aa093f7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19888: 8a3e1ee2de0cb166a174c578506fc74390ee5f62 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8a3e1ee2de0c drm/i915: Add Wa_14010733141
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/index.html
[-- Attachment #1.2: Type: text/html, Size: 5818 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add Wa_14010733141
2021-04-01 16:28 [Intel-gfx] [PATCH] drm/i915: Add Wa_14010733141 Aditya Swarup
` (2 preceding siblings ...)
2021-04-01 20:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-04-02 1:15 ` Patchwork
2021-04-07 2:01 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-04-02 1:15 UTC (permalink / raw)
To: Aditya Swarup; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30251 bytes --]
== Series Details ==
Series: drm/i915: Add Wa_14010733141
URL : https://patchwork.freedesktop.org/series/88670/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9925_full -> Patchwork_19888_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_19888_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19888_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19888_full:
### IGT changes ###
#### Possible regressions ####
* igt@perf_pmu@busy-accuracy-98@bcs0:
- shard-skl: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl3/igt@perf_pmu@busy-accuracy-98@bcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl3/igt@perf_pmu@busy-accuracy-98@bcs0.html
#### Warnings ####
* igt@kms_vblank@pipe-d-query-idle:
- shard-skl: [SKIP][3] ([fdo#109271]) -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl1/igt@kms_vblank@pipe-d-query-idle.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl4/igt@kms_vblank@pipe-d-query-idle.html
Known issues
------------
Here are the changes found in Patchwork_19888_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-clear:
- shard-glk: [PASS][5] -> [FAIL][6] ([i915#1888] / [i915#3160])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk1/igt@gem_create@create-clear.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk2/igt@gem_create@create-clear.html
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][7] ([i915#3002])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl4/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@clone:
- shard-snb: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1099]) +3 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-snb2/igt@gem_ctx_persistence@clone.html
* igt@gem_ctx_persistence@legacy-engines-hang@render:
- shard-iclb: [PASS][9] -> [FAIL][10] ([i915#2410])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb1/igt@gem_ctx_persistence@legacy-engines-hang@render.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb2/igt@gem_ctx_persistence@legacy-engines-hang@render.html
* igt@gem_eio@unwedge-stress:
- shard-iclb: [PASS][11] -> [TIMEOUT][12] ([i915#2369] / [i915#2481] / [i915#3070])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb7/igt@gem_eio@unwedge-stress.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb1/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_capture@pi@rcs0:
- shard-skl: [PASS][13] -> [INCOMPLETE][14] ([i915#2369])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl7/igt@gem_exec_capture@pi@rcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl1/igt@gem_exec_capture@pi@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][15] -> [FAIL][16] ([i915#2842]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-tglb1/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-kbl: [PASS][17] -> [FAIL][18] ([i915#2842]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][19] ([i915#2842])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb1/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-iclb: [PASS][20] -> [FAIL][21] ([i915#2842])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb7/igt@gem_exec_fair@basic-pace@vecs0.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb1/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-snb: NOTRUN -> [SKIP][22] ([fdo#109271]) +330 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-snb7/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_exec_reloc@basic-many-active@bcs0:
- shard-apl: NOTRUN -> [FAIL][23] ([i915#2389]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl7/igt@gem_exec_reloc@basic-many-active@bcs0.html
* igt@gem_exec_reloc@basic-wide-active@rcs0:
- shard-kbl: NOTRUN -> [FAIL][24] ([i915#2389]) +4 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl3/igt@gem_exec_reloc@basic-wide-active@rcs0.html
* igt@gem_exec_reloc@basic-wide-active@vcs1:
- shard-iclb: NOTRUN -> [FAIL][25] ([i915#2389])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb2/igt@gem_exec_reloc@basic-wide-active@vcs1.html
* igt@gem_mmap_gtt@cpuset-big-copy:
- shard-iclb: [PASS][26] -> [FAIL][27] ([i915#307])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy.html
* igt@gem_pwrite@basic-exhaustion:
- shard-apl: NOTRUN -> [WARN][28] ([i915#2658])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl7/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_userptr_blits@input-checking:
- shard-apl: NOTRUN -> [DMESG-WARN][29] ([i915#3002])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl1/igt@gem_userptr_blits@input-checking.html
* igt@gem_userptr_blits@process-exit-mmap@gtt:
- shard-kbl: NOTRUN -> [SKIP][30] ([fdo#109271] / [i915#1699]) +3 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl3/igt@gem_userptr_blits@process-exit-mmap@gtt.html
* igt@gem_userptr_blits@vma-merge:
- shard-snb: NOTRUN -> [FAIL][31] ([i915#2724])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-snb2/igt@gem_userptr_blits@vma-merge.html
* igt@gen9_exec_parse@bb-large:
- shard-apl: NOTRUN -> [FAIL][32] ([i915#3296])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl7/igt@gen9_exec_parse@bb-large.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [PASS][33] -> [INCOMPLETE][34] ([i915#2782])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-snb2/igt@i915_selftest@live@hangcheck.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-snb6/igt@i915_selftest@live@hangcheck.html
* igt@kms_big_joiner@basic:
- shard-skl: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#2705])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl10/igt@kms_big_joiner@basic.html
* igt@kms_chamelium@dp-mode-timings:
- shard-apl: NOTRUN -> [SKIP][36] ([fdo#109271] / [fdo#111827]) +23 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl8/igt@kms_chamelium@dp-mode-timings.html
* igt@kms_chamelium@hdmi-audio-edid:
- shard-glk: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk8/igt@kms_chamelium@hdmi-audio-edid.html
* igt@kms_color@pipe-b-gamma:
- shard-skl: [PASS][38] -> [FAIL][39] ([i915#71])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl7/igt@kms_color@pipe-b-gamma.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl1/igt@kms_color@pipe-b-gamma.html
* igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
- shard-kbl: NOTRUN -> [SKIP][40] ([fdo#109271] / [fdo#111827]) +7 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl1/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html
* igt@kms_color_chamelium@pipe-d-ctm-0-25:
- shard-skl: NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl10/igt@kms_color_chamelium@pipe-d-ctm-0-25.html
* igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes:
- shard-snb: NOTRUN -> [SKIP][42] ([fdo#109271] / [fdo#111827]) +14 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-snb7/igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes.html
* igt@kms_content_protection@atomic-dpms:
- shard-apl: NOTRUN -> [TIMEOUT][43] ([i915#1319])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl1/igt@kms_content_protection@atomic-dpms.html
* igt@kms_cursor_crc@pipe-b-cursor-512x512-random:
- shard-kbl: NOTRUN -> [SKIP][44] ([fdo#109271]) +90 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-512x512-random.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-kbl: NOTRUN -> [DMESG-WARN][45] ([i915#180])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-skl: [PASS][46] -> [FAIL][47] ([i915#2346])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_draw_crc@draw-method-rgb565-blt-ytiled:
- shard-glk: [PASS][48] -> [FAIL][49] ([i915#52] / [i915#54])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk1/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk9/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-apl: NOTRUN -> [DMESG-WARN][50] ([i915#180])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: [PASS][51] -> [FAIL][52] ([i915#2122]) +1 similar issue
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-hdmi-a2:
- shard-glk: [PASS][53] -> [FAIL][54] ([i915#2122])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk3/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-hdmi-a2.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk5/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-hdmi-a2.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-apl: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#2672])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile:
- shard-apl: NOTRUN -> [FAIL][56] ([i915#2641])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
- shard-glk: [PASS][57] -> [FAIL][58] ([i915#49]) +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk3/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-shrfb-fliptrack-mmap-gtt:
- shard-skl: NOTRUN -> [SKIP][59] ([fdo#109271]) +18 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl4/igt@kms_frontbuffer_tracking@fbcpsr-1p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][60] -> [FAIL][61] ([i915#1188])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl10/igt@kms_hdr@bpc-switch-dpms.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl8/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-d:
- shard-kbl: NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#533])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl3/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-skl: [PASS][63] -> [INCOMPLETE][64] ([i915#198])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
- shard-kbl: NOTRUN -> [FAIL][65] ([fdo#108145] / [i915#265]) +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl4/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-apl: NOTRUN -> [FAIL][66] ([fdo#108145] / [i915#265]) +2 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl7/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][67] -> [FAIL][68] ([fdo#108145] / [i915#265]) +1 similar issue
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
- shard-kbl: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#658]) +2 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5:
- shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#658]) +5 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl6/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
- shard-glk: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#658])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk8/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
- shard-skl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#658])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl10/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html
* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [PASS][73] -> [SKIP][74] ([fdo#109441]) +3 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb8/igt@kms_psr@psr2_cursor_blt.html
* igt@kms_vblank@pipe-d-wait-forked-hang:
- shard-apl: NOTRUN -> [SKIP][75] ([fdo#109271]) +212 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl1/igt@kms_vblank@pipe-d-wait-forked-hang.html
* igt@kms_vblank@pipe-d-wait-idle:
- shard-apl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#533]) +1 similar issue
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl7/igt@kms_vblank@pipe-d-wait-idle.html
* igt@kms_writeback@writeback-check-output:
- shard-kbl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#2437])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl3/igt@kms_writeback@writeback-check-output.html
* igt@perf_pmu@rc6-suspend:
- shard-kbl: [PASS][78] -> [DMESG-WARN][79] ([i915#180]) +2 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl2/igt@perf_pmu@rc6-suspend.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl1/igt@perf_pmu@rc6-suspend.html
- shard-apl: [PASS][80] -> [DMESG-WARN][81] ([i915#180])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-apl7/igt@perf_pmu@rc6-suspend.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl8/igt@perf_pmu@rc6-suspend.html
* igt@prime_nv_pcopy@test1_macro:
- shard-glk: NOTRUN -> [SKIP][82] ([fdo#109271]) +15 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk8/igt@prime_nv_pcopy@test1_macro.html
* igt@sysfs_clients@create:
- shard-apl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2994]) +2 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl7/igt@sysfs_clients@create.html
* igt@sysfs_clients@pidname:
- shard-skl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2994]) +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl10/igt@sysfs_clients@pidname.html
* igt@sysfs_clients@sema-25:
- shard-kbl: NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2994]) +3 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl6/igt@sysfs_clients@sema-25.html
#### Possible fixes ####
* igt@gem_ctx_persistence@many-contexts:
- shard-tglb: [FAIL][86] ([i915#2410]) -> [PASS][87]
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-tglb5/igt@gem_ctx_persistence@many-contexts.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-tglb3/igt@gem_ctx_persistence@many-contexts.html
* igt@gem_ctx_shared@create-shared-gtt:
- shard-glk: [INCOMPLETE][88] -> [PASS][89]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk8/igt@gem_ctx_shared@create-shared-gtt.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk8/igt@gem_ctx_shared@create-shared-gtt.html
* igt@gem_eio@in-flight-contexts-10ms:
- shard-tglb: [TIMEOUT][90] ([i915#3063]) -> [PASS][91]
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-tglb2/igt@gem_eio@in-flight-contexts-10ms.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-tglb2/igt@gem_eio@in-flight-contexts-10ms.html
* igt@gem_eio@in-flight-contexts-immediate:
- shard-skl: [TIMEOUT][92] ([i915#3063]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl7/igt@gem_eio@in-flight-contexts-immediate.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl10/igt@gem_eio@in-flight-contexts-immediate.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [TIMEOUT][94] ([i915#2369] / [i915#3063]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-tglb2/igt@gem_eio@unwedge-stress.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-tglb2/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [FAIL][96] ([i915#2842]) -> [PASS][97] +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb5/igt@gem_exec_fair@basic-none-share@rcs0.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-tglb: [FAIL][98] ([i915#2842]) -> [PASS][99] +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-tglb2/igt@gem_exec_fair@basic-pace@vcs1.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-tglb2/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [SKIP][100] ([fdo#109271]) -> [PASS][101] +2 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@gem_exec_fair@basic-pace@vecs0.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-glk: [FAIL][102] ([i915#2842]) -> [PASS][103] +2 similar issues
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk9/igt@gem_exec_fair@basic-throttle@rcs0.html
- shard-iclb: [FAIL][104] ([i915#2849]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb3/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_whisper@basic-contexts-all:
- shard-glk: [DMESG-WARN][106] ([i915#118] / [i915#95]) -> [PASS][107] +2 similar issues
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk4/igt@gem_exec_whisper@basic-contexts-all.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk7/igt@gem_exec_whisper@basic-contexts-all.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][108] ([i915#2190]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-tglb6/igt@gem_huc_copy@huc-copy.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-tglb1/igt@gem_huc_copy@huc-copy.html
* igt@gem_mmap_gtt@cpuset-basic-small-copy-xy:
- shard-iclb: [FAIL][110] ([i915#307]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb1/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb1/igt@gem_mmap_gtt@cpuset-basic-small-copy-xy.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [FAIL][112] ([i915#72]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-glk1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-skl: [INCOMPLETE][114] -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl3/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl3/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][116] ([i915#2346] / [i915#533]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [INCOMPLETE][118] ([i915#155] / [i915#180] / [i915#636]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-skl: [FAIL][120] ([i915#79]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-kbl: [DMESG-WARN][122] ([i915#180]) -> [PASS][123] +4 similar issues
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-apl: [DMESG-WARN][124] ([i915#180]) -> [PASS][125] +1 similar issue
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-apl8/igt@kms_flip@flip-vs-suspend@a-dp1.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-apl6/igt@kms_flip@flip-vs-suspend@a-dp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
- shard-skl: [FAIL][126] ([i915#2122]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [SKIP][128] ([fdo#109441]) -> [PASS][129]
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb1/igt@kms_psr@psr2_primary_page_flip.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [INCOMPLETE][130] ([i915#155]) -> [PASS][131]
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@perf@blocking:
- shard-skl: [FAIL][132] ([i915#1542]) -> [PASS][133]
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-skl7/igt@perf@blocking.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-skl1/igt@perf@blocking.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][134] ([i915#1804] / [i915#2684]) -> [WARN][135] ([i915#2681] / [i915#2684])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb7/igt@i915_pm_rc6_residency@rc6-fence.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][136] ([i915#2681] / [i915#2684]) -> [WARN][137] ([i915#1804] / [i915#2684])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb7/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
- shard-iclb: [SKIP][138] ([i915#658]) -> [SKIP][139] ([i915#2920]) +4 similar issues
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-iclb5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2505] / [i915#3002] / [i915#92]) -> ([FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151], [FAIL][152], [FAIL][153], [FAIL][154]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2292] / [i915#2505] / [i915#3002])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl6/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl7/igt@runner@aborted.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@runner@aborted.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl7/igt@runner@aborted.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@runner@aborted.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9925/shard-kbl1/igt@runner@aborted.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl6/igt@runner@aborted.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/shard-kbl7/igt@runner@aborted.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Pat
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19888/index.html
[-- Attachment #1.2: Type: text/html, Size: 33854 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Add Wa_14010733141
2021-04-01 16:28 [Intel-gfx] [PATCH] drm/i915: Add Wa_14010733141 Aditya Swarup
` (3 preceding siblings ...)
2021-04-02 1:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-04-07 2:01 ` Daniele Ceraolo Spurio
4 siblings, 0 replies; 6+ messages in thread
From: Daniele Ceraolo Spurio @ 2021-04-07 2:01 UTC (permalink / raw)
To: Aditya Swarup, intel-gfx; +Cc: Lucas De Marchi
On 4/1/2021 9:28 AM, Aditya Swarup wrote:
> The WA requires the following procedure for VDBox SFC reset:
>
> If (MFX-SFC usage is 1) {
> 1.Issue a MFX-SFC forced lock
> 2.Wait for MFX-SFC forced lock ack
> 3.Check the MFX-SFC usage bit
> If (MFX-SFC usage bit is 1)
> Reset VDBOX and SFC
> else
> Reset VDBOX
> Release the force lock MFX-SFC
> }
> else if(HCP+SFC usage is 1) {
> 1.Issue a VE-SFC forced lock
> 2.Wait for SFC forced lock ack
> 3.Check the VE-SFC usage bit
> If (VE-SFC usage bit is 1)
> Reset VDBOX
> else
> Reset VDBOX and SFC
> Release the force lock VE-SFC.
> }
> else
> Reset VDBOX
>
> - Restructure: the changes to the original code flow should stay
> relatively minimal; we only need to do an extra HCP check after the
> usual VD-MFX check and, if true, switch the register/bit we're
> performing the lock on.(MattR)
>
> Bspec: 52890, 53509
>
> Co-developed-by: Matt Roper <matthew.d.roper@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_reset.c | 194 +++++++++++++++++---------
> drivers/gpu/drm/i915/i915_reg.h | 6 +
> 2 files changed, 137 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
> index a377c4588aaa..bcb3d864db11 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -338,15 +338,69 @@ static int gen6_reset_engines(struct intel_gt *gt,
> return gen6_hw_domain_reset(gt, hw_mask);
> }
>
> -static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *hw_mask)
> +static struct intel_engine_cs *find_sfc_paired_vecs_engine(struct intel_engine_cs *engine)
> +{
> + int vecs_id;
> +
> + GEM_BUG_ON(engine->class != VIDEO_DECODE_CLASS);
> +
> + vecs_id = _VECS((engine->instance) / 2);
> +
> + return engine->gt->engine[vecs_id];
> +}
> +
> +struct sfc_lock_data {
> + i915_reg_t lock_reg;
> + i915_reg_t ack_reg;
> + i915_reg_t usage_reg;
> + u32 lock_bit;
> + u32 ack_bit;
> + u32 usage_bit;
> + u32 reset_bit;
> +};
> +
> +static void get_sfc_forced_lock_data(struct intel_engine_cs *engine,
> + struct sfc_lock_data *sfc_lock)
> +{
> + switch (engine->class) {
> + default:
> + MISSING_CASE(engine->class);
> + fallthrough;
> + case VIDEO_DECODE_CLASS:
> + sfc_lock->lock_reg = GEN11_VCS_SFC_FORCED_LOCK(engine);
> + sfc_lock->lock_bit = GEN11_VCS_SFC_FORCED_LOCK_BIT;
> +
> + sfc_lock->ack_reg = GEN11_VCS_SFC_LOCK_STATUS(engine);
> + sfc_lock->ack_bit = GEN11_VCS_SFC_LOCK_ACK_BIT;
> +
> + sfc_lock->usage_reg = GEN11_VCS_SFC_LOCK_STATUS(engine);
> + sfc_lock->usage_bit = GEN11_VCS_SFC_USAGE_BIT;
> + sfc_lock->reset_bit = GEN11_VCS_SFC_RESET_BIT(engine->instance);
> +
> + break;
> + case VIDEO_ENHANCEMENT_CLASS:
> + sfc_lock->lock_reg = GEN11_VECS_SFC_FORCED_LOCK(engine);
> + sfc_lock->lock_bit = GEN11_VECS_SFC_FORCED_LOCK_BIT;
> +
> + sfc_lock->ack_reg = GEN11_VECS_SFC_LOCK_ACK(engine);
> + sfc_lock->ack_bit = GEN11_VECS_SFC_LOCK_ACK_BIT;
> +
> + sfc_lock->usage_reg = GEN11_VECS_SFC_USAGE(engine);
> + sfc_lock->usage_bit = GEN11_VECS_SFC_USAGE_BIT;
> + sfc_lock->reset_bit = GEN11_VECS_SFC_RESET_BIT(engine->instance);
> +
> + break;
> + }
> +}
> +
> +static int gen11_lock_sfc(struct intel_engine_cs *engine,
> + u32 *reset_mask,
> + u32 *unlock_mask)
> {
> struct intel_uncore *uncore = engine->uncore;
> u8 vdbox_sfc_access = engine->gt->info.vdbox_sfc_access;
> - i915_reg_t sfc_forced_lock, sfc_forced_lock_ack;
> - u32 sfc_forced_lock_bit, sfc_forced_lock_ack_bit;
> - i915_reg_t sfc_usage;
> - u32 sfc_usage_bit;
> - u32 sfc_reset_bit;
> + struct sfc_lock_data sfc_lock;
> + bool lock_obtained, lock_to_other = false;
> int ret;
>
> switch (engine->class) {
> @@ -354,53 +408,72 @@ static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *hw_mask)
> if ((BIT(engine->instance) & vdbox_sfc_access) == 0)
> return 0;
>
> - sfc_forced_lock = GEN11_VCS_SFC_FORCED_LOCK(engine);
> - sfc_forced_lock_bit = GEN11_VCS_SFC_FORCED_LOCK_BIT;
> -
> - sfc_forced_lock_ack = GEN11_VCS_SFC_LOCK_STATUS(engine);
> - sfc_forced_lock_ack_bit = GEN11_VCS_SFC_LOCK_ACK_BIT;
> + fallthrough;
> + case VIDEO_ENHANCEMENT_CLASS:
> + get_sfc_forced_lock_data(engine, &sfc_lock);
>
> - sfc_usage = GEN11_VCS_SFC_LOCK_STATUS(engine);
> - sfc_usage_bit = GEN11_VCS_SFC_USAGE_BIT;
> - sfc_reset_bit = GEN11_VCS_SFC_RESET_BIT(engine->instance);
> break;
> + default:
> + return 0;
> + }
>
> - case VIDEO_ENHANCEMENT_CLASS:
> - sfc_forced_lock = GEN11_VECS_SFC_FORCED_LOCK(engine);
> - sfc_forced_lock_bit = GEN11_VECS_SFC_FORCED_LOCK_BIT;
> + if (!(intel_uncore_read_fw(uncore, sfc_lock.usage_reg) & sfc_lock.usage_bit)) {
> + struct intel_engine_cs *paired_vecs;
>
> - sfc_forced_lock_ack = GEN11_VECS_SFC_LOCK_ACK(engine);
> - sfc_forced_lock_ack_bit = GEN11_VECS_SFC_LOCK_ACK_BIT;
> + if (engine->class != VIDEO_DECODE_CLASS ||
> + !IS_GEN(engine->i915, 12))
> + return 0;
>
> - sfc_usage = GEN11_VECS_SFC_USAGE(engine);
> - sfc_usage_bit = GEN11_VECS_SFC_USAGE_BIT;
> - sfc_reset_bit = GEN11_VECS_SFC_RESET_BIT(engine->instance);
> - break;
> + /*
> + * Wa_14010733141
> + *
> + * If the VCS-MFX isn't using the SFC, we also need to check
> + * whether VCS-HCP is using it. If so, we need to issue a *VE*
> + * forced lock on the VE engine that shares the same SFC.
> + */
> + if (!(intel_uncore_read_fw(uncore,
> + GEN12_HCP_SFC_LOCK_STATUS(engine)) &
> + GEN12_HCP_SFC_USAGE_BIT))
> + return 0;
>
> - default:
> - return 0;
> + paired_vecs = find_sfc_paired_vecs_engine(engine);
> + get_sfc_forced_lock_data(paired_vecs, &sfc_lock);
> + lock_to_other = true;
> + *unlock_mask |= BIT(paired_vecs->id);
nit: could use paired_vecs->engine_mask directly here instead of BIT(...)
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
> + } else {
> + *unlock_mask |= engine->mask;
> }
>
> /*
> - * If the engine is using a SFC, tell the engine that a software reset
> + * If the engine is using an SFC, tell the engine that a software reset
> * is going to happen. The engine will then try to force lock the SFC.
> * If SFC ends up being locked to the engine we want to reset, we have
> * to reset it as well (we will unlock it once the reset sequence is
> * completed).
> */
> - if (!(intel_uncore_read_fw(uncore, sfc_usage) & sfc_usage_bit))
> - return 0;
> -
> - rmw_set_fw(uncore, sfc_forced_lock, sfc_forced_lock_bit);
> + rmw_set_fw(uncore, sfc_lock.lock_reg, sfc_lock.lock_bit);
>
> ret = __intel_wait_for_register_fw(uncore,
> - sfc_forced_lock_ack,
> - sfc_forced_lock_ack_bit,
> - sfc_forced_lock_ack_bit,
> + sfc_lock.ack_reg,
> + sfc_lock.ack_bit,
> + sfc_lock.ack_bit,
> 1000, 0, NULL);
>
> - /* Was the SFC released while we were trying to lock it? */
> - if (!(intel_uncore_read_fw(uncore, sfc_usage) & sfc_usage_bit))
> + /*
> + * Was the SFC released while we were trying to lock it?
> + *
> + * We should reset both the engine and the SFC if:
> + * - We were locking the SFC to this engine and the lock succeeded
> + * OR
> + * - We were locking the SFC to a different engine (Wa_14010733141)
> + * but the SFC was released before the lock was obtained.
> + *
> + * Otherwise we need only reset the engine by itself and we can
> + * leave the SFC alone.
> + */
> + lock_obtained = (intel_uncore_read_fw(uncore, sfc_lock.usage_reg) &
> + sfc_lock.usage_bit) != 0;
> + if (lock_obtained == lock_to_other)
> return 0;
>
> if (ret) {
> @@ -408,7 +481,7 @@ static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *hw_mask)
> return ret;
> }
>
> - *hw_mask |= sfc_reset_bit;
> + *reset_mask |= sfc_lock.reset_bit;
> return 0;
> }
>
> @@ -416,28 +489,19 @@ static void gen11_unlock_sfc(struct intel_engine_cs *engine)
> {
> struct intel_uncore *uncore = engine->uncore;
> u8 vdbox_sfc_access = engine->gt->info.vdbox_sfc_access;
> - i915_reg_t sfc_forced_lock;
> - u32 sfc_forced_lock_bit;
> -
> - switch (engine->class) {
> - case VIDEO_DECODE_CLASS:
> - if ((BIT(engine->instance) & vdbox_sfc_access) == 0)
> - return;
> -
> - sfc_forced_lock = GEN11_VCS_SFC_FORCED_LOCK(engine);
> - sfc_forced_lock_bit = GEN11_VCS_SFC_FORCED_LOCK_BIT;
> - break;
> + struct sfc_lock_data sfc_lock = {};
>
> - case VIDEO_ENHANCEMENT_CLASS:
> - sfc_forced_lock = GEN11_VECS_SFC_FORCED_LOCK(engine);
> - sfc_forced_lock_bit = GEN11_VECS_SFC_FORCED_LOCK_BIT;
> - break;
> + if (engine->class != VIDEO_DECODE_CLASS &&
> + engine->class != VIDEO_ENHANCEMENT_CLASS)
> + return;
>
> - default:
> + if (engine->class == VIDEO_DECODE_CLASS &&
> + (BIT(engine->instance) & vdbox_sfc_access) == 0)
> return;
> - }
>
> - rmw_clear_fw(uncore, sfc_forced_lock, sfc_forced_lock_bit);
> + get_sfc_forced_lock_data(engine, &sfc_lock);
> +
> + rmw_clear_fw(uncore, sfc_lock.lock_reg, sfc_lock.lock_bit);
> }
>
> static int gen11_reset_engines(struct intel_gt *gt,
> @@ -456,23 +520,23 @@ static int gen11_reset_engines(struct intel_gt *gt,
> };
> struct intel_engine_cs *engine;
> intel_engine_mask_t tmp;
> - u32 hw_mask;
> + u32 reset_mask, unlock_mask = 0;
> int ret;
>
> if (engine_mask == ALL_ENGINES) {
> - hw_mask = GEN11_GRDOM_FULL;
> + reset_mask = GEN11_GRDOM_FULL;
> } else {
> - hw_mask = 0;
> + reset_mask = 0;
> for_each_engine_masked(engine, gt, engine_mask, tmp) {
> GEM_BUG_ON(engine->id >= ARRAY_SIZE(hw_engine_mask));
> - hw_mask |= hw_engine_mask[engine->id];
> - ret = gen11_lock_sfc(engine, &hw_mask);
> + reset_mask |= hw_engine_mask[engine->id];
> + ret = gen11_lock_sfc(engine, &reset_mask, &unlock_mask);
> if (ret)
> goto sfc_unlock;
> }
> }
>
> - ret = gen6_hw_domain_reset(gt, hw_mask);
> + ret = gen6_hw_domain_reset(gt, reset_mask);
>
> sfc_unlock:
> /*
> @@ -480,10 +544,14 @@ static int gen11_reset_engines(struct intel_gt *gt,
> * gen11_lock_sfc to make sure that we clean properly if something
> * wrong happened during the lock (e.g. lock acquired after timeout
> * expiration).
> + *
> + * Due to Wa_14010733141, we may have locked an SFC to an engine that
> + * wasn't being reset. So instead of calling gen11_unlock_sfc()
> + * on engine_mask, we instead call it on the mask of engines that our
> + * gen11_lock_sfc() calls told us actually had locks attempted.
> */
> - if (engine_mask != ALL_ENGINES)
> - for_each_engine_masked(engine, gt, engine_mask, tmp)
> - gen11_unlock_sfc(engine);
> + for_each_engine_masked(engine, gt, unlock_mask, tmp)
> + gen11_unlock_sfc(engine);
>
> return ret;
> }
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index cbf7a60afe54..f265733979ed 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -416,6 +416,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN11_VECS_SFC_USAGE(engine) _MMIO((engine)->mmio_base + 0x2014)
> #define GEN11_VECS_SFC_USAGE_BIT (1 << 0)
>
> +#define GEN12_HCP_SFC_FORCED_LOCK(engine) _MMIO((engine)->mmio_base + 0x2910)
> +#define GEN12_HCP_SFC_FORCED_LOCK_BIT REG_BIT(0)
> +#define GEN12_HCP_SFC_LOCK_STATUS(engine) _MMIO((engine)->mmio_base + 0x2914)
> +#define GEN12_HCP_SFC_LOCK_ACK_BIT REG_BIT(1)
> +#define GEN12_HCP_SFC_USAGE_BIT REG_BIT(0)
> +
> #define GEN12_SFC_DONE(n) _MMIO(0x1cc00 + (n) * 0x100)
> #define GEN12_SFC_DONE_MAX 4
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-04-07 2:01 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-01 16:28 [Intel-gfx] [PATCH] drm/i915: Add Wa_14010733141 Aditya Swarup
2021-04-01 19:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-04-01 19:43 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-04-01 20:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-04-02 1:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-04-07 2:01 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.