From: Nicholas Piggin <npiggin@gmail.com> To: Paul Mackerras <paulus@ozlabs.org> Cc: linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org Subject: Re: [PATCH v6 30/48] KVM: PPC: Book3S HV P9: Implement the rest of the P9 path in C Date: Tue, 06 Apr 2021 19:12:56 +1000 [thread overview] Message-ID: <1617699912.sfw989xp02.astroid@bobo.none> (raw) In-Reply-To: <YGwNRUahuv42VZPR@thinks.paulus.ozlabs.org> Excerpts from Paul Mackerras's message of April 6, 2021 5:27 pm: > On Mon, Apr 05, 2021 at 11:19:30AM +1000, Nicholas Piggin wrote: >> Almost all logic is moved to C, by introducing a new in_guest mode for >> the P9 path that branches very early in the KVM interrupt handler to >> P9 exit code. >> >> The main P9 entry and exit assembly is now only about 160 lines of low >> level stack setup and register save/restore, plus a bad-interrupt >> handler. >> >> There are two motivations for this, the first is just make the code more >> maintainable being in C. The second is to reduce the amount of code >> running in a special KVM mode, "realmode". In quotes because with radix >> it is no longer necessarily real-mode in the MMU, but it still has to be >> treated specially because it may be in real-mode, and has various >> important registers like PID, DEC, TB, etc set to guest. This is hostile >> to the rest of Linux and can't use arbitrary kernel functionality or be >> instrumented well. >> >> This initial patch is a reasonably faithful conversion of the asm code, >> but it does lack any loop to return quickly back into the guest without >> switching out of realmode in the case of unimportant or easily handled >> interrupts. As explained in previous changes, handling HV interrupts >> in real mode is not so important for P9. >> >> Use of Linux 64s interrupt entry code register conventions including >> paca EX_ save areas are brought into the KVM code. There is no point >> shuffling things into different paca save areas and making up a >> different calling convention for KVM. >> >> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > > [snip] > >> +/* >> + * Took an interrupt somewhere right before HRFID to guest, so registers are >> + * in a bad way. Return things hopefully enough to run host virtual code and >> + * run the Linux interrupt handler (SRESET or MCE) to print something useful. >> + * >> + * We could be really clever and save all host registers in known locations >> + * before setting HSTATE_IN_GUEST, then restoring them all here, and setting >> + * return address to a fixup that sets them up again. But that's a lot of >> + * effort for a small bit of code. Lots of other things to do first. >> + */ >> +kvmppc_p9_bad_interrupt: >> + /* >> + * Set GUEST_MODE_NONE so the handler won't branch to KVM, and clear >> + * MSR_RI in r12 ([H]SRR1) so the handler won't try to return. >> + */ >> + li r10,KVM_GUEST_MODE_NONE >> + stb r10,HSTATE_IN_GUEST(r13) >> + li r10,MSR_RI >> + andc r12,r12,r10 >> + >> + /* >> + * Clean up guest registers to give host a chance to run. >> + */ >> + li r10,0 >> + mtspr SPRN_AMR,r10 >> + mtspr SPRN_IAMR,r10 >> + mtspr SPRN_CIABR,r10 >> + mtspr SPRN_DAWRX0,r10 >> +BEGIN_FTR_SECTION >> + mtspr SPRN_DAWRX1,r10 >> +END_FTR_SECTION_IFSET(CPU_FTR_DAWR1) >> + mtspr SPRN_PID,r10 >> + >> + /* >> + * Switch to host MMU mode >> + */ >> + ld r10, HSTATE_KVM_VCPU(r13) >> + ld r10, VCPU_KVM(r10) >> + lwz r10, KVM_HOST_LPID(r10) >> + mtspr SPRN_LPID,r10 >> + >> + ld r10, HSTATE_KVM_VCPU(r13) >> + ld r10, VCPU_KVM(r10) >> + ld r10, KVM_HOST_LPCR(r10) >> + mtspr SPRN_LPCR,r10 >> + >> + /* >> + * Go back to interrupt handler >> + */ >> + ld r10,HSTATE_SCRATCH0(r13) >> + cmpwi r10,BOOK3S_INTERRUPT_MACHINE_CHECK >> + beq machine_check_common >> + >> + ld r10,HSTATE_SCRATCH0(r13) >> + cmpwi r10,BOOK3S_INTERRUPT_SYSTEM_RESET >> + beq system_reset_common >> + >> + b . > > So you only handle machine check and system reset here? I would think > that program check would also be useful, for the cases where people > put BUG_ON in sensitive places (see below). DSI and ISI could also be > useful for the null pointer dereference cases, I would think. Those ones have their own stack, so a bit simpler to run them (and they obviously have to be handled as they are NMIs). I'll see if we can do something to improve the others a bit. Maybe just call program check for any other exception might work, making sure that it'll use the emergency stack rather than something that looks like a kernel stack but is a guest value, I'll see what we can get to work. >> +static inline void mtslb(unsigned int idx, u64 slbee, u64 slbev) >> +{ >> + BUG_ON((slbee & 0xfff) != idx); >> + >> + asm volatile("slbmte %0,%1" :: "r" (slbev), "r" (slbee)); >> +} > > Using BUG_ON here feels dangerous, and the condition it is testing is > certainly not one where the host kernel is in such trouble that it > can't continue to run. If the index was wrong then at worst the guest > kernel would be in trouble. So I don't believe BUG_ON is appropriate. Yeah good point, some of it was a bit of development paranoia but I do have to go through and tighten these up. >> + >> +/* >> + * Malicious or buggy radix guests may have inserted SLB entries >> + * (only 0..3 because radix always runs with UPRT=1), so these must >> + * be cleared here to avoid side-channels. slbmte is used rather >> + * than slbia, as it won't clear cached translations. >> + */ >> +static void radix_clear_slb(void) >> +{ >> + u64 slbee, slbev; >> + int i; >> + >> + for (i = 0; i < 4; i++) { >> + mfslb(i, &slbee, &slbev); >> + if (unlikely(slbee || slbev)) { >> + slbee = i; >> + slbev = 0; >> + mtslb(i, slbee, slbev); >> + } >> + } > > Are four slbmfee + slbmfev really faster than four slbmte? I'd thought yes if they behaved similarly to mfspr, but from the look of some workbooks it doesn't look like it's quite that simple. I'll have to measure it. Thanks, Nick
WARNING: multiple messages have this Message-ID (diff)
From: Nicholas Piggin <npiggin@gmail.com> To: Paul Mackerras <paulus@ozlabs.org> Cc: linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org Subject: Re: [PATCH v6 30/48] KVM: PPC: Book3S HV P9: Implement the rest of the P9 path in C Date: Tue, 06 Apr 2021 09:12:56 +0000 [thread overview] Message-ID: <1617699912.sfw989xp02.astroid@bobo.none> (raw) In-Reply-To: <YGwNRUahuv42VZPR@thinks.paulus.ozlabs.org> Excerpts from Paul Mackerras's message of April 6, 2021 5:27 pm: > On Mon, Apr 05, 2021 at 11:19:30AM +1000, Nicholas Piggin wrote: >> Almost all logic is moved to C, by introducing a new in_guest mode for >> the P9 path that branches very early in the KVM interrupt handler to >> P9 exit code. >> >> The main P9 entry and exit assembly is now only about 160 lines of low >> level stack setup and register save/restore, plus a bad-interrupt >> handler. >> >> There are two motivations for this, the first is just make the code more >> maintainable being in C. The second is to reduce the amount of code >> running in a special KVM mode, "realmode". In quotes because with radix >> it is no longer necessarily real-mode in the MMU, but it still has to be >> treated specially because it may be in real-mode, and has various >> important registers like PID, DEC, TB, etc set to guest. This is hostile >> to the rest of Linux and can't use arbitrary kernel functionality or be >> instrumented well. >> >> This initial patch is a reasonably faithful conversion of the asm code, >> but it does lack any loop to return quickly back into the guest without >> switching out of realmode in the case of unimportant or easily handled >> interrupts. As explained in previous changes, handling HV interrupts >> in real mode is not so important for P9. >> >> Use of Linux 64s interrupt entry code register conventions including >> paca EX_ save areas are brought into the KVM code. There is no point >> shuffling things into different paca save areas and making up a >> different calling convention for KVM. >> >> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > > [snip] > >> +/* >> + * Took an interrupt somewhere right before HRFID to guest, so registers are >> + * in a bad way. Return things hopefully enough to run host virtual code and >> + * run the Linux interrupt handler (SRESET or MCE) to print something useful. >> + * >> + * We could be really clever and save all host registers in known locations >> + * before setting HSTATE_IN_GUEST, then restoring them all here, and setting >> + * return address to a fixup that sets them up again. But that's a lot of >> + * effort for a small bit of code. Lots of other things to do first. >> + */ >> +kvmppc_p9_bad_interrupt: >> + /* >> + * Set GUEST_MODE_NONE so the handler won't branch to KVM, and clear >> + * MSR_RI in r12 ([H]SRR1) so the handler won't try to return. >> + */ >> + li r10,KVM_GUEST_MODE_NONE >> + stb r10,HSTATE_IN_GUEST(r13) >> + li r10,MSR_RI >> + andc r12,r12,r10 >> + >> + /* >> + * Clean up guest registers to give host a chance to run. >> + */ >> + li r10,0 >> + mtspr SPRN_AMR,r10 >> + mtspr SPRN_IAMR,r10 >> + mtspr SPRN_CIABR,r10 >> + mtspr SPRN_DAWRX0,r10 >> +BEGIN_FTR_SECTION >> + mtspr SPRN_DAWRX1,r10 >> +END_FTR_SECTION_IFSET(CPU_FTR_DAWR1) >> + mtspr SPRN_PID,r10 >> + >> + /* >> + * Switch to host MMU mode >> + */ >> + ld r10, HSTATE_KVM_VCPU(r13) >> + ld r10, VCPU_KVM(r10) >> + lwz r10, KVM_HOST_LPID(r10) >> + mtspr SPRN_LPID,r10 >> + >> + ld r10, HSTATE_KVM_VCPU(r13) >> + ld r10, VCPU_KVM(r10) >> + ld r10, KVM_HOST_LPCR(r10) >> + mtspr SPRN_LPCR,r10 >> + >> + /* >> + * Go back to interrupt handler >> + */ >> + ld r10,HSTATE_SCRATCH0(r13) >> + cmpwi r10,BOOK3S_INTERRUPT_MACHINE_CHECK >> + beq machine_check_common >> + >> + ld r10,HSTATE_SCRATCH0(r13) >> + cmpwi r10,BOOK3S_INTERRUPT_SYSTEM_RESET >> + beq system_reset_common >> + >> + b . > > So you only handle machine check and system reset here? I would think > that program check would also be useful, for the cases where people > put BUG_ON in sensitive places (see below). DSI and ISI could also be > useful for the null pointer dereference cases, I would think. Those ones have their own stack, so a bit simpler to run them (and they obviously have to be handled as they are NMIs). I'll see if we can do something to improve the others a bit. Maybe just call program check for any other exception might work, making sure that it'll use the emergency stack rather than something that looks like a kernel stack but is a guest value, I'll see what we can get to work. >> +static inline void mtslb(unsigned int idx, u64 slbee, u64 slbev) >> +{ >> + BUG_ON((slbee & 0xfff) != idx); >> + >> + asm volatile("slbmte %0,%1" :: "r" (slbev), "r" (slbee)); >> +} > > Using BUG_ON here feels dangerous, and the condition it is testing is > certainly not one where the host kernel is in such trouble that it > can't continue to run. If the index was wrong then at worst the guest > kernel would be in trouble. So I don't believe BUG_ON is appropriate. Yeah good point, some of it was a bit of development paranoia but I do have to go through and tighten these up. >> + >> +/* >> + * Malicious or buggy radix guests may have inserted SLB entries >> + * (only 0..3 because radix always runs with UPRT=1), so these must >> + * be cleared here to avoid side-channels. slbmte is used rather >> + * than slbia, as it won't clear cached translations. >> + */ >> +static void radix_clear_slb(void) >> +{ >> + u64 slbee, slbev; >> + int i; >> + >> + for (i = 0; i < 4; i++) { >> + mfslb(i, &slbee, &slbev); >> + if (unlikely(slbee || slbev)) { >> + slbee = i; >> + slbev = 0; >> + mtslb(i, slbee, slbev); >> + } >> + } > > Are four slbmfee + slbmfev really faster than four slbmte? I'd thought yes if they behaved similarly to mfspr, but from the look of some workbooks it doesn't look like it's quite that simple. I'll have to measure it. Thanks, Nick
next prev parent reply other threads:[~2021-04-06 9:13 UTC|newest] Thread overview: 130+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-05 1:19 [PATCH v6 00/48] KVM: PPC: Book3S: C-ify the P9 entry/exit code Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 01/48] KVM: PPC: Book3S HV: Nested move LPCR sanitising to sanitise_hv_regs Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 02/48] KVM: PPC: Book3S HV: Add a function to filter guest LPCR bits Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 03/48] KVM: PPC: Book3S HV: Disallow LPCR[AIL] to be set to 1 or 2 Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 04/48] KVM: PPC: Book3S HV: Prevent radix guests setting LPCR[TC] Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 05/48] KVM: PPC: Book3S HV: Remove redundant mtspr PSPB Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 06/48] KVM: PPC: Book3S HV: remove unused kvmppc_h_protect argument Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 07/48] KVM: PPC: Book3S HV: Fix CONFIG_SPAPR_TCE_IOMMU=n default hcalls Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 08/48] powerpc/64s: Remove KVM handler support from CBE_RAS interrupts Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 09/48] powerpc/64s: remove KVM SKIP test from instruction breakpoint handler Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-06 2:44 ` Nicholas Piggin 2021-04-06 2:44 ` Nicholas Piggin 2021-04-06 4:17 ` Paul Mackerras 2021-04-06 4:17 ` Paul Mackerras 2021-04-05 1:19 ` [PATCH v6 10/48] KVM: PPC: Book3S HV: Ensure MSR[ME] is always set in guest MSR Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 11/48] KVM: PPC: Book3S HV: Ensure MSR[HV] is always clear " Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 12/48] KVM: PPC: Book3S 64: move KVM interrupt entry to a common entry point Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 13/48] KVM: PPC: Book3S 64: Move GUEST_MODE_SKIP test into KVM Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 14/48] KVM: PPC: Book3S 64: add hcall interrupt handler Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 15/48] KVM: PPC: Book3S 64: Move hcall early register setup to KVM Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 16/48] KVM: PPC: Book3S 64: Move interrupt " Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-06 4:37 ` Paul Mackerras 2021-04-06 4:37 ` Paul Mackerras 2021-04-06 7:04 ` Nicholas Piggin 2021-04-06 7:04 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 17/48] KVM: PPC: Book3S 64: move bad_host_intr check to HV handler Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 18/48] KVM: PPC: Book3S 64: Minimise hcall handler calling convention differences Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 19/48] KVM: PPC: Book3S HV P9: Move radix MMU switching instructions together Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 20/48] KVM: PPC: Book3S HV P9: implement kvmppc_xive_pull_vcpu in C Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 21/48] KVM: PPC: Book3S HV P9: Move xive vcpu context management into kvmhv_p9_guest_entry Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 22/48] KVM: PPC: Book3S HV P9: Stop handling hcalls in real-mode in the P9 path Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 23/48] KVM: PPC: Book3S HV P9: Move setting HDEC after switching to guest LPCR Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 24/48] KVM: PPC: Book3S HV P9: Use large decrementer for HDEC Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 25/48] KVM: PPC: Book3S HV P9: Use host timer accounting to avoid decrementer read Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 26/48] KVM: PPC: Book3S HV P9: Reduce mftb per guest entry/exit Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 27/48] KVM: PPC: Book3S HV P9: Reduce irq_work vs guest decrementer races Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 28/48] KMV: PPC: Book3S HV: Use set_dec to set decrementer to host Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 29/48] powerpc/time: add API for KVM to re-arm the host timer/decrementer Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 30/48] KVM: PPC: Book3S HV P9: Implement the rest of the P9 path in C Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-06 7:27 ` Paul Mackerras 2021-04-06 7:27 ` Paul Mackerras 2021-04-06 9:12 ` Nicholas Piggin [this message] 2021-04-06 9:12 ` Nicholas Piggin 2021-04-06 13:02 ` Nicholas Piggin 2021-04-06 13:02 ` Nicholas Piggin 2021-04-09 3:57 ` Alexey Kardashevskiy 2021-04-09 3:57 ` Alexey Kardashevskiy 2021-04-10 0:37 ` Nicholas Piggin 2021-04-10 0:37 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 31/48] KVM: PPC: Book3S HV P9: inline kvmhv_load_hv_regs_and_go into __kvmhv_vcpu_entry_p9 Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 32/48] KVM: PPC: Book3S HV P9: Read machine check registers while MSR[RI] is 0 Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-09 8:55 ` Alexey Kardashevskiy 2021-04-09 8:55 ` Alexey Kardashevskiy 2021-04-10 0:39 ` Nicholas Piggin 2021-04-10 0:39 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 33/48] KVM: PPC: Book3S HV P9: Improve exit timing accounting coverage Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-09 9:40 ` Alexey Kardashevskiy 2021-04-09 9:40 ` Alexey Kardashevskiy 2021-04-05 1:19 ` [PATCH v6 34/48] KVM: PPC: Book3S HV P9: Move SPR loading after expiry time check Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 35/48] KVM: PPC: Book3S HV P9: Add helpers for OS SPR handling Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 36/48] KVM: PPC: Book3S HV P9: Switch to guest MMU context as late as possible Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 37/48] KVM: PPC: Book3S HV: Implement radix prefetch workaround by disabling MMU Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 38/48] KVM: PPC: Book3S HV: Remove support for dependent threads mode on P9 Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-07 6:51 ` Paul Mackerras 2021-04-07 6:51 ` Paul Mackerras 2021-04-07 7:44 ` Nicholas Piggin 2021-04-07 7:44 ` Nicholas Piggin 2021-04-07 9:35 ` Nicholas Piggin 2021-04-07 9:35 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 39/48] KVM: PPC: Book3S HV: Remove radix guest support from P7/8 path Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 40/48] KVM: PPC: Book3S HV: Remove virt mode checks from real mode handlers Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 41/48] KVM: PPC: Book3S HV: Remove unused nested HV tests in XICS emulation Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 42/48] KVM: PPC: Book3S HV P9: Allow all P9 processors to enable nested HV Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 43/48] KVM: PPC: Book3S HV: small pseries_do_hcall cleanup Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 44/48] KVM: PPC: Book3S HV: add virtual mode handlers for HPT hcalls and page faults Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 45/48] KVM: PPC: Book3S HV P9: Reflect userspace hcalls to hash guests to support PR KVM Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 46/48] KVM: PPC: Book3S HV P9: implement hash guest support Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 47/48] KVM: PPC: Book3S HV P9: implement hash host / " Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-05 1:19 ` [PATCH v6 48/48] KVM: PPC: Book3S HV: remove ISA v3.0 and v3.1 support from P7/8 path Nicholas Piggin 2021-04-05 1:19 ` Nicholas Piggin 2021-04-08 7:33 ` [PATCH v6 00/48] KVM: PPC: Book3S: C-ify the P9 entry/exit code Nicholas Piggin 2021-04-08 7:33 ` Nicholas Piggin
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