* [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C hard reset
@ 2021-04-20 17:16 Prashant Malani
2021-04-20 17:16 ` [PATCH v3 2/2] platform/chrome: cros_ec_typec: Handle " Prashant Malani
2021-04-23 6:57 ` [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C " Enric Balletbo i Serra
0 siblings, 2 replies; 3+ messages in thread
From: Prashant Malani @ 2021-04-20 17:16 UTC (permalink / raw)
To: linux-kernel
Cc: Prashant Malani, Benson Leung, Enric Balletbo i Serra,
Guenter Roeck, Gustavo A. R. Silva, Mark Brown, Pi-Hsun Shih,
Utkarsh Patel, Yu-Hsuan Hsu
Update the EC command header to include the new event bit. This bit
is included in the latest version of the Chrome EC headers[1].
[1] https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/main/include/ec_commands.h
Signed-off-by: Prashant Malani <pmalani@chromium.org>
---
Changes in v3:
- Remove Change-Id tag and add Signed-off-by tag to the commit message.
v2 is the first version the patch was introduced.
include/linux/platform_data/cros_ec_commands.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
index 5ff8597ceabd..9156078c6fc6 100644
--- a/include/linux/platform_data/cros_ec_commands.h
+++ b/include/linux/platform_data/cros_ec_commands.h
@@ -5678,6 +5678,7 @@ enum tcpc_cc_polarity {
#define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
+#define PD_STATUS_EVENT_HARD_RESET BIT(2)
struct ec_params_typec_status {
uint8_t port;
--
2.31.1.368.gbe11c130af-goog
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH v3 2/2] platform/chrome: cros_ec_typec: Handle hard reset
2021-04-20 17:16 [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C hard reset Prashant Malani
@ 2021-04-20 17:16 ` Prashant Malani
2021-04-23 6:57 ` [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C " Enric Balletbo i Serra
1 sibling, 0 replies; 3+ messages in thread
From: Prashant Malani @ 2021-04-20 17:16 UTC (permalink / raw)
To: linux-kernel
Cc: Prashant Malani, Benson Leung, Enric Balletbo i Serra,
Guenter Roeck, Gustavo A. R. Silva, Mark Brown, Pi-Hsun Shih,
Utkarsh Patel, Yu-Hsuan Hsu
The Chrome Embedded Controller (EC) generates a hard reset type C event
when a USB Power Delivery (PD) hard reset is encountered. Handle this
event by unregistering the partner and cable on the associated port and
clearing the event flag.
Cc: Benson Leung <bleung@chromium.org>
Signed-off-by: Prashant Malani <pmalani@chromium.org>
---
Changes in v3:
- No changes.
Changes in v2:
- Split the header change into a separate patch.
- Updated the commit message to reflect the above.
v1:
https://lore.kernel.org/lkml/20210415021456.1805797-1-pmalani@chromium.org/
drivers/platform/chrome/cros_ec_typec.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
index d3df1717a5fd..22052f569f2a 100644
--- a/drivers/platform/chrome/cros_ec_typec.c
+++ b/drivers/platform/chrome/cros_ec_typec.c
@@ -905,6 +905,19 @@ static void cros_typec_handle_status(struct cros_typec_data *typec, int port_num
return;
}
+ /* If we got a hard reset, unregister everything and return. */
+ if (resp.events & PD_STATUS_EVENT_HARD_RESET) {
+ cros_typec_remove_partner(typec, port_num);
+ cros_typec_remove_cable(typec, port_num);
+
+ ret = cros_typec_send_clear_event(typec, port_num,
+ PD_STATUS_EVENT_HARD_RESET);
+ if (ret < 0)
+ dev_warn(typec->dev,
+ "Failed hard reset event clear, port: %d\n", port_num);
+ return;
+ }
+
/* Handle any events appropriately. */
if (resp.events & PD_STATUS_EVENT_SOP_DISC_DONE && !typec->ports[port_num]->sop_disc_done) {
u16 sop_revision;
--
2.31.1.368.gbe11c130af-goog
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C hard reset
2021-04-20 17:16 [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C hard reset Prashant Malani
2021-04-20 17:16 ` [PATCH v3 2/2] platform/chrome: cros_ec_typec: Handle " Prashant Malani
@ 2021-04-23 6:57 ` Enric Balletbo i Serra
1 sibling, 0 replies; 3+ messages in thread
From: Enric Balletbo i Serra @ 2021-04-23 6:57 UTC (permalink / raw)
To: linux-kernel, Prashant Malani
Cc: Guenter Roeck, Yu-Hsuan Hsu, Utkarsh Patel, Gustavo A. R. Silva,
Pi-Hsun Shih, Mark Brown, Benson Leung
On Tue, 20 Apr 2021 10:16:11 -0700, Prashant Malani wrote:
> Update the EC command header to include the new event bit. This bit
> is included in the latest version of the Chrome EC headers[1].
>
> [1] https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/main/include/ec_commands.h
Applied, thanks!
[1/2] platform/chrome: cros_ec: Add Type C hard reset
commit: 67880f1bc342ed4c94e72cad7f8ca76e5121aae3
[2/2] platform/chrome: cros_ec_typec: Handle hard reset
commit: 944b3a639573796debe3cd47298a5dd79810be73
Best regards,
--
Enric Balletbo i Serra <enric.balletbo@collabora.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-04-23 6:57 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-20 17:16 [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C hard reset Prashant Malani
2021-04-20 17:16 ` [PATCH v3 2/2] platform/chrome: cros_ec_typec: Handle " Prashant Malani
2021-04-23 6:57 ` [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C " Enric Balletbo i Serra
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.