* [PATCH v2 1/3] arm64: mm: Remove unused support for Device-GRE memory type
2021-05-27 11:03 [PATCH v2 0/3] Free up a couple of MAIRs Will Deacon
@ 2021-05-27 11:03 ` Will Deacon
2021-05-27 11:03 ` [PATCH v2 2/3] arm64: acpi: Map EFI_MEMORY_WT memory as Normal-NC Will Deacon
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Will Deacon @ 2021-05-27 11:03 UTC (permalink / raw)
To: linux-arm-kernel
Cc: kernel-team, Will Deacon, Christoph Hellwig, Catalin Marinas,
Ard Biesheuvel, Lorenzo Pieralisi, Mark Rutland
The Device-GRE memory type is unused, so remove it and reclaim a MAIR.
Cc: Christoph Hellwig <hch@lst.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Suggested-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210505180228.GA3874@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 1 -
arch/arm64/include/asm/sysreg.h | 1 -
arch/arm64/mm/proc.S | 1 -
arch/arm64/mm/ptdump.c | 4 ----
4 files changed, 7 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 87b90dc27a43..1e025e3b655e 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -138,7 +138,6 @@
#define MT_NORMAL_WT 3
#define MT_DEVICE_nGnRnE 4
#define MT_DEVICE_nGnRE 5
-#define MT_DEVICE_GRE 6
/*
* Memory types for Stage-2 translation
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 65d15700a168..baeb33cd7685 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -703,7 +703,6 @@
/* MAIR_ELx memory attributes (used by Linux) */
#define MAIR_ATTR_DEVICE_nGnRnE UL(0x00)
#define MAIR_ATTR_DEVICE_nGnRE UL(0x04)
-#define MAIR_ATTR_DEVICE_GRE UL(0x0c)
#define MAIR_ATTR_NORMAL_NC UL(0x44)
#define MAIR_ATTR_NORMAL_WT UL(0xbb)
#define MAIR_ATTR_NORMAL_TAGGED UL(0xf0)
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 97d7bcd8d4f2..add026fcc88c 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -58,7 +58,6 @@
#define MAIR_EL1_SET \
(MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRnE, MT_DEVICE_nGnRnE) | \
MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) | \
- MAIR_ATTRIDX(MAIR_ATTR_DEVICE_GRE, MT_DEVICE_GRE) | \
MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) | \
MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \
MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT) | \
diff --git a/arch/arm64/mm/ptdump.c b/arch/arm64/mm/ptdump.c
index a1937dfff31c..1c403536c9bb 100644
--- a/arch/arm64/mm/ptdump.c
+++ b/arch/arm64/mm/ptdump.c
@@ -157,10 +157,6 @@ static const struct prot_bits pte_bits[] = {
.mask = PTE_ATTRINDX_MASK,
.val = PTE_ATTRINDX(MT_DEVICE_nGnRE),
.set = "DEVICE/nGnRE",
- }, {
- .mask = PTE_ATTRINDX_MASK,
- .val = PTE_ATTRINDX(MT_DEVICE_GRE),
- .set = "DEVICE/GRE",
}, {
.mask = PTE_ATTRINDX_MASK,
.val = PTE_ATTRINDX(MT_NORMAL_NC),
--
2.31.1.818.g46aad6cb9e-goog
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v2 2/3] arm64: acpi: Map EFI_MEMORY_WT memory as Normal-NC
2021-05-27 11:03 [PATCH v2 0/3] Free up a couple of MAIRs Will Deacon
2021-05-27 11:03 ` [PATCH v2 1/3] arm64: mm: Remove unused support for Device-GRE memory type Will Deacon
@ 2021-05-27 11:03 ` Will Deacon
2021-05-27 11:03 ` [PATCH v2 3/3] arm64: mm: Remove unused support for Normal-WT memory type Will Deacon
2021-06-01 18:21 ` [PATCH v2 0/3] Free up a couple of MAIRs Will Deacon
3 siblings, 0 replies; 5+ messages in thread
From: Will Deacon @ 2021-05-27 11:03 UTC (permalink / raw)
To: linux-arm-kernel
Cc: kernel-team, Will Deacon, Christoph Hellwig, Catalin Marinas,
Ard Biesheuvel, Lorenzo Pieralisi, Mark Rutland
The only user we have of Normal Write-Through memory is in the ACPI code
when mapping memory regions advertised as EFI_MEMORY_WT. Since most (all?)
CPUs treat write-through as non-cacheable under the hood, don't bother
with the extra memory type here and just treat EFI_MEMORY_WT the same way
as EFI_MEMORY_WC by mapping it to the Normal-NC memory type instead and
emitting a warning if we have failed to find an alternative EFI memory
type.
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Christoph Hellwig <hch@lst.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kernel/acpi.c | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index cada0b816c8a..f3851724fe35 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -239,6 +239,18 @@ void __init acpi_boot_table_init(void)
}
}
+static pgprot_t __acpi_get_writethrough_mem_attribute(void)
+{
+ /*
+ * Although UEFI specifies the use of Normal Write-through for
+ * EFI_MEMORY_WT, it is seldom used in practice and not implemented
+ * by most (all?) CPUs. Rather than allocate a MAIR just for this
+ * purpose, emit a warning and use Normal Non-cacheable instead.
+ */
+ pr_warn_once("No MAIR allocation for EFI_MEMORY_WT; treating as Normal Non-cacheable\n");
+ return __pgprot(PROT_NORMAL_NC);
+}
+
pgprot_t __acpi_get_mem_attribute(phys_addr_t addr)
{
/*
@@ -246,7 +258,7 @@ pgprot_t __acpi_get_mem_attribute(phys_addr_t addr)
* types" of UEFI 2.5 section 2.3.6.1, each EFI memory type is
* mapped to a corresponding MAIR attribute encoding.
* The EFI memory attribute advises all possible capabilities
- * of a memory region. We use the most efficient capability.
+ * of a memory region.
*/
u64 attr;
@@ -254,10 +266,10 @@ pgprot_t __acpi_get_mem_attribute(phys_addr_t addr)
attr = efi_mem_attributes(addr);
if (attr & EFI_MEMORY_WB)
return PAGE_KERNEL;
- if (attr & EFI_MEMORY_WT)
- return __pgprot(PROT_NORMAL_WT);
if (attr & EFI_MEMORY_WC)
return __pgprot(PROT_NORMAL_NC);
+ if (attr & EFI_MEMORY_WT)
+ return __acpi_get_writethrough_mem_attribute();
return __pgprot(PROT_DEVICE_nGnRnE);
}
@@ -340,10 +352,10 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
default:
if (region->attribute & EFI_MEMORY_WB)
prot = PAGE_KERNEL;
- else if (region->attribute & EFI_MEMORY_WT)
- prot = __pgprot(PROT_NORMAL_WT);
else if (region->attribute & EFI_MEMORY_WC)
prot = __pgprot(PROT_NORMAL_NC);
+ else if (region->attribute & EFI_MEMORY_WT)
+ prot = __acpi_get_writethrough_mem_attribute();
}
}
return __ioremap(phys, size, prot);
--
2.31.1.818.g46aad6cb9e-goog
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v2 3/3] arm64: mm: Remove unused support for Normal-WT memory type
2021-05-27 11:03 [PATCH v2 0/3] Free up a couple of MAIRs Will Deacon
2021-05-27 11:03 ` [PATCH v2 1/3] arm64: mm: Remove unused support for Device-GRE memory type Will Deacon
2021-05-27 11:03 ` [PATCH v2 2/3] arm64: acpi: Map EFI_MEMORY_WT memory as Normal-NC Will Deacon
@ 2021-05-27 11:03 ` Will Deacon
2021-06-01 18:21 ` [PATCH v2 0/3] Free up a couple of MAIRs Will Deacon
3 siblings, 0 replies; 5+ messages in thread
From: Will Deacon @ 2021-05-27 11:03 UTC (permalink / raw)
To: linux-arm-kernel
Cc: kernel-team, Will Deacon, Christoph Hellwig, Catalin Marinas,
Ard Biesheuvel, Lorenzo Pieralisi, Mark Rutland
The Normal-WT memory type is unused, so remove it and reclaim a MAIR.
Cc: Christoph Hellwig <hch@lst.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 5 ++---
arch/arm64/include/asm/pgtable-prot.h | 1 -
arch/arm64/include/asm/sysreg.h | 1 -
arch/arm64/mm/proc.S | 1 -
4 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 1e025e3b655e..7b360960cc35 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -135,9 +135,8 @@
#define MT_NORMAL 0
#define MT_NORMAL_TAGGED 1
#define MT_NORMAL_NC 2
-#define MT_NORMAL_WT 3
-#define MT_DEVICE_nGnRnE 4
-#define MT_DEVICE_nGnRE 5
+#define MT_DEVICE_nGnRnE 3
+#define MT_DEVICE_nGnRE 4
/*
* Memory types for Stage-2 translation
diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h
index 938092df76cf..7032f04c8ac6 100644
--- a/arch/arm64/include/asm/pgtable-prot.h
+++ b/arch/arm64/include/asm/pgtable-prot.h
@@ -55,7 +55,6 @@ extern bool arm64_use_ng_mappings;
#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
-#define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
#define PROT_NORMAL_TAGGED (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_TAGGED))
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index baeb33cd7685..9ea84bcddf85 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -704,7 +704,6 @@
#define MAIR_ATTR_DEVICE_nGnRnE UL(0x00)
#define MAIR_ATTR_DEVICE_nGnRE UL(0x04)
#define MAIR_ATTR_NORMAL_NC UL(0x44)
-#define MAIR_ATTR_NORMAL_WT UL(0xbb)
#define MAIR_ATTR_NORMAL_TAGGED UL(0xf0)
#define MAIR_ATTR_NORMAL UL(0xff)
#define MAIR_ATTR_MASK UL(0xff)
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index add026fcc88c..6e640fa9788e 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -60,7 +60,6 @@
MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) | \
MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) | \
MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \
- MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT) | \
MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL_TAGGED))
#ifdef CONFIG_CPU_PM
--
2.31.1.818.g46aad6cb9e-goog
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 0/3] Free up a couple of MAIRs
2021-05-27 11:03 [PATCH v2 0/3] Free up a couple of MAIRs Will Deacon
` (2 preceding siblings ...)
2021-05-27 11:03 ` [PATCH v2 3/3] arm64: mm: Remove unused support for Normal-WT memory type Will Deacon
@ 2021-06-01 18:21 ` Will Deacon
3 siblings, 0 replies; 5+ messages in thread
From: Will Deacon @ 2021-06-01 18:21 UTC (permalink / raw)
To: linux-arm-kernel, Will Deacon
Cc: catalin.marinas, kernel-team, Mark Rutland, Christoph Hellwig,
Ard Biesheuvel, Lorenzo Pieralisi
On Thu, 27 May 2021 12:03:16 +0100, Will Deacon wrote:
> This is version two of the patches I previously posted here:
>
> v1: https://lore.kernel.org/r/20210506095034.15246-1-will@kernel.org
>
> Changes since v1 include:
>
> * Only consider EFI_MEMORY_WT as a last resort
> * Emit warning when using Normal-NC for EFI_MEMORY_WT
> * Added acks
> * Rebased onto -rc3
>
> [...]
Applied to arm64 (for-next/mm), thanks!
[1/3] arm64: mm: Remove unused support for Device-GRE memory type
https://git.kernel.org/arm64/c/58cc6b72a212
[2/3] arm64: acpi: Map EFI_MEMORY_WT memory as Normal-NC
https://git.kernel.org/arm64/c/ee67c1103a1b
[3/3] arm64: mm: Remove unused support for Normal-WT memory type
https://git.kernel.org/arm64/c/21cfe6edbadb
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
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^ permalink raw reply [flat|nested] 5+ messages in thread