* [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P
@ 2021-06-04 20:39 Matt Roper
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 1/6] lib/i915: Split 'gen' into graphics version and display version Matt Roper
` (13 more replies)
0 siblings, 14 replies; 26+ messages in thread
From: Matt Roper @ 2021-06-04 20:39 UTC (permalink / raw)
To: igt-dev
Since ADL-P has version 12 graphics and version 13 display, we need to
split IGT's 'gen' value into separate graphics and display versions,
just as we've done in the kernel. Once we've done that we can add the
basic ADL-P support.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Clint Taylor (1):
lib/i915/adl-p: Basic ADL-P enabling
Imre Deak (1):
lib/i915: Add ADL-P plane offset restriction for CCS framebuffers
José Roberto de Souza (1):
lib/i915: Add ADL-P stride restrictions for non-linear buffers
Lionel Landwerlin (1):
lib/i915/perf: Add ADL-P metrics
Matt Roper (2):
lib/i915: Split 'gen' into graphics version and display version
lib/i915: Add intel_display_ver() and use it in display tests/libs
lib/i915/perf-configs/guids.xml | 26 +
lib/i915/perf-configs/mdapi-xml-convert.py | 1 +
lib/i915/perf-configs/oa-adlp.xml | 10624 +++++++++++++++++++
lib/i915/perf-configs/update-guids.py | 2 +-
lib/i915/perf.c | 7 +-
lib/i915/perf.h | 2 +-
lib/i915/perf_data_reader.c | 6 +-
lib/igt_device_scan.c | 2 +-
lib/igt_draw.c | 12 +-
lib/igt_fb.c | 66 +-
lib/igt_gt.c | 10 +-
lib/intel_chipset.h | 10 +-
lib/intel_device_info.c | 153 +-
lib/meson.build | 2 +-
tests/i915/gem_exec_store.c | 4 +-
tests/i915/i915_pciid.c | 4 +-
tests/kms_atomic_transition.c | 2 +-
tests/kms_big_fb.c | 10 +-
tests/kms_ccs.c | 2 +-
tests/kms_draw_crc.c | 2 +-
tests/kms_flip_scaled_crc.c | 2 +-
tests/kms_flip_tiling.c | 2 +-
tests/kms_frontbuffer_tracking.c | 4 +-
tests/kms_getfb.c | 2 +-
tests/kms_hdmi_inject.c | 2 +-
tests/kms_panel_fitting.c | 2 +-
tests/kms_plane.c | 2 +-
tests/kms_plane_lowres.c | 4 +-
tests/kms_plane_scaling.c | 8 +-
tests/kms_rotation_crc.c | 8 +-
tests/kms_universal_plane.c | 2 +-
tools/i915-perf/i915_perf_configs.c | 2 +-
tools/i915-perf/i915_perf_reader.c | 5 +-
tools/i915-perf/i915_perf_recorder.c | 6 +-
34 files changed, 10880 insertions(+), 118 deletions(-)
create mode 100644 lib/i915/perf-configs/oa-adlp.xml
--
2.25.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t 1/6] lib/i915: Split 'gen' into graphics version and display version
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
@ 2021-06-04 20:39 ` Matt Roper
2021-06-05 0:33 ` Souza, Jose
2021-06-05 0:39 ` Souza, Jose
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 2/6] lib/i915: Add intel_display_ver() and use it in display tests/libs Matt Roper
` (12 subsequent siblings)
13 siblings, 2 replies; 26+ messages in thread
From: Matt Roper @ 2021-06-04 20:39 UTC (permalink / raw)
To: igt-dev
Going forward, platforms may have separate architecture versions for
graphics and display and should no longer utilize a single 'gen'
version.
While doing this, let's change the versions to raw version values rather
than BIT(v) as we were doing in the past. It looks like some of the
existing uses of devinfo->gen were already misinterpreting this field
and failing to pass the value through ffs(), so this change may also fix
some bugs.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
lib/i915/perf.c | 4 +-
lib/i915/perf.h | 2 +-
lib/i915/perf_data_reader.c | 6 +-
lib/igt_device_scan.c | 2 +-
lib/igt_gt.c | 10 +-
lib/intel_chipset.h | 7 +-
lib/intel_device_info.c | 131 ++++++++++++++++++---------
tests/i915/gem_exec_store.c | 4 +-
tests/i915/i915_pciid.c | 4 +-
tools/i915-perf/i915_perf_configs.c | 2 +-
tools/i915-perf/i915_perf_reader.c | 5 +-
tools/i915-perf/i915_perf_recorder.c | 6 +-
12 files changed, 114 insertions(+), 69 deletions(-)
diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 5644a346..9d5ab7a5 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -169,7 +169,7 @@ intel_perf_for_devinfo(uint32_t device_id,
* 2x6 does not have 2 samplers).
*/
perf->devinfo.devid = device_id;
- perf->devinfo.gen = devinfo->gen;
+ perf->devinfo.graphics_ver = devinfo->graphics_ver;
perf->devinfo.revision = revision;
perf->devinfo.timestamp_frequency = timestamp_frequency;
perf->devinfo.gt_min_freq = gt_min_freq;
@@ -183,7 +183,7 @@ intel_perf_for_devinfo(uint32_t device_id,
/* On Gen11+ the equations from the xml files expect an 8bits
* mask per subslice, versus only 3bits on prior Gens.
*/
- bits_per_subslice = devinfo->gen >= 11 ? 8 : 3;
+ bits_per_subslice = devinfo->graphics_ver >= 11 ? 8 : 3;
for (uint32_t s = 0; s < topology->max_slices; s++) {
if (!slice_available(topology, s))
continue;
diff --git a/lib/i915/perf.h b/lib/i915/perf.h
index 6a39be92..d2429c47 100644
--- a/lib/i915/perf.h
+++ b/lib/i915/perf.h
@@ -50,7 +50,7 @@ struct intel_perf_devinfo {
* Their values are build up from the topology fields.
*/
uint32_t devid;
- uint32_t gen;
+ uint32_t graphics_ver;
uint32_t revision;
uint64_t timestamp_frequency;
uint64_t gt_min_freq;
diff --git a/lib/i915/perf_data_reader.c b/lib/i915/perf_data_reader.c
index 79cb50f4..e69189ac 100644
--- a/lib/i915/perf_data_reader.c
+++ b/lib/i915/perf_data_reader.c
@@ -45,11 +45,11 @@ oa_report_ctx_is_valid(const struct intel_perf_devinfo *devinfo,
{
const uint32_t *report = (const uint32_t *) _report;
- if (devinfo->gen < 8) {
+ if (devinfo->graphics_ver < 8) {
return false; /* TODO */
- } else if (devinfo->gen == 8) {
+ } else if (devinfo->graphics_ver == 8) {
return report[0] & (1ul << 25);
- } else if (devinfo->gen > 8) {
+ } else if (devinfo->graphics_ver > 8) {
return report[0] & (1ul << 16);
}
diff --git a/lib/igt_device_scan.c b/lib/igt_device_scan.c
index 2b7d9a3a..3c23fe0e 100644
--- a/lib/igt_device_scan.c
+++ b/lib/igt_device_scan.c
@@ -208,7 +208,7 @@ static char *devname_intel(uint16_t vendor, uint16_t device)
if (devname) {
devname[0] = toupper(devname[0]);
igt_assert(asprintf(&s, "Intel %s (Gen%u)", devname,
- ffs(info->gen)) != -1);
+ info->graphics_ver) != -1);
free(devname);
}
}
diff --git a/lib/igt_gt.c b/lib/igt_gt.c
index f601d726..b1415178 100644
--- a/lib/igt_gt.c
+++ b/lib/igt_gt.c
@@ -552,18 +552,18 @@ bool gem_class_can_store_dword(int fd, int class)
{
uint16_t devid = intel_get_drm_devid(fd);
const struct intel_device_info *info = intel_get_device_info(devid);
- const int gen = ffs(info->gen);
+ const int ver = info->graphics_ver;
- if (info->gen == 0) /* unknown, assume it just works */
+ if (ver == 0) /* unknown, assume it just works */
return true;
- if (gen <= 2) /* requires physical addresses */
+ if (ver <= 2) /* requires physical addresses */
return false;
- if (gen == 3 && (info->is_grantsdale || info->is_alviso))
+ if (ver == 3 && (info->is_grantsdale || info->is_alviso))
return false; /* only supports physical addresses */
- if (gen == 6 && class == I915_ENGINE_CLASS_VIDEO)
+ if (ver == 6 && class == I915_ENGINE_CLASS_VIDEO)
return false; /* broken, unbelievably broken */
if (info->is_broadwater)
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index f766021e..8e81ffa9 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -37,7 +37,8 @@ struct pci_device *intel_get_pci_device(void);
uint32_t intel_get_drm_devid(int fd);
struct intel_device_info {
- unsigned gen;
+ unsigned graphics_ver;
+ unsigned display_ver;
unsigned gt; /* 0 if unknown */
bool is_mobile : 1;
bool is_whitney : 1;
@@ -179,8 +180,8 @@ void intel_check_pch(void);
#define IS_DG1(devid) (intel_get_device_info(devid)->is_dg1)
#define IS_ALDERLAKE_S(devid) (intel_get_device_info(devid)->is_alderlake_s)
-#define IS_GEN(devid, x) (intel_get_device_info(devid)->gen & (1u << ((x)-1)))
-#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->gen & -(1u << ((x)-1)))
+#define IS_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver == x)
+#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
#define IS_GEN2(devid) IS_GEN(devid, 2)
#define IS_GEN3(devid) IS_GEN(devid, 3)
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index e07fdf6f..4ab236e4 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -4,154 +4,180 @@
#include <strings.h> /* ffs() */
static const struct intel_device_info intel_generic_info = {
- .gen = 0,
+ .graphics_ver = 0,
+ .display_ver = 0,
};
static const struct intel_device_info intel_i810_info = {
- .gen = BIT(0),
+ .graphics_ver = 1,
+ .display_ver = 1,
.is_whitney = true,
.codename = "solano" /* 815 == "whitney" ? or vice versa? */
};
static const struct intel_device_info intel_i815_info = {
- .gen = BIT(0),
+ .graphics_ver = 1,
+ .display_ver = 1,
.is_whitney = true,
.codename = "whitney"
};
static const struct intel_device_info intel_i830_info = {
- .gen = BIT(1),
+ .graphics_ver = 2,
+ .display_ver = 2,
.is_almador = true,
.codename = "almador"
};
static const struct intel_device_info intel_i845_info = {
- .gen = BIT(1),
+ .graphics_ver = 2,
+ .display_ver = 2,
.is_brookdale = true,
.codename = "brookdale"
};
static const struct intel_device_info intel_i855_info = {
- .gen = BIT(1),
+ .graphics_ver = 2,
+ .display_ver = 2,
.is_mobile = true,
.is_montara = true,
.codename = "montara"
};
static const struct intel_device_info intel_i865_info = {
- .gen = BIT(1),
+ .graphics_ver = 2,
+ .display_ver = 2,
.is_springdale = true,
.codename = "spingdale"
};
static const struct intel_device_info intel_i915_info = {
- .gen = BIT(2),
+ .graphics_ver = 3,
+ .display_ver = 3,
.is_grantsdale = true,
.codename = "grantsdale"
};
static const struct intel_device_info intel_i915m_info = {
- .gen = BIT(2),
+ .graphics_ver = 3,
+ .display_ver = 3,
.is_mobile = true,
.is_alviso = true,
.codename = "alviso"
};
static const struct intel_device_info intel_i945_info = {
- .gen = BIT(2),
+ .graphics_ver = 3,
+ .display_ver = 3,
.is_lakeport = true,
.codename = "lakeport"
};
static const struct intel_device_info intel_i945m_info = {
- .gen = BIT(2),
+ .graphics_ver = 3,
+ .display_ver = 3,
.is_mobile = true,
.is_calistoga = true,
.codename = "calistoga"
};
static const struct intel_device_info intel_g33_info = {
- .gen = BIT(2),
+ .graphics_ver = 3,
+ .display_ver = 3,
.is_bearlake = true,
.codename = "bearlake"
};
static const struct intel_device_info intel_pineview_g_info = {
- .gen = BIT(2),
+ .graphics_ver = 3,
+ .display_ver = 3,
.is_pineview = true,
.codename = "pineview"
};
static const struct intel_device_info intel_pineview_m_info = {
- .gen = BIT(2),
+ .graphics_ver = 3,
+ .display_ver = 3,
.is_mobile = true,
.is_pineview = true,
.codename = "pineview"
};
static const struct intel_device_info intel_i965_info = {
- .gen = BIT(3),
+ .graphics_ver = 4,
+ .display_ver = 4,
.is_broadwater = true,
.codename = "broadwater"
};
static const struct intel_device_info intel_i965m_info = {
- .gen = BIT(3),
+ .graphics_ver = 4,
+ .display_ver = 4,
.is_mobile = true,
.is_crestline = true,
.codename = "crestline"
};
static const struct intel_device_info intel_g45_info = {
- .gen = BIT(3),
+ .graphics_ver = 4,
+ .display_ver = 4,
.is_eaglelake = true,
.codename = "eaglelake"
};
static const struct intel_device_info intel_gm45_info = {
- .gen = BIT(3),
+ .graphics_ver = 4,
+ .display_ver = 4,
.is_mobile = true,
.is_cantiga = true,
.codename = "cantiga"
};
static const struct intel_device_info intel_ironlake_info = {
- .gen = BIT(4),
+ .graphics_ver = 5,
+ .display_ver = 5,
.is_ironlake = true,
.codename = "ironlake" /* clarkdale? */
};
static const struct intel_device_info intel_ironlake_m_info = {
- .gen = BIT(4),
+ .graphics_ver = 5,
+ .display_ver = 5,
.is_mobile = true,
.is_arrandale = true,
.codename = "arrandale"
};
static const struct intel_device_info intel_sandybridge_info = {
- .gen = BIT(5),
+ .graphics_ver = 6,
+ .display_ver = 6,
.is_sandybridge = true,
.codename = "sandybridge"
};
static const struct intel_device_info intel_sandybridge_m_info = {
- .gen = BIT(5),
+ .graphics_ver = 6,
+ .display_ver = 6,
.is_mobile = true,
.is_sandybridge = true,
.codename = "sandybridge"
};
static const struct intel_device_info intel_ivybridge_info = {
- .gen = BIT(6),
+ .graphics_ver = 7,
+ .display_ver = 7,
.is_ivybridge = true,
.codename = "ivybridge"
};
static const struct intel_device_info intel_ivybridge_m_info = {
- .gen = BIT(6),
+ .graphics_ver = 7,
+ .display_ver = 7,
.is_mobile = true,
.is_ivybridge = true,
.codename = "ivybridge"
};
static const struct intel_device_info intel_valleyview_info = {
- .gen = BIT(6),
+ .graphics_ver = 7,
+ .display_ver = 7,
.is_valleyview = true,
.codename = "valleyview"
};
#define HASWELL_FIELDS \
- .gen = BIT(6), \
+ .graphics_ver = 7, \
+ .display_ver = 7, \
.is_haswell = true, \
.codename = "haswell"
@@ -171,7 +197,8 @@ static const struct intel_device_info intel_haswell_gt3_info = {
};
#define BROADWELL_FIELDS \
- .gen = BIT(7), \
+ .graphics_ver = 8, \
+ .display_ver = 8, \
.is_broadwell = true, \
.codename = "broadwell"
@@ -195,13 +222,15 @@ static const struct intel_device_info intel_broadwell_unknown_info = {
};
static const struct intel_device_info intel_cherryview_info = {
- .gen = BIT(7),
+ .graphics_ver = 8,
+ .display_ver = 8,
.is_cherryview = true,
.codename = "cherryview"
};
#define SKYLAKE_FIELDS \
- .gen = BIT(8), \
+ .graphics_ver = 9, \
+ .display_ver = 9, \
.codename = "skylake", \
.is_skylake = true
@@ -226,13 +255,15 @@ static const struct intel_device_info intel_skylake_gt4_info = {
};
static const struct intel_device_info intel_broxton_info = {
- .gen = BIT(8),
+ .graphics_ver = 9,
+ .display_ver = 9,
.is_broxton = true,
.codename = "broxton"
};
#define KABYLAKE_FIELDS \
- .gen = BIT(8), \
+ .graphics_ver = 9, \
+ .display_ver = 9, \
.is_kabylake = true, \
.codename = "kabylake"
@@ -257,13 +288,15 @@ static const struct intel_device_info intel_kabylake_gt4_info = {
};
static const struct intel_device_info intel_geminilake_info = {
- .gen = BIT(8),
+ .graphics_ver = 9,
+ .display_ver = 9,
.is_geminilake = true,
.codename = "geminilake"
};
#define COFFEELAKE_FIELDS \
- .gen = BIT(8), \
+ .graphics_ver = 9, \
+ .display_ver = 9, \
.is_coffeelake = true, \
.codename = "coffeelake"
@@ -283,7 +316,8 @@ static const struct intel_device_info intel_coffeelake_gt3_info = {
};
#define COMETLAKE_FIELDS \
- .gen = BIT(8), \
+ .graphics_ver = 9, \
+ .display_ver = 9, \
.is_cometlake = true, \
.codename = "cometlake"
@@ -298,57 +332,66 @@ static const struct intel_device_info intel_cometlake_gt2_info = {
};
static const struct intel_device_info intel_cannonlake_info = {
- .gen = BIT(9),
+ .graphics_ver = 10,
+ .display_ver = 10,
.is_cannonlake = true,
.codename = "cannonlake"
};
static const struct intel_device_info intel_icelake_info = {
- .gen = BIT(10),
+ .graphics_ver = 11,
+ .display_ver = 11,
.is_icelake = true,
.codename = "icelake"
};
static const struct intel_device_info intel_elkhartlake_info = {
- .gen = BIT(10),
+ .graphics_ver = 11,
+ .display_ver = 11,
.is_elkhartlake = true,
.codename = "elkhartlake"
};
static const struct intel_device_info intel_jasperlake_info = {
- .gen = BIT(10),
+ .graphics_ver = 11,
+ .display_ver = 11,
.is_jasperlake = true,
.codename = "jasperlake"
};
static const struct intel_device_info intel_tigerlake_gt1_info = {
- .gen = BIT(11),
+ .graphics_ver = 12,
+ .display_ver = 12,
.is_tigerlake = true,
.codename = "tigerlake",
.gt = 1,
};
static const struct intel_device_info intel_tigerlake_gt2_info = {
- .gen = BIT(11),
+ .graphics_ver = 12,
+ .display_ver = 12,
.is_tigerlake = true,
.codename = "tigerlake",
.gt = 2,
};
static const struct intel_device_info intel_rocketlake_info = {
- .gen = BIT(11),
+ .graphics_ver = 12,
+ .display_ver = 12,
.is_rocketlake = true,
.codename = "rocketlake"
};
static const struct intel_device_info intel_dg1_info = {
- .gen = BIT(11),
+ .graphics_ver = 12,
+ .display_ver = 12,
.is_dg1 = true,
.codename = "dg1"
};
static const struct intel_device_info intel_alderlake_s_info = {
- .gen = BIT(11),
+ .graphics_ver = 12,
+ .display_ver = 12,
.is_alderlake_s = true,
.codename = "alderlake_s"
};
@@ -490,5 +533,5 @@ out:
*/
unsigned intel_gen(uint16_t devid)
{
- return ffs(intel_get_device_info(devid)->gen) ?: -1u;
+ return intel_get_device_info(devid)->graphics_ver ?: -1u;
}
diff --git a/tests/i915/gem_exec_store.c b/tests/i915/gem_exec_store.c
index 99ffc9ab..2df0b27f 100644
--- a/tests/i915/gem_exec_store.c
+++ b/tests/i915/gem_exec_store.c
@@ -310,7 +310,7 @@ static int print_welcome(int fd)
int err;
igt_info("Running on %s (pci-id %04x, gen %d)\n",
- info->codename, devid, ffs(info->gen));
+ info->codename, devid, info->graphics_ver);
igt_info("Can use MI_STORE_DWORD(virtual)? %s\n",
gem_can_store_dword(fd, 0) ? "yes" : "no");
@@ -320,7 +320,7 @@ static int print_welcome(int fd)
igt_info("GPU operation? %s [errno=%d]\n",
err == 0 ? "yes" : "no", err);
- return ffs(info->gen);
+ return info->graphics_ver;
}
#define test_each_engine(T, i915, e) \
diff --git a/tests/i915/i915_pciid.c b/tests/i915/i915_pciid.c
index fe4db405..7de44ff2 100644
--- a/tests/i915/i915_pciid.c
+++ b/tests/i915/i915_pciid.c
@@ -49,13 +49,13 @@ static bool has_known_intel_chipset(int fd)
return false;
}
- if (!info->gen) {
+ if (!info->graphics_ver) {
igt_warn("Unknown PCI-ID: %04x\n", devid);
return false;
}
igt_info("PCI-ID: %#04x, gen %d, %s\n",
- devid, ffs(info->gen), info->codename);
+ devid, info->graphics_ver, info->codename);
return true;
}
diff --git a/tools/i915-perf/i915_perf_configs.c b/tools/i915-perf/i915_perf_configs.c
index 2a0283c9..bce3bd0f 100644
--- a/tools/i915-perf/i915_perf_configs.c
+++ b/tools/i915-perf/i915_perf_configs.c
@@ -228,7 +228,7 @@ main(int argc, char *argv[])
return EXIT_FAILURE;
}
- fprintf(stdout, "Device gen=%i gt=%i\n", devinfo->gen, devinfo->gt);
+ fprintf(stdout, "Device graphics_ver=%i gt=%i\n", devinfo->graphics_ver, devinfo->gt);
perf = intel_perf_for_fd(drm_fd);
if (!perf) {
diff --git a/tools/i915-perf/i915_perf_reader.c b/tools/i915-perf/i915_perf_reader.c
index 3e4a6530..e51f5a5d 100644
--- a/tools/i915-perf/i915_perf_reader.c
+++ b/tools/i915-perf/i915_perf_reader.c
@@ -220,8 +220,9 @@ main(int argc, char *argv[])
devinfo = intel_get_device_info(reader.devinfo.devid);
- fprintf(stdout, "Recorded on device=0x%x(%s) gen=%i\n",
- reader.devinfo.devid, devinfo->codename, reader.devinfo.gen);
+ fprintf(stdout, "Recorded on device=0x%x(%s) graphics_ver=%i\n",
+ reader.devinfo.devid, devinfo->codename,
+ reader.devinfo.graphics_ver);
fprintf(stdout, "Metric used : %s (%s) uuid=%s\n",
reader.metric_set->symbol_name, reader.metric_set->name,
reader.metric_set->hw_config_guid);
diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
index 3a8ee46a..00195290 100644
--- a/tools/i915-perf/i915_perf_recorder.c
+++ b/tools/i915-perf/i915_perf_recorder.c
@@ -317,14 +317,14 @@ get_device_timestamp_frequency(const struct intel_device_info *devinfo, int drm_
if (perf_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0)
return timestamp_frequency;
- if (devinfo->gen > 9) {
+ if (devinfo->graphics_ver > 9) {
fprintf(stderr, "Unable to query timestamp frequency from i915, please update kernel.\n");
return 0;
}
fprintf(stderr, "Warning: unable to query timestamp frequency from i915, guessing values...\n");
- if (devinfo->gen <= 8)
+ if (devinfo->graphics_ver <= 8)
return 12500000;
if (devinfo->is_broxton)
return 19200000;
@@ -878,7 +878,7 @@ main(int argc, char *argv[])
}
fprintf(stdout, "Device name=%s gen=%i gt=%i id=0x%x\n",
- ctx.devinfo->codename, ctx.devinfo->gen, ctx.devinfo->gt, ctx.devid);
+ ctx.devinfo->codename, ctx.devinfo->graphics_ver, ctx.devinfo->gt, ctx.devid);
ctx.topology = get_topology(ctx.drm_fd, &ctx.topology_size);
if (!ctx.topology) {
--
2.25.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t 2/6] lib/i915: Add intel_display_ver() and use it in display tests/libs
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 1/6] lib/i915: Split 'gen' into graphics version and display version Matt Roper
@ 2021-06-04 20:39 ` Matt Roper
2021-06-05 0:43 ` Souza, Jose
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 3/6] lib/i915/adl-p: Basic ADL-P enabling Matt Roper
` (11 subsequent siblings)
13 siblings, 1 reply; 26+ messages in thread
From: Matt Roper @ 2021-06-04 20:39 UTC (permalink / raw)
To: igt-dev
Display code should check the display version of the platform rather
than the graphics version; on some platforms these versions won't be the
same.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
lib/igt_draw.c | 12 ++++++------
lib/igt_fb.c | 14 +++++++-------
lib/intel_chipset.h | 1 +
lib/intel_device_info.c | 14 ++++++++++++++
tests/kms_atomic_transition.c | 2 +-
tests/kms_big_fb.c | 10 +++++-----
tests/kms_ccs.c | 2 +-
tests/kms_draw_crc.c | 2 +-
tests/kms_flip_scaled_crc.c | 2 +-
tests/kms_flip_tiling.c | 2 +-
tests/kms_frontbuffer_tracking.c | 4 ++--
tests/kms_getfb.c | 2 +-
tests/kms_hdmi_inject.c | 2 +-
tests/kms_panel_fitting.c | 2 +-
tests/kms_plane.c | 2 +-
tests/kms_plane_lowres.c | 4 ++--
tests/kms_plane_scaling.c | 8 ++++----
tests/kms_rotation_crc.c | 8 ++++----
tests/kms_universal_plane.c | 2 +-
19 files changed, 55 insertions(+), 40 deletions(-)
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index a3144b50..295de022 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -339,7 +339,7 @@ static void draw_rect_mmap_cpu(int fd, struct buf_data *buf, struct rect *rect,
/* We didn't implement suport for the older tiling methods yet. */
if (tiling != I915_TILING_NONE)
- igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5);
+ igt_require(intel_display_ver(intel_get_drm_devid(fd)) >= 5);
ptr = gem_mmap__cpu(fd, buf->handle, 0, PAGE_ALIGN(buf->size),
PROT_READ | PROT_WRITE);
@@ -389,7 +389,7 @@ static void draw_rect_mmap_wc(int fd, struct buf_data *buf, struct rect *rect,
/* We didn't implement suport for the older tiling methods yet. */
if (tiling != I915_TILING_NONE)
- igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5);
+ igt_require(intel_display_ver(intel_get_drm_devid(fd)) >= 5);
ptr = gem_mmap__wc(fd, buf->handle, 0, PAGE_ALIGN(buf->size),
PROT_READ | PROT_WRITE);
@@ -440,7 +440,7 @@ static void draw_rect_pwrite_tiled(int fd, struct buf_data *buf,
int pixels_written = 0;
/* We didn't implement suport for the older tiling methods yet. */
- igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5);
+ igt_require(intel_display_ver(intel_get_drm_devid(fd)) >= 5);
pixel_size = buf->bpp / 8;
tmp_size = sizeof(tmp) / pixel_size;
@@ -536,7 +536,7 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
struct intel_buf *dst;
int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth;
uint32_t devid = intel_get_drm_devid(fd);
- int gen = intel_gen(devid);
+ int ver = intel_display_ver(devid);
int pitch;
dst = create_buf(fd, cmd_data->bops, buf, tiling);
@@ -557,9 +557,9 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
igt_assert(false);
}
- blt_cmd_len = (gen >= 8) ? 0x5 : 0x4;
+ blt_cmd_len = (ver >= 8) ? 0x5 : 0x4;
blt_cmd_tiling = (tiling) ? XY_COLOR_BLT_TILED : 0;
- pitch = (gen >= 4 && tiling) ? buf->stride / 4 : buf->stride;
+ pitch = (ver >= 4 && tiling) ? buf->stride / 4 : buf->stride;
switch_blt_tiling(ibb, tiling, true);
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 3e6841fd..585ede38 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -408,7 +408,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
break;
case LOCAL_I915_FORMAT_MOD_X_TILED:
igt_require_intel(fd);
- if (intel_gen(intel_get_drm_devid(fd)) == 2) {
+ if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
*width_ret = 128;
*height_ret = 16;
} else {
@@ -422,7 +422,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
igt_require_intel(fd);
- if (intel_gen(intel_get_drm_devid(fd)) == 2) {
+ if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
*width_ret = 128;
*height_ret = 16;
} else if (IS_915(intel_get_drm_devid(fd))) {
@@ -693,7 +693,7 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
if (fb->modifier != LOCAL_DRM_FORMAT_MOD_NONE &&
is_i915_device(fb->fd) &&
- intel_gen(intel_get_drm_devid(fb->fd)) <= 3) {
+ intel_display_ver(intel_get_drm_devid(fb->fd)) <= 3) {
uint32_t stride;
/* Round the tiling up to the next power-of-two and the region
@@ -758,7 +758,7 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
{
if (fb->modifier != LOCAL_DRM_FORMAT_MOD_NONE &&
is_i915_device(fb->fd) &&
- intel_gen(intel_get_drm_devid(fb->fd)) <= 3) {
+ intel_display_ver(intel_get_drm_devid(fb->fd)) <= 3) {
uint64_t min_size = (uint64_t) fb->strides[plane] *
fb->plane_height[plane];
uint64_t size;
@@ -2118,12 +2118,12 @@ struct fb_blit_upload {
static bool fast_blit_ok(const struct igt_fb *fb)
{
- int gen = intel_gen(intel_get_drm_devid(fb->fd));
+ int ver = intel_display_ver(intel_get_drm_devid(fb->fd));
- if (gen < 9)
+ if (ver < 9)
return false;
- if (gen < 12)
+ if (ver < 12)
return true;
return fb->modifier != I915_FORMAT_MOD_X_TILED;
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 8e81ffa9..87b3bbc4 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -84,6 +84,7 @@ struct intel_device_info {
const struct intel_device_info *intel_get_device_info(uint16_t devid) __attribute__((pure));
unsigned intel_gen(uint16_t devid) __attribute__((pure));
+unsigned intel_display_ver(uint16_t devid) __attribute__((pure));
extern enum pch_type intel_pch;
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 4ab236e4..0c09f5cd 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -535,3 +535,17 @@ unsigned intel_gen(uint16_t devid)
{
return intel_get_device_info(devid)->graphics_ver ?: -1u;
}
+
+/**
+ * intel_display_ver:
+ * @devid: pci device id
+ *
+ * Computes the Intel GFX display version for the given device id.
+ *
+ * Returns:
+ * The display version on successful lookup, -1u on failure.
+ */
+unsigned intel_display_ver(uint16_t devid)
+{
+ return intel_get_device_info(devid)->display_ver ?: -1u;
+}
diff --git a/tests/kms_atomic_transition.c b/tests/kms_atomic_transition.c
index d8085ef3..f4131071 100644
--- a/tests/kms_atomic_transition.c
+++ b/tests/kms_atomic_transition.c
@@ -141,7 +141,7 @@ static bool skip_plane(data_t *data, igt_plane_t *plane)
if (plane->type == DRM_PLANE_TYPE_CURSOR)
return false;
- if (intel_gen(intel_get_drm_devid(data->drm_fd)) < 11)
+ if (intel_display_ver(intel_get_drm_devid(data->drm_fd)) < 11)
return false;
/*
diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c
index b35727a0..81bf0542 100644
--- a/tests/kms_big_fb.c
+++ b/tests/kms_big_fb.c
@@ -153,7 +153,7 @@ static bool size_ok(data_t *data, uint64_t size)
* The kernel limits scanout to the
* mappable portion of ggtt on gmch platforms.
*/
- if ((intel_gen(data->devid) < 5 ||
+ if ((intel_display_ver(data->devid) < 5 ||
IS_VALLEYVIEW(data->devid) ||
IS_CHERRYVIEW(data->devid)) &&
size > data->mappable_size / 2)
@@ -182,7 +182,7 @@ static void max_fb_size(data_t *data, int *width, int *height,
*height = data->max_fb_height;
/* max fence stride is only 8k bytes on gen3 */
- if (intel_gen(data->devid) < 4 &&
+ if (intel_display_ver(data->devid) < 4 &&
format == DRM_FORMAT_XRGB8888)
*width = min(*width, 8192 / 4);
@@ -553,7 +553,7 @@ test_addfb(data_t *data)
* max fb size of 4k pixels, hence we can't test
* with 32bpp and must use 16bpp instead.
*/
- if (intel_gen(data->devid) == 3)
+ if (intel_display_ver(data->devid) == 3)
format = DRM_FORMAT_RGB565;
else
format = DRM_FORMAT_XRGB8888;
@@ -570,7 +570,7 @@ test_addfb(data_t *data)
bo = gem_create(data->drm_fd, size);
igt_require(bo);
- if (intel_gen(data->devid) < 4)
+ if (intel_display_ver(data->devid) < 4)
gem_set_tiling(data->drm_fd, bo,
igt_fb_mod_to_tiling(data->modifier), strides[0]);
@@ -660,7 +660,7 @@ igt_main
* On gen2 we could use either, but let's go for the
* blitter there as well.
*/
- if (intel_gen(data.devid) >= 4)
+ if (intel_display_ver(data.devid) >= 4)
data.render_copy = igt_get_render_copyfunc(data.devid);
data.bops = buf_ops_create(data.drm_fd);
diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 01e3b979..a3eac1f8 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -573,7 +573,7 @@ igt_main_args("cs:", NULL, help_str, opt_handler, &data)
igt_fixture {
data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
- igt_require(intel_gen(intel_get_drm_devid(data.drm_fd)) >= 9);
+ igt_require(intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 9);
kmstest_set_vt_graphics_mode();
igt_require_pipe_crc(data.drm_fd);
diff --git a/tests/kms_draw_crc.c b/tests/kms_draw_crc.c
index e1fdcef6..dcda2e04 100644
--- a/tests/kms_draw_crc.c
+++ b/tests/kms_draw_crc.c
@@ -245,7 +245,7 @@ static void fill_fb_subtest(void)
get_fill_crc(LOCAL_I915_FORMAT_MOD_X_TILED, &crc);
igt_assert_crc_equal(&crc, &base_crc);
- if (intel_gen(intel_get_drm_devid(drm_fd)) >= 9) {
+ if (intel_display_ver(intel_get_drm_devid(drm_fd)) >= 9) {
get_fill_crc(LOCAL_I915_FORMAT_MOD_Y_TILED, &crc);
igt_assert_crc_equal(&crc, &base_crc);
}
diff --git a/tests/kms_flip_scaled_crc.c b/tests/kms_flip_scaled_crc.c
index bb796caf..d81ad352 100644
--- a/tests/kms_flip_scaled_crc.c
+++ b/tests/kms_flip_scaled_crc.c
@@ -261,7 +261,7 @@ igt_main
igt_fixture {
data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
- data.gen = intel_gen(intel_get_drm_devid(data.drm_fd));
+ data.gen = intel_display_ver(intel_get_drm_devid(data.drm_fd));
igt_require(data.gen >= 9);
igt_display_require(&data.display, data.drm_fd);
igt_require(data.display.is_atomic);
diff --git a/tests/kms_flip_tiling.c b/tests/kms_flip_tiling.c
index 09e99580..573cc337 100644
--- a/tests/kms_flip_tiling.c
+++ b/tests/kms_flip_tiling.c
@@ -155,7 +155,7 @@ igt_main
{
igt_fixture {
data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
- data.gen = intel_gen(intel_get_drm_devid(data.drm_fd));
+ data.gen = intel_display_ver(intel_get_drm_devid(data.drm_fd));
data.testformat = DRM_FORMAT_XRGB8888;
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 906caa4c..97902c08 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -2647,7 +2647,7 @@ static void scaledprimary_subtest(const struct test_mode *t)
struct igt_fb new_fb, *old_fb;
struct modeset_params *params = pick_params(t);
struct fb_region *reg = ¶ms->primary;
- int gen = intel_gen(intel_get_drm_devid(drm.fd));
+ int gen = intel_display_ver(intel_get_drm_devid(drm.fd));
int src_y_upscale = ALIGN(reg->h / 4, 4);
igt_require_f(gen >= 9,
@@ -2831,7 +2831,7 @@ static void farfromfence_subtest(const struct test_mode *t)
struct draw_pattern_info *pattern = &pattern1;
struct fb_region *target;
int max_height, assertions = 0;
- int gen = intel_gen(intel_get_drm_devid(drm.fd));
+ int gen = intel_display_ver(intel_get_drm_devid(drm.fd));
igt_skip_on(t->method == IGT_DRAW_MMAP_GTT &&
!gem_has_mappable_ggtt(drm.fd));
diff --git a/tests/kms_getfb.c b/tests/kms_getfb.c
index 917b57bb..14be74d6 100644
--- a/tests/kms_getfb.c
+++ b/tests/kms_getfb.c
@@ -92,7 +92,7 @@ static void get_ccs_fb(int fd, struct drm_mode_fb_cmd2 *ret)
igt_require(has_addfb2_iface(fd));
igt_require_intel(fd);
- if ((intel_gen(intel_get_drm_devid(fd))) >= 12) {
+ if ((intel_display_ver(intel_get_drm_devid(fd))) >= 12) {
add.modifier[0] = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
add.modifier[1] = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
diff --git a/tests/kms_hdmi_inject.c b/tests/kms_hdmi_inject.c
index 1769df08..b47b8a39 100644
--- a/tests/kms_hdmi_inject.c
+++ b/tests/kms_hdmi_inject.c
@@ -87,7 +87,7 @@ hdmi_inject_4k(int drm_fd, drmModeConnector *connector)
devid = intel_get_drm_devid(drm_fd);
/* 4K requires at least HSW */
- igt_require(IS_HASWELL(devid) || intel_gen(devid) >= 8);
+ igt_require(IS_HASWELL(devid) || intel_display_ver(devid) >= 8);
edid = igt_kms_get_4k_edid();
kmstest_force_edid(drm_fd, connector, edid);
diff --git a/tests/kms_panel_fitting.c b/tests/kms_panel_fitting.c
index 1623f34e..3e42d148 100644
--- a/tests/kms_panel_fitting.c
+++ b/tests/kms_panel_fitting.c
@@ -243,7 +243,7 @@ static void test_atomic_fastset(data_t *data)
if (stat("/sys/module/i915/parameters/fastboot", &sb) == 0)
igt_set_module_param_int(data->drm_fd, "fastboot", 1);
- igt_require(intel_gen(intel_get_drm_devid(display->drm_fd)) >= 5);
+ igt_require(intel_display_ver(intel_get_drm_devid(display->drm_fd)) >= 5);
}
igt_require(display->is_atomic);
diff --git a/tests/kms_plane.c b/tests/kms_plane.c
index d7cbe892..ba419bbd 100644
--- a/tests/kms_plane.c
+++ b/tests/kms_plane.c
@@ -999,7 +999,7 @@ static bool skip_plane(data_t *data, igt_plane_t *plane)
if (plane->type == DRM_PLANE_TYPE_CURSOR)
return false;
- if (intel_gen(intel_get_drm_devid(data->drm_fd)) < 11)
+ if (intel_display_ver(intel_get_drm_devid(data->drm_fd)) < 11)
return false;
/*
diff --git a/tests/kms_plane_lowres.c b/tests/kms_plane_lowres.c
index a4def89f..7fd02180 100644
--- a/tests/kms_plane_lowres.c
+++ b/tests/kms_plane_lowres.c
@@ -80,14 +80,14 @@ static igt_plane_t *first_sdr_plane(igt_output_t *output, uint32_t devid)
{
int index;
- index = intel_gen(devid) <= 9 ? 0 : SDR_PLANE_BASE;
+ index = intel_display_ver(devid) <= 9 ? 0 : SDR_PLANE_BASE;
return igt_output_get_plane(output, index);
}
static bool is_sdr_plane(const igt_plane_t *plane, uint32_t devid)
{
- if (intel_gen(devid) <= 9)
+ if (intel_display_ver(devid) <= 9)
return true;
return plane->index >= SDR_PLANE_BASE;
diff --git a/tests/kms_plane_scaling.c b/tests/kms_plane_scaling.c
index 7464b5bd..2aa46ac8 100644
--- a/tests/kms_plane_scaling.c
+++ b/tests/kms_plane_scaling.c
@@ -52,9 +52,9 @@ static int get_num_scalers(data_t* d, enum pipe pipe)
if (!is_i915_device(d->drm_fd))
return 1;
- igt_require(intel_gen(d->devid) >= 9);
+ igt_require(intel_display_ver(d->devid) >= 9);
- if (intel_gen(d->devid) >= 10)
+ if (intel_display_ver(d->devid) >= 10)
return 2;
else if (pipe != PIPE_C)
return 2;
@@ -167,7 +167,7 @@ static bool can_rotate(data_t *d, unsigned format, uint64_t tiling,
switch (format) {
case DRM_FORMAT_RGB565:
- if (intel_gen(d->devid) >= 11)
+ if (intel_display_ver(d->devid) >= 11)
break;
/* fall through */
case DRM_FORMAT_C8:
@@ -198,7 +198,7 @@ static bool can_scale(data_t *d, unsigned format)
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_ARGB16161616F:
case DRM_FORMAT_ABGR16161616F:
- if (intel_gen(d->devid) >= 11)
+ if (intel_display_ver(d->devid) >= 11)
return true;
/* fall through */
case DRM_FORMAT_C8:
diff --git a/tests/kms_rotation_crc.c b/tests/kms_rotation_crc.c
index bcbb9bdc..20556c82 100644
--- a/tests/kms_rotation_crc.c
+++ b/tests/kms_rotation_crc.c
@@ -517,7 +517,7 @@ static void test_plane_rotation(data_t *data, int plane_type, bool test_bad_form
/* Only support partial covering primary plane on gen9+ */
if (is_amdgpu_device(data->gfx_fd) ||
(plane_type == DRM_PLANE_TYPE_PRIMARY &&
- intel_gen(intel_get_drm_devid(data->gfx_fd)) < 9)) {
+ intel_display_ver(intel_get_drm_devid(data->gfx_fd)) < 9)) {
if (i != rectangle)
continue;
else
@@ -730,12 +730,12 @@ static void test_multi_plane_rotation(data_t *data, enum pipe pipe)
*/
if (p[0].format == DRM_FORMAT_RGB565 &&
(planeconfigs[i].rotation & (IGT_ROTATION_90 | IGT_ROTATION_270))
- && intel_gen(data->devid) < 11)
+ && intel_display_ver(data->devid) < 11)
continue;
if (p[1].format == DRM_FORMAT_RGB565 &&
(planeconfigs[j].rotation & (IGT_ROTATION_90 | IGT_ROTATION_270))
- && intel_gen(data->devid) < 11)
+ && intel_display_ver(data->devid) < 11)
continue;
/*
* if using packed formats crc's will be
@@ -1024,7 +1024,7 @@ igt_main_args("", long_opts, help_str, opt_handler, &data)
data.gfx_fd = drm_open_driver_master(DRIVER_INTEL | DRIVER_AMDGPU);
if (is_i915_device(data.gfx_fd)) {
data.devid = intel_get_drm_devid(data.gfx_fd);
- gen = intel_gen(data.devid);
+ gen = intel_display_ver(data.devid);
}
kmstest_set_vt_graphics_mode();
diff --git a/tests/kms_universal_plane.c b/tests/kms_universal_plane.c
index aae3fc52..26e5e8eb 100644
--- a/tests/kms_universal_plane.c
+++ b/tests/kms_universal_plane.c
@@ -798,7 +798,7 @@ igt_main
igt_fixture {
data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
- data.gen = intel_gen(intel_get_drm_devid(data.drm_fd));
+ data.gen = intel_display_ver(intel_get_drm_devid(data.drm_fd));
kmstest_set_vt_graphics_mode();
--
2.25.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t 3/6] lib/i915/adl-p: Basic ADL-P enabling
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 1/6] lib/i915: Split 'gen' into graphics version and display version Matt Roper
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 2/6] lib/i915: Add intel_display_ver() and use it in display tests/libs Matt Roper
@ 2021-06-04 20:39 ` Matt Roper
2021-06-05 0:24 ` Souza, Jose
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 4/6] lib/i915/perf: Add ADL-P metrics Matt Roper
` (10 subsequent siblings)
13 siblings, 1 reply; 26+ messages in thread
From: Matt Roper @ 2021-06-04 20:39 UTC (permalink / raw)
To: igt-dev; +Cc: Clint Taylor, Juha-Pekka Heikkilä
From: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Caz Yokoyama <caz.yokoyama@intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
lib/intel_chipset.h | 2 ++
lib/intel_device_info.c | 8 ++++++++
2 files changed, 10 insertions(+)
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 87b3bbc4..2b795527 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -78,6 +78,7 @@ struct intel_device_info {
bool is_rocketlake : 1;
bool is_dg1 : 1;
bool is_alderlake_s : 1;
+ bool is_alderlake_p : 1;
const char *codename;
};
@@ -180,6 +181,7 @@ void intel_check_pch(void);
#define IS_ROCKETLAKE(devid) (intel_get_device_info(devid)->is_rocketlake)
#define IS_DG1(devid) (intel_get_device_info(devid)->is_dg1)
#define IS_ALDERLAKE_S(devid) (intel_get_device_info(devid)->is_alderlake_s)
+#define IS_ALDERLAKE_P(devid) (intel_get_device_info(devid)->is_alderlake_p)
#define IS_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver == x)
#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 0c09f5cd..07338957 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -396,6 +396,13 @@ static const struct intel_device_info intel_alderlake_s_info = {
.codename = "alderlake_s"
};
+static const struct intel_device_info intel_alderlake_p_info = {
+ .graphics_ver = 12,
+ .display_ver = 13,
+ .is_alderlake_p = true,
+ .codename = "alderlake_p"
+};
+
static const struct pci_id_match intel_device_match[] = {
INTEL_I810_IDS(&intel_i810_info),
INTEL_I815_IDS(&intel_i815_info),
@@ -487,6 +494,7 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_DG1_IDS(&intel_dg1_info),
INTEL_ADLS_IDS(&intel_alderlake_s_info),
+ INTEL_ADLP_IDS(&intel_alderlake_p_info),
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
};
--
2.25.4
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igt-dev@lists.freedesktop.org
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^ permalink raw reply related [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t 4/6] lib/i915/perf: Add ADL-P metrics
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (2 preceding siblings ...)
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 3/6] lib/i915/adl-p: Basic ADL-P enabling Matt Roper
@ 2021-06-04 20:39 ` Matt Roper
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 5/6] lib/i915: Add ADL-P stride restrictions for non-linear buffers Matt Roper
` (9 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Matt Roper @ 2021-06-04 20:39 UTC (permalink / raw)
To: igt-dev
From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Add ADL-P metrics for perf OA tests.
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
lib/i915/perf-configs/guids.xml | 26 +
lib/i915/perf-configs/mdapi-xml-convert.py | 1 +
lib/i915/perf-configs/oa-adlp.xml | 10624 +++++++++++++++++++
lib/i915/perf-configs/update-guids.py | 2 +-
lib/i915/perf.c | 3 +
lib/meson.build | 2 +-
6 files changed, 10656 insertions(+), 2 deletions(-)
create mode 100644 lib/i915/perf-configs/oa-adlp.xml
diff --git a/lib/i915/perf-configs/guids.xml b/lib/i915/perf-configs/guids.xml
index 95c9d717..48ef8d92 100644
--- a/lib/i915/perf-configs/guids.xml
+++ b/lib/i915/perf-configs/guids.xml
@@ -431,4 +431,30 @@
<guid config_hash="b420d7b956fb1b097a7bb812b6c87dc0" mdapi_config_hash="d81f15a77d18a099782c18acaa3132f7" id="c3ea2a23-f1c7-4a19-9da2-b569226fb6de" chipset="adl" name="EuActivity7" />
<guid config_hash="5face026dac6a0549f8a28cf226dfbc8" mdapi_config_hash="de7326838bcc8abf024bac9c771e22e4" id="a5e2f79b-cecb-4eff-8f29-cda8e2a58749" chipset="adl" name="EuActivity8" />
<guid config_hash="1affe7abeb3739d2c845cc6fa9aacf88" mdapi_config_hash="d071f4933574945979595246be61d3f0" id="89173c19-fcfe-48da-ac26-fb64425f141b" chipset="adl" name="TestOa" />
+ <guid config_hash="21fbe2cd2b53541e3b761d579516ed12" mdapi_config_hash="66837182711f03f84fe87408ebd0a617" id="05cd2b49-0046-4da4-a0d0-41b4ab16efa3" chipset="adlp" name="RenderBasic" />
+ <guid config_hash="6bfccfd98beccb8b008e8ba30a7a553b" mdapi_config_hash="c2e0ad3ca3f17e7e1dc6c9c83c83619e" id="cf3175c9-618b-4d39-b805-4a4cc07f9709" chipset="adlp" name="ComputeBasic" />
+ <guid config_hash="29513a0b338299ead603390779f6c120" mdapi_config_hash="ee12197058eb520427dc1d425178eb56" id="09c9ff45-0930-4f92-a9e2-9deb921ae752" chipset="adlp" name="RenderPipeProfile" />
+ <guid config_hash="ebc502d01dac0cf9673eb0fef2506f91" mdapi_config_hash="80fef6b5d722083a1fb9e0122d0a51a5" id="4662cab4-fb87-485a-ab08-1107fe998f13" chipset="adlp" name="HDCAndSF" />
+ <guid config_hash="28d420151b16828e8ca210caeb56b9c8" mdapi_config_hash="fbc93cbb50b2798b87a72c2dd0dbf222" id="94719676-7538-4950-bfd4-ed0122e86183" chipset="adlp" name="RasterizerAndPixelBackend" />
+ <guid config_hash="031b10d628ca033ad143ff80933f9278" mdapi_config_hash="b3259d9497ba9d9f5b0be7937383bedb" id="dc2ab75b-e656-44d9-bcbf-093a0259b1c8" chipset="adlp" name="L3_1" />
+ <guid config_hash="340670c90887c04a160735540fd60a05" mdapi_config_hash="beb8afb29ed1a424e319591041423417" id="55bc8001-d9a3-478a-a398-a3715a52630a" chipset="adlp" name="L3_2" />
+ <guid config_hash="a5c8e121989ace5c9e12158a91da582c" mdapi_config_hash="70dbd52b6c70fe3f6c7b7d265ceef298" id="1eba4453-dfaf-400a-bbcf-8bcb8a3e6b29" chipset="adlp" name="L3_3" />
+ <guid config_hash="1ec73fc7528bf2e976133100aefaa4b6" mdapi_config_hash="0716cf82fa0ba9963b363c8641d6e875" id="8f1bebfb-d930-4ee7-ab96-bde6b0ac1812" chipset="adlp" name="L3_4" />
+ <guid config_hash="b5aea697ccc39a129b0c23635a96e001" mdapi_config_hash="969f8b8b34d6216d60c7190661a9b6a9" id="df96f204-e340-4514-a5c7-909f21729d83" chipset="adlp" name="L3_5" />
+ <guid config_hash="43a026d0af29f7a18a945e2d4b350573" mdapi_config_hash="510e8490a07a363379a4c058cb474eda" id="6e8725a7-9d49-4b05-b2c3-341cf9565d33" chipset="adlp" name="L3_6" />
+ <guid config_hash="c809f1aed72d8cf173fcead43781c297" mdapi_config_hash="f9c86d51b0a47f9fcd1e4e1c66653cbc" id="dfe5179f-98d6-46d9-87fd-fc970569874f" chipset="adlp" name="Sampler_1" />
+ <guid config_hash="8c50773e2c85d6408fcc2d514447144f" mdapi_config_hash="030c3f4d0a0cfd8134531b701e7b743b" id="8f56017f-8194-4a2b-94ef-a5a02f5312fe" chipset="adlp" name="Sampler_2" />
+ <guid config_hash="ee9b574cbcc326fa0884278048553a53" mdapi_config_hash="368d6fa333da9141a6247ac4d8448f23" id="62317d73-47a0-497a-984d-28d37ea3ddf0" chipset="adlp" name="TDL_1" />
+ <guid config_hash="f32fb585f3220f879ad39c4972282af2" mdapi_config_hash="44438bc611f14882a23a4bdd67c8e6ec" id="7f826267-d18c-47bd-ad8b-11e175c32c67" chipset="adlp" name="TDL_2" />
+ <guid config_hash="15196ca6dc6aa4241d9de9fc75121111" mdapi_config_hash="b357e4b704d2bb149aa2c5313bf7aff5" id="ddfd2ac0-7b57-48af-82b0-3cf3d811845b" chipset="adlp" name="TDL_3" />
+ <guid config_hash="d033ecd48056664daee05fcf4ee777ef" mdapi_config_hash="f18943412a44e4a69d244a3a78a41e65" id="b3af5334-ed28-4e24-b6de-6f621e150eb5" chipset="adlp" name="GpuBusyness" />
+ <guid config_hash="85e13c721ad46cd039e22a1ac180c98d" mdapi_config_hash="6818187e4856c8b2acc78d588ea87056" id="b65afe50-4e37-42f5-af5c-2d45c5d82c59" chipset="adlp" name="EuActivity1" />
+ <guid config_hash="a2f87cd5035b6b6211922d49641b66a7" mdapi_config_hash="f0bbc48e521ea0ad8a3a745dc3eecdec" id="91fadda5-5d16-4f31-a132-9c7c70afa3c4" chipset="adlp" name="EuActivity2" />
+ <guid config_hash="62d20415870552f44c9de714f245da09" mdapi_config_hash="b94a87d76d2b5fdb4a4aa30b02886e3d" id="86775c09-faa5-4c25-83a0-31d085cc4959" chipset="adlp" name="EuActivity3" />
+ <guid config_hash="3fb95f065719b601ec6878eda687adeb" mdapi_config_hash="59eefdbc87164025ecdac51eb4c604a5" id="73bfba4e-13ce-4c8a-8bec-9b807dd63a97" chipset="adlp" name="EuActivity4" />
+ <guid config_hash="3b75af09f7ac5c393bd7a6aad2fddc11" mdapi_config_hash="8ebe6beda3b86aaf5f3dbf10ca4d430c" id="2f72b499-da58-4506-9098-c2487c98b8d8" chipset="adlp" name="EuActivity5" />
+ <guid config_hash="a9d708fdb3ec73b208b1092a1feeffff" mdapi_config_hash="b473bc4bd92f94c51f39cae220f56ff7" id="ee4d5a29-352b-4819-be54-ef4641803949" chipset="adlp" name="EuActivity6" />
+ <guid config_hash="b420d7b956fb1b097a7bb812b6c87dc0" mdapi_config_hash="d81f15a77d18a099782c18acaa3132f7" id="100bbf2f-a29f-44a9-83e8-3e38c34fea0c" chipset="adlp" name="EuActivity7" />
+ <guid config_hash="5face026dac6a0549f8a28cf226dfbc8" mdapi_config_hash="de7326838bcc8abf024bac9c771e22e4" id="b09ea1d6-8b2a-4c9c-99ac-8f2e9bafe8af" chipset="adlp" name="EuActivity8" />
+ <guid config_hash="1affe7abeb3739d2c845cc6fa9aacf88" mdapi_config_hash="d071f4933574945979595246be61d3f0" id="7d987d1c-efe6-4b8f-9ba9-a036ab09f676" chipset="adlp" name="TestOa" />
</guids>
diff --git a/lib/i915/perf-configs/mdapi-xml-convert.py b/lib/i915/perf-configs/mdapi-xml-convert.py
index d26ff623..b634c96c 100755
--- a/lib/i915/perf-configs/mdapi-xml-convert.py
+++ b/lib/i915/perf-configs/mdapi-xml-convert.py
@@ -123,6 +123,7 @@ chipsets = {
'RKL': gen8_11_chipset_params,
'DG1': gen8_11_chipset_params,
'ADL': gen8_11_chipset_params,
+ 'ADLP': gen8_11_chipset_params,
}
register_types = { 'OA', 'NOA', 'FLEX', 'PM' }
diff --git a/lib/i915/perf-configs/oa-adlp.xml b/lib/i915/perf-configs/oa-adlp.xml
new file mode 100644
index 00000000..7a6dc3c1
--- /dev/null
+++ b/lib/i915/perf-configs/oa-adlp.xml
@@ -0,0 +1,10624 @@
+<?xml version="1.0"?>
+<metrics version="1602592456" merge_md5="">
+ <set name="Render Metrics Basic Gen12"
+ chipset="ADLP"
+ symbol_name="RenderBasic"
+ underscore_name="render_basic"
+ mdapi_supported_apis="VK OGL OCL IO"
+ hw_config_guid="05cd2b49-0046-4da4-a0d0-41b4ab16efa3"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler00 Busy"
+ symbol_name="Sampler00Busy"
+ underscore_name="sampler00_busy"
+ description="The percentage of time in which Slice0 Sampler0 has been processing EU requests."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="Sampler"
+ mdapi_usage_flags="Tier3 Batch Frame Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Sampler Slice0 Dualsubslice0 is bottleneck"
+ symbol_name="Sampler00Bottleneck"
+ underscore_name="sampler00_bottleneck"
+ description="The percentage of time when sampler slice0 dualsubslice0 is bottleneck"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Samplers Busy"
+ symbol_name="SamplersBusy"
+ underscore_name="samplers_busy"
+ description="The percentage of time in which samplers have been processing EU requests."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="$Sampler00Busy"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="Sampler"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Samplers Bottleneck"
+ symbol_name="SamplerBottleneck"
+ underscore_name="sampler_bottleneck"
+ description="The percentage of time in which samplers have been slowing down the pipe when processing EU requests."
+ low_watermark="5"
+ high_watermark="15"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="$Sampler00Bottleneck"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="Sampler"
+ mdapi_usage_flags="Tier3 Overview Indicate System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Rasterized Pixels"
+ symbol_name="RasterizedPixels"
+ underscore_name="rasterized_pixels"
+ description="The total number of rasterized pixels."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 21 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Hi-Depth Test Fails"
+ symbol_name="HiDepthTestFails"
+ underscore_name="hi_depth_test_fails"
+ description="The total number of pixels dropped on early hierarchical depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 22 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Hi-Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Depth Test Fails"
+ symbol_name="EarlyDepthTestFails"
+ underscore_name="early_depth_test_fails"
+ description="The total number of pixels dropped on early depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 23 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Early Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Killed in FS"
+ symbol_name="SamplesKilledInPs"
+ underscore_name="samples_killed_in_ps"
+ description="The total number of samples or pixels dropped in fragment shaders."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 24 READ 4 UMUL"
+ mdapi_group="3D Pipe/Fragment Shader"
+ mdapi_usage_flags="Tier4 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Pixels Failing Tests"
+ symbol_name="PixelsFailingPostPsTests"
+ underscore_name="pixels_failing_post_ps_tests"
+ description="The total number of pixels dropped on post-FS alpha, stencil, or depth tests."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 25 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Written"
+ symbol_name="SamplesWritten"
+ underscore_name="samples_written"
+ description="The total number of samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 26 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Blended"
+ symbol_name="SamplesBlended"
+ underscore_name="samples_blended"
+ description="The total number of blended samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 27 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels"
+ symbol_name="SamplerTexels"
+ underscore_name="sampler_texels"
+ description="The total number of texels seen on input (with 2x2 accuracy) in all sampler units."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 28 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Input"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels Misses"
+ symbol_name="SamplerTexelMisses"
+ underscore_name="sampler_texel_misses"
+ description="The total number of texels lookups (with 2x2 accuracy) that missed L1 sampler cache."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 29 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Cache"
+ mdapi_usage_flags="Tier3 Batch Frame Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Read"
+ symbol_name="SlmBytesRead"
+ underscore_name="slm_bytes_read"
+ description="The total number of GPU memory bytes read from shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 30 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Written"
+ symbol_name="SlmBytesWritten"
+ underscore_name="slm_bytes_written"
+ description="The total number of GPU memory bytes written into shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 31 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Memory Accesses"
+ symbol_name="ShaderMemoryAccesses"
+ underscore_name="shader_memory_accesses"
+ description="The total number of shader memory accesses to L3."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 32 READ"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Atomic Memory Accesses"
+ symbol_name="ShaderAtomics"
+ underscore_name="shader_atomics"
+ description="The total number of shader atomic memory accesses."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 34 READ"
+ mdapi_group="L3/Data Port/Atomics"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="L3 Shader Throughput"
+ symbol_name="L3ShaderThroughput"
+ underscore_name="l3_shader_throughput"
+ description="The total number of GPU memory bytes transferred between shaders and L3 caches w/o URB."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="$ShaderMemoryAccesses 64 UMUL"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier2 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Barrier Messages"
+ symbol_name="ShaderBarriers"
+ underscore_name="shader_barriers"
+ description="The total number of shader barrier messages."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 35 READ"
+ mdapi_group="EU Array/Barrier"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 5 READ C 4 READ UADD C 3 READ UADD C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 1 READ C 0 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x14150001" />
+ <register type="NOA" address="0x00009888" value="0x16150020" />
+ <register type="NOA" address="0x00009888" value="0x00124000" />
+ <register type="NOA" address="0x00009888" value="0x0E124000" />
+ <register type="NOA" address="0x00009888" value="0x10124000" />
+ <register type="NOA" address="0x00009888" value="0x12124000" />
+ <register type="NOA" address="0x00009888" value="0x10138000" />
+ <register type="NOA" address="0x00009888" value="0x1C130E00" />
+ <register type="NOA" address="0x00009888" value="0x00150050" />
+ <register type="NOA" address="0x00009888" value="0x06157000" />
+ <register type="NOA" address="0x00009888" value="0x08157151" />
+ <register type="NOA" address="0x00009888" value="0x10150000" />
+ <register type="NOA" address="0x00009888" value="0x18150000" />
+ <register type="NOA" address="0x00009888" value="0x1C150000" />
+ <register type="NOA" address="0x00009888" value="0x18004000" />
+ <register type="NOA" address="0x00009888" value="0x36000490" />
+ <register type="NOA" address="0x00009888" value="0x1C058000" />
+ <register type="NOA" address="0x00009888" value="0x2405002A" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
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+ <register type="NOA" address="0x00009888" value="0x09151536" />
+ <register type="NOA" address="0x00009888" value="0x05351C00" />
+ <register type="NOA" address="0x00009888" value="0x09351400" />
+ <register type="NOA" address="0x00009888" value="0x41104000" />
+ <register type="NOA" address="0x00009888" value="0x5B1050BB" />
+ <register type="NOA" address="0x00009888" value="0x5D102C01" />
+ <register type="NOA" address="0x00009888" value="0x17144000" />
+ <register type="NOA" address="0x00009888" value="0x1D1402A0" />
+ <register type="NOA" address="0x00009888" value="0x01124000" />
+ <register type="NOA" address="0x00009888" value="0x0F124000" />
+ <register type="NOA" address="0x00009888" value="0x11124000" />
+ <register type="NOA" address="0x00009888" value="0x13124000" />
+ <register type="NOA" address="0x00009888" value="0x1F150137" />
+ <register type="NOA" address="0x00009888" value="0x01150000" />
+ <register type="NOA" address="0x00009888" value="0x0F168000" />
+ <register type="NOA" address="0x00009888" value="0x03164000" />
+ <register type="NOA" address="0x00009888" value="0x05164000" />
+ <register type="NOA" address="0x00009888" value="0x1D350137" />
+ <register type="NOA" address="0x00009888" value="0x03350147" />
+ <register type="NOA" address="0x00009888" value="0x07350136" />
+ <register type="NOA" address="0x00009888" value="0x01350000" />
+ <register type="NOA" address="0x00009888" value="0x0F364000" />
+ <register type="NOA" address="0x00009888" value="0x01368000" />
+ <register type="NOA" address="0x00009888" value="0x03368000" />
+ <register type="NOA" address="0x00009888" value="0x47101000" />
+ <register type="NOA" address="0x00009888" value="0x4D100000" />
+ <register type="NOA" address="0x00009888" value="0x4F100000" />
+ <register type="NOA" address="0x00009888" value="0x51100000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009888" value="0x55101210" />
+ <register type="NOA" address="0x00009888" value="0x57100002" />
+ <register type="NOA" address="0x00009888" value="0x49101212" />
+ <register type="NOA" address="0x00009888" value="0x4B100212" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x30800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00030000" />
+ <register type="OA" address="0x0000D940" value="0x00000018" />
+ <register type="OA" address="0x0000D944" value="0x0000FFFC" />
+ <register type="OA" address="0x0000DC00" value="0x00000018" />
+ <register type="OA" address="0x0000DC04" value="0x0000FFFC" />
+ <register type="OA" address="0x0000D948" value="0x00000060" />
+ <register type="OA" address="0x0000D94C" value="0x0000FFF3" />
+ <register type="OA" address="0x0000DC08" value="0x00000060" />
+ <register type="OA" address="0x0000DC0C" value="0x0000FFF3" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ <register type="FLEX" address="0x0000E65C" value="0xFFFFFFFF" />
+ </register_config>
+ </set>
+
+ <set name="Compute Metrics Basic"
+ chipset="ADLP"
+ symbol_name="ComputeBasic"
+ underscore_name="compute_basic"
+ mdapi_supported_apis="VK OGL OCL IO"
+ hw_config_guid="cf3175c9-618b-4d39-b805-4a4cc07f9709"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Rasterized Pixels"
+ symbol_name="RasterizedPixels"
+ underscore_name="rasterized_pixels"
+ description="The total number of rasterized pixels."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 21 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Hi-Depth Test Fails"
+ symbol_name="HiDepthTestFails"
+ underscore_name="hi_depth_test_fails"
+ description="The total number of pixels dropped on early hierarchical depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 22 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Hi-Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Depth Test Fails"
+ symbol_name="EarlyDepthTestFails"
+ underscore_name="early_depth_test_fails"
+ description="The total number of pixels dropped on early depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 23 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Early Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Killed in FS"
+ symbol_name="SamplesKilledInPs"
+ underscore_name="samples_killed_in_ps"
+ description="The total number of samples or pixels dropped in fragment shaders."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 24 READ 4 UMUL"
+ mdapi_group="3D Pipe/Fragment Shader"
+ mdapi_usage_flags="Tier4 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Pixels Failing Tests"
+ symbol_name="PixelsFailingPostPsTests"
+ underscore_name="pixels_failing_post_ps_tests"
+ description="The total number of pixels dropped on post-FS alpha, stencil, or depth tests."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 25 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Written"
+ symbol_name="SamplesWritten"
+ underscore_name="samples_written"
+ description="The total number of samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 26 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Blended"
+ symbol_name="SamplesBlended"
+ underscore_name="samples_blended"
+ description="The total number of blended samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 27 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels"
+ symbol_name="SamplerTexels"
+ underscore_name="sampler_texels"
+ description="The total number of texels seen on input (with 2x2 accuracy) in all sampler units."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 28 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Input"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels Misses"
+ symbol_name="SamplerTexelMisses"
+ underscore_name="sampler_texel_misses"
+ description="The total number of texels lookups (with 2x2 accuracy) that missed L1 sampler cache."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 29 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Cache"
+ mdapi_usage_flags="Tier3 Batch Frame Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Read"
+ symbol_name="SlmBytesRead"
+ underscore_name="slm_bytes_read"
+ description="The total number of GPU memory bytes read from shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 30 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Written"
+ symbol_name="SlmBytesWritten"
+ underscore_name="slm_bytes_written"
+ description="The total number of GPU memory bytes written into shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 31 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Memory Accesses"
+ symbol_name="ShaderMemoryAccesses"
+ underscore_name="shader_memory_accesses"
+ description="The total number of shader memory accesses to L3."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 32 READ"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Atomic Memory Accesses"
+ symbol_name="ShaderAtomics"
+ underscore_name="shader_atomics"
+ description="The total number of shader atomic memory accesses."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 34 READ"
+ mdapi_group="L3/Data Port/Atomics"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="L3 Shader Throughput"
+ symbol_name="L3ShaderThroughput"
+ underscore_name="l3_shader_throughput"
+ description="The total number of GPU memory bytes transferred between shaders and L3 caches w/o URB."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="$ShaderMemoryAccesses 64 UMUL"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier2 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Barrier Messages"
+ symbol_name="ShaderBarriers"
+ underscore_name="shader_barriers"
+ description="The total number of shader barrier messages."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 35 READ"
+ mdapi_group="EU Array/Barrier"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 7 READ C 6 READ UADD C 5 READ UADD C 4 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 3 READ C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x05151D37" />
+ <register type="NOA" address="0x00009888" value="0x09151547" />
+ <register type="NOA" address="0x00009888" value="0x05351C00" />
+ <register type="NOA" address="0x00009888" value="0x09351400" />
+ <register type="NOA" address="0x00009888" value="0x5B100BBB" />
+ <register type="NOA" address="0x00009888" value="0x0D150136" />
+ <register type="NOA" address="0x00009888" value="0x01150000" />
+ <register type="NOA" address="0x00009888" value="0x03164000" />
+ <register type="NOA" address="0x00009888" value="0x05164000" />
+ <register type="NOA" address="0x00009888" value="0x07164000" />
+ <register type="NOA" address="0x00009888" value="0x03350137" />
+ <register type="NOA" address="0x00009888" value="0x07350147" />
+ <register type="NOA" address="0x00009888" value="0x0B350136" />
+ <register type="NOA" address="0x00009888" value="0x01350000" />
+ <register type="NOA" address="0x00009888" value="0x01368000" />
+ <register type="NOA" address="0x00009888" value="0x03368000" />
+ <register type="NOA" address="0x00009888" value="0x05368000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x47100000" />
+ <register type="NOA" address="0x00009888" value="0x49100000" />
+ <register type="NOA" address="0x00009888" value="0x4B100000" />
+ <register type="NOA" address="0x00009888" value="0x4D100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x00800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00000000" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ <register type="FLEX" address="0x0000E65C" value="0xFFFFFFFF" />
+ </register_config>
+ </set>
+
+ <set name="Render Metrics for 3D Pipeline Profile"
+ chipset="ADLP"
+ symbol_name="RenderPipeProfile"
+ underscore_name="render_pipe_profile"
+ mdapi_supported_apis="VK OGL OCL IO"
+ hw_config_guid="09c9ff45-0930-4f92-a9e2-9deb921ae752"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Rasterized Pixels"
+ symbol_name="RasterizedPixels"
+ underscore_name="rasterized_pixels"
+ description="The total number of rasterized pixels."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 21 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Hi-Depth Test Fails"
+ symbol_name="HiDepthTestFails"
+ underscore_name="hi_depth_test_fails"
+ description="The total number of pixels dropped on early hierarchical depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 22 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Hi-Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Depth Test Fails"
+ symbol_name="EarlyDepthTestFails"
+ underscore_name="early_depth_test_fails"
+ description="The total number of pixels dropped on early depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 23 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Early Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Killed in FS"
+ symbol_name="SamplesKilledInPs"
+ underscore_name="samples_killed_in_ps"
+ description="The total number of samples or pixels dropped in fragment shaders."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 24 READ 4 UMUL"
+ mdapi_group="3D Pipe/Fragment Shader"
+ mdapi_usage_flags="Tier4 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Pixels Failing Tests"
+ symbol_name="PixelsFailingPostPsTests"
+ underscore_name="pixels_failing_post_ps_tests"
+ description="The total number of pixels dropped on post-FS alpha, stencil, or depth tests."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 25 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Written"
+ symbol_name="SamplesWritten"
+ underscore_name="samples_written"
+ description="The total number of samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 26 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Blended"
+ symbol_name="SamplesBlended"
+ underscore_name="samples_blended"
+ description="The total number of blended samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 27 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels"
+ symbol_name="SamplerTexels"
+ underscore_name="sampler_texels"
+ description="The total number of texels seen on input (with 2x2 accuracy) in all sampler units."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 28 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Input"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels Misses"
+ symbol_name="SamplerTexelMisses"
+ underscore_name="sampler_texel_misses"
+ description="The total number of texels lookups (with 2x2 accuracy) that missed L1 sampler cache."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 29 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Cache"
+ mdapi_usage_flags="Tier3 Batch Frame Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Read"
+ symbol_name="SlmBytesRead"
+ underscore_name="slm_bytes_read"
+ description="The total number of GPU memory bytes read from shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 30 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Written"
+ symbol_name="SlmBytesWritten"
+ underscore_name="slm_bytes_written"
+ description="The total number of GPU memory bytes written into shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 31 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Memory Accesses"
+ symbol_name="ShaderMemoryAccesses"
+ underscore_name="shader_memory_accesses"
+ description="The total number of shader memory accesses to L3."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 32 READ"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Atomic Memory Accesses"
+ symbol_name="ShaderAtomics"
+ underscore_name="shader_atomics"
+ description="The total number of shader atomic memory accesses."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 34 READ"
+ mdapi_group="L3/Data Port/Atomics"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="L3 Shader Throughput"
+ symbol_name="L3ShaderThroughput"
+ underscore_name="l3_shader_throughput"
+ description="The total number of GPU memory bytes transferred between shaders and L3 caches w/o URB."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="$ShaderMemoryAccesses 64 UMUL"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier2 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Barrier Messages"
+ symbol_name="ShaderBarriers"
+ underscore_name="shader_barriers"
+ description="The total number of shader barrier messages."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 35 READ"
+ mdapi_group="EU Array/Barrier"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VF Bottleneck"
+ symbol_name="VfBottleneck"
+ underscore_name="vf_bottleneck"
+ description="The percentage of time in which vertex fetch pipeline stage was slowing down the 3D pipeline."
+ low_watermark="5"
+ high_watermark="15"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Input Assembler"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Bottleneck"
+ symbol_name="VsBottleneck"
+ underscore_name="vs_bottleneck"
+ description="The percentage of time in which vertex shader pipeline stage was slowing down the 3D pipeline."
+ low_watermark="10"
+ high_watermark="30"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Vertex Shader"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Bottleneck"
+ symbol_name="HsBottleneck"
+ underscore_name="hs_bottleneck"
+ description="The percentage of time in which hull shader pipeline stage was slowing down the 3D pipeline."
+ low_watermark="3"
+ high_watermark="9"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Hull Shader"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Bottleneck"
+ symbol_name="DsBottleneck"
+ underscore_name="ds_bottleneck"
+ description="The percentage of time in which domain shader pipeline stage was slowing down the 3D pipeline."
+ low_watermark="5"
+ high_watermark="15"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Domain Shader"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Bottleneck"
+ symbol_name="GsBottleneck"
+ underscore_name="gs_bottleneck"
+ description="The percentage of time in which geometry shader pipeline stage was slowing down the 3D pipeline."
+ low_watermark="5"
+ high_watermark="15"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Geometry Shader"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SO Bottleneck"
+ symbol_name="SoBottleneck"
+ underscore_name="so_bottleneck"
+ description="The percentage of time in which stream output pipeline stage was slowing down the 3D pipeline."
+ low_watermark="5"
+ high_watermark="15"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Stream Output"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Clipper Bottleneck"
+ symbol_name="ClBottleneck"
+ underscore_name="cl_bottleneck"
+ description="The percentage of time in which clipper pipeline stage was slowing down the 3D pipeline."
+ low_watermark="10"
+ high_watermark="30"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Clipper"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Strip-Fans Bottleneck"
+ symbol_name="SfBottleneck"
+ underscore_name="sf_bottleneck"
+ description="The percentage of time in which strip-fans pipeline stage was slowing down the 3D pipeline."
+ low_watermark="5"
+ high_watermark="10"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Rasterizer/Strip-Fans"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Hi-Depth Bottleneck"
+ symbol_name="HiDepthBottleneck"
+ underscore_name="hi_depth_bottleneck"
+ description="The percentage of time in which early hierarchical depth test pipeline stage was slowing down the 3D pipeline."
+ low_watermark="5"
+ high_watermark="15"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Rasterizer/Hi-Depth Test"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="BC Bottleneck"
+ symbol_name="BcBottleneck"
+ underscore_name="bc_bottleneck"
+ description="The percentage of time in which barycentric coordinates calculation pipeline stage was slowing down the 3D pipeline."
+ low_watermark="5"
+ high_watermark="15"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Rasterizer/Barycentric Calc"
+ mdapi_usage_flags="Tier3 Indicate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Stall"
+ symbol_name="HsStall"
+ underscore_name="hs_stall"
+ description="The percentage of time in which hull stall pipeline stage was stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Hull Shader"
+ mdapi_usage_flags="Tier4 Correlate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Stall"
+ symbol_name="DsStall"
+ underscore_name="ds_stall"
+ description="The percentage of time in which domain shader pipeline stage was stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Domain Shader"
+ mdapi_usage_flags="Tier4 Correlate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SO Stall"
+ symbol_name="SoStall"
+ underscore_name="so_stall"
+ description="The percentage of time in which stream-output pipeline stage was stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Stream Output"
+ mdapi_usage_flags="Tier4 Correlate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CL Stall"
+ symbol_name="ClStall"
+ underscore_name="cl_stall"
+ description="The percentage of time in which clipper pipeline stage was stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Clipper"
+ mdapi_usage_flags="Tier4 Correlate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SF Stall"
+ symbol_name="SfStall"
+ underscore_name="sf_stall"
+ description="The percentage of time in which strip-fans pipeline stage was stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="3D Pipe/Rasterizer/Strip-Fans"
+ mdapi_usage_flags="Tier4 Correlate Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x00123E00" />
+ <register type="NOA" address="0x00009888" value="0x060B00B3" />
+ <register type="NOA" address="0x00009888" value="0x140B3C00" />
+ <register type="NOA" address="0x00009888" value="0x1C0B0000" />
+ <register type="NOA" address="0x00009888" value="0x120C8320" />
+ <register type="NOA" address="0x00009888" value="0x040DBE00" />
+ <register type="NOA" address="0x00009888" value="0x000D0000" />
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+ <register type="NOA" address="0x00009888" value="0x2C0E7C00" />
+ <register type="NOA" address="0x00009888" value="0x10087C00" />
+ <register type="NOA" address="0x00009888" value="0x1E120002" />
+ <register type="NOA" address="0x00009888" value="0x20120000" />
+ <register type="NOA" address="0x00009888" value="0x1E130002" />
+ <register type="NOA" address="0x00009888" value="0x0E0B0031" />
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+ <register type="NOA" address="0x00009888" value="0x1A0B00B1" />
+ <register type="NOA" address="0x00009888" value="0x020B0093" />
+ <register type="NOA" address="0x00009888" value="0x040B0033" />
+ <register type="NOA" address="0x00009888" value="0x000B0000" />
+ <register type="NOA" address="0x00009888" value="0x0A0C0022" />
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+ <register type="NOA" address="0x00009888" value="0x1C0C8000" />
+ <register type="NOA" address="0x00009888" value="0x140C8000" />
+ <register type="NOA" address="0x00009888" value="0x160C8000" />
+ <register type="NOA" address="0x00009888" value="0x100DC017" />
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+ <register type="NOA" address="0x00009888" value="0x1A006000" />
+ <register type="NOA" address="0x00009888" value="0x1C006000" />
+ <register type="NOA" address="0x00009888" value="0x1E006000" />
+ <register type="NOA" address="0x00009888" value="0x34001B00" />
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+ <register type="NOA" address="0x00009888" value="0x57100001" />
+ <register type="NOA" address="0x00009888" value="0x47100000" />
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+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
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+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00000000" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Metric set HDCAndSF"
+ chipset="ADLP"
+ symbol_name="HDCAndSF"
+ underscore_name="hdc_and_sf"
+ mdapi_supported_apis="VK OGL OCL IO"
+ hw_config_guid="4662cab4-fb87-485a-ab08-1107fe998f13"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Rasterized Pixels"
+ symbol_name="RasterizedPixels"
+ underscore_name="rasterized_pixels"
+ description="The total number of rasterized pixels."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 21 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Hi-Depth Test Fails"
+ symbol_name="HiDepthTestFails"
+ underscore_name="hi_depth_test_fails"
+ description="The total number of pixels dropped on early hierarchical depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 22 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Hi-Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Depth Test Fails"
+ symbol_name="EarlyDepthTestFails"
+ underscore_name="early_depth_test_fails"
+ description="The total number of pixels dropped on early depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 23 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Early Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Killed in FS"
+ symbol_name="SamplesKilledInPs"
+ underscore_name="samples_killed_in_ps"
+ description="The total number of samples or pixels dropped in fragment shaders."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 24 READ 4 UMUL"
+ mdapi_group="3D Pipe/Fragment Shader"
+ mdapi_usage_flags="Tier4 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Pixels Failing Tests"
+ symbol_name="PixelsFailingPostPsTests"
+ underscore_name="pixels_failing_post_ps_tests"
+ description="The total number of pixels dropped on post-FS alpha, stencil, or depth tests."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 25 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Written"
+ symbol_name="SamplesWritten"
+ underscore_name="samples_written"
+ description="The total number of samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 26 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Blended"
+ symbol_name="SamplesBlended"
+ underscore_name="samples_blended"
+ description="The total number of blended samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 27 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels"
+ symbol_name="SamplerTexels"
+ underscore_name="sampler_texels"
+ description="The total number of texels seen on input (with 2x2 accuracy) in all sampler units."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 28 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Input"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels Misses"
+ symbol_name="SamplerTexelMisses"
+ underscore_name="sampler_texel_misses"
+ description="The total number of texels lookups (with 2x2 accuracy) that missed L1 sampler cache."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 29 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Cache"
+ mdapi_usage_flags="Tier3 Batch Frame Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Read"
+ symbol_name="SlmBytesRead"
+ underscore_name="slm_bytes_read"
+ description="The total number of GPU memory bytes read from shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 30 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Written"
+ symbol_name="SlmBytesWritten"
+ underscore_name="slm_bytes_written"
+ description="The total number of GPU memory bytes written into shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 31 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Memory Accesses"
+ symbol_name="ShaderMemoryAccesses"
+ underscore_name="shader_memory_accesses"
+ description="The total number of shader memory accesses to L3."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 32 READ"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Atomic Memory Accesses"
+ symbol_name="ShaderAtomics"
+ underscore_name="shader_atomics"
+ description="The total number of shader atomic memory accesses."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 34 READ"
+ mdapi_group="L3/Data Port/Atomics"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="L3 Shader Throughput"
+ symbol_name="L3ShaderThroughput"
+ underscore_name="l3_shader_throughput"
+ description="The total number of GPU memory bytes transferred between shaders and L3 caches w/o URB."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="$ShaderMemoryAccesses 64 UMUL"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier2 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Barrier Messages"
+ symbol_name="ShaderBarriers"
+ underscore_name="shader_barriers"
+ description="The total number of shader barrier messages."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 35 READ"
+ mdapi_group="EU Array/Barrier"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 Dualsubslice0 Non-sampler Shader Access Stalled On L3"
+ symbol_name="NonSamplerShader00AccessStalledOnL3"
+ underscore_name="non_sampler_shader00_access_stalled_on_l3"
+ description="Percentage of time when HDC has messages to L3, but it's stalled due to lack of credits (Slice0 Dualsubslice0)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 Dualsubslice1 Non-sampler Shader Access Stalled On L3"
+ symbol_name="NonSamplerShader01AccessStalledOnL3"
+ underscore_name="non_sampler_shader01_access_stalled_on_l3"
+ description="Percentage of time when HDC has messages to L3, but it's stalled due to lack of credits (Slice0 Dualsubslice1)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 Dualsubslice2 Non-sampler Shader Access Stalled On L3"
+ symbol_name="NonSamplerShader02AccessStalledOnL3"
+ underscore_name="non_sampler_shader02_access_stalled_on_l3"
+ description="Percentage of time when HDC has messages to L3, but it's stalled due to lack of credits (Slice0 Dualsubslice2)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 Dualsubslice3 Non-sampler Shader Access Stalled On L3"
+ symbol_name="NonSamplerShader03AccessStalledOnL3"
+ underscore_name="non_sampler_shader03_access_stalled_on_l3"
+ description="Percentage of time when HDC has messages to L3, but it's stalled due to lack of credits (Slice0 Dualsubslice3)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 Dualsubslice4 Non-sampler Shader Access Stalled On L3"
+ symbol_name="NonSamplerShader04AccessStalledOnL3"
+ underscore_name="non_sampler_shader04_access_stalled_on_l3"
+ description="Percentage of time when HDC has messages to L3, but it's stalled due to lack of credits (Slice0 Dualsubslice4)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 Dualsubslice5 Non-sampler Shader Access Stalled On L3"
+ symbol_name="NonSamplerShader05AccessStalledOnL3"
+ underscore_name="non_sampler_shader05_access_stalled_on_l3"
+ description="Percentage of time when HDC has messages to L3, but it's stalled due to lack of credits (Slice0 Dualsubslice5)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Polygon Data Ready"
+ symbol_name="PolyDataReady"
+ underscore_name="poly_data_ready"
+ description="The percentage of time in which geometry pipeline output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU/3D Pipe/Strip-Fans"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x14112400" />
+ <register type="NOA" address="0x00009888" value="0x14312400" />
+ <register type="NOA" address="0x00009888" value="0x14512474" />
+ <register type="NOA" address="0x00009888" value="0x14712400" />
+ <register type="NOA" address="0x00009888" value="0x14912400" />
+ <register type="NOA" address="0x00009888" value="0x14B12400" />
+ <register type="NOA" address="0x00009888" value="0x240A0019" />
+ <register type="NOA" address="0x00009888" value="0x1C07C000" />
+ <register type="NOA" address="0x00009888" value="0x24070002" />
+ <register type="NOA" address="0x00009888" value="0x10110074" />
+ <register type="NOA" address="0x00009888" value="0x08110000" />
+ <register type="NOA" address="0x00009888" value="0x10128000" />
+ <register type="NOA" address="0x00009888" value="0x1C130400" />
+ <register type="NOA" address="0x00009888" value="0x12310074" />
+ <register type="NOA" address="0x00009888" value="0x10310000" />
+ <register type="NOA" address="0x00009888" value="0x08310000" />
+ <register type="NOA" address="0x00009888" value="0x12328000" />
+ <register type="NOA" address="0x00009888" value="0x1C330800" />
+ <register type="NOA" address="0x00009888" value="0x10510000" />
+ <register type="NOA" address="0x00009888" value="0x0A510000" />
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+ <register type="NOA" address="0x00009888" value="0x1C531000" />
+ <register type="NOA" address="0x00009888" value="0x16710074" />
+ <register type="NOA" address="0x00009888" value="0x10710000" />
+ <register type="NOA" address="0x00009888" value="0x0A710000" />
+ <register type="NOA" address="0x00009888" value="0x16728000" />
+ <register type="NOA" address="0x00009888" value="0x1C732000" />
+ <register type="NOA" address="0x00009888" value="0x0E910074" />
+ <register type="NOA" address="0x00009888" value="0x10910000" />
+ <register type="NOA" address="0x00009888" value="0x06910000" />
+ <register type="NOA" address="0x00009888" value="0x0E928000" />
+ <register type="NOA" address="0x00009888" value="0x1C930200" />
+ <register type="NOA" address="0x00009888" value="0x00B10074" />
+ <register type="NOA" address="0x00009888" value="0x10B10000" />
+ <register type="NOA" address="0x00009888" value="0x00B28000" />
+ <register type="NOA" address="0x00009888" value="0x10B38000" />
+ <register type="NOA" address="0x00009888" value="0x1E0F0020" />
+ <register type="NOA" address="0x00009888" value="0x16104000" />
+ <register type="NOA" address="0x00009888" value="0x2E020001" />
+ <register type="NOA" address="0x00009888" value="0x2A030600" />
+ <register type="NOA" address="0x00009888" value="0x18002000" />
+ <register type="NOA" address="0x00009888" value="0x36003488" />
+ <register type="NOA" address="0x00009888" value="0x3800001B" />
+ <register type="NOA" address="0x00009888" value="0x00014000" />
+ <register type="NOA" address="0x00009888" value="0x1A012000" />
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+ <register type="NOA" address="0x00009888" value="0x24060080" />
+ <register type="NOA" address="0x00009888" value="0x180A00F7" />
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+ <register type="NOA" address="0x00009888" value="0x5B105000" />
+ <register type="NOA" address="0x00009888" value="0x5D100055" />
+ <register type="NOA" address="0x00009888" value="0x17144000" />
+ <register type="NOA" address="0x00009888" value="0x1D14AAA0" />
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+ <register type="NOA" address="0x00009888" value="0x13124000" />
+ <register type="NOA" address="0x00009888" value="0x15124000" />
+ <register type="NOA" address="0x00009888" value="0x17124000" />
+ <register type="NOA" address="0x00009888" value="0x19124000" />
+ <register type="NOA" address="0x00009888" value="0x47100600" />
+ <register type="NOA" address="0x00009888" value="0x4D100000" />
+ <register type="NOA" address="0x00009888" value="0x4F100806" />
+ <register type="NOA" address="0x00009888" value="0x51100408" />
+ <register type="NOA" address="0x00009888" value="0x53100310" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0xF0800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x70800000" />
+ <register type="OA" address="0x0000DC40" value="0x007F0000" />
+ <register type="OA" address="0x0000D940" value="0x00000002" />
+ <register type="OA" address="0x0000D944" value="0x0000FFFE" />
+ <register type="OA" address="0x0000DC00" value="0x00000002" />
+ <register type="OA" address="0x0000DC04" value="0x0000FFFE" />
+ <register type="OA" address="0x0000D948" value="0x00000002" />
+ <register type="OA" address="0x0000D94C" value="0x0000FFFD" />
+ <register type="OA" address="0x0000DC08" value="0x00000002" />
+ <register type="OA" address="0x0000DC0C" value="0x0000FFFD" />
+ <register type="OA" address="0x0000D950" value="0x00000002" />
+ <register type="OA" address="0x0000D954" value="0x0000FFFB" />
+ <register type="OA" address="0x0000DC10" value="0x00000002" />
+ <register type="OA" address="0x0000DC14" value="0x0000FFFB" />
+ <register type="OA" address="0x0000D958" value="0x00000002" />
+ <register type="OA" address="0x0000D95C" value="0x0000FFF7" />
+ <register type="OA" address="0x0000DC18" value="0x00000002" />
+ <register type="OA" address="0x0000DC1C" value="0x0000FFF7" />
+ <register type="OA" address="0x0000D960" value="0x00000002" />
+ <register type="OA" address="0x0000D964" value="0x0000FFEF" />
+ <register type="OA" address="0x0000DC20" value="0x00000002" />
+ <register type="OA" address="0x0000DC24" value="0x0000FFEF" />
+ <register type="OA" address="0x0000D968" value="0x00000002" />
+ <register type="OA" address="0x0000D96C" value="0x0000FFDF" />
+ <register type="OA" address="0x0000DC28" value="0x00000002" />
+ <register type="OA" address="0x0000DC2C" value="0x0000FFDF" />
+ <register type="OA" address="0x0000D970" value="0x00000002" />
+ <register type="OA" address="0x0000D974" value="0x0000FFBF" />
+ <register type="OA" address="0x0000DC30" value="0x00000002" />
+ <register type="OA" address="0x0000DC34" value="0x0000FFBF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Metric set RasterizerAndPixelBackend"
+ chipset="ADLP"
+ symbol_name="RasterizerAndPixelBackend"
+ underscore_name="rasterizer_and_pixel_backend"
+ mdapi_supported_apis="VK OGL OCL IO"
+ hw_config_guid="94719676-7538-4950-bfd4-ed0122e86183"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Rasterized Pixels"
+ symbol_name="RasterizedPixels"
+ underscore_name="rasterized_pixels"
+ description="The total number of rasterized pixels."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 21 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Hi-Depth Test Fails"
+ symbol_name="HiDepthTestFails"
+ underscore_name="hi_depth_test_fails"
+ description="The total number of pixels dropped on early hierarchical depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 22 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Hi-Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Early Depth Test Fails"
+ symbol_name="EarlyDepthTestFails"
+ underscore_name="early_depth_test_fails"
+ description="The total number of pixels dropped on early depth test."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 23 READ 4 UMUL"
+ mdapi_group="3D Pipe/Rasterizer/Early Depth Test"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Killed in FS"
+ symbol_name="SamplesKilledInPs"
+ underscore_name="samples_killed_in_ps"
+ description="The total number of samples or pixels dropped in fragment shaders."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 24 READ 4 UMUL"
+ mdapi_group="3D Pipe/Fragment Shader"
+ mdapi_usage_flags="Tier4 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Pixels Failing Tests"
+ symbol_name="PixelsFailingPostPsTests"
+ underscore_name="pixels_failing_post_ps_tests"
+ description="The total number of pixels dropped on post-FS alpha, stencil, or depth tests."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 25 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Written"
+ symbol_name="SamplesWritten"
+ underscore_name="samples_written"
+ description="The total number of samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 26 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Samples Blended"
+ symbol_name="SamplesBlended"
+ underscore_name="samples_blended"
+ description="The total number of blended samples or pixels written to all render targets."
+ data_type="uint64"
+ units="pixels"
+ semantic_type="event"
+ equation="A 27 READ 4 UMUL"
+ mdapi_group="3D Pipe/Output Merger"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels"
+ symbol_name="SamplerTexels"
+ underscore_name="sampler_texels"
+ description="The total number of texels seen on input (with 2x2 accuracy) in all sampler units."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 28 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Input"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Sampler Texels Misses"
+ symbol_name="SamplerTexelMisses"
+ underscore_name="sampler_texel_misses"
+ description="The total number of texels lookups (with 2x2 accuracy) that missed L1 sampler cache."
+ data_type="uint64"
+ units="texels"
+ semantic_type="event"
+ equation="A 29 READ 4 UMUL"
+ mdapi_group="Sampler/Sampler Cache"
+ mdapi_usage_flags="Tier3 Batch Frame Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Read"
+ symbol_name="SlmBytesRead"
+ underscore_name="slm_bytes_read"
+ description="The total number of GPU memory bytes read from shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 30 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SLM Bytes Written"
+ symbol_name="SlmBytesWritten"
+ underscore_name="slm_bytes_written"
+ description="The total number of GPU memory bytes written into shared local memory."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 128 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="A 31 READ 64 UMUL"
+ mdapi_group="L3/Data Port/SLM"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Memory Accesses"
+ symbol_name="ShaderMemoryAccesses"
+ underscore_name="shader_memory_accesses"
+ description="The total number of shader memory accesses to L3."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 32 READ"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Atomic Memory Accesses"
+ symbol_name="ShaderAtomics"
+ underscore_name="shader_atomics"
+ description="The total number of shader atomic memory accesses."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 34 READ"
+ mdapi_group="L3/Data Port/Atomics"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="L3 Shader Throughput"
+ symbol_name="L3ShaderThroughput"
+ underscore_name="l3_shader_throughput"
+ description="The total number of GPU memory bytes transferred between shaders and L3 caches w/o URB."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL $EuSubslicesTotalCount UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="$ShaderMemoryAccesses 64 UMUL"
+ mdapi_group="L3/Data Port"
+ mdapi_usage_flags="Tier2 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Shader Barrier Messages"
+ symbol_name="ShaderBarriers"
+ underscore_name="shader_barriers"
+ description="The total number of shader barrier messages."
+ data_type="uint64"
+ units="messages"
+ semantic_type="event"
+ equation="A 35 READ"
+ mdapi_group="EU Array/Barrier"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 Rasterizer Input Available"
+ symbol_name="Rasterizer0InputAvailable"
+ underscore_name="rasterizer0_input_available"
+ description="The percentage of time in which slice0 rasterizer input is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GPU/Rasterizer"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 Rasterizer Output Ready"
+ symbol_name="Rasterizer0OutputReady"
+ underscore_name="rasterizer0_output_ready"
+ description="The percentage of time in which slice0 rasterizer output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GPU/Rasterizer"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 Pipe0 Post-EarlyZ Pixel Data Ready"
+ symbol_name="PixelData00Ready"
+ underscore_name="pixel_data00_ready"
+ description="The percentage of time in which slice0 pipe0 post-EarlyZ pixel data is ready (after early Z tests have been applied)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU/Rasterizer/Early Depth Test"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 Pipe0 PS Output Available"
+ symbol_name="PSOutput00Available"
+ underscore_name="ps_output00_available"
+ description="The percentage of time in which slice0 pipe0 PS output is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU/3D Pipe"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 Pipe1 PS Output Available"
+ symbol_name="PSOutput01Available"
+ underscore_name="ps_output01_available"
+ description="The percentage of time in which slice0 pipe1 PS output is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU/3D Pipe"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 Pipe2 PS Output Available"
+ symbol_name="PSOutput02Available"
+ underscore_name="ps_output02_available"
+ description="The percentage of time in which slice0 pipe2 PS output is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU/3D Pipe"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 Pipe0 Pixel Values Ready"
+ symbol_name="PixelValues00Ready"
+ underscore_name="pixel_values00_ready"
+ description="The percentage of time in which slice0 pipe0 pixel values are ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU/3D Pipe"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 Pipe1 Pixel Values Ready"
+ symbol_name="PixelValues01Ready"
+ underscore_name="pixel_values01_ready"
+ description="The percentage of time in which slice0 pipe1 pixel values are ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU/3D Pipe"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 Pipe2 Pixel Values Ready"
+ symbol_name="PixelValues02Ready"
+ underscore_name="pixel_values02_ready"
+ description="The percentage of time in which slice0 pipe2 pixel values are ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU/3D Pipe"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="SQ00 is full"
+ symbol_name="GTRequestQueue00Full"
+ underscore_name="gt_request_queue00_full"
+ description="The percentage of time when IDI0 SQ0 is filled above a threshold (usually 48 entries)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SQ01 is full"
+ symbol_name="GTRequestQueue01Full"
+ underscore_name="gt_request_queue01_full"
+ description="The percentage of time when IDI0 SQ1 is filled above a threshold (usually 48 entries)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SQ10 is full"
+ symbol_name="GTRequestQueue10Full"
+ underscore_name="gt_request_queue10_full"
+ description="The percentage of time when IDI1 SQ0 is filled above a threshold (usually 48 entries)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="SQ11 is full"
+ symbol_name="GTRequestQueue11Full"
+ underscore_name="gt_request_queue11_full"
+ description="The percentage of time when IDI1 SQ1 is filled above a threshold (usually 48 entries)"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x1E075000" />
+ <register type="NOA" address="0x00009888" value="0x1A0700C0" />
+ <register type="NOA" address="0x00009888" value="0x1E055000" />
+ <register type="NOA" address="0x00009888" value="0x1A0500C0" />
+ <register type="NOA" address="0x00009888" value="0x1E065000" />
+ <register type="NOA" address="0x00009888" value="0x1A0600C0" />
+ <register type="NOA" address="0x00009888" value="0x2A0A7300" />
+ <register type="NOA" address="0x00009888" value="0x2C0A0000" />
+ <register type="NOA" address="0x00009888" value="0x120800A0" />
+ <register type="NOA" address="0x00009888" value="0x0A07C000" />
+ <register type="NOA" address="0x00009888" value="0x0E070027" />
+ <register type="NOA" address="0x00009888" value="0x10070000" />
+ <register type="NOA" address="0x00009888" value="0x24070000" />
+ <register type="NOA" address="0x00009888" value="0x2A032000" />
+ <register type="NOA" address="0x00009888" value="0x2C030008" />
+ <register type="NOA" address="0x00009888" value="0x18006000" />
+ <register type="NOA" address="0x00009888" value="0x360036D8" />
+ <register type="NOA" address="0x00009888" value="0x38003299" />
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+ <register type="NOA" address="0x00009888" value="0x2A010400" />
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+ <register type="NOA" address="0x00009888" value="0x00052700" />
+ <register type="NOA" address="0x00009888" value="0x10050000" />
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+ <register type="NOA" address="0x00009888" value="0x22050000" />
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+ <register type="NOA" address="0x00009888" value="0x200A0000" />
+ <register type="NOA" address="0x00009888" value="0x120A4000" />
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+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
+ <register type="NOA" address="0x00009888" value="0x08081980" />
+ <register type="NOA" address="0x00009888" value="0x0A080032" />
+ <register type="NOA" address="0x00009888" value="0x10080000" />
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+ <register type="NOA" address="0x00009888" value="0x31152800" />
+ <register type="NOA" address="0x00009888" value="0x331500A0" />
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+ <register type="NOA" address="0x00009888" value="0x5B105FA5" />
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+ <register type="NOA" address="0x00009888" value="0x03124000" />
+ <register type="NOA" address="0x00009888" value="0x05124000" />
+ <register type="NOA" address="0x00009888" value="0x07150016" />
+ <register type="NOA" address="0x00009888" value="0x09150096" />
+ <register type="NOA" address="0x00009888" value="0x01150000" />
+ <register type="NOA" address="0x00009888" value="0x03168000" />
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+ <register type="NOA" address="0x00009888" value="0x47100400" />
+ <register type="NOA" address="0x00009888" value="0x4D100010" />
+ <register type="NOA" address="0x00009888" value="0x4F100404" />
+ <register type="NOA" address="0x00009888" value="0x51100202" />
+ <register type="NOA" address="0x00009888" value="0x53100002" />
+ <register type="NOA" address="0x00009888" value="0x55100204" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x49101404" />
+ <register type="NOA" address="0x00009888" value="0x4B101010" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x30800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00030000" />
+ <register type="OA" address="0x0000D940" value="0x00000038" />
+ <register type="OA" address="0x0000D944" value="0x0000FFF8" />
+ <register type="OA" address="0x0000DC00" value="0x00000038" />
+ <register type="OA" address="0x0000DC04" value="0x0000FFF8" />
+ <register type="OA" address="0x0000D948" value="0x000000C0" />
+ <register type="OA" address="0x0000D94C" value="0x0000FFE7" />
+ <register type="OA" address="0x0000DC08" value="0x000000C0" />
+ <register type="OA" address="0x0000DC0C" value="0x0000FFE7" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Gen12LP L3_1"
+ chipset="ADLP"
+ symbol_name="L3_1"
+ underscore_name="l3_1"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="dc2ab75b-e656-44d9-bcbf-093a0259b1c8"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 L3 Bank0 Input Available"
+ symbol_name="L30Bank0InputAvailable"
+ underscore_name="l30_bank0_input_available"
+ description="The percentage of time in which slice0 L3 bank0 has input available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ C 6 READ FADD C 5 READ FADD C 4 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank1 Input Available"
+ symbol_name="L30Bank1InputAvailable"
+ underscore_name="l30_bank1_input_available"
+ description="The percentage of time in which slice0 L3 bank1 has input available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 3 READ C 2 READ FADD C 1 READ FADD C 0 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank4 Input Available"
+ symbol_name="L30Bank4InputAvailable"
+ underscore_name="l30_bank4_input_available"
+ description="The percentage of time in which slice0 L3 bank4 has input available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 3 READ B 2 READ FADD B 1 READ FADD B 0 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank5 Input Available"
+ symbol_name="L30Bank5InputAvailable"
+ underscore_name="l30_bank5_input_available"
+ description="The percentage of time in which slice0 L3 bank5 has input available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 7 READ B 6 READ FADD B 5 READ FADD B 4 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x04022000" />
+ <register type="NOA" address="0x00009888" value="0x06022800" />
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+ <register type="NOA" address="0x00009888" value="0x0600202C" />
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+ <register type="NOA" address="0x00009888" value="0x1A02002F" />
+ <register type="NOA" address="0x00009888" value="0x2E020000" />
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+ <register type="NOA" address="0x00009888" value="0x1A0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x41104000" />
+ <register type="NOA" address="0x00009888" value="0x5B105555" />
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+ <register type="NOA" address="0x00009888" value="0x49100606" />
+ <register type="NOA" address="0x00009888" value="0x4B100606" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x00800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00000000" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Gen12LP L3_2"
+ chipset="ADLP"
+ symbol_name="L3_2"
+ underscore_name="l3_2"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="55bc8001-d9a3-478a-a398-a3715a52630a"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 L3 Bank2 Input Available"
+ symbol_name="L30Bank2InputAvailable"
+ underscore_name="l30_bank2_input_available"
+ description="The percentage of time in which slice0 L3 bank2 has input available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 3 READ B 2 READ FADD B 1 READ FADD B 0 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank3 Input Available"
+ symbol_name="L30Bank3InputAvailable"
+ underscore_name="l30_bank3_input_available"
+ description="The percentage of time in which slice0 L3 bank3 has input available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 7 READ B 6 READ FADD B 5 READ FADD B 4 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank6 Input Available"
+ symbol_name="L30Bank6InputAvailable"
+ underscore_name="l30_bank6_input_available"
+ description="The percentage of time in which slice0 L3 bank6 has input available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 3 READ C 2 READ FADD C 1 READ FADD C 0 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank7 Input Available"
+ symbol_name="L30Bank7InputAvailable"
+ underscore_name="l30_bank7_input_available"
+ description="The percentage of time in which slice0 L3 bank7 has input available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ C 6 READ FADD C 5 READ FADD C 4 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x04023027" />
+ <register type="NOA" address="0x00009888" value="0x0602382C" />
+ <register type="NOA" address="0x00009888" value="0x04003000" />
+ <register type="NOA" address="0x00009888" value="0x06003800" />
+ <register type="NOA" address="0x00009888" value="0x1C020024" />
+ <register type="NOA" address="0x00009888" value="0x1E020025" />
+ <register type="NOA" address="0x00009888" value="0x02020026" />
+ <register type="NOA" address="0x00009888" value="0x0802002D" />
+ <register type="NOA" address="0x00009888" value="0x0A02002E" />
+ <register type="NOA" address="0x00009888" value="0x0C02002F" />
+ <register type="NOA" address="0x00009888" value="0x2E020000" />
+ <register type="NOA" address="0x00009888" value="0x2C030005" />
+ <register type="NOA" address="0x00009888" value="0x02034000" />
+ <register type="NOA" address="0x00009888" value="0x04034000" />
+ <register type="NOA" address="0x00009888" value="0x06034000" />
+ <register type="NOA" address="0x00009888" value="0x08034000" />
+ <register type="NOA" address="0x00009888" value="0x0A034000" />
+ <register type="NOA" address="0x00009888" value="0x18032000" />
+ <register type="NOA" address="0x00009888" value="0x00000024" />
+ <register type="NOA" address="0x00009888" value="0x0E000025" />
+ <register type="NOA" address="0x00009888" value="0x10000026" />
+ <register type="NOA" address="0x00009888" value="0x12000027" />
+ <register type="NOA" address="0x00009888" value="0x1400002C" />
+ <register type="NOA" address="0x00009888" value="0x1600002D" />
+ <register type="NOA" address="0x00009888" value="0x1800002E" />
+ <register type="NOA" address="0x00009888" value="0x1A00602F" />
+ <register type="NOA" address="0x00009888" value="0x36000003" />
+ <register type="NOA" address="0x00009888" value="0x38003600" />
+ <register type="NOA" address="0x00009888" value="0x1C006000" />
+ <register type="NOA" address="0x00009888" value="0x1E006000" />
+ <register type="NOA" address="0x00009888" value="0x34001B00" />
+ <register type="NOA" address="0x00009888" value="0x1C0A8000" />
+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
+ <register type="NOA" address="0x00009888" value="0x020A8000" />
+ <register type="NOA" address="0x00009888" value="0x040A8000" />
+ <register type="NOA" address="0x00009888" value="0x060A8000" />
+ <register type="NOA" address="0x00009888" value="0x080A8000" />
+ <register type="NOA" address="0x00009888" value="0x0A0A8000" />
+ <register type="NOA" address="0x00009888" value="0x0C0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x41104000" />
+ <register type="NOA" address="0x00009888" value="0x5B105555" />
+ <register type="NOA" address="0x00009888" value="0x5D101555" />
+ <register type="NOA" address="0x00009888" value="0x17144000" />
+ <register type="NOA" address="0x00009888" value="0x1D14AAAA" />
+ <register type="NOA" address="0x00009888" value="0x1F14002A" />
+ <register type="NOA" address="0x00009888" value="0x1B14AA00" />
+ <register type="NOA" address="0x00009888" value="0x01124000" />
+ <register type="NOA" address="0x00009888" value="0x0F124000" />
+ <register type="NOA" address="0x00009888" value="0x11124000" />
+ <register type="NOA" address="0x00009888" value="0x13124000" />
+ <register type="NOA" address="0x00009888" value="0x15124000" />
+ <register type="NOA" address="0x00009888" value="0x17124000" />
+ <register type="NOA" address="0x00009888" value="0x19124000" />
+ <register type="NOA" address="0x00009888" value="0x1B124000" />
+ <register type="NOA" address="0x00009888" value="0x1D124000" />
+ <register type="NOA" address="0x00009888" value="0x1F124000" />
+ <register type="NOA" address="0x00009888" value="0x03124000" />
+ <register type="NOA" address="0x00009888" value="0x05124000" />
+ <register type="NOA" address="0x00009888" value="0x07124000" />
+ <register type="NOA" address="0x00009888" value="0x09124000" />
+ <register type="NOA" address="0x00009888" value="0x0B124000" />
+ <register type="NOA" address="0x00009888" value="0x0D124000" />
+ <register type="NOA" address="0x00009888" value="0x47100600" />
+ <register type="NOA" address="0x00009888" value="0x4D100000" />
+ <register type="NOA" address="0x00009888" value="0x4F100606" />
+ <register type="NOA" address="0x00009888" value="0x51100606" />
+ <register type="NOA" address="0x00009888" value="0x53100606" />
+ <register type="NOA" address="0x00009888" value="0x55100006" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x49100000" />
+ <register type="NOA" address="0x00009888" value="0x4B100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x00800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00000000" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Gen12LP L3_3"
+ chipset="ADLP"
+ symbol_name="L3_3"
+ underscore_name="l3_3"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="1eba4453-dfaf-400a-bbcf-8bcb8a3e6b29"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 L3 Bank0 Output Ready"
+ symbol_name="L30Bank0OutputReady"
+ underscore_name="l30_bank0_output_ready"
+ description="The percentage of time in which slice0 L3 bank0 output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ C 6 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank4 Output Ready"
+ symbol_name="L30Bank4OutputReady"
+ underscore_name="l30_bank4_output_ready"
+ description="The percentage of time in which slice0 L3 bank4 output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ C 4 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x04020200" />
+ <register type="NOA" address="0x00009888" value="0x06020020" />
+ <register type="NOA" address="0x00009888" value="0x04000200" />
+ <register type="NOA" address="0x00009888" value="0x06000000" />
+ <register type="NOA" address="0x00009888" value="0x08020028" />
+ <register type="NOA" address="0x00009888" value="0x2E020000" />
+ <register type="NOA" address="0x00009888" value="0x06034000" />
+ <register type="NOA" address="0x00009888" value="0x08034000" />
+ <register type="NOA" address="0x00009888" value="0x0A000020" />
+ <register type="NOA" address="0x00009888" value="0x0C000028" />
+ <register type="NOA" address="0x00009888" value="0x36000000" />
+ <register type="NOA" address="0x00009888" value="0x1E006000" />
+ <register type="NOA" address="0x00009888" value="0x34000300" />
+ <register type="NOA" address="0x00009888" value="0x060A8000" />
+ <register type="NOA" address="0x00009888" value="0x080A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x5B100550" />
+ <register type="NOA" address="0x00009888" value="0x1B14A000" />
+ <register type="NOA" address="0x00009888" value="0x1D14000A" />
+ <register type="NOA" address="0x00009888" value="0x07124000" />
+ <register type="NOA" address="0x00009888" value="0x09124000" />
+ <register type="NOA" address="0x00009888" value="0x0B124000" />
+ <register type="NOA" address="0x00009888" value="0x0D124000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x49100000" />
+ <register type="NOA" address="0x00009888" value="0x4B100000" />
+ <register type="NOA" address="0x00009888" value="0x4D100606" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x00800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00000000" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Gen12LP L3_4"
+ chipset="ADLP"
+ symbol_name="L3_4"
+ underscore_name="l3_4"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="8f1bebfb-d930-4ee7-ab96-bde6b0ac1812"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 L3 Bank1 Output Ready"
+ symbol_name="L30Bank1OutputReady"
+ underscore_name="l30_bank1_output_ready"
+ description="The percentage of time in which slice0 L3 bank1 output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ C 4 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank5 Output Ready"
+ symbol_name="L30Bank5OutputReady"
+ underscore_name="l30_bank5_output_ready"
+ description="The percentage of time in which slice0 L3 bank5 output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ C 6 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x04020A00" />
+ <register type="NOA" address="0x00009888" value="0x06020800" />
+ <register type="NOA" address="0x00009888" value="0x04000A00" />
+ <register type="NOA" address="0x00009888" value="0x06000820" />
+ <register type="NOA" address="0x00009888" value="0x0A020020" />
+ <register type="NOA" address="0x00009888" value="0x0C020028" />
+ <register type="NOA" address="0x00009888" value="0x2E020000" />
+ <register type="NOA" address="0x00009888" value="0x0A034000" />
+ <register type="NOA" address="0x00009888" value="0x18032000" />
+ <register type="NOA" address="0x00009888" value="0x08000028" />
+ <register type="NOA" address="0x00009888" value="0x36000003" />
+ <register type="NOA" address="0x00009888" value="0x1E000000" />
+ <register type="NOA" address="0x00009888" value="0x34001800" />
+ <register type="NOA" address="0x00009888" value="0x0A0A8000" />
+ <register type="NOA" address="0x00009888" value="0x0C0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x5B100550" />
+ <register type="NOA" address="0x00009888" value="0x1B14A000" />
+ <register type="NOA" address="0x00009888" value="0x1D14000A" />
+ <register type="NOA" address="0x00009888" value="0x07124000" />
+ <register type="NOA" address="0x00009888" value="0x09124000" />
+ <register type="NOA" address="0x00009888" value="0x0B124000" />
+ <register type="NOA" address="0x00009888" value="0x0D124000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x49100000" />
+ <register type="NOA" address="0x00009888" value="0x4B100606" />
+ <register type="NOA" address="0x00009888" value="0x4D100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x00800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00000000" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Gen12LP L3_5"
+ chipset="ADLP"
+ symbol_name="L3_5"
+ underscore_name="l3_5"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="df96f204-e340-4514-a5c7-909f21729d83"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 L3 Bank2 Output Ready"
+ symbol_name="L30Bank2OutputReady"
+ underscore_name="l30_bank2_output_ready"
+ description="The percentage of time in which slice0 L3 bank2 output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ C 4 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank6 Output Ready"
+ symbol_name="L30Bank6OutputReady"
+ underscore_name="l30_bank6_output_ready"
+ description="The percentage of time in which slice0 L3 bank6 output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ C 6 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x04021200" />
+ <register type="NOA" address="0x00009888" value="0x06021000" />
+ <register type="NOA" address="0x00009888" value="0x04001200" />
+ <register type="NOA" address="0x00009888" value="0x06001020" />
+ <register type="NOA" address="0x00009888" value="0x0A020020" />
+ <register type="NOA" address="0x00009888" value="0x0C020028" />
+ <register type="NOA" address="0x00009888" value="0x2E020000" />
+ <register type="NOA" address="0x00009888" value="0x0A034000" />
+ <register type="NOA" address="0x00009888" value="0x18032000" />
+ <register type="NOA" address="0x00009888" value="0x08000028" />
+ <register type="NOA" address="0x00009888" value="0x36000003" />
+ <register type="NOA" address="0x00009888" value="0x1E000000" />
+ <register type="NOA" address="0x00009888" value="0x34001800" />
+ <register type="NOA" address="0x00009888" value="0x0A0A8000" />
+ <register type="NOA" address="0x00009888" value="0x0C0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x5B100550" />
+ <register type="NOA" address="0x00009888" value="0x1B14A000" />
+ <register type="NOA" address="0x00009888" value="0x1D14000A" />
+ <register type="NOA" address="0x00009888" value="0x07124000" />
+ <register type="NOA" address="0x00009888" value="0x09124000" />
+ <register type="NOA" address="0x00009888" value="0x0B124000" />
+ <register type="NOA" address="0x00009888" value="0x0D124000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x49100000" />
+ <register type="NOA" address="0x00009888" value="0x4B100606" />
+ <register type="NOA" address="0x00009888" value="0x4D100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x00800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00000000" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Gen12LP L3_6"
+ chipset="ADLP"
+ symbol_name="L3_6"
+ underscore_name="l3_6"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="6e8725a7-9d49-4b05-b2c3-341cf9565d33"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 L3 Bank3 Output Ready"
+ symbol_name="L30Bank3OutputReady"
+ underscore_name="l30_bank3_output_ready"
+ description="The percentage of time in which slice0 L3 bank3 output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ C 4 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <counter name="Slice0 L3 Bank7 Output Ready"
+ symbol_name="L30Bank7OutputReady"
+ underscore_name="l30_bank7_output_ready"
+ description="The percentage of time in which slice0 L3 bank7 output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ C 6 READ FADD 4 FDIV 100 UMUL $GpuCoreClocks FDIV"
+ availability="$SliceMask 1 AND"
+ mdapi_group="GTI/L3"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="slice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x04021A00" />
+ <register type="NOA" address="0x00009888" value="0x06021800" />
+ <register type="NOA" address="0x00009888" value="0x04001A00" />
+ <register type="NOA" address="0x00009888" value="0x06001820" />
+ <register type="NOA" address="0x00009888" value="0x0A020020" />
+ <register type="NOA" address="0x00009888" value="0x0C020028" />
+ <register type="NOA" address="0x00009888" value="0x2E020000" />
+ <register type="NOA" address="0x00009888" value="0x0A034000" />
+ <register type="NOA" address="0x00009888" value="0x18032000" />
+ <register type="NOA" address="0x00009888" value="0x08000028" />
+ <register type="NOA" address="0x00009888" value="0x36000003" />
+ <register type="NOA" address="0x00009888" value="0x1E000000" />
+ <register type="NOA" address="0x00009888" value="0x34001800" />
+ <register type="NOA" address="0x00009888" value="0x0A0A8000" />
+ <register type="NOA" address="0x00009888" value="0x0C0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x5B100550" />
+ <register type="NOA" address="0x00009888" value="0x1B14A000" />
+ <register type="NOA" address="0x00009888" value="0x1D14000A" />
+ <register type="NOA" address="0x00009888" value="0x07124000" />
+ <register type="NOA" address="0x00009888" value="0x09124000" />
+ <register type="NOA" address="0x00009888" value="0x0B124000" />
+ <register type="NOA" address="0x00009888" value="0x0D124000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x49100000" />
+ <register type="NOA" address="0x00009888" value="0x4B100606" />
+ <register type="NOA" address="0x00009888" value="0x4D100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x00800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00000000" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Sampler_1"
+ chipset="ADLP"
+ symbol_name="Sampler_1"
+ underscore_name="sampler_1"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="dfe5179f-98d6-46d9-87fd-fc970569874f"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 DualSubslice0 Input Available"
+ symbol_name="Sampler00InputAvailable"
+ underscore_name="sampler00_input_available"
+ description="The percentage of time in which slice0 dualsubslice0 sampler input is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Slice0 DualSubslice1 Input Available"
+ symbol_name="Sampler01InputAvailable"
+ underscore_name="sampler01_input_available"
+ description="The percentage of time in which slice0 dualsubslice1 sampler input is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Slice0 DualSubslice2 Input Available"
+ symbol_name="Sampler02InputAvailable"
+ underscore_name="sampler02_input_available"
+ description="The percentage of time in which slice0 dualsubslice2 sampler input is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Slice0 DualSubslice3 Input Available"
+ symbol_name="Sampler03InputAvailable"
+ underscore_name="sampler03_input_available"
+ description="The percentage of time in which slice0 dualsubslice3 sampler input is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Slice0 DualSubslice4 Input Available"
+ symbol_name="Sampler04InputAvailable"
+ underscore_name="sampler04_input_available"
+ description="The percentage of time in which slice0 dualsubslice4 sampler input is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Slice0 DualSubslice5 Input Available"
+ symbol_name="Sampler05InputAvailable"
+ underscore_name="sampler05_input_available"
+ description="The percentage of time in which slice0 dualsubslice5 sampler input is available"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x1C121600" />
+ <register type="NOA" address="0x00009888" value="0x18141600" />
+ <register type="NOA" address="0x00009888" value="0x1C325600" />
+ <register type="NOA" address="0x00009888" value="0x18341600" />
+ <register type="NOA" address="0x00009888" value="0x1C521600" />
+ <register type="NOA" address="0x00009888" value="0x185416A6" />
+ <register type="NOA" address="0x00009888" value="0x1C721600" />
+ <register type="NOA" address="0x00009888" value="0x18741600" />
+ <register type="NOA" address="0x00009888" value="0x1C921600" />
+ <register type="NOA" address="0x00009888" value="0x18941600" />
+ <register type="NOA" address="0x00009888" value="0x1CB21600" />
+ <register type="NOA" address="0x00009888" value="0x18B41600" />
+ <register type="NOA" address="0x00009888" value="0x1C07C000" />
+ <register type="NOA" address="0x00009888" value="0x2407002B" />
+ <register type="NOA" address="0x00009888" value="0x04120086" />
+ <register type="NOA" address="0x00009888" value="0x20120000" />
+ <register type="NOA" address="0x00009888" value="0x02124000" />
+ <register type="NOA" address="0x00009888" value="0x12138000" />
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+ <register type="NOA" address="0x00009888" value="0x021400A6" />
+ <register type="NOA" address="0x00009888" value="0x10140000" />
+ <register type="NOA" address="0x00009888" value="0x00140000" />
+ <register type="NOA" address="0x00009888" value="0x1A150020" />
+ <register type="NOA" address="0x00009888" value="0x1E320086" />
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+ <register type="NOA" address="0x00009888" value="0x1C3400A6" />
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+ <register type="NOA" address="0x00009888" value="0x4D100000" />
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+ <register type="NOA" address="0x00009888" value="0x5110000A" />
+ <register type="NOA" address="0x00009888" value="0x53100404" />
+ <register type="NOA" address="0x00009888" value="0x55101808" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009888" value="0x57100001" />
+ <register type="NOA" address="0x00009888" value="0x49100118" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0xF0800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x30800000" />
+ <register type="OA" address="0x0000DC40" value="0x003F0000" />
+ <register type="OA" address="0x0000D940" value="0x00000018" />
+ <register type="OA" address="0x0000D944" value="0x0000FFFC" />
+ <register type="OA" address="0x0000DC00" value="0x00000018" />
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+ <register type="OA" address="0x0000D948" value="0x00000060" />
+ <register type="OA" address="0x0000D94C" value="0x0000FFF3" />
+ <register type="OA" address="0x0000DC08" value="0x00000060" />
+ <register type="OA" address="0x0000DC0C" value="0x0000FFF3" />
+ <register type="OA" address="0x0000D950" value="0x00000180" />
+ <register type="OA" address="0x0000D954" value="0x0000FFCF" />
+ <register type="OA" address="0x0000DC10" value="0x00000180" />
+ <register type="OA" address="0x0000DC14" value="0x0000FFCF" />
+ <register type="OA" address="0x0000D958" value="0x00000600" />
+ <register type="OA" address="0x0000D95C" value="0x0000FF3F" />
+ <register type="OA" address="0x0000DC18" value="0x00000600" />
+ <register type="OA" address="0x0000DC1C" value="0x0000FF3F" />
+ <register type="OA" address="0x0000D960" value="0x00001800" />
+ <register type="OA" address="0x0000D964" value="0x0000FCFF" />
+ <register type="OA" address="0x0000DC20" value="0x00001800" />
+ <register type="OA" address="0x0000DC24" value="0x0000FCFF" />
+ <register type="OA" address="0x0000D968" value="0x00006000" />
+ <register type="OA" address="0x0000D96C" value="0x0000F3FF" />
+ <register type="OA" address="0x0000DC28" value="0x00006000" />
+ <register type="OA" address="0x0000DC2C" value="0x0000F3FF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="Sampler_2"
+ chipset="ADLP"
+ symbol_name="Sampler_2"
+ underscore_name="sampler_2"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="8f56017f-8194-4a2b-94ef-a5a02f5312fe"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Slice0 DualSubslice0 Sampler Output Ready"
+ symbol_name="Sampler00OutputReady"
+ underscore_name="sampler00_output_ready"
+ description="The percentage of time in which slice0 dualsubslice0 sampler output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 DualSubslice1 Sampler Output Ready"
+ symbol_name="Sampler01OutputReady"
+ underscore_name="sampler01_output_ready"
+ description="The percentage of time in which slice0 dualsubslice1 sampler output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 DualSubslice2 Sampler Output Ready"
+ symbol_name="Sampler02OutputReady"
+ underscore_name="sampler02_output_ready"
+ description="The percentage of time in which slice0 dualsubslice2 sampler output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 DualSubslice3 Sampler Output Ready"
+ symbol_name="Sampler03OutputReady"
+ underscore_name="sampler03_output_ready"
+ description="The percentage of time in which slice0 dualsubslice3 sampler output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 DualSubslice4 Sampler Output Ready"
+ symbol_name="Sampler04OutputReady"
+ underscore_name="sampler04_output_ready"
+ description="The percentage of time in which slice0 dualsubslice4 sampler output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <counter name="Slice0 DualSubslice5 Sampler Output Ready"
+ symbol_name="Sampler05OutputReady"
+ underscore_name="sampler05_output_ready"
+ description="The percentage of time in which slice0 dualsubslice5 sampler output is ready"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Sampler"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="subslice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x0C123E00" />
+ <register type="NOA" address="0x00009888" value="0x04143E00" />
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+ </register_config>
+ <register_config type="OA">
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+ <register type="OA" address="0x0000D900" value="0x00000000" />
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+ <register type="OA" address="0x0000D968" value="0x00006000" />
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+ <register type="OA" address="0x0000DC2C" value="0x0000F3FF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="TDL_1"
+ chipset="ADLP"
+ symbol_name="TDL_1"
+ underscore_name="tdl_1"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="62317d73-47a0-497a-984d-28d37ea3ddf0"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Non-PS Thread Ready For Dispatch on Slice0 DualSubslice0 Thread Dispatcher"
+ symbol_name="NonPSThread00ReadyForDispatch"
+ underscore_name="non_ps_thread00_ready_for_dispatch"
+ description="The percentage of time in which non-PS thread is ready for dispatch on slice0 dualsubslice0 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Non-PS Thread Ready For Dispatch on Slice0 DualSubslice1 Thread Dispatcher"
+ symbol_name="NonPSThread01ReadyForDispatch"
+ underscore_name="non_ps_thread01_ready_for_dispatch"
+ description="The percentage of time in which non-PS thread is ready for dispatch on slice0 dualsubslice1 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Non-PS Thread Ready For Dispatch on Slice0 DualSubslice2 Thread Dispatcher"
+ symbol_name="NonPSThread02ReadyForDispatch"
+ underscore_name="non_ps_thread02_ready_for_dispatch"
+ description="The percentage of time in which non-PS thread is ready for dispatch on slice0 dualsubslice2 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Non-PS Thread Ready For Dispatch on Slice0 DualSubslice3 Thread Dispatcher"
+ symbol_name="NonPSThread03ReadyForDispatch"
+ underscore_name="non_ps_thread03_ready_for_dispatch"
+ description="The percentage of time in which non-PS thread is ready for dispatch on slice0 dualsubslice3 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Non-PS Thread Ready For Dispatch on Slice0 DualSubslice4 Thread Dispatcher"
+ symbol_name="NonPSThread04ReadyForDispatch"
+ underscore_name="non_ps_thread04_ready_for_dispatch"
+ description="The percentage of time in which non-PS thread is ready for dispatch on slice0 dualsubslice4 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Non-PS Thread Ready For Dispatch on Slice0 DualSubslice5 Thread Dispatcher"
+ symbol_name="NonPSThread05ReadyForDispatch"
+ underscore_name="non_ps_thread05_ready_for_dispatch"
+ description="The percentage of time in which non-PS thread is ready for dispatch on slice0 dualsubslice5 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice0 Thread Dispatcher Port 0"
+ symbol_name="ThreadHeader00ReadyPort0"
+ underscore_name="thread_header00_ready_port0"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice0 thread dispatcher port 0"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice0 Thread Dispatcher Port 1"
+ symbol_name="ThreadHeader00ReadyPort1"
+ underscore_name="thread_header00_ready_port1"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice0 thread dispatcher port 1"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice0 Thread Dispatcher Port 2"
+ symbol_name="ThreadHeader00ReadyPort2"
+ underscore_name="thread_header00_ready_port2"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice0 thread dispatcher port 2"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice0 Thread Dispatcher Port 3"
+ symbol_name="ThreadHeader00ReadyPort3"
+ underscore_name="thread_header00_ready_port3"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice0 thread dispatcher port 3"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice1 Thread Dispatcher Port 0"
+ symbol_name="ThreadHeader01ReadyPort0"
+ underscore_name="thread_header01_ready_port0"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice1 thread dispatcher port 0"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice1 Thread Dispatcher Port 1"
+ symbol_name="ThreadHeader01ReadyPort1"
+ underscore_name="thread_header01_ready_port1"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice1 thread dispatcher port 1"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice1 Thread Dispatcher Port 2"
+ symbol_name="ThreadHeader01ReadyPort2"
+ underscore_name="thread_header01_ready_port2"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice1 thread dispatcher port 2"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice1 Thread Dispatcher Port 3"
+ symbol_name="ThreadHeader01ReadyPort3"
+ underscore_name="thread_header01_ready_port3"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice1 thread dispatcher port 3"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice0 Thread Dispatcher"
+ symbol_name="ThreadHeader00Ready"
+ underscore_name="thread_header00_ready"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice0 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice1 Thread Dispatcher"
+ symbol_name="ThreadHeader01Ready"
+ underscore_name="thread_header01_ready"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice1 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x2611001C" />
+ <register type="NOA" address="0x00009888" value="0x2631001C" />
+ <register type="NOA" address="0x00009888" value="0x2651001C" />
+ <register type="NOA" address="0x00009888" value="0x2671001C" />
+ <register type="NOA" address="0x00009888" value="0x2691001C" />
+ <register type="NOA" address="0x00009888" value="0x26B1001C" />
+ <register type="NOA" address="0x00009888" value="0x1C07C000" />
+ <register type="NOA" address="0x00009888" value="0x24070002" />
+ <register type="NOA" address="0x00009888" value="0x16110103" />
+ <register type="NOA" address="0x00009888" value="0x1C110104" />
+ <register type="NOA" address="0x00009888" value="0x1E110105" />
+ <register type="NOA" address="0x00009888" value="0x02110106" />
+ <register type="NOA" address="0x00009888" value="0x04110107" />
+ <register type="NOA" address="0x00009888" value="0x10110000" />
+ <register type="NOA" address="0x00009888" value="0x0A110000" />
+ <register type="NOA" address="0x00009888" value="0x0E110000" />
+ <register type="NOA" address="0x00009888" value="0x00110000" />
+ <register type="NOA" address="0x00009888" value="0x16128000" />
+ <register type="NOA" address="0x00009888" value="0x1C128000" />
+ <register type="NOA" address="0x00009888" value="0x1E128000" />
+ <register type="NOA" address="0x00009888" value="0x02128000" />
+ <register type="NOA" address="0x00009888" value="0x04128000" />
+ <register type="NOA" address="0x00009888" value="0x1C132000" />
+ <register type="NOA" address="0x00009888" value="0x1E130003" />
+ <register type="NOA" address="0x00009888" value="0x12138000" />
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+ <register type="NOA" address="0x00009888" value="0x14310103" />
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+ <register type="NOA" address="0x00009888" value="0x08310105" />
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+ <register type="NOA" address="0x00009888" value="0x0C310107" />
+ <register type="NOA" address="0x00009888" value="0x10310000" />
+ <register type="NOA" address="0x00009888" value="0x02310000" />
+ <register type="NOA" address="0x00009888" value="0x04310000" />
+ <register type="NOA" address="0x00009888" value="0x14328000" />
+ <register type="NOA" address="0x00009888" value="0x06328000" />
+ <register type="NOA" address="0x00009888" value="0x08328000" />
+ <register type="NOA" address="0x00009888" value="0x0A328000" />
+ <register type="NOA" address="0x00009888" value="0x0C328000" />
+ <register type="NOA" address="0x00009888" value="0x1C331100" />
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+ <register type="NOA" address="0x00009888" value="0x12510103" />
+ <register type="NOA" address="0x00009888" value="0x10510000" />
+ <register type="NOA" address="0x00009888" value="0x08510000" />
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+ <register type="NOA" address="0x00009888" value="0x1C530800" />
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+ <register type="NOA" address="0x00009888" value="0x08710000" />
+ <register type="NOA" address="0x00009888" value="0x10728000" />
+ <register type="NOA" address="0x00009888" value="0x1C730400" />
+ <register type="NOA" address="0x00009888" value="0x0E910103" />
+ <register type="NOA" address="0x00009888" value="0x10910000" />
+ <register type="NOA" address="0x00009888" value="0x06910000" />
+ <register type="NOA" address="0x00009888" value="0x0E928000" />
+ <register type="NOA" address="0x00009888" value="0x1C930200" />
+ <register type="NOA" address="0x00009888" value="0x00B10103" />
+ <register type="NOA" address="0x00009888" value="0x10B10000" />
+ <register type="NOA" address="0x00009888" value="0x00B28000" />
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+ <register type="NOA" address="0x00009888" value="0x1C0F8000" />
+ <register type="NOA" address="0x00009888" value="0x10104000" />
+ <register type="NOA" address="0x00009888" value="0x10024000" />
+ <register type="NOA" address="0x00009888" value="0x1C032000" />
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+ <register type="NOA" address="0x00009888" value="0x1A004000" />
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+ <register type="NOA" address="0x00009888" value="0x17124000" />
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+ <register type="NOA" address="0x00009888" value="0x55100800" />
+ <register type="NOA" address="0x00009888" value="0x57100008" />
+ <register type="NOA" address="0x00009888" value="0x49100808" />
+ <register type="NOA" address="0x00009888" value="0x4B100808" />
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+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0xF0800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0xF0800000" />
+ <register type="OA" address="0x0000DC40" value="0x00FF0000" />
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+ <register type="OA" address="0x0000D944" value="0x0000FFFE" />
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+ <register type="OA" address="0x0000D948" value="0x00000002" />
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+ <register type="OA" address="0x0000D950" value="0x00000002" />
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+ <register type="OA" address="0x0000DC10" value="0x00000002" />
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+ <register type="OA" address="0x0000D958" value="0x00000002" />
+ <register type="OA" address="0x0000D95C" value="0x0000FFF7" />
+ <register type="OA" address="0x0000DC18" value="0x00000002" />
+ <register type="OA" address="0x0000DC1C" value="0x0000FFF7" />
+ <register type="OA" address="0x0000D960" value="0x00000002" />
+ <register type="OA" address="0x0000D964" value="0x0000FFEF" />
+ <register type="OA" address="0x0000DC20" value="0x00000002" />
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+ <register type="OA" address="0x0000D968" value="0x00000002" />
+ <register type="OA" address="0x0000D96C" value="0x0000FFDF" />
+ <register type="OA" address="0x0000DC28" value="0x00000002" />
+ <register type="OA" address="0x0000DC2C" value="0x0000FFDF" />
+ <register type="OA" address="0x0000D970" value="0x00007800" />
+ <register type="OA" address="0x0000D974" value="0x0000F0FF" />
+ <register type="OA" address="0x0000DC30" value="0x00007800" />
+ <register type="OA" address="0x0000DC34" value="0x0000F0FF" />
+ <register type="OA" address="0x0000D978" value="0x00078000" />
+ <register type="OA" address="0x0000D97C" value="0x00000FFF" />
+ <register type="OA" address="0x0000DC38" value="0x00078000" />
+ <register type="OA" address="0x0000DC3C" value="0x00000FFF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="TDL_2"
+ chipset="ADLP"
+ symbol_name="TDL_2"
+ underscore_name="tdl_2"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="7f826267-d18c-47bd-ad8b-11e175c32c67"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="PS Thread Ready For Dispatch on Slice0 Dualsubslice0 Thread Dispatcher"
+ symbol_name="PSThread00ReadyForDispatch"
+ underscore_name="ps_thread00_ready_for_dispatch"
+ description="The percentage of time in which PS thread is ready for dispatch on slice0 dualsubslice0 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 1 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="PS Thread Ready For Dispatch on Slice0 Dualsubslice1 Thread Dispatcher"
+ symbol_name="PSThread01ReadyForDispatch"
+ underscore_name="ps_thread01_ready_for_dispatch"
+ description="The percentage of time in which PS thread is ready for dispatch on slice0 dualsubslice1 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 2 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="PS Thread Ready For Dispatch on Slice0 Dualsubslice2 Thread Dispatcher"
+ symbol_name="PSThread02ReadyForDispatch"
+ underscore_name="ps_thread02_ready_for_dispatch"
+ description="The percentage of time in which PS thread is ready for dispatch on slice0 dualsubslice2 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="PS Thread Ready For Dispatch on Slice0 Dualsubslice3 Thread Dispatcher"
+ symbol_name="PSThread03ReadyForDispatch"
+ underscore_name="ps_thread03_ready_for_dispatch"
+ description="The percentage of time in which PS thread is ready for dispatch on slice0 dualsubslice3 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="PS Thread Ready For Dispatch on Slice0 Dualsubslice4 Thread Dispatcher"
+ symbol_name="PSThread04ReadyForDispatch"
+ underscore_name="ps_thread04_ready_for_dispatch"
+ description="The percentage of time in which PS thread is ready for dispatch on slice0 dualsubslice4 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="PS Thread Ready For Dispatch on Slice0 Dualsubslice5 Thread Dispatcher"
+ symbol_name="PSThread05ReadyForDispatch"
+ underscore_name="ps_thread05_ready_for_dispatch"
+ description="The percentage of time in which PS thread is ready for dispatch on slice0 dualsubslice5 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice5 Thread Dispatcher"
+ symbol_name="ThreadHeader05Ready"
+ underscore_name="thread_header05_ready"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice5 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice5 Thread Dispatcher Port 0"
+ symbol_name="ThreadHeader05ReadyPort0"
+ underscore_name="thread_header05_ready_port0"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice5 thread dispatcher port 0"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice5 Thread Dispatcher Port 1"
+ symbol_name="ThreadHeader05ReadyPort1"
+ underscore_name="thread_header05_ready_port1"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice5 thread dispatcher port 1"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice5 Thread Dispatcher Port 2"
+ symbol_name="ThreadHeader05ReadyPort2"
+ underscore_name="thread_header05_ready_port2"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice5 thread dispatcher port 2"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice5 Thread Dispatcher Port 3"
+ symbol_name="ThreadHeader05ReadyPort3"
+ underscore_name="thread_header05_ready_port3"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice5 thread dispatcher port 3"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 32 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <register_config type="NOA">
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+ <register type="OA" address="0x0000D970" value="0x00078000" />
+ <register type="OA" address="0x0000D974" value="0x00000FFF" />
+ <register type="OA" address="0x0000DC30" value="0x00078000" />
+ <register type="OA" address="0x0000DC34" value="0x00000FFF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="TDL_3"
+ chipset="ADLP"
+ symbol_name="TDL_3"
+ underscore_name="tdl_3"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="ddfd2ac0-7b57-48af-82b0-3cf3d811845b"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice2 Thread Dispatcher"
+ symbol_name="ThreadHeader02Ready"
+ underscore_name="thread_header02_ready"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice2 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice3 Thread Dispatcher"
+ symbol_name="ThreadHeader03Ready"
+ underscore_name="thread_header03_ready"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice3 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice4 Thread Dispatcher"
+ symbol_name="ThreadHeader04Ready"
+ underscore_name="thread_header04_ready"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice4 thread dispatcher"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice2 Thread Dispatcher Port 0"
+ symbol_name="ThreadHeader02ReadyPort0"
+ underscore_name="thread_header02_ready_port0"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice2 thread dispatcher port 0"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice2 Thread Dispatcher Port 1"
+ symbol_name="ThreadHeader02ReadyPort1"
+ underscore_name="thread_header02_ready_port1"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice2 thread dispatcher port 1"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice2 Thread Dispatcher Port 2"
+ symbol_name="ThreadHeader02ReadyPort2"
+ underscore_name="thread_header02_ready_port2"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice2 thread dispatcher port 2"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice2 Thread Dispatcher Port 3"
+ symbol_name="ThreadHeader02ReadyPort3"
+ underscore_name="thread_header02_ready_port3"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice2 thread dispatcher port 3"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 4 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice3 Thread Dispatcher Port 0"
+ symbol_name="ThreadHeader03ReadyPort0"
+ underscore_name="thread_header03_ready_port0"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice3 thread dispatcher port 0"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice3 Thread Dispatcher Port 1"
+ symbol_name="ThreadHeader03ReadyPort1"
+ underscore_name="thread_header03_ready_port1"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice3 thread dispatcher port 1"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice3 Thread Dispatcher Port 2"
+ symbol_name="ThreadHeader03ReadyPort2"
+ underscore_name="thread_header03_ready_port2"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice3 thread dispatcher port 2"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice3 Thread Dispatcher Port 3"
+ symbol_name="ThreadHeader03ReadyPort3"
+ underscore_name="thread_header03_ready_port3"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice3 thread dispatcher port 3"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 8 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice4 Thread Dispatcher Port 0"
+ symbol_name="ThreadHeader04ReadyPort0"
+ underscore_name="thread_header04_ready_port0"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice4 thread dispatcher port 0"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice4 Thread Dispatcher Port 1"
+ symbol_name="ThreadHeader04ReadyPort1"
+ underscore_name="thread_header04_ready_port1"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice4 thread dispatcher port 1"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice4 Thread Dispatcher Port 2"
+ symbol_name="ThreadHeader04ReadyPort2"
+ underscore_name="thread_header04_ready_port2"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice4 thread dispatcher port 2"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <counter name="Thread Header Ready on Slice0 DualSubslice4 Thread Dispatcher Port 3"
+ symbol_name="ThreadHeader04ReadyPort3"
+ underscore_name="thread_header04_ready_port3"
+ description="The percentage of time in which thread header is ready on slice0 dualsubslice4 thread dispatcher port 3"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ availability="$DualSubsliceMask 16 AND"
+ mdapi_group="GPU/Thread Dispatcher"
+ mdapi_usage_flags="Tier3 Overview Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="dualsubslice"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x2651001C" />
+ <register type="NOA" address="0x00009888" value="0x2671001C" />
+ <register type="NOA" address="0x00009888" value="0x2691001C" />
+ <register type="NOA" address="0x00009888" value="0x24072A80" />
+ <register type="NOA" address="0x00009888" value="0x06510107" />
+ <register type="NOA" address="0x00009888" value="0x08510106" />
+ <register type="NOA" address="0x00009888" value="0x0A510105" />
+ <register type="NOA" address="0x00009888" value="0x0C510104" />
+ <register type="NOA" address="0x00009888" value="0x10510000" />
+ <register type="NOA" address="0x00009888" value="0x02510000" />
+ <register type="NOA" address="0x00009888" value="0x04510000" />
+ <register type="NOA" address="0x00009888" value="0x06528000" />
+ <register type="NOA" address="0x00009888" value="0x08528000" />
+ <register type="NOA" address="0x00009888" value="0x0A528000" />
+ <register type="NOA" address="0x00009888" value="0x0C528000" />
+ <register type="NOA" address="0x00009888" value="0x16538000" />
+ <register type="NOA" address="0x00009888" value="0x18538000" />
+ <register type="NOA" address="0x00009888" value="0x1A538000" />
+ <register type="NOA" address="0x00009888" value="0x1C530100" />
+ <register type="NOA" address="0x00009888" value="0x1C710107" />
+ <register type="NOA" address="0x00009888" value="0x1E710106" />
+ <register type="NOA" address="0x00009888" value="0x02710105" />
+ <register type="NOA" address="0x00009888" value="0x04710104" />
+ <register type="NOA" address="0x00009888" value="0x10710000" />
+ <register type="NOA" address="0x00009888" value="0x0E710000" />
+ <register type="NOA" address="0x00009888" value="0x00710000" />
+ <register type="NOA" address="0x00009888" value="0x1C728000" />
+ <register type="NOA" address="0x00009888" value="0x1E728000" />
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+ <register type="NOA" address="0x00009888" value="0x1E730003" />
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+ <register type="NOA" address="0x00009888" value="0x14910107" />
+ <register type="NOA" address="0x00009888" value="0x16910106" />
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+ <register type="NOA" address="0x00009888" value="0x1A910104" />
+ <register type="NOA" address="0x00009888" value="0x10910000" />
+ <register type="NOA" address="0x00009888" value="0x0A910000" />
+ <register type="NOA" address="0x00009888" value="0x0C910000" />
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+ <register type="NOA" address="0x00009888" value="0x1A928000" />
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+ <register type="NOA" address="0x00009888" value="0x1D14A80A" />
+ <register type="NOA" address="0x00009888" value="0x1F14002A" />
+ <register type="NOA" address="0x00009888" value="0x1B14AA00" />
+ <register type="NOA" address="0x00009888" value="0x15124000" />
+ <register type="NOA" address="0x00009888" value="0x17124000" />
+ <register type="NOA" address="0x00009888" value="0x19124000" />
+ <register type="NOA" address="0x00009888" value="0x1B124000" />
+ <register type="NOA" address="0x00009888" value="0x1D124000" />
+ <register type="NOA" address="0x00009888" value="0x1F124000" />
+ <register type="NOA" address="0x00009888" value="0x03124000" />
+ <register type="NOA" address="0x00009888" value="0x05124000" />
+ <register type="NOA" address="0x00009888" value="0x07124000" />
+ <register type="NOA" address="0x00009888" value="0x09124000" />
+ <register type="NOA" address="0x00009888" value="0x0B124000" />
+ <register type="NOA" address="0x00009888" value="0x0D124000" />
+ <register type="NOA" address="0x00009888" value="0x51100600" />
+ <register type="NOA" address="0x00009888" value="0x53100606" />
+ <register type="NOA" address="0x00009888" value="0x55100006" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x47100000" />
+ <register type="NOA" address="0x00009888" value="0x49100000" />
+ <register type="NOA" address="0x00009888" value="0x4B100404" />
+ <register type="NOA" address="0x00009888" value="0x4D100404" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x70800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00070000" />
+ <register type="OA" address="0x0000D940" value="0x00078000" />
+ <register type="OA" address="0x0000D944" value="0x00000FFF" />
+ <register type="OA" address="0x0000DC00" value="0x00078000" />
+ <register type="OA" address="0x0000DC04" value="0x00000FFF" />
+ <register type="OA" address="0x0000D948" value="0x00007800" />
+ <register type="OA" address="0x0000D94C" value="0x0000F0FF" />
+ <register type="OA" address="0x0000DC08" value="0x00007800" />
+ <register type="OA" address="0x0000DC0C" value="0x0000F0FF" />
+ <register type="OA" address="0x0000D950" value="0x00000780" />
+ <register type="OA" address="0x0000D954" value="0x0000FF0F" />
+ <register type="OA" address="0x0000DC10" value="0x00000780" />
+ <register type="OA" address="0x0000DC14" value="0x0000FF0F" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="GpuBusyness"
+ chipset="ADLP"
+ symbol_name="GpuBusyness"
+ underscore_name="gpu_busyness"
+ mdapi_supported_apis="VK OGL OCL MEDIA IO"
+ hw_config_guid="b3af5334-ed28-4e24-b6de-6f621e150eb5"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Active"
+ symbol_name="EuActive"
+ underscore_name="eu_active"
+ description="The percentage of time in which the Execution Units were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Stall"
+ symbol_name="EuStall"
+ underscore_name="eu_stall"
+ description="The percentage of time in which the Execution Units were stalled."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Thread Occupancy"
+ symbol_name="EuThreadOccupancy"
+ underscore_name="eu_thread_occupancy"
+ description="The percentage of time in which hardware threads occupied EUs."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="8 A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FMUL $EuThreadsCount FDIV $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier2 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis="VK OGL OCL IO MEDIA"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render Ring Busy"
+ symbol_name="RenderBusy"
+ underscore_name="render_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 6 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Compute Ring Busy"
+ symbol_name="ComputeBusy"
+ underscore_name="compute_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 3 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Posh Ring Busy"
+ symbol_name="PoshEngineBusy"
+ underscore_name="posh_engine_busy"
+ description="The percentage of time when posh command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 5 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Blitter Ring Busy"
+ symbol_name="BlitterBusy"
+ underscore_name="blitter_busy"
+ description="The percentage of time when blitter command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 4 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis="IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Vebox Ring Busy"
+ symbol_name="VeboxBusy"
+ underscore_name="vebox_busy"
+ description="The percentage of time when vebox command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 7 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis="IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Vdbox0 Ring Busy"
+ symbol_name="Vdbox0Busy"
+ underscore_name="vdbox0_busy"
+ description="The percentage of time when Vdbox0 command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 2 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis="IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Vdbox1 Ring Busy"
+ symbol_name="Vdbox1Busy"
+ underscore_name="vdbox1_busy"
+ description="The percentage of time when Vdbox1 command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis="IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render and compute engines are simultaneously busy"
+ symbol_name="RenderAndComputeBusy"
+ underscore_name="render_and_compute_busy"
+ description="The percentage of time when render and compute engines are simultaneously busy"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Any Engine Busy"
+ symbol_name="AnyEngineBusy"
+ underscore_name="any_engine_busy"
+ description="The percentage of time when any command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis="IO"
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x0E0E1200" />
+ <register type="NOA" address="0x00009888" value="0x220E0009" />
+ <register type="NOA" address="0x00009888" value="0x0E101200" />
+ <register type="NOA" address="0x00009888" value="0x040E0043" />
+ <register type="NOA" address="0x00009888" value="0x0A0E00B3" />
+ <register type="NOA" address="0x00009888" value="0x180E0000" />
+ <register type="NOA" address="0x00009888" value="0x0C0E0000" />
+ <register type="NOA" address="0x00009888" value="0x1C0F0104" />
+ <register type="NOA" address="0x00009888" value="0x08100053" />
+ <register type="NOA" address="0x00009888" value="0x20100000" />
+ <register type="NOA" address="0x00009888" value="0x04104000" />
+ <register type="NOA" address="0x00009888" value="0x0A104000" />
+ <register type="NOA" address="0x00009888" value="0x04024000" />
+ <register type="NOA" address="0x00009888" value="0x08024000" />
+ <register type="NOA" address="0x00009888" value="0x0A024000" />
+ <register type="NOA" address="0x00009888" value="0x04034000" />
+ <register type="NOA" address="0x00009888" value="0x08034000" />
+ <register type="NOA" address="0x00009888" value="0x0A034000" />
+ <register type="NOA" address="0x00009888" value="0x1C006000" />
+ <register type="NOA" address="0x00009888" value="0x34001B00" />
+ <register type="NOA" address="0x00009888" value="0x040A8000" />
+ <register type="NOA" address="0x00009888" value="0x080A8000" />
+ <register type="NOA" address="0x00009888" value="0x0A0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x15102400" />
+ <register type="NOA" address="0x00009888" value="0x23010120" />
+ <register type="NOA" address="0x00009888" value="0x15182400" />
+ <register type="NOA" address="0x00009888" value="0x23210120" />
+ <register type="NOA" address="0x00009888" value="0x17100023" />
+ <register type="NOA" address="0x00009888" value="0x11100000" />
+ <register type="NOA" address="0x00009888" value="0x5D101000" />
+ <register type="NOA" address="0x00009888" value="0x5B100545" />
+ <register type="NOA" address="0x00009888" value="0x1B148800" />
+ <register type="NOA" address="0x00009888" value="0x1D140002" />
+ <register type="NOA" address="0x00009888" value="0x61112000" />
+ <register type="NOA" address="0x00009888" value="0x5F110401" />
+ <register type="NOA" address="0x00009888" value="0x1F128000" />
+ <register type="NOA" address="0x00009888" value="0x03128000" />
+ <register type="NOA" address="0x00009888" value="0x05124000" />
+ <register type="NOA" address="0x00009888" value="0x09124000" />
+ <register type="NOA" address="0x00009888" value="0x0B124000" />
+ <register type="NOA" address="0x00009888" value="0x0D128000" />
+ <register type="NOA" address="0x00009888" value="0x01008000" />
+ <register type="NOA" address="0x00009888" value="0x13028000" />
+ <register type="NOA" address="0x00009888" value="0x030100D3" />
+ <register type="NOA" address="0x00009888" value="0x21010000" />
+ <register type="NOA" address="0x00009888" value="0x071800A3" />
+ <register type="NOA" address="0x00009888" value="0x11180000" />
+ <register type="NOA" address="0x00009888" value="0x21180400" />
+ <register type="NOA" address="0x00009888" value="0x23180000" />
+ <register type="NOA" address="0x00009888" value="0x0F208000" />
+ <register type="NOA" address="0x00009888" value="0x21222000" />
+ <register type="NOA" address="0x00009888" value="0x1F2100D3" />
+ <register type="NOA" address="0x00009888" value="0x21210000" />
+ <register type="NOA" address="0x00009888" value="0x55100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x47100000" />
+ <register type="NOA" address="0x00009888" value="0x49101007" />
+ <register type="NOA" address="0x00009888" value="0x4B10040A" />
+ <register type="NOA" address="0x00009888" value="0x4D100210" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x30800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00030000" />
+ <register type="OA" address="0x0000D940" value="0x00024002" />
+ <register type="OA" address="0x0000D944" value="0x0000B7FF" />
+ <register type="OA" address="0x0000DC00" value="0x00024002" />
+ <register type="OA" address="0x0000DC04" value="0x0000B7FF" />
+ <register type="OA" address="0x0000D948" value="0x0007F000" />
+ <register type="OA" address="0x0000D94C" value="0x000001FF" />
+ <register type="OA" address="0x0000DC08" value="0x0007F000" />
+ <register type="OA" address="0x0000DC0C" value="0x000001FF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00804704" />
+ <register type="FLEX" address="0x0000E558" value="0x00A04904" />
+ <register type="FLEX" address="0x0000E658" value="0x00805705" />
+ <register type="FLEX" address="0x0000E758" value="0x00A05905" />
+ <register type="FLEX" address="0x0000E45C" value="0x00808708" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A08908" />
+ </register_config>
+ </set>
+
+ <set name="EuActivity1"
+ chipset="ADLP"
+ symbol_name="EuActivity1"
+ underscore_name="eu_activity1"
+ mdapi_supported_apis="OGL OGL4 OCL MEDIA IO"
+ hw_config_guid="b65afe50-4e37-42f5-af5c-2d45c5d82c59"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render Ring Busy"
+ symbol_name="RenderBusy"
+ underscore_name="render_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Compute Ring Busy"
+ symbol_name="ComputeBusy"
+ underscore_name="compute_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render and compute engines are simultaneously busy"
+ symbol_name="RenderAndComputeBusy"
+ underscore_name="render_and_compute_busy"
+ description="The percentage of time when render and compute engines are simultaneously busy"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 7 READ C 6 READ UADD C 5 READ UADD C 4 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 3 READ C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS FPU Pipe Active"
+ symbol_name="VsFpuActive"
+ underscore_name="vs_fpu_active"
+ description="The percentage of time in which EU FPU pipeline was actively processing a vertex shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="PS FPU Pipe Active"
+ symbol_name="PsFpuActive"
+ underscore_name="ps_fpu_active"
+ description="The percentage of time in which EU FPU pipeline was actively processing a pixel shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Pixel Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU Send Pipe Active"
+ symbol_name="EuSendActive"
+ underscore_name="eu_send_active"
+ description="The percentage of time in which EU send pipeline was actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Pipes"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x0E0E1200" />
+ <register type="NOA" address="0x00009888" value="0x220E0009" />
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+ <register type="NOA" address="0x00009888" value="0x2C030005" />
+ <register type="NOA" address="0x00009888" value="0x38003600" />
+ <register type="NOA" address="0x00009888" value="0x1C0A8000" />
+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x05151D37" />
+ <register type="NOA" address="0x00009888" value="0x09151547" />
+ <register type="NOA" address="0x00009888" value="0x05351C00" />
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+ <register type="NOA" address="0x00009888" value="0x5B100BBB" />
+ <register type="NOA" address="0x00009888" value="0x1F140028" />
+ <register type="NOA" address="0x00009888" value="0x1D124000" />
+ <register type="NOA" address="0x00009888" value="0x1F124000" />
+ <register type="NOA" address="0x00009888" value="0x0D150136" />
+ <register type="NOA" address="0x00009888" value="0x01150000" />
+ <register type="NOA" address="0x00009888" value="0x03164000" />
+ <register type="NOA" address="0x00009888" value="0x05164000" />
+ <register type="NOA" address="0x00009888" value="0x07164000" />
+ <register type="NOA" address="0x00009888" value="0x03350137" />
+ <register type="NOA" address="0x00009888" value="0x07350147" />
+ <register type="NOA" address="0x00009888" value="0x0B350136" />
+ <register type="NOA" address="0x00009888" value="0x01350000" />
+ <register type="NOA" address="0x00009888" value="0x01368000" />
+ <register type="NOA" address="0x00009888" value="0x03368000" />
+ <register type="NOA" address="0x00009888" value="0x05368000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x55100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x47101000" />
+ <register type="NOA" address="0x00009888" value="0x49101616" />
+ <register type="NOA" address="0x00009888" value="0x4B101616" />
+ <register type="NOA" address="0x00009888" value="0x4D100616" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x10800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00010000" />
+ <register type="OA" address="0x0000D940" value="0x00001802" />
+ <register type="OA" address="0x0000D944" value="0x0000FCFF" />
+ <register type="OA" address="0x0000DC00" value="0x00001802" />
+ <register type="OA" address="0x0000DC04" value="0x0000FCFF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00810710" />
+ <register type="FLEX" address="0x0000E558" value="0x00A10910" />
+ <register type="FLEX" address="0x0000E658" value="0x00850750" />
+ <register type="FLEX" address="0x0000E758" value="0x00A50950" />
+ <register type="FLEX" address="0x0000E45C" value="0x00802702" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A02902" />
+ </register_config>
+ </set>
+
+ <set name="EuActivity2"
+ chipset="ADLP"
+ symbol_name="EuActivity2"
+ underscore_name="eu_activity2"
+ mdapi_supported_apis="OGL OGL4 OCL MEDIA IO"
+ hw_config_guid="91fadda5-5d16-4f31-a132-9c7c70afa3c4"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render Ring Busy"
+ symbol_name="RenderBusy"
+ underscore_name="render_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Compute Ring Busy"
+ symbol_name="ComputeBusy"
+ underscore_name="compute_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render and compute engines are simultaneously busy"
+ symbol_name="RenderAndComputeBusy"
+ underscore_name="render_and_compute_busy"
+ description="The percentage of time when render and compute engines are simultaneously busy"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 7 READ C 6 READ UADD C 5 READ UADD C 4 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 3 READ C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS EM Pipe Active"
+ symbol_name="CsEmActive"
+ underscore_name="cs_em_active"
+ description="The percentage of time in which EU FPU1 pipeline was actively processing a compute shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS FPU Pipe Active"
+ symbol_name="CsFpuActive"
+ underscore_name="cs_fpu_active"
+ description="The percentage of time in which EU FPU pipeline was actively processing a compute shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Send Pipeline Active"
+ symbol_name="CsSendActive"
+ underscore_name="cs_send_active"
+ description="The percentage of time in which EU send pipeline was actively processing a compute shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x0E0E1200" />
+ <register type="NOA" address="0x00009888" value="0x220E0009" />
+ <register type="NOA" address="0x00009888" value="0x1C0E0043" />
+ <register type="NOA" address="0x00009888" value="0x1E0E00B3" />
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+ <register type="NOA" address="0x00009888" value="0x160E0000" />
+ <register type="NOA" address="0x00009888" value="0x1E0F1400" />
+ <register type="NOA" address="0x00009888" value="0x1C104000" />
+ <register type="NOA" address="0x00009888" value="0x1E104000" />
+ <register type="NOA" address="0x00009888" value="0x2E020140" />
+ <register type="NOA" address="0x00009888" value="0x2C030005" />
+ <register type="NOA" address="0x00009888" value="0x38003600" />
+ <register type="NOA" address="0x00009888" value="0x1C0A8000" />
+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
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+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
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+ <register type="OA" address="0x0000D900" value="0x00000000" />
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+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00862762" />
+ <register type="FLEX" address="0x0000E558" value="0x00A62962" />
+ <register type="FLEX" address="0x0000E658" value="0x00860760" />
+ <register type="FLEX" address="0x0000E758" value="0x00A60960" />
+ <register type="FLEX" address="0x0000E45C" value="0x00861761" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A61961" />
+ </register_config>
+ </set>
+
+ <set name="EuActivity3"
+ chipset="ADLP"
+ symbol_name="EuActivity3"
+ underscore_name="eu_activity3"
+ mdapi_supported_apis="OGL OGL4 OCL MEDIA IO"
+ hw_config_guid="86775c09-faa5-4c25-83a0-31d085cc4959"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render Ring Busy"
+ symbol_name="RenderBusy"
+ underscore_name="render_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Compute Ring Busy"
+ symbol_name="ComputeBusy"
+ underscore_name="compute_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render and compute engines are simultaneously busy"
+ symbol_name="RenderAndComputeBusy"
+ underscore_name="render_and_compute_busy"
+ description="The percentage of time when render and compute engines are simultaneously busy"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 7 READ C 6 READ UADD C 5 READ UADD C 4 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 3 READ C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS EM Pipe Active"
+ symbol_name="VsEmActive"
+ underscore_name="vs_em_active"
+ description="The percentage of time in which EU EM pipeline was actively processing a vertex shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="PS EM Pipe Active"
+ symbol_name="PsEmActive"
+ underscore_name="ps_em_active"
+ description="The percentage of time in which EU EM pipeline was actively processing a pixel shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Pixel Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="PS Send Pipeline Active"
+ symbol_name="PsSendActive"
+ underscore_name="ps_send_active"
+ description="The percentage of time in which EU send pipeline was actively processing a pixel shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Pixel Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x0E0E1200" />
+ <register type="NOA" address="0x00009888" value="0x220E0009" />
+ <register type="NOA" address="0x00009888" value="0x1C0E0043" />
+ <register type="NOA" address="0x00009888" value="0x1E0E00B3" />
+ <register type="NOA" address="0x00009888" value="0x180E0000" />
+ <register type="NOA" address="0x00009888" value="0x160E0000" />
+ <register type="NOA" address="0x00009888" value="0x1E0F1400" />
+ <register type="NOA" address="0x00009888" value="0x1C104000" />
+ <register type="NOA" address="0x00009888" value="0x1E104000" />
+ <register type="NOA" address="0x00009888" value="0x2E020140" />
+ <register type="NOA" address="0x00009888" value="0x2C030005" />
+ <register type="NOA" address="0x00009888" value="0x38003600" />
+ <register type="NOA" address="0x00009888" value="0x1C0A8000" />
+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x05151D37" />
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+ <register type="NOA" address="0x00009888" value="0x05351C00" />
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+ <register type="NOA" address="0x00009888" value="0x5D101400" />
+ <register type="NOA" address="0x00009888" value="0x5B100BBB" />
+ <register type="NOA" address="0x00009888" value="0x1F140028" />
+ <register type="NOA" address="0x00009888" value="0x1D124000" />
+ <register type="NOA" address="0x00009888" value="0x1F124000" />
+ <register type="NOA" address="0x00009888" value="0x0D150136" />
+ <register type="NOA" address="0x00009888" value="0x01150000" />
+ <register type="NOA" address="0x00009888" value="0x03164000" />
+ <register type="NOA" address="0x00009888" value="0x05164000" />
+ <register type="NOA" address="0x00009888" value="0x07164000" />
+ <register type="NOA" address="0x00009888" value="0x03350137" />
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+ <register type="NOA" address="0x00009888" value="0x0B350136" />
+ <register type="NOA" address="0x00009888" value="0x01350000" />
+ <register type="NOA" address="0x00009888" value="0x01368000" />
+ <register type="NOA" address="0x00009888" value="0x03368000" />
+ <register type="NOA" address="0x00009888" value="0x05368000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x55100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x47101000" />
+ <register type="NOA" address="0x00009888" value="0x49101616" />
+ <register type="NOA" address="0x00009888" value="0x4B101616" />
+ <register type="NOA" address="0x00009888" value="0x4D100616" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x10800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00010000" />
+ <register type="OA" address="0x0000D940" value="0x00001802" />
+ <register type="OA" address="0x0000D944" value="0x0000FCFF" />
+ <register type="OA" address="0x0000DC00" value="0x00001802" />
+ <register type="OA" address="0x0000DC04" value="0x0000FCFF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00811711" />
+ <register type="FLEX" address="0x0000E558" value="0x00A11911" />
+ <register type="FLEX" address="0x0000E658" value="0x00851751" />
+ <register type="FLEX" address="0x0000E758" value="0x00A51951" />
+ <register type="FLEX" address="0x0000E45C" value="0x00852752" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A52952" />
+ </register_config>
+ </set>
+
+ <set name="EuActivity4"
+ chipset="ADLP"
+ symbol_name="EuActivity4"
+ underscore_name="eu_activity4"
+ mdapi_supported_apis="OGL OGL4 OCL MEDIA IO"
+ hw_config_guid="73bfba4e-13ce-4c8a-8bec-9b807dd63a97"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render Ring Busy"
+ symbol_name="RenderBusy"
+ underscore_name="render_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Compute Ring Busy"
+ symbol_name="ComputeBusy"
+ underscore_name="compute_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render and compute engines are simultaneously busy"
+ symbol_name="RenderAndComputeBusy"
+ underscore_name="render_and_compute_busy"
+ description="The percentage of time when render and compute engines are simultaneously busy"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 7 READ C 6 READ UADD C 5 READ UADD C 4 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 3 READ C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS FPU Pipe Active"
+ symbol_name="HsFpuActive"
+ underscore_name="hs_fpu_active"
+ description="The percentage of time in which EU FPU pipeline was actively processing a hull shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS FPU Pipe Active"
+ symbol_name="DsFpuActive"
+ underscore_name="ds_fpu_active"
+ description="The percentage of time in which EU FPU pipeline was actively processing a domain shader instructions."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Send Pipe Active"
+ symbol_name="VsSendActive"
+ underscore_name="vs_send_active"
+ description="The percentage of time in which EU send pipeline was actively processing a vertex shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x0E0E1200" />
+ <register type="NOA" address="0x00009888" value="0x220E0009" />
+ <register type="NOA" address="0x00009888" value="0x1C0E0043" />
+ <register type="NOA" address="0x00009888" value="0x1E0E00B3" />
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+ <register type="NOA" address="0x00009888" value="0x160E0000" />
+ <register type="NOA" address="0x00009888" value="0x1E0F1400" />
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+ <register type="NOA" address="0x00009888" value="0x38003600" />
+ <register type="NOA" address="0x00009888" value="0x1C0A8000" />
+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
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+ <register type="NOA" address="0x00009888" value="0x09151547" />
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+ <register type="NOA" address="0x00009888" value="0x5D101400" />
+ <register type="NOA" address="0x00009888" value="0x5B100BBB" />
+ <register type="NOA" address="0x00009888" value="0x1F140028" />
+ <register type="NOA" address="0x00009888" value="0x1D124000" />
+ <register type="NOA" address="0x00009888" value="0x1F124000" />
+ <register type="NOA" address="0x00009888" value="0x0D150136" />
+ <register type="NOA" address="0x00009888" value="0x01150000" />
+ <register type="NOA" address="0x00009888" value="0x03164000" />
+ <register type="NOA" address="0x00009888" value="0x05164000" />
+ <register type="NOA" address="0x00009888" value="0x07164000" />
+ <register type="NOA" address="0x00009888" value="0x03350137" />
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+ <register type="NOA" address="0x00009888" value="0x0B350136" />
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+ <register type="NOA" address="0x00009888" value="0x01368000" />
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+ <register type="NOA" address="0x00009888" value="0x05368000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x55100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x47101000" />
+ <register type="NOA" address="0x00009888" value="0x49101616" />
+ <register type="NOA" address="0x00009888" value="0x4B101616" />
+ <register type="NOA" address="0x00009888" value="0x4D100616" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x10800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00010000" />
+ <register type="OA" address="0x0000D940" value="0x00001802" />
+ <register type="OA" address="0x0000D944" value="0x0000FCFF" />
+ <register type="OA" address="0x0000DC00" value="0x00001802" />
+ <register type="OA" address="0x0000DC04" value="0x0000FCFF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00820720" />
+ <register type="FLEX" address="0x0000E558" value="0x00A20920" />
+ <register type="FLEX" address="0x0000E658" value="0x00830730" />
+ <register type="FLEX" address="0x0000E758" value="0x00A30930" />
+ <register type="FLEX" address="0x0000E45C" value="0x00812712" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A12912" />
+ </register_config>
+ </set>
+
+ <set name="EuActivity5"
+ chipset="ADLP"
+ symbol_name="EuActivity5"
+ underscore_name="eu_activity5"
+ mdapi_supported_apis="OGL OGL4 OCL MEDIA IO"
+ hw_config_guid="2f72b499-da58-4506-9098-c2487c98b8d8"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render Ring Busy"
+ symbol_name="RenderBusy"
+ underscore_name="render_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Compute Ring Busy"
+ symbol_name="ComputeBusy"
+ underscore_name="compute_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render and compute engines are simultaneously busy"
+ symbol_name="RenderAndComputeBusy"
+ underscore_name="render_and_compute_busy"
+ description="The percentage of time when render and compute engines are simultaneously busy"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 7 READ C 6 READ UADD C 5 READ UADD C 4 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 3 READ C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS EM Pipe Active"
+ symbol_name="HsEmActive"
+ underscore_name="hs_em_active"
+ description="The percentage of time in which EU EM pipeline was actively processing a hull shader instructions."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS EM Pipe Active"
+ symbol_name="DsEmActive"
+ underscore_name="ds_em_active"
+ description="The percentage of time in which EU EM pipeline was actively processing a domain shader instructions."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Send Pipe Active"
+ symbol_name="HsSendActive"
+ underscore_name="hs_send_active"
+ description="The percentage of time in which EU send pipeline was actively processing a hull shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x0E0E1200" />
+ <register type="NOA" address="0x00009888" value="0x220E0009" />
+ <register type="NOA" address="0x00009888" value="0x1C0E0043" />
+ <register type="NOA" address="0x00009888" value="0x1E0E00B3" />
+ <register type="NOA" address="0x00009888" value="0x180E0000" />
+ <register type="NOA" address="0x00009888" value="0x160E0000" />
+ <register type="NOA" address="0x00009888" value="0x1E0F1400" />
+ <register type="NOA" address="0x00009888" value="0x1C104000" />
+ <register type="NOA" address="0x00009888" value="0x1E104000" />
+ <register type="NOA" address="0x00009888" value="0x2E020140" />
+ <register type="NOA" address="0x00009888" value="0x2C030005" />
+ <register type="NOA" address="0x00009888" value="0x38003600" />
+ <register type="NOA" address="0x00009888" value="0x1C0A8000" />
+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
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+ <register type="NOA" address="0x00009888" value="0x1D124000" />
+ <register type="NOA" address="0x00009888" value="0x1F124000" />
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+ <register type="NOA" address="0x00009888" value="0x05368000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x55100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x47101000" />
+ <register type="NOA" address="0x00009888" value="0x49101616" />
+ <register type="NOA" address="0x00009888" value="0x4B101616" />
+ <register type="NOA" address="0x00009888" value="0x4D100616" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
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+ <register type="OA" address="0x0000DC40" value="0x00010000" />
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+ <register type="OA" address="0x0000DC00" value="0x00001802" />
+ <register type="OA" address="0x0000DC04" value="0x0000FCFF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00821721" />
+ <register type="FLEX" address="0x0000E558" value="0x00A21921" />
+ <register type="FLEX" address="0x0000E658" value="0x00831731" />
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+ <register type="FLEX" address="0x0000E55C" value="0x00A22922" />
+ </register_config>
+ </set>
+
+ <set name="EuActivity6"
+ chipset="ADLP"
+ symbol_name="EuActivity6"
+ underscore_name="eu_activity6"
+ mdapi_supported_apis="OGL OGL4 OCL MEDIA IO"
+ hw_config_guid="ee4d5a29-352b-4819-be54-ef4641803949"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render Ring Busy"
+ symbol_name="RenderBusy"
+ underscore_name="render_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Compute Ring Busy"
+ symbol_name="ComputeBusy"
+ underscore_name="compute_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render and compute engines are simultaneously busy"
+ symbol_name="RenderAndComputeBusy"
+ underscore_name="render_and_compute_busy"
+ description="The percentage of time when render and compute engines are simultaneously busy"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 7 READ C 6 READ UADD C 5 READ UADD C 4 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 3 READ C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS FPU Pipe Active"
+ symbol_name="GsFpuActive"
+ underscore_name="gs_fpu_active"
+ description="The percentage of time in which EU FPU pipeline was actively processing a geometry shader instructions."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS EM Pipe Active"
+ symbol_name="GsEmActive"
+ underscore_name="gs_em_active"
+ description="The percentage of time in which EU EM pipeline was actively processing a geometry shader instructions."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Send Pipe Active"
+ symbol_name="GsSendActive"
+ underscore_name="gs_send_active"
+ description="The percentage of time in which EU send pipeline was actively processing a geometry shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x0E0E1200" />
+ <register type="NOA" address="0x00009888" value="0x220E0009" />
+ <register type="NOA" address="0x00009888" value="0x1C0E0043" />
+ <register type="NOA" address="0x00009888" value="0x1E0E00B3" />
+ <register type="NOA" address="0x00009888" value="0x180E0000" />
+ <register type="NOA" address="0x00009888" value="0x160E0000" />
+ <register type="NOA" address="0x00009888" value="0x1E0F1400" />
+ <register type="NOA" address="0x00009888" value="0x1C104000" />
+ <register type="NOA" address="0x00009888" value="0x1E104000" />
+ <register type="NOA" address="0x00009888" value="0x2E020140" />
+ <register type="NOA" address="0x00009888" value="0x2C030005" />
+ <register type="NOA" address="0x00009888" value="0x38003600" />
+ <register type="NOA" address="0x00009888" value="0x1C0A8000" />
+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x05151D37" />
+ <register type="NOA" address="0x00009888" value="0x09151547" />
+ <register type="NOA" address="0x00009888" value="0x05351C00" />
+ <register type="NOA" address="0x00009888" value="0x09351400" />
+ <register type="NOA" address="0x00009888" value="0x5D101400" />
+ <register type="NOA" address="0x00009888" value="0x5B100BBB" />
+ <register type="NOA" address="0x00009888" value="0x1F140028" />
+ <register type="NOA" address="0x00009888" value="0x1D124000" />
+ <register type="NOA" address="0x00009888" value="0x1F124000" />
+ <register type="NOA" address="0x00009888" value="0x0D150136" />
+ <register type="NOA" address="0x00009888" value="0x01150000" />
+ <register type="NOA" address="0x00009888" value="0x03164000" />
+ <register type="NOA" address="0x00009888" value="0x05164000" />
+ <register type="NOA" address="0x00009888" value="0x07164000" />
+ <register type="NOA" address="0x00009888" value="0x03350137" />
+ <register type="NOA" address="0x00009888" value="0x07350147" />
+ <register type="NOA" address="0x00009888" value="0x0B350136" />
+ <register type="NOA" address="0x00009888" value="0x01350000" />
+ <register type="NOA" address="0x00009888" value="0x01368000" />
+ <register type="NOA" address="0x00009888" value="0x03368000" />
+ <register type="NOA" address="0x00009888" value="0x05368000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x55100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x47101000" />
+ <register type="NOA" address="0x00009888" value="0x49101616" />
+ <register type="NOA" address="0x00009888" value="0x4B101616" />
+ <register type="NOA" address="0x00009888" value="0x4D100616" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x10800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00010000" />
+ <register type="OA" address="0x0000D940" value="0x00001802" />
+ <register type="OA" address="0x0000D944" value="0x0000FCFF" />
+ <register type="OA" address="0x0000DC00" value="0x00001802" />
+ <register type="OA" address="0x0000DC04" value="0x0000FCFF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00840740" />
+ <register type="FLEX" address="0x0000E558" value="0x00A40940" />
+ <register type="FLEX" address="0x0000E658" value="0x00841741" />
+ <register type="FLEX" address="0x0000E758" value="0x00A41941" />
+ <register type="FLEX" address="0x0000E45C" value="0x00842742" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A42942" />
+ </register_config>
+ </set>
+
+ <set name="EuActivity7"
+ chipset="ADLP"
+ symbol_name="EuActivity7"
+ underscore_name="eu_activity7"
+ mdapi_supported_apis="OGL OGL4 OCL MEDIA IO"
+ hw_config_guid="100bbf2f-a29f-44a9-83e8-3e38c34fea0c"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU FPU Pipe Active"
+ symbol_name="FpuActive"
+ underscore_name="fpu_active"
+ description="The percentage of time in which EU FPU pipeline was actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Pipes"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EM Pipe Active"
+ symbol_name="EmActive"
+ underscore_name="em_active"
+ description="The percentage of time in which EU EM pipeline was actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Pipes"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU FPU And EM Pipes Active"
+ symbol_name="EuFpuEmActive"
+ underscore_name="eu_fpu_em_active"
+ description="The percentage of time in which EU FPU and EM pipelines were actively processing."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Pipes"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="EU AVG IPC Rate"
+ symbol_name="EuAvgIpcRate"
+ underscore_name="eu_avg_ipc_rate"
+ description="The average rate of IPC calculated for 2 FPU pipelines."
+ data_type="float"
+ max_equation="2"
+ units="number"
+ semantic_type="ratio"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD A 11 READ A 12 READ FADD A 13 READ FADD A 14 READ FADD A 15 READ A 16 READ FADD A 17 READ FADD A 18 READ FADD FADD A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD FSUB FDIV 1 FADD"
+ mdapi_group="EU Array"
+ mdapi_usage_flags="Tier4 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render Ring Busy"
+ symbol_name="RenderBusy"
+ underscore_name="render_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Compute Ring Busy"
+ symbol_name="ComputeBusy"
+ underscore_name="compute_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render and compute engines are simultaneously busy"
+ symbol_name="RenderAndComputeBusy"
+ underscore_name="render_and_compute_busy"
+ description="The percentage of time when render and compute engines are simultaneously busy"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 7 READ C 6 READ UADD C 5 READ UADD C 4 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 3 READ C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
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+ <register type="NOA" address="0x00009888" value="0x4B101616" />
+ <register type="NOA" address="0x00009888" value="0x4D100616" />
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+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x10800000" />
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+ <register type="OA" address="0x0000DC00" value="0x00001802" />
+ <register type="OA" address="0x0000DC04" value="0x0000FCFF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00803703" />
+ <register type="FLEX" address="0x0000E558" value="0x00A03903" />
+ <register type="FLEX" address="0x0000E658" value="0x00800700" />
+ <register type="FLEX" address="0x0000E758" value="0x00A00900" />
+ <register type="FLEX" address="0x0000E45C" value="0x00801701" />
+ <register type="FLEX" address="0x0000E55C" value="0x00A01901" />
+ </register_config>
+ </set>
+
+ <set name="EuActivity8"
+ chipset="ADLP"
+ symbol_name="EuActivity8"
+ underscore_name="eu_activity8"
+ mdapi_supported_apis="OGL OGL4 OCL MEDIA IO"
+ hw_config_guid="b09ea1d6-8b2a-4c9c-99ac-8f2e9bafe8af"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Busy"
+ symbol_name="GpuBusy"
+ underscore_name="gpu_busy"
+ description="The percentage of time in which the GPU has been processing GPU commands."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="VS Threads Dispatched"
+ symbol_name="VsThreads"
+ underscore_name="vs_threads"
+ description="The total number of vertex shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 1 READ"
+ mdapi_group="EU Array/Vertex Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="HS Threads Dispatched"
+ symbol_name="HsThreads"
+ underscore_name="hs_threads"
+ description="The total number of hull shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 2 READ"
+ mdapi_group="EU Array/Hull Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Threads Dispatched"
+ symbol_name="DsThreads"
+ underscore_name="ds_threads"
+ description="The total number of domain shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 3 READ"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GS Threads Dispatched"
+ symbol_name="GsThreads"
+ underscore_name="gs_threads"
+ description="The total number of geometry shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 5 READ"
+ mdapi_group="EU Array/Geometry Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="FS Threads Dispatched"
+ symbol_name="PsThreads"
+ underscore_name="ps_threads"
+ description="The total number of fragment shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 6 READ"
+ mdapi_group="EU Array/Fragment Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="CS Threads Dispatched"
+ symbol_name="CsThreads"
+ underscore_name="cs_threads"
+ description="The total number of compute shader hardware threads dispatched."
+ data_type="uint64"
+ units="threads"
+ semantic_type="event"
+ equation="A 4 READ"
+ mdapi_group="EU Array/Compute Shader"
+ mdapi_usage_flags="Tier3 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render Ring Busy"
+ symbol_name="RenderBusy"
+ underscore_name="render_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 1 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Compute Ring Busy"
+ symbol_name="ComputeBusy"
+ underscore_name="compute_busy"
+ description="The percentage of time when render command streamer was busy."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="C 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="System Frame Batch"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="Render and compute engines are simultaneously busy"
+ symbol_name="RenderAndComputeBusy"
+ underscore_name="render_and_compute_busy"
+ description="The percentage of time when render and compute engines are simultaneously busy"
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="B 0 READ 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Read Throughput"
+ symbol_name="GtiReadThroughput"
+ underscore_name="gti_read_throughput"
+ description="The total number of GPU memory bytes read from GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 7 READ C 6 READ UADD C 5 READ UADD C 4 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GTI Write Throughput"
+ symbol_name="GtiWriteThroughput"
+ underscore_name="gti_write_throughput"
+ description="The total number of GPU memory bytes written to GTI."
+ data_type="uint64"
+ max_equation="$GpuCoreClocks 64 UMUL"
+ units="bytes"
+ semantic_type="throughput"
+ equation="64 C 3 READ C 2 READ UADD UMUL"
+ mdapi_group="GTI"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="DS Send Pipe Active"
+ symbol_name="DsSendActive"
+ underscore_name="ds_send_active"
+ description="The percentage of time in which EU send pipeline was actively processing a domain shader instruction."
+ data_type="float"
+ max_equation="100"
+ units="percent"
+ semantic_type="duration"
+ equation="A 7 READ A 8 READ FADD A 9 READ FADD A 10 READ FADD $EuCoresTotalCount UDIV 100 UMUL $GpuCoreClocks FDIV"
+ mdapi_group="EU Array/Domain Shader"
+ mdapi_usage_flags="Tier3 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x0E0E1200" />
+ <register type="NOA" address="0x00009888" value="0x220E0009" />
+ <register type="NOA" address="0x00009888" value="0x1C0E0043" />
+ <register type="NOA" address="0x00009888" value="0x1E0E00B3" />
+ <register type="NOA" address="0x00009888" value="0x180E0000" />
+ <register type="NOA" address="0x00009888" value="0x160E0000" />
+ <register type="NOA" address="0x00009888" value="0x1E0F1400" />
+ <register type="NOA" address="0x00009888" value="0x1C104000" />
+ <register type="NOA" address="0x00009888" value="0x1E104000" />
+ <register type="NOA" address="0x00009888" value="0x2E020140" />
+ <register type="NOA" address="0x00009888" value="0x2C030005" />
+ <register type="NOA" address="0x00009888" value="0x38003600" />
+ <register type="NOA" address="0x00009888" value="0x1C0A8000" />
+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x05151D37" />
+ <register type="NOA" address="0x00009888" value="0x09151547" />
+ <register type="NOA" address="0x00009888" value="0x05351C00" />
+ <register type="NOA" address="0x00009888" value="0x09351400" />
+ <register type="NOA" address="0x00009888" value="0x5D101400" />
+ <register type="NOA" address="0x00009888" value="0x5B100BBB" />
+ <register type="NOA" address="0x00009888" value="0x1F140028" />
+ <register type="NOA" address="0x00009888" value="0x1D124000" />
+ <register type="NOA" address="0x00009888" value="0x1F124000" />
+ <register type="NOA" address="0x00009888" value="0x0D150136" />
+ <register type="NOA" address="0x00009888" value="0x01150000" />
+ <register type="NOA" address="0x00009888" value="0x03164000" />
+ <register type="NOA" address="0x00009888" value="0x05164000" />
+ <register type="NOA" address="0x00009888" value="0x07164000" />
+ <register type="NOA" address="0x00009888" value="0x03350137" />
+ <register type="NOA" address="0x00009888" value="0x07350147" />
+ <register type="NOA" address="0x00009888" value="0x0B350136" />
+ <register type="NOA" address="0x00009888" value="0x01350000" />
+ <register type="NOA" address="0x00009888" value="0x01368000" />
+ <register type="NOA" address="0x00009888" value="0x03368000" />
+ <register type="NOA" address="0x00009888" value="0x05368000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x55100000" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x47101000" />
+ <register type="NOA" address="0x00009888" value="0x49101616" />
+ <register type="NOA" address="0x00009888" value="0x4B101616" />
+ <register type="NOA" address="0x00009888" value="0x4D100616" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0x10800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0x00800000" />
+ <register type="OA" address="0x0000DC40" value="0x00010000" />
+ <register type="OA" address="0x0000D940" value="0x00001802" />
+ <register type="OA" address="0x0000D944" value="0x0000FCFF" />
+ <register type="OA" address="0x0000DC00" value="0x00001802" />
+ <register type="OA" address="0x0000DC04" value="0x0000FCFF" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E458" value="0x00832732" />
+ <register type="FLEX" address="0x0000E558" value="0x00A32932" />
+ </register_config>
+ </set>
+
+ <set name="Metric set TestOa"
+ chipset="ADLP"
+ symbol_name="TestOa"
+ underscore_name="test_oa"
+ mdapi_supported_apis="VK OGL OCL IO"
+ hw_config_guid="7d987d1c-efe6-4b8f-9ba9-a036ab09f676"
+ >
+ <counter name="GPU Time Elapsed"
+ symbol_name="GpuTime"
+ underscore_name="gpu_time"
+ description="Time elapsed on the GPU during the measurement."
+ data_type="uint64"
+ units="ns"
+ semantic_type="duration"
+ equation="GPU_TIME 0 READ 1000000000 UMUL $GpuTimestampFrequency UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="GPU Core Clocks"
+ symbol_name="GpuCoreClocks"
+ underscore_name="gpu_core_clocks"
+ description="The total number of GPU core clocks elapsed during the measurement."
+ data_type="uint64"
+ units="cycles"
+ semantic_type="event"
+ equation="GPU_CLOCK 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="AVG GPU Core Frequency"
+ symbol_name="AvgGpuCoreFrequency"
+ underscore_name="avg_gpu_core_frequency"
+ description="Average GPU Core Frequency in the measurement."
+ data_type="uint64"
+ max_equation="$GpuMaxFrequency"
+ units="hz"
+ semantic_type="event"
+ equation="$GpuCoreClocks 1000000000 UMUL $GpuTime UDIV"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Tier1 Overview System Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter0"
+ symbol_name="Counter0"
+ underscore_name="counter0"
+ description="HW test counter 0. Factor: 0.0"
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="B 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter1"
+ symbol_name="Counter1"
+ underscore_name="counter1"
+ description="HW test counter 1. Factor: 1.0"
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="B 1 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter2"
+ symbol_name="Counter2"
+ underscore_name="counter2"
+ description="HW test counter 2. Factor: 1.0"
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="B 2 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter3"
+ symbol_name="Counter3"
+ underscore_name="counter3"
+ description="HW test counter 3. Factor: 0.5"
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="B 3 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter4"
+ symbol_name="Counter4"
+ underscore_name="counter4"
+ description="HW test counter 4. Factor: 0.3333"
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="B 4 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter5"
+ symbol_name="Counter5"
+ underscore_name="counter5"
+ description="HW test counter 5. Factor: 0.3333"
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="B 5 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter6"
+ symbol_name="Counter6"
+ underscore_name="counter6"
+ description="HW test counter 6. Factor: 0.16666"
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="B 6 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter7"
+ symbol_name="Counter7"
+ underscore_name="counter7"
+ description="HW test counter 7. Factor: 0.6666"
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="B 7 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter8"
+ symbol_name="Counter8"
+ underscore_name="counter8"
+ description="HW test counter 8. Should be equal to 1 in IOStream or in OAG query mode"
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="C 0 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <counter name="TestCounter9 - OAR enable"
+ symbol_name="Counter9"
+ underscore_name="counter9"
+ description="HW test counter 9. Should be equal to 1 in query."
+ data_type="uint64"
+ units="events"
+ semantic_type="event"
+ equation="C 1 READ"
+ mdapi_group="GPU"
+ mdapi_usage_flags="Frame Batch Draw"
+ mdapi_supported_apis=""
+ mdapi_hw_unit_type="gpu"
+ />
+ <register_config type="NOA">
+ <register type="NOA" address="0x00000D04" value="0x00000200" />
+ <register type="NOA" address="0x00009840" value="0x00000000" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x280E0000" />
+ <register type="NOA" address="0x00009888" value="0x1E0E0147" />
+ <register type="NOA" address="0x00009888" value="0x180E0000" />
+ <register type="NOA" address="0x00009888" value="0x160E0000" />
+ <register type="NOA" address="0x00009888" value="0x1E0F1000" />
+ <register type="NOA" address="0x00009888" value="0x1E104000" />
+ <register type="NOA" address="0x00009888" value="0x2E020100" />
+ <register type="NOA" address="0x00009888" value="0x2C030004" />
+ <register type="NOA" address="0x00009888" value="0x38003000" />
+ <register type="NOA" address="0x00009888" value="0x1E0A8000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x49110000" />
+ <register type="NOA" address="0x00009888" value="0x5D101400" />
+ <register type="NOA" address="0x00009888" value="0x1F140020" />
+ <register type="NOA" address="0x00009888" value="0x1D1103B3" />
+ <register type="NOA" address="0x00009888" value="0x01110000" />
+ <register type="NOA" address="0x00009888" value="0x61110000" />
+ <register type="NOA" address="0x00009888" value="0x1D128000" />
+ <register type="NOA" address="0x00009888" value="0x1F124000" />
+ <register type="NOA" address="0x00009888" value="0x17100000" />
+ <register type="NOA" address="0x00009888" value="0x55100510" />
+ <register type="NOA" address="0x00009888" value="0x57100000" />
+ <register type="NOA" address="0x00009888" value="0x31100000" />
+ <register type="NOA" address="0x00009884" value="0x00000003" />
+ <register type="NOA" address="0x00009888" value="0x65100002" />
+ <register type="NOA" address="0x00009884" value="0x00000000" />
+ <register type="NOA" address="0x00009888" value="0x42000001" />
+ </register_config>
+ <register_config type="OA">
+ <register type="OA" address="0x0000D920" value="0x00000000" />
+ <register type="OA" address="0x0000D900" value="0x00000000" />
+ <register type="OA" address="0x0000D904" value="0xF0800000" />
+ <register type="OA" address="0x0000D910" value="0x00000000" />
+ <register type="OA" address="0x0000D914" value="0xF0800000" />
+ <register type="OA" address="0x0000DC40" value="0x00FF0000" />
+ <register type="OA" address="0x0000D940" value="0x00000004" />
+ <register type="OA" address="0x0000D944" value="0x0000FFFF" />
+ <register type="OA" address="0x0000DC00" value="0x00000004" />
+ <register type="OA" address="0x0000DC04" value="0x0000FFFF" />
+ <register type="OA" address="0x0000D948" value="0x00000003" />
+ <register type="OA" address="0x0000D94C" value="0x0000FFFF" />
+ <register type="OA" address="0x0000DC08" value="0x00000003" />
+ <register type="OA" address="0x0000DC0C" value="0x0000FFFF" />
+ <register type="OA" address="0x0000D950" value="0x00000007" />
+ <register type="OA" address="0x0000D954" value="0x0000FFFF" />
+ <register type="OA" address="0x0000DC10" value="0x00000007" />
+ <register type="OA" address="0x0000DC14" value="0x0000FFFF" />
+ <register type="OA" address="0x0000D958" value="0x00100002" />
+ <register type="OA" address="0x0000D95C" value="0x0000FFF7" />
+ <register type="OA" address="0x0000DC18" value="0x00100002" />
+ <register type="OA" address="0x0000DC1C" value="0x0000FFF7" />
+ <register type="OA" address="0x0000D960" value="0x00100002" />
+ <register type="OA" address="0x0000D964" value="0x0000FFCF" />
+ <register type="OA" address="0x0000DC20" value="0x00100002" />
+ <register type="OA" address="0x0000DC24" value="0x0000FFCF" />
+ <register type="OA" address="0x0000D968" value="0x00100082" />
+ <register type="OA" address="0x0000D96C" value="0x0000FFEF" />
+ <register type="OA" address="0x0000DC28" value="0x00100082" />
+ <register type="OA" address="0x0000DC2C" value="0x0000FFEF" />
+ <register type="OA" address="0x0000D970" value="0x001000C2" />
+ <register type="OA" address="0x0000D974" value="0x0000FFE7" />
+ <register type="OA" address="0x0000DC30" value="0x001000C2" />
+ <register type="OA" address="0x0000DC34" value="0x0000FFE7" />
+ <register type="OA" address="0x0000D978" value="0x00100001" />
+ <register type="OA" address="0x0000D97C" value="0x0000FFE7" />
+ <register type="OA" address="0x0000DC38" value="0x00100001" />
+ <register type="OA" address="0x0000DC3C" value="0x0000FFE7" />
+ </register_config>
+ <register_config type="FLEX">
+ <register type="FLEX" address="0x0000E65C" value="0xFFFFFFFF" />
+ </register_config>
+ </set>
+
+</metrics>
diff --git a/lib/i915/perf-configs/update-guids.py b/lib/i915/perf-configs/update-guids.py
index d38a7a95..b864374e 100755
--- a/lib/i915/perf-configs/update-guids.py
+++ b/lib/i915/perf-configs/update-guids.py
@@ -174,7 +174,7 @@ chipsets = [ 'hsw',
'bxt', 'glk',
'cnl',
'icl', 'ehl',
- 'tglgt1', 'tglgt2', 'rkl', 'dg1', 'adl' ]
+ 'tglgt1', 'tglgt2', 'rkl', 'dg1', 'adl', 'adlp', ]
for chipset in chipsets:
filename = 'oa-' + chipset + '.xml'
diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 9d5ab7a5..fd77e376 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -58,6 +58,7 @@
#include "i915_perf_metrics_rkl.h"
#include "i915_perf_metrics_dg1.h"
#include "i915_perf_metrics_adl.h"
+#include "i915_perf_metrics_adlp.h"
static int
perf_ioctl(int fd, unsigned long request, void *arg)
@@ -279,6 +280,8 @@ intel_perf_for_devinfo(uint32_t device_id,
intel_perf_load_metrics_dg1(perf);
} else if (devinfo->is_alderlake_s) {
intel_perf_load_metrics_adl(perf);
+ } else if (devinfo->is_alderlake_p) {
+ intel_perf_load_metrics_adlp(perf);
} else {
return unsupported_i915_perf_platform(perf);
}
diff --git a/lib/meson.build b/lib/meson.build
index 078a357b..e78f126d 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -227,7 +227,7 @@ i915_perf_hardware = [
'bxt', 'glk',
'cnl',
'icl', 'ehl',
- 'tglgt1', 'tglgt2', 'rkl', 'dg1', 'adl',
+ 'tglgt1', 'tglgt2', 'rkl', 'dg1', 'adl', 'adlp',
]
i915_xml_files = []
--
2.25.4
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https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t 5/6] lib/i915: Add ADL-P stride restrictions for non-linear buffers
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (3 preceding siblings ...)
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 4/6] lib/i915/perf: Add ADL-P metrics Matt Roper
@ 2021-06-04 20:39 ` Matt Roper
2021-06-04 20:51 ` Souza, Jose
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 6/6] lib/i915: Add ADL-P plane offset restriction for CCS framebuffers Matt Roper
` (8 subsequent siblings)
13 siblings, 1 reply; 26+ messages in thread
From: Matt Roper @ 2021-06-04 20:39 UTC (permalink / raw)
To: igt-dev; +Cc: Clinton Taylor, Juha-Pekka Heikkilä
From: José Roberto de Souza <jose.souza@intel.com>
ADL-P tiled framebuffer strides must be power-of-two aligned and has a
minimum of 8 tiles. For non-CCS framebuffers the driver supports FBs not
meeting this requirement by remapping the framebuffer and padding the
stride as required, but for CCS FBs userspace must ensure the alignment.
Adding remap support for CCS FBs to the driver is to be done as a
follow-up.
Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
lib/igt_fb.c | 26 +++++++++++++++++++++-----
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 585ede38..ce2aa6ce 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -729,8 +729,16 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
/* clear color always fixed to 64 bytes */
return 64;
} else if (is_gen12_ccs_plane(fb, plane)) {
- /* A main surface using a CCS AUX surface must be 4x4 tiles aligned. */
- return ALIGN(min_stride, 64);
+ /*
+ * A main surface using a CCS AUX surface must be 4x4 tiles
+ * aligned. On ADL_P the minimum main surface stride is 8
+ * tiles (2 * 64 byte on CCS surface) and it has to be POT
+ * aligned.
+ */
+ if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
+ return roundup_power_of_two(max(min_stride, 128u));
+ else
+ return ALIGN(min_stride, 64);
} else if (!fb->modifier && is_nouveau_device(fb->fd)) {
int align;
@@ -743,14 +751,22 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
return ALIGN(min_stride, align);
} else {
unsigned int tile_width, tile_height;
+ uint32_t stride;
igt_get_fb_tile_size(fb->fd, fb->modifier, fb->plane_bpp[plane],
&tile_width, &tile_height);
- if (is_gen12_ccs_modifier(fb->modifier))
- tile_width *= 4;
+ if (is_gen12_ccs_modifier(fb->modifier)) {
+ stride = ALIGN(min_stride, tile_width * 4);
- return ALIGN(min_stride, tile_width);
+ /* TODO: add support to kernel to POT align CCS format strides */
+ if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
+ stride = roundup_power_of_two(max(stride, tile_width * 8));
+ } else {
+ stride = ALIGN(min_stride, tile_width);
+ }
+
+ return stride;
}
}
--
2.25.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t 6/6] lib/i915: Add ADL-P plane offset restriction for CCS framebuffers
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (4 preceding siblings ...)
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 5/6] lib/i915: Add ADL-P stride restrictions for non-linear buffers Matt Roper
@ 2021-06-04 20:39 ` Matt Roper
2021-06-05 0:46 ` Souza, Jose
2021-06-04 20:50 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P Patchwork
` (7 subsequent siblings)
13 siblings, 1 reply; 26+ messages in thread
From: Matt Roper @ 2021-06-04 20:39 UTC (permalink / raw)
To: igt-dev
From: Imre Deak <imre.deak@intel.com>
All DPT FB plane offsets must be 2MB-aligned. The kernel takes care of
aligning the offset for non-CCS framebuffers. Make sure that the
allocated CCS FB layout meets the alignment requirement.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
lib/igt_fb.c | 26 ++++++++++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index ce2aa6ce..ab52ea9f 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -804,11 +804,23 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
return (uint64_t) fb->strides[plane] *
ALIGN(fb->plane_height[plane], tile_height);
} else if (is_gen12_ccs_plane(fb, plane)) {
+ uint64_t size;
+
/* The AUX CCS surface must be page aligned */
- return (uint64_t)fb->strides[plane] *
+ size = (uint64_t)fb->strides[plane] *
ALIGN(fb->plane_height[plane], 64);
+
+ /*
+ * On ADL_P CCS color planes must be 2MB aligned, until remapping
+ * support is added for CCS FBs.
+ */
+ if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
+ size = ALIGN(size, 2 * 1024 * 1024);
+
+ return size;
} else {
unsigned int tile_width, tile_height;
+ uint64_t size;
igt_get_fb_tile_size(fb->fd, fb->modifier, fb->plane_bpp[plane],
&tile_width, &tile_height);
@@ -817,8 +829,18 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
if (is_gen12_ccs_modifier(fb->modifier))
tile_height *= 4;
- return (uint64_t) fb->strides[plane] *
+ size = (uint64_t)fb->strides[plane] *
ALIGN(fb->plane_height[plane], tile_height);
+
+ /*
+ * On ADL_P CCS color planes must be 2MB aligned, until remapping
+ * support is added for CCS FBs.
+ */
+ if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
+ is_ccs_modifier(fb->modifier))
+ size = ALIGN(size, 2 * 1024 * 1024);
+
+ return size;
}
}
--
2.25.4
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (5 preceding siblings ...)
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 6/6] lib/i915: Add ADL-P plane offset restriction for CCS framebuffers Matt Roper
@ 2021-06-04 20:50 ` Patchwork
2021-06-04 21:03 ` Matt Roper
2021-06-04 20:53 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
` (6 subsequent siblings)
13 siblings, 1 reply; 26+ messages in thread
From: Patchwork @ 2021-06-04 20:50 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev
== Series Details ==
Series: Split display/graphics versions and add ADL-P
URL : https://patchwork.freedesktop.org/series/91040/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
1fbc1e7d602f96a7f4e2b95057eef994656b8e74 i915/gem_exec_schedule: Check for timeslicing
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:41:2: note: (near initialization for ‘intel_device_match[301].device_id’)
0x030000, 0xff0000, \
^~~~~~~~
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:41:12: warning: excess elements in scalar initializer
0x030000, 0xff0000, \
^~~~~~~~
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:41:12: note: (near initialization for ‘intel_device_match[301].device_id’)
0x030000, 0xff0000, \
^~~~~~~~
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:42:2: warning: excess elements in scalar initializer
(unsigned long) info }
^
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:42:2: note: (near initialization for ‘intel_device_match[301].device_id’)
(unsigned long) info }
^
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 5/6] lib/i915: Add ADL-P stride restrictions for non-linear buffers
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 5/6] lib/i915: Add ADL-P stride restrictions for non-linear buffers Matt Roper
@ 2021-06-04 20:51 ` Souza, Jose
2021-06-07 7:58 ` Imre Deak
0 siblings, 1 reply; 26+ messages in thread
From: Souza, Jose @ 2021-06-04 20:51 UTC (permalink / raw)
To: igt-dev, Roper, Matthew D; +Cc: Taylor, Clinton A, Heikkila, Juha-pekka
Hum we can drop this change, Imre landed changes to make framebuffers strides power of two for adl_p, so for userspace it should be transparent.
On Fri, 2021-06-04 at 13:39 -0700, Matt Roper wrote:
> From: José Roberto de Souza <jose.souza@intel.com>
>
> ADL-P tiled framebuffer strides must be power-of-two aligned and has a
> minimum of 8 tiles. For non-CCS framebuffers the driver supports FBs not
> meeting this requirement by remapping the framebuffer and padding the
> stride as required, but for CCS FBs userspace must ensure the alignment.
> Adding remap support for CCS FBs to the driver is to be done as a
> follow-up.
>
> Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> lib/igt_fb.c | 26 +++++++++++++++++++++-----
> 1 file changed, 21 insertions(+), 5 deletions(-)
>
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 585ede38..ce2aa6ce 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -729,8 +729,16 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> /* clear color always fixed to 64 bytes */
> return 64;
> } else if (is_gen12_ccs_plane(fb, plane)) {
> - /* A main surface using a CCS AUX surface must be 4x4 tiles aligned. */
> - return ALIGN(min_stride, 64);
> + /*
> + * A main surface using a CCS AUX surface must be 4x4 tiles
> + * aligned. On ADL_P the minimum main surface stride is 8
> + * tiles (2 * 64 byte on CCS surface) and it has to be POT
> + * aligned.
> + */
> + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> + return roundup_power_of_two(max(min_stride, 128u));
> + else
> + return ALIGN(min_stride, 64);
> } else if (!fb->modifier && is_nouveau_device(fb->fd)) {
> int align;
>
> @@ -743,14 +751,22 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> return ALIGN(min_stride, align);
> } else {
> unsigned int tile_width, tile_height;
> + uint32_t stride;
>
> igt_get_fb_tile_size(fb->fd, fb->modifier, fb->plane_bpp[plane],
> &tile_width, &tile_height);
>
> - if (is_gen12_ccs_modifier(fb->modifier))
> - tile_width *= 4;
> + if (is_gen12_ccs_modifier(fb->modifier)) {
> + stride = ALIGN(min_stride, tile_width * 4);
>
> - return ALIGN(min_stride, tile_width);
> + /* TODO: add support to kernel to POT align CCS format strides */
> + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> + stride = roundup_power_of_two(max(stride, tile_width * 8));
> + } else {
> + stride = ALIGN(min_stride, tile_width);
> + }
> +
> + return stride;
> }
> }
>
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^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: warning for Split display/graphics versions and add ADL-P
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (6 preceding siblings ...)
2021-06-04 20:50 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P Patchwork
@ 2021-06-04 20:53 ` Patchwork
2021-06-05 5:13 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P (rev2) Patchwork
` (5 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2021-06-04 20:53 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev
== Series Details ==
Series: Split display/graphics versions and add ADL-P
URL : https://patchwork.freedesktop.org/series/91040/
State : warning
== Summary ==
Pipeline status: FAILED.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/332789 for the overview.
build:tests-debian-meson has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487472):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622839898:step_script
section_start:1622839898:cleanup_file_variables
Cleaning up file based variables
section_end:1622839899:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-arm64 has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487475):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622839902:step_script
section_start:1622839902:cleanup_file_variables
Cleaning up file based variables
section_end:1622839903:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-armhf has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487474):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622839900:step_script
section_start:1622839900:cleanup_file_variables
Cleaning up file based variables
section_end:1622839900:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-mips has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487476):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622839904:step_script
section_start:1622839904:cleanup_file_variables
Cleaning up file based variables
section_end:1622839905:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-minimal has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487473):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622839899:step_script
section_start:1622839899:cleanup_file_variables
Cleaning up file based variables
section_end:1622839900:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487467):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622839900:step_script
section_start:1622839900:cleanup_file_variables
Cleaning up file based variables
section_end:1622839902:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-clang has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487471):
#define PCI_MATCH_ANY (~0U)
^~~~~
../lib/i915_pciids.h:39:10: note: expanded from macro 'INTEL_VGA_DEVICE'
0x8086, id, \
^~
../lib/intel_device_info.c:497:2: error: suggest braces around initialization of subobject [-Werror,-Wmissing-braces]
INTEL_ADLP_IDS(&intel_alderlake_p_info),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{
../lib/intel_device_info.c:497:2: error: initializer element is not a compile-time constant
INTEL_ADLP_IDS(&intel_alderlake_p_info),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning and 3 errors generated.
ninja: build stopped: subcommand failed.
section_end:1622839908:step_script
section_start:1622839908:cleanup_file_variables
Cleaning up file based variables
section_end:1622839908:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-no-libdrm-nouveau has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487470):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622839899:step_script
section_start:1622839899:cleanup_file_variables
Cleaning up file based variables
section_end:1622839901:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-no-libunwind has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487468):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622839900:step_script
section_start:1622839900:cleanup_file_variables
Cleaning up file based variables
section_end:1622839901:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-oldest-meson has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10487469):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622839902:step_script
section_start:1622839902:cleanup_file_variables
Cleaning up file based variables
section_end:1622839903:cleanup_file_variables
ERROR: Job failed: exit code 1
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/332789
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P
2021-06-04 20:50 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P Patchwork
@ 2021-06-04 21:03 ` Matt Roper
2021-06-07 10:33 ` Petri Latvala
0 siblings, 1 reply; 26+ messages in thread
From: Matt Roper @ 2021-06-04 21:03 UTC (permalink / raw)
To: igt-dev
On Fri, Jun 04, 2021 at 08:50:49PM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: Split display/graphics versions and add ADL-P
> URL : https://patchwork.freedesktop.org/series/91040/
> State : failure
>
> == Summary ==
>
> IGT patchset build failed on latest successful build
> 1fbc1e7d602f96a7f4e2b95057eef994656b8e74 i915/gem_exec_schedule: Check for timeslicing
Why is this series applying/building on top of this commit instead of
the latest from the master branch? The master branch has three
additional commits, one of which contains the device ID's necessary to build
this series...
Matt
>
> ../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
> INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
> ^~~~~~~~~~~~~~~~
> ../lib/i915_pciids.h:41:2: note: (near initialization for ‘intel_device_match[301].device_id’)
> 0x030000, 0xff0000, \
> ^~~~~~~~
> ../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
> INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
> ^~~~~~~~~~~~~~~~
> ../lib/i915_pciids.h:41:12: warning: excess elements in scalar initializer
> 0x030000, 0xff0000, \
> ^~~~~~~~
> ../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
> INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
> ^~~~~~~~~~~~~~~~
> ../lib/i915_pciids.h:41:12: note: (near initialization for ‘intel_device_match[301].device_id’)
> 0x030000, 0xff0000, \
> ^~~~~~~~
> ../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
> INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
> ^~~~~~~~~~~~~~~~
> ../lib/i915_pciids.h:42:2: warning: excess elements in scalar initializer
> (unsigned long) info }
> ^
> ../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
> INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
> ^~~~~~~~~~~~~~~~
> ../lib/i915_pciids.h:42:2: note: (near initialization for ‘intel_device_match[301].device_id’)
> (unsigned long) info }
> ^
> ../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
> INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
> ^~~~~~~~~~~~~~~~
> ../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
> static const struct pci_id_match intel_device_match[] = {
> ^
> ../lib/intel_device_info.c:497:2:
> INTEL_ADLP_IDS(&intel_alderlake_p_info),
> {
> ../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
> static const struct pci_id_match intel_device_match[] = {
> ^
> ../lib/intel_device_info.c:497:2:
> INTEL_ADLP_IDS(&intel_alderlake_p_info),
> {
> ../lib/intel_device_info.c:500:1:
> };
> }
> cc1: some warnings being treated as errors
> ninja: build stopped: subcommand failed.
>
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/6] lib/i915/adl-p: Basic ADL-P enabling
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 3/6] lib/i915/adl-p: Basic ADL-P enabling Matt Roper
@ 2021-06-05 0:24 ` Souza, Jose
0 siblings, 0 replies; 26+ messages in thread
From: Souza, Jose @ 2021-06-05 0:24 UTC (permalink / raw)
To: igt-dev, Roper, Matthew D; +Cc: Taylor, Clinton A, Heikkila, Juha-pekka
On Fri, 2021-06-04 at 13:39 -0700, Matt Roper wrote:
> From: Clint Taylor <clinton.a.taylor@intel.com>
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Cc: Caz Yokoyama <caz.yokoyama@intel.com>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: Swati Sharma <swati2.sharma@intel.com>
> Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> lib/intel_chipset.h | 2 ++
> lib/intel_device_info.c | 8 ++++++++
> 2 files changed, 10 insertions(+)
>
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index 87b3bbc4..2b795527 100644
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -78,6 +78,7 @@ struct intel_device_info {
> bool is_rocketlake : 1;
> bool is_dg1 : 1;
> bool is_alderlake_s : 1;
> + bool is_alderlake_p : 1;
> const char *codename;
> };
>
> @@ -180,6 +181,7 @@ void intel_check_pch(void);
> #define IS_ROCKETLAKE(devid) (intel_get_device_info(devid)->is_rocketlake)
> #define IS_DG1(devid) (intel_get_device_info(devid)->is_dg1)
> #define IS_ALDERLAKE_S(devid) (intel_get_device_info(devid)->is_alderlake_s)
> +#define IS_ALDERLAKE_P(devid) (intel_get_device_info(devid)->is_alderlake_p)
>
> #define IS_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver == x)
> #define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 0c09f5cd..07338957 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -396,6 +396,13 @@ static const struct intel_device_info intel_alderlake_s_info = {
> .codename = "alderlake_s"
> };
>
> +static const struct intel_device_info intel_alderlake_p_info = {
> + .graphics_ver = 12,
> + .display_ver = 13,
> + .is_alderlake_p = true,
> + .codename = "alderlake_p"
> +};
> +
> static const struct pci_id_match intel_device_match[] = {
> INTEL_I810_IDS(&intel_i810_info),
> INTEL_I815_IDS(&intel_i815_info),
> @@ -487,6 +494,7 @@ static const struct pci_id_match intel_device_match[] = {
> INTEL_DG1_IDS(&intel_dg1_info),
>
> INTEL_ADLS_IDS(&intel_alderlake_s_info),
> + INTEL_ADLP_IDS(&intel_alderlake_p_info),
>
> INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
> };
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/6] lib/i915: Split 'gen' into graphics version and display version
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 1/6] lib/i915: Split 'gen' into graphics version and display version Matt Roper
@ 2021-06-05 0:33 ` Souza, Jose
2021-06-05 0:39 ` Souza, Jose
1 sibling, 0 replies; 26+ messages in thread
From: Souza, Jose @ 2021-06-05 0:33 UTC (permalink / raw)
To: igt-dev, Roper, Matthew D
On Fri, 2021-06-04 at 13:39 -0700, Matt Roper wrote:
> Going forward, platforms may have separate architecture versions for
> graphics and display and should no longer utilize a single 'gen'
> version.
>
> While doing this, let's change the versions to raw version values rather
> than BIT(v) as we were doing in the past. It looks like some of the
> existing uses of devinfo->gen were already misinterpreting this field
> and failing to pass the value through ffs(), so this change may also fix
> some bugs.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> lib/i915/perf.c | 4 +-
> lib/i915/perf.h | 2 +-
> lib/i915/perf_data_reader.c | 6 +-
> lib/igt_device_scan.c | 2 +-
> lib/igt_gt.c | 10 +-
> lib/intel_chipset.h | 7 +-
> lib/intel_device_info.c | 131 ++++++++++++++++++---------
> tests/i915/gem_exec_store.c | 4 +-
> tests/i915/i915_pciid.c | 4 +-
> tools/i915-perf/i915_perf_configs.c | 2 +-
> tools/i915-perf/i915_perf_reader.c | 5 +-
> tools/i915-perf/i915_perf_recorder.c | 6 +-
> 12 files changed, 114 insertions(+), 69 deletions(-)
>
> diff --git a/lib/i915/perf.c b/lib/i915/perf.c
> index 5644a346..9d5ab7a5 100644
> --- a/lib/i915/perf.c
> +++ b/lib/i915/perf.c
> @@ -169,7 +169,7 @@ intel_perf_for_devinfo(uint32_t device_id,
> * 2x6 does not have 2 samplers).
> */
> perf->devinfo.devid = device_id;
> - perf->devinfo.gen = devinfo->gen;
> + perf->devinfo.graphics_ver = devinfo->graphics_ver;
> perf->devinfo.revision = revision;
> perf->devinfo.timestamp_frequency = timestamp_frequency;
> perf->devinfo.gt_min_freq = gt_min_freq;
> @@ -183,7 +183,7 @@ intel_perf_for_devinfo(uint32_t device_id,
> /* On Gen11+ the equations from the xml files expect an 8bits
> * mask per subslice, versus only 3bits on prior Gens.
> */
> - bits_per_subslice = devinfo->gen >= 11 ? 8 : 3;
> + bits_per_subslice = devinfo->graphics_ver >= 11 ? 8 : 3;
> for (uint32_t s = 0; s < topology->max_slices; s++) {
> if (!slice_available(topology, s))
> continue;
> diff --git a/lib/i915/perf.h b/lib/i915/perf.h
> index 6a39be92..d2429c47 100644
> --- a/lib/i915/perf.h
> +++ b/lib/i915/perf.h
> @@ -50,7 +50,7 @@ struct intel_perf_devinfo {
> * Their values are build up from the topology fields.
> */
> uint32_t devid;
> - uint32_t gen;
> + uint32_t graphics_ver;
> uint32_t revision;
> uint64_t timestamp_frequency;
> uint64_t gt_min_freq;
> diff --git a/lib/i915/perf_data_reader.c b/lib/i915/perf_data_reader.c
> index 79cb50f4..e69189ac 100644
> --- a/lib/i915/perf_data_reader.c
> +++ b/lib/i915/perf_data_reader.c
> @@ -45,11 +45,11 @@ oa_report_ctx_is_valid(const struct intel_perf_devinfo *devinfo,
> {
> const uint32_t *report = (const uint32_t *) _report;
>
> - if (devinfo->gen < 8) {
> + if (devinfo->graphics_ver < 8) {
> return false; /* TODO */
> - } else if (devinfo->gen == 8) {
> + } else if (devinfo->graphics_ver == 8) {
> return report[0] & (1ul << 25);
> - } else if (devinfo->gen > 8) {
> + } else if (devinfo->graphics_ver > 8) {
> return report[0] & (1ul << 16);
> }
>
> diff --git a/lib/igt_device_scan.c b/lib/igt_device_scan.c
> index 2b7d9a3a..3c23fe0e 100644
> --- a/lib/igt_device_scan.c
> +++ b/lib/igt_device_scan.c
> @@ -208,7 +208,7 @@ static char *devname_intel(uint16_t vendor, uint16_t device)
> if (devname) {
> devname[0] = toupper(devname[0]);
> igt_assert(asprintf(&s, "Intel %s (Gen%u)", devname,
> - ffs(info->gen)) != -1);
> + info->graphics_ver) != -1);
> free(devname);
> }
> }
> diff --git a/lib/igt_gt.c b/lib/igt_gt.c
> index f601d726..b1415178 100644
> --- a/lib/igt_gt.c
> +++ b/lib/igt_gt.c
> @@ -552,18 +552,18 @@ bool gem_class_can_store_dword(int fd, int class)
> {
> uint16_t devid = intel_get_drm_devid(fd);
> const struct intel_device_info *info = intel_get_device_info(devid);
> - const int gen = ffs(info->gen);
> + const int ver = info->graphics_ver;
>
> - if (info->gen == 0) /* unknown, assume it just works */
> + if (ver == 0) /* unknown, assume it just works */
> return true;
>
> - if (gen <= 2) /* requires physical addresses */
> + if (ver <= 2) /* requires physical addresses */
> return false;
>
> - if (gen == 3 && (info->is_grantsdale || info->is_alviso))
> + if (ver == 3 && (info->is_grantsdale || info->is_alviso))
> return false; /* only supports physical addresses */
>
> - if (gen == 6 && class == I915_ENGINE_CLASS_VIDEO)
> + if (ver == 6 && class == I915_ENGINE_CLASS_VIDEO)
> return false; /* broken, unbelievably broken */
>
> if (info->is_broadwater)
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index f766021e..8e81ffa9 100644
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -37,7 +37,8 @@ struct pci_device *intel_get_pci_device(void);
> uint32_t intel_get_drm_devid(int fd);
>
> struct intel_device_info {
> - unsigned gen;
> + unsigned graphics_ver;
> + unsigned display_ver;
> unsigned gt; /* 0 if unknown */
> bool is_mobile : 1;
> bool is_whitney : 1;
> @@ -179,8 +180,8 @@ void intel_check_pch(void);
> #define IS_DG1(devid) (intel_get_device_info(devid)->is_dg1)
> #define IS_ALDERLAKE_S(devid) (intel_get_device_info(devid)->is_alderlake_s)
>
> -#define IS_GEN(devid, x) (intel_get_device_info(devid)->gen & (1u << ((x)-1)))
> -#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->gen & -(1u << ((x)-1)))
> +#define IS_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver == x)
> +#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
>
> #define IS_GEN2(devid) IS_GEN(devid, 2)
> #define IS_GEN3(devid) IS_GEN(devid, 3)
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index e07fdf6f..4ab236e4 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -4,154 +4,180 @@
> #include <strings.h> /* ffs() */
>
> static const struct intel_device_info intel_generic_info = {
> - .gen = 0,
> + .graphics_ver = 0,
> + .display_ver = 0,
> };
>
> static const struct intel_device_info intel_i810_info = {
> - .gen = BIT(0),
> + .graphics_ver = 1,
> + .display_ver = 1,
> .is_whitney = true,
> .codename = "solano" /* 815 == "whitney" ? or vice versa? */
> };
>
> static const struct intel_device_info intel_i815_info = {
> - .gen = BIT(0),
> + .graphics_ver = 1,
> + .display_ver = 1,
> .is_whitney = true,
> .codename = "whitney"
> };
>
> static const struct intel_device_info intel_i830_info = {
> - .gen = BIT(1),
> + .graphics_ver = 2,
> + .display_ver = 2,
> .is_almador = true,
> .codename = "almador"
> };
> static const struct intel_device_info intel_i845_info = {
> - .gen = BIT(1),
> + .graphics_ver = 2,
> + .display_ver = 2,
> .is_brookdale = true,
> .codename = "brookdale"
> };
> static const struct intel_device_info intel_i855_info = {
> - .gen = BIT(1),
> + .graphics_ver = 2,
> + .display_ver = 2,
> .is_mobile = true,
> .is_montara = true,
> .codename = "montara"
> };
> static const struct intel_device_info intel_i865_info = {
> - .gen = BIT(1),
> + .graphics_ver = 2,
> + .display_ver = 2,
> .is_springdale = true,
> .codename = "spingdale"
> };
>
> static const struct intel_device_info intel_i915_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_grantsdale = true,
> .codename = "grantsdale"
> };
> static const struct intel_device_info intel_i915m_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_mobile = true,
> .is_alviso = true,
> .codename = "alviso"
> };
> static const struct intel_device_info intel_i945_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_lakeport = true,
> .codename = "lakeport"
> };
> static const struct intel_device_info intel_i945m_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_mobile = true,
> .is_calistoga = true,
> .codename = "calistoga"
> };
>
> static const struct intel_device_info intel_g33_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_bearlake = true,
> .codename = "bearlake"
> };
>
> static const struct intel_device_info intel_pineview_g_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_pineview = true,
> .codename = "pineview"
> };
>
> static const struct intel_device_info intel_pineview_m_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_mobile = true,
> .is_pineview = true,
> .codename = "pineview"
> };
>
> static const struct intel_device_info intel_i965_info = {
> - .gen = BIT(3),
> + .graphics_ver = 4,
> + .display_ver = 4,
> .is_broadwater = true,
> .codename = "broadwater"
> };
>
> static const struct intel_device_info intel_i965m_info = {
> - .gen = BIT(3),
> + .graphics_ver = 4,
> + .display_ver = 4,
> .is_mobile = true,
> .is_crestline = true,
> .codename = "crestline"
> };
>
> static const struct intel_device_info intel_g45_info = {
> - .gen = BIT(3),
> + .graphics_ver = 4,
> + .display_ver = 4,
> .is_eaglelake = true,
> .codename = "eaglelake"
> };
> static const struct intel_device_info intel_gm45_info = {
> - .gen = BIT(3),
> + .graphics_ver = 4,
> + .display_ver = 4,
> .is_mobile = true,
> .is_cantiga = true,
> .codename = "cantiga"
> };
>
> static const struct intel_device_info intel_ironlake_info = {
> - .gen = BIT(4),
> + .graphics_ver = 5,
> + .display_ver = 5,
> .is_ironlake = true,
> .codename = "ironlake" /* clarkdale? */
> };
> static const struct intel_device_info intel_ironlake_m_info = {
> - .gen = BIT(4),
> + .graphics_ver = 5,
> + .display_ver = 5,
> .is_mobile = true,
> .is_arrandale = true,
> .codename = "arrandale"
> };
>
> static const struct intel_device_info intel_sandybridge_info = {
> - .gen = BIT(5),
> + .graphics_ver = 6,
> + .display_ver = 6,
> .is_sandybridge = true,
> .codename = "sandybridge"
> };
> static const struct intel_device_info intel_sandybridge_m_info = {
> - .gen = BIT(5),
> + .graphics_ver = 6,
> + .display_ver = 6,
> .is_mobile = true,
> .is_sandybridge = true,
> .codename = "sandybridge"
> };
>
> static const struct intel_device_info intel_ivybridge_info = {
> - .gen = BIT(6),
> + .graphics_ver = 7,
> + .display_ver = 7,
> .is_ivybridge = true,
> .codename = "ivybridge"
> };
> static const struct intel_device_info intel_ivybridge_m_info = {
> - .gen = BIT(6),
> + .graphics_ver = 7,
> + .display_ver = 7,
> .is_mobile = true,
> .is_ivybridge = true,
> .codename = "ivybridge"
> };
>
> static const struct intel_device_info intel_valleyview_info = {
> - .gen = BIT(6),
> + .graphics_ver = 7,
> + .display_ver = 7,
> .is_valleyview = true,
> .codename = "valleyview"
> };
>
> #define HASWELL_FIELDS \
> - .gen = BIT(6), \
> + .graphics_ver = 7, \
> + .display_ver = 7, \
> .is_haswell = true, \
> .codename = "haswell"
>
> @@ -171,7 +197,8 @@ static const struct intel_device_info intel_haswell_gt3_info = {
> };
>
> #define BROADWELL_FIELDS \
> - .gen = BIT(7), \
> + .graphics_ver = 8, \
> + .display_ver = 8, \
> .is_broadwell = true, \
> .codename = "broadwell"
>
> @@ -195,13 +222,15 @@ static const struct intel_device_info intel_broadwell_unknown_info = {
> };
>
> static const struct intel_device_info intel_cherryview_info = {
> - .gen = BIT(7),
> + .graphics_ver = 8,
> + .display_ver = 8,
> .is_cherryview = true,
> .codename = "cherryview"
> };
>
> #define SKYLAKE_FIELDS \
> - .gen = BIT(8), \
> + .graphics_ver = 9, \
> + .display_ver = 9, \
> .codename = "skylake", \
> .is_skylake = true
>
> @@ -226,13 +255,15 @@ static const struct intel_device_info intel_skylake_gt4_info = {
> };
>
> static const struct intel_device_info intel_broxton_info = {
> - .gen = BIT(8),
> + .graphics_ver = 9,
> + .display_ver = 9,
> .is_broxton = true,
> .codename = "broxton"
> };
>
> #define KABYLAKE_FIELDS \
> - .gen = BIT(8), \
> + .graphics_ver = 9, \
> + .display_ver = 9, \
> .is_kabylake = true, \
> .codename = "kabylake"
>
> @@ -257,13 +288,15 @@ static const struct intel_device_info intel_kabylake_gt4_info = {
> };
>
> static const struct intel_device_info intel_geminilake_info = {
> - .gen = BIT(8),
> + .graphics_ver = 9,
> + .display_ver = 9,
> .is_geminilake = true,
> .codename = "geminilake"
> };
>
> #define COFFEELAKE_FIELDS \
> - .gen = BIT(8), \
> + .graphics_ver = 9, \
> + .display_ver = 9, \
> .is_coffeelake = true, \
> .codename = "coffeelake"
>
> @@ -283,7 +316,8 @@ static const struct intel_device_info intel_coffeelake_gt3_info = {
> };
>
> #define COMETLAKE_FIELDS \
> - .gen = BIT(8), \
> + .graphics_ver = 9, \
> + .display_ver = 9, \
> .is_cometlake = true, \
> .codename = "cometlake"
>
> @@ -298,57 +332,66 @@ static const struct intel_device_info intel_cometlake_gt2_info = {
> };
>
> static const struct intel_device_info intel_cannonlake_info = {
> - .gen = BIT(9),
> + .graphics_ver = 10,
> + .display_ver = 10,
> .is_cannonlake = true,
> .codename = "cannonlake"
> };
>
> static const struct intel_device_info intel_icelake_info = {
> - .gen = BIT(10),
> + .graphics_ver = 11,
> + .display_ver = 11,
> .is_icelake = true,
> .codename = "icelake"
> };
>
> static const struct intel_device_info intel_elkhartlake_info = {
> - .gen = BIT(10),
> + .graphics_ver = 11,
> + .display_ver = 11,
> .is_elkhartlake = true,
> .codename = "elkhartlake"
> };
>
> static const struct intel_device_info intel_jasperlake_info = {
> - .gen = BIT(10),
> + .graphics_ver = 11,
> + .display_ver = 11,
> .is_jasperlake = true,
> .codename = "jasperlake"
> };
>
> static const struct intel_device_info intel_tigerlake_gt1_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_tigerlake = true,
> .codename = "tigerlake",
> .gt = 1,
> };
>
> static const struct intel_device_info intel_tigerlake_gt2_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_tigerlake = true,
> .codename = "tigerlake",
> .gt = 2,
> };
>
> static const struct intel_device_info intel_rocketlake_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_rocketlake = true,
> .codename = "rocketlake"
> };
>
> static const struct intel_device_info intel_dg1_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_dg1 = true,
> .codename = "dg1"
> };
>
> static const struct intel_device_info intel_alderlake_s_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_alderlake_s = true,
> .codename = "alderlake_s"
> };
> @@ -490,5 +533,5 @@ out:
> */
> unsigned intel_gen(uint16_t devid)
> {
> - return ffs(intel_get_device_info(devid)->gen) ?: -1u;
> + return intel_get_device_info(devid)->graphics_ver ?: -1u;
> }
> diff --git a/tests/i915/gem_exec_store.c b/tests/i915/gem_exec_store.c
> index 99ffc9ab..2df0b27f 100644
> --- a/tests/i915/gem_exec_store.c
> +++ b/tests/i915/gem_exec_store.c
> @@ -310,7 +310,7 @@ static int print_welcome(int fd)
> int err;
>
> igt_info("Running on %s (pci-id %04x, gen %d)\n",
> - info->codename, devid, ffs(info->gen));
> + info->codename, devid, info->graphics_ver);
> igt_info("Can use MI_STORE_DWORD(virtual)? %s\n",
> gem_can_store_dword(fd, 0) ? "yes" : "no");
>
> @@ -320,7 +320,7 @@ static int print_welcome(int fd)
> igt_info("GPU operation? %s [errno=%d]\n",
> err == 0 ? "yes" : "no", err);
>
> - return ffs(info->gen);
> + return info->graphics_ver;
> }
>
> #define test_each_engine(T, i915, e) \
> diff --git a/tests/i915/i915_pciid.c b/tests/i915/i915_pciid.c
> index fe4db405..7de44ff2 100644
> --- a/tests/i915/i915_pciid.c
> +++ b/tests/i915/i915_pciid.c
> @@ -49,13 +49,13 @@ static bool has_known_intel_chipset(int fd)
> return false;
> }
>
> - if (!info->gen) {
> + if (!info->graphics_ver) {
> igt_warn("Unknown PCI-ID: %04x\n", devid);
> return false;
> }
>
> igt_info("PCI-ID: %#04x, gen %d, %s\n",
> - devid, ffs(info->gen), info->codename);
> + devid, info->graphics_ver, info->codename);
> return true;
> }
>
> diff --git a/tools/i915-perf/i915_perf_configs.c b/tools/i915-perf/i915_perf_configs.c
> index 2a0283c9..bce3bd0f 100644
> --- a/tools/i915-perf/i915_perf_configs.c
> +++ b/tools/i915-perf/i915_perf_configs.c
> @@ -228,7 +228,7 @@ main(int argc, char *argv[])
> return EXIT_FAILURE;
> }
>
> - fprintf(stdout, "Device gen=%i gt=%i\n", devinfo->gen, devinfo->gt);
> + fprintf(stdout, "Device graphics_ver=%i gt=%i\n", devinfo->graphics_ver, devinfo->gt);
>
> perf = intel_perf_for_fd(drm_fd);
> if (!perf) {
> diff --git a/tools/i915-perf/i915_perf_reader.c b/tools/i915-perf/i915_perf_reader.c
> index 3e4a6530..e51f5a5d 100644
> --- a/tools/i915-perf/i915_perf_reader.c
> +++ b/tools/i915-perf/i915_perf_reader.c
> @@ -220,8 +220,9 @@ main(int argc, char *argv[])
>
> devinfo = intel_get_device_info(reader.devinfo.devid);
>
> - fprintf(stdout, "Recorded on device=0x%x(%s) gen=%i\n",
> - reader.devinfo.devid, devinfo->codename, reader.devinfo.gen);
> + fprintf(stdout, "Recorded on device=0x%x(%s) graphics_ver=%i\n",
> + reader.devinfo.devid, devinfo->codename,
> + reader.devinfo.graphics_ver);
> fprintf(stdout, "Metric used : %s (%s) uuid=%s\n",
> reader.metric_set->symbol_name, reader.metric_set->name,
> reader.metric_set->hw_config_guid);
> diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
> index 3a8ee46a..00195290 100644
> --- a/tools/i915-perf/i915_perf_recorder.c
> +++ b/tools/i915-perf/i915_perf_recorder.c
> @@ -317,14 +317,14 @@ get_device_timestamp_frequency(const struct intel_device_info *devinfo, int drm_
> if (perf_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0)
> return timestamp_frequency;
>
> - if (devinfo->gen > 9) {
> + if (devinfo->graphics_ver > 9) {
> fprintf(stderr, "Unable to query timestamp frequency from i915, please update kernel.\n");
> return 0;
> }
>
> fprintf(stderr, "Warning: unable to query timestamp frequency from i915, guessing values...\n");
>
> - if (devinfo->gen <= 8)
> + if (devinfo->graphics_ver <= 8)
> return 12500000;
> if (devinfo->is_broxton)
> return 19200000;
> @@ -878,7 +878,7 @@ main(int argc, char *argv[])
> }
>
> fprintf(stdout, "Device name=%s gen=%i gt=%i id=0x%x\n",
> - ctx.devinfo->codename, ctx.devinfo->gen, ctx.devinfo->gt, ctx.devid);
> + ctx.devinfo->codename, ctx.devinfo->graphics_ver, ctx.devinfo->gt, ctx.devid);
>
> ctx.topology = get_topology(ctx.drm_fd, &ctx.topology_size);
> if (!ctx.topology) {
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/6] lib/i915: Split 'gen' into graphics version and display version
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 1/6] lib/i915: Split 'gen' into graphics version and display version Matt Roper
2021-06-05 0:33 ` Souza, Jose
@ 2021-06-05 0:39 ` Souza, Jose
1 sibling, 0 replies; 26+ messages in thread
From: Souza, Jose @ 2021-06-05 0:39 UTC (permalink / raw)
To: igt-dev, Roper, Matthew D
On Fri, 2021-06-04 at 13:39 -0700, Matt Roper wrote:
> Going forward, platforms may have separate architecture versions for
> graphics and display and should no longer utilize a single 'gen'
> version.
>
> While doing this, let's change the versions to raw version values rather
> than BIT(v) as we were doing in the past. It looks like some of the
> existing uses of devinfo->gen were already misinterpreting this field
> and failing to pass the value through ffs(), so this change may also fix
> some bugs.
>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> lib/i915/perf.c | 4 +-
> lib/i915/perf.h | 2 +-
> lib/i915/perf_data_reader.c | 6 +-
> lib/igt_device_scan.c | 2 +-
> lib/igt_gt.c | 10 +-
> lib/intel_chipset.h | 7 +-
> lib/intel_device_info.c | 131 ++++++++++++++++++---------
> tests/i915/gem_exec_store.c | 4 +-
> tests/i915/i915_pciid.c | 4 +-
> tools/i915-perf/i915_perf_configs.c | 2 +-
> tools/i915-perf/i915_perf_reader.c | 5 +-
> tools/i915-perf/i915_perf_recorder.c | 6 +-
> 12 files changed, 114 insertions(+), 69 deletions(-)
>
> diff --git a/lib/i915/perf.c b/lib/i915/perf.c
> index 5644a346..9d5ab7a5 100644
> --- a/lib/i915/perf.c
> +++ b/lib/i915/perf.c
> @@ -169,7 +169,7 @@ intel_perf_for_devinfo(uint32_t device_id,
> * 2x6 does not have 2 samplers).
> */
> perf->devinfo.devid = device_id;
> - perf->devinfo.gen = devinfo->gen;
> + perf->devinfo.graphics_ver = devinfo->graphics_ver;
> perf->devinfo.revision = revision;
> perf->devinfo.timestamp_frequency = timestamp_frequency;
> perf->devinfo.gt_min_freq = gt_min_freq;
> @@ -183,7 +183,7 @@ intel_perf_for_devinfo(uint32_t device_id,
> /* On Gen11+ the equations from the xml files expect an 8bits
> * mask per subslice, versus only 3bits on prior Gens.
> */
> - bits_per_subslice = devinfo->gen >= 11 ? 8 : 3;
> + bits_per_subslice = devinfo->graphics_ver >= 11 ? 8 : 3;
> for (uint32_t s = 0; s < topology->max_slices; s++) {
> if (!slice_available(topology, s))
> continue;
> diff --git a/lib/i915/perf.h b/lib/i915/perf.h
> index 6a39be92..d2429c47 100644
> --- a/lib/i915/perf.h
> +++ b/lib/i915/perf.h
> @@ -50,7 +50,7 @@ struct intel_perf_devinfo {
> * Their values are build up from the topology fields.
> */
> uint32_t devid;
> - uint32_t gen;
> + uint32_t graphics_ver;
> uint32_t revision;
> uint64_t timestamp_frequency;
> uint64_t gt_min_freq;
> diff --git a/lib/i915/perf_data_reader.c b/lib/i915/perf_data_reader.c
> index 79cb50f4..e69189ac 100644
> --- a/lib/i915/perf_data_reader.c
> +++ b/lib/i915/perf_data_reader.c
> @@ -45,11 +45,11 @@ oa_report_ctx_is_valid(const struct intel_perf_devinfo *devinfo,
> {
> const uint32_t *report = (const uint32_t *) _report;
>
> - if (devinfo->gen < 8) {
> + if (devinfo->graphics_ver < 8) {
> return false; /* TODO */
> - } else if (devinfo->gen == 8) {
> + } else if (devinfo->graphics_ver == 8) {
> return report[0] & (1ul << 25);
> - } else if (devinfo->gen > 8) {
> + } else if (devinfo->graphics_ver > 8) {
> return report[0] & (1ul << 16);
> }
>
> diff --git a/lib/igt_device_scan.c b/lib/igt_device_scan.c
> index 2b7d9a3a..3c23fe0e 100644
> --- a/lib/igt_device_scan.c
> +++ b/lib/igt_device_scan.c
> @@ -208,7 +208,7 @@ static char *devname_intel(uint16_t vendor, uint16_t device)
> if (devname) {
> devname[0] = toupper(devname[0]);
> igt_assert(asprintf(&s, "Intel %s (Gen%u)", devname,
> - ffs(info->gen)) != -1);
> + info->graphics_ver) != -1);
> free(devname);
> }
> }
> diff --git a/lib/igt_gt.c b/lib/igt_gt.c
> index f601d726..b1415178 100644
> --- a/lib/igt_gt.c
> +++ b/lib/igt_gt.c
> @@ -552,18 +552,18 @@ bool gem_class_can_store_dword(int fd, int class)
> {
> uint16_t devid = intel_get_drm_devid(fd);
> const struct intel_device_info *info = intel_get_device_info(devid);
> - const int gen = ffs(info->gen);
> + const int ver = info->graphics_ver;
>
> - if (info->gen == 0) /* unknown, assume it just works */
> + if (ver == 0) /* unknown, assume it just works */
> return true;
>
> - if (gen <= 2) /* requires physical addresses */
> + if (ver <= 2) /* requires physical addresses */
> return false;
>
> - if (gen == 3 && (info->is_grantsdale || info->is_alviso))
> + if (ver == 3 && (info->is_grantsdale || info->is_alviso))
> return false; /* only supports physical addresses */
>
> - if (gen == 6 && class == I915_ENGINE_CLASS_VIDEO)
> + if (ver == 6 && class == I915_ENGINE_CLASS_VIDEO)
> return false; /* broken, unbelievably broken */
>
> if (info->is_broadwater)
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index f766021e..8e81ffa9 100644
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -37,7 +37,8 @@ struct pci_device *intel_get_pci_device(void);
> uint32_t intel_get_drm_devid(int fd);
>
> struct intel_device_info {
> - unsigned gen;
> + unsigned graphics_ver;
> + unsigned display_ver;
> unsigned gt; /* 0 if unknown */
> bool is_mobile : 1;
> bool is_whitney : 1;
> @@ -179,8 +180,8 @@ void intel_check_pch(void);
> #define IS_DG1(devid) (intel_get_device_info(devid)->is_dg1)
> #define IS_ALDERLAKE_S(devid) (intel_get_device_info(devid)->is_alderlake_s)
>
> -#define IS_GEN(devid, x) (intel_get_device_info(devid)->gen & (1u << ((x)-1)))
> -#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->gen & -(1u << ((x)-1)))
> +#define IS_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver == x)
> +#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
>
> #define IS_GEN2(devid) IS_GEN(devid, 2)
> #define IS_GEN3(devid) IS_GEN(devid, 3)
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index e07fdf6f..4ab236e4 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -4,154 +4,180 @@
> #include <strings.h> /* ffs() */
>
> static const struct intel_device_info intel_generic_info = {
> - .gen = 0,
> + .graphics_ver = 0,
> + .display_ver = 0,
> };
>
> static const struct intel_device_info intel_i810_info = {
> - .gen = BIT(0),
> + .graphics_ver = 1,
> + .display_ver = 1,
> .is_whitney = true,
> .codename = "solano" /* 815 == "whitney" ? or vice versa? */
> };
>
> static const struct intel_device_info intel_i815_info = {
> - .gen = BIT(0),
> + .graphics_ver = 1,
> + .display_ver = 1,
> .is_whitney = true,
> .codename = "whitney"
> };
>
> static const struct intel_device_info intel_i830_info = {
> - .gen = BIT(1),
> + .graphics_ver = 2,
> + .display_ver = 2,
> .is_almador = true,
> .codename = "almador"
> };
> static const struct intel_device_info intel_i845_info = {
> - .gen = BIT(1),
> + .graphics_ver = 2,
> + .display_ver = 2,
> .is_brookdale = true,
> .codename = "brookdale"
> };
> static const struct intel_device_info intel_i855_info = {
> - .gen = BIT(1),
> + .graphics_ver = 2,
> + .display_ver = 2,
> .is_mobile = true,
> .is_montara = true,
> .codename = "montara"
> };
> static const struct intel_device_info intel_i865_info = {
> - .gen = BIT(1),
> + .graphics_ver = 2,
> + .display_ver = 2,
> .is_springdale = true,
> .codename = "spingdale"
> };
>
> static const struct intel_device_info intel_i915_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_grantsdale = true,
> .codename = "grantsdale"
> };
> static const struct intel_device_info intel_i915m_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_mobile = true,
> .is_alviso = true,
> .codename = "alviso"
> };
> static const struct intel_device_info intel_i945_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_lakeport = true,
> .codename = "lakeport"
> };
> static const struct intel_device_info intel_i945m_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_mobile = true,
> .is_calistoga = true,
> .codename = "calistoga"
> };
>
> static const struct intel_device_info intel_g33_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_bearlake = true,
> .codename = "bearlake"
> };
>
> static const struct intel_device_info intel_pineview_g_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_pineview = true,
> .codename = "pineview"
> };
>
> static const struct intel_device_info intel_pineview_m_info = {
> - .gen = BIT(2),
> + .graphics_ver = 3,
> + .display_ver = 3,
> .is_mobile = true,
> .is_pineview = true,
> .codename = "pineview"
> };
>
> static const struct intel_device_info intel_i965_info = {
> - .gen = BIT(3),
> + .graphics_ver = 4,
> + .display_ver = 4,
> .is_broadwater = true,
> .codename = "broadwater"
> };
>
> static const struct intel_device_info intel_i965m_info = {
> - .gen = BIT(3),
> + .graphics_ver = 4,
> + .display_ver = 4,
> .is_mobile = true,
> .is_crestline = true,
> .codename = "crestline"
> };
>
> static const struct intel_device_info intel_g45_info = {
> - .gen = BIT(3),
> + .graphics_ver = 4,
> + .display_ver = 4,
> .is_eaglelake = true,
> .codename = "eaglelake"
> };
> static const struct intel_device_info intel_gm45_info = {
> - .gen = BIT(3),
> + .graphics_ver = 4,
> + .display_ver = 4,
> .is_mobile = true,
> .is_cantiga = true,
> .codename = "cantiga"
> };
>
> static const struct intel_device_info intel_ironlake_info = {
> - .gen = BIT(4),
> + .graphics_ver = 5,
> + .display_ver = 5,
> .is_ironlake = true,
> .codename = "ironlake" /* clarkdale? */
> };
> static const struct intel_device_info intel_ironlake_m_info = {
> - .gen = BIT(4),
> + .graphics_ver = 5,
> + .display_ver = 5,
> .is_mobile = true,
> .is_arrandale = true,
> .codename = "arrandale"
> };
>
> static const struct intel_device_info intel_sandybridge_info = {
> - .gen = BIT(5),
> + .graphics_ver = 6,
> + .display_ver = 6,
> .is_sandybridge = true,
> .codename = "sandybridge"
> };
> static const struct intel_device_info intel_sandybridge_m_info = {
> - .gen = BIT(5),
> + .graphics_ver = 6,
> + .display_ver = 6,
> .is_mobile = true,
> .is_sandybridge = true,
> .codename = "sandybridge"
> };
>
> static const struct intel_device_info intel_ivybridge_info = {
> - .gen = BIT(6),
> + .graphics_ver = 7,
> + .display_ver = 7,
> .is_ivybridge = true,
> .codename = "ivybridge"
> };
> static const struct intel_device_info intel_ivybridge_m_info = {
> - .gen = BIT(6),
> + .graphics_ver = 7,
> + .display_ver = 7,
> .is_mobile = true,
> .is_ivybridge = true,
> .codename = "ivybridge"
> };
>
> static const struct intel_device_info intel_valleyview_info = {
> - .gen = BIT(6),
> + .graphics_ver = 7,
> + .display_ver = 7,
> .is_valleyview = true,
> .codename = "valleyview"
> };
>
> #define HASWELL_FIELDS \
> - .gen = BIT(6), \
> + .graphics_ver = 7, \
> + .display_ver = 7, \
> .is_haswell = true, \
> .codename = "haswell"
>
> @@ -171,7 +197,8 @@ static const struct intel_device_info intel_haswell_gt3_info = {
> };
>
> #define BROADWELL_FIELDS \
> - .gen = BIT(7), \
> + .graphics_ver = 8, \
> + .display_ver = 8, \
> .is_broadwell = true, \
> .codename = "broadwell"
>
> @@ -195,13 +222,15 @@ static const struct intel_device_info intel_broadwell_unknown_info = {
> };
>
> static const struct intel_device_info intel_cherryview_info = {
> - .gen = BIT(7),
> + .graphics_ver = 8,
> + .display_ver = 8,
> .is_cherryview = true,
> .codename = "cherryview"
> };
>
> #define SKYLAKE_FIELDS \
> - .gen = BIT(8), \
> + .graphics_ver = 9, \
> + .display_ver = 9, \
> .codename = "skylake", \
> .is_skylake = true
>
> @@ -226,13 +255,15 @@ static const struct intel_device_info intel_skylake_gt4_info = {
> };
>
> static const struct intel_device_info intel_broxton_info = {
> - .gen = BIT(8),
> + .graphics_ver = 9,
> + .display_ver = 9,
> .is_broxton = true,
> .codename = "broxton"
> };
>
> #define KABYLAKE_FIELDS \
> - .gen = BIT(8), \
> + .graphics_ver = 9, \
> + .display_ver = 9, \
> .is_kabylake = true, \
> .codename = "kabylake"
>
> @@ -257,13 +288,15 @@ static const struct intel_device_info intel_kabylake_gt4_info = {
> };
>
> static const struct intel_device_info intel_geminilake_info = {
> - .gen = BIT(8),
> + .graphics_ver = 9,
> + .display_ver = 9,
> .is_geminilake = true,
> .codename = "geminilake"
> };
>
> #define COFFEELAKE_FIELDS \
> - .gen = BIT(8), \
> + .graphics_ver = 9, \
> + .display_ver = 9, \
> .is_coffeelake = true, \
> .codename = "coffeelake"
>
> @@ -283,7 +316,8 @@ static const struct intel_device_info intel_coffeelake_gt3_info = {
> };
>
> #define COMETLAKE_FIELDS \
> - .gen = BIT(8), \
> + .graphics_ver = 9, \
> + .display_ver = 9, \
> .is_cometlake = true, \
> .codename = "cometlake"
>
> @@ -298,57 +332,66 @@ static const struct intel_device_info intel_cometlake_gt2_info = {
> };
>
> static const struct intel_device_info intel_cannonlake_info = {
> - .gen = BIT(9),
> + .graphics_ver = 10,
> + .display_ver = 10,
> .is_cannonlake = true,
> .codename = "cannonlake"
> };
>
> static const struct intel_device_info intel_icelake_info = {
> - .gen = BIT(10),
> + .graphics_ver = 11,
> + .display_ver = 11,
> .is_icelake = true,
> .codename = "icelake"
> };
>
> static const struct intel_device_info intel_elkhartlake_info = {
> - .gen = BIT(10),
> + .graphics_ver = 11,
> + .display_ver = 11,
> .is_elkhartlake = true,
> .codename = "elkhartlake"
> };
>
> static const struct intel_device_info intel_jasperlake_info = {
> - .gen = BIT(10),
> + .graphics_ver = 11,
> + .display_ver = 11,
> .is_jasperlake = true,
> .codename = "jasperlake"
> };
>
> static const struct intel_device_info intel_tigerlake_gt1_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_tigerlake = true,
> .codename = "tigerlake",
> .gt = 1,
> };
>
> static const struct intel_device_info intel_tigerlake_gt2_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_tigerlake = true,
> .codename = "tigerlake",
> .gt = 2,
> };
>
> static const struct intel_device_info intel_rocketlake_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_rocketlake = true,
> .codename = "rocketlake"
> };
>
> static const struct intel_device_info intel_dg1_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_dg1 = true,
> .codename = "dg1"
> };
>
> static const struct intel_device_info intel_alderlake_s_info = {
> - .gen = BIT(11),
> + .graphics_ver = 12,
> + .display_ver = 12,
> .is_alderlake_s = true,
> .codename = "alderlake_s"
> };
> @@ -490,5 +533,5 @@ out:
> */
> unsigned intel_gen(uint16_t devid)
> {
> - return ffs(intel_get_device_info(devid)->gen) ?: -1u;
> + return intel_get_device_info(devid)->graphics_ver ?: -1u;
> }
> diff --git a/tests/i915/gem_exec_store.c b/tests/i915/gem_exec_store.c
> index 99ffc9ab..2df0b27f 100644
> --- a/tests/i915/gem_exec_store.c
> +++ b/tests/i915/gem_exec_store.c
> @@ -310,7 +310,7 @@ static int print_welcome(int fd)
> int err;
>
> igt_info("Running on %s (pci-id %04x, gen %d)\n",
> - info->codename, devid, ffs(info->gen));
> + info->codename, devid, info->graphics_ver);
> igt_info("Can use MI_STORE_DWORD(virtual)? %s\n",
> gem_can_store_dword(fd, 0) ? "yes" : "no");
>
> @@ -320,7 +320,7 @@ static int print_welcome(int fd)
> igt_info("GPU operation? %s [errno=%d]\n",
> err == 0 ? "yes" : "no", err);
>
> - return ffs(info->gen);
> + return info->graphics_ver;
> }
>
> #define test_each_engine(T, i915, e) \
> diff --git a/tests/i915/i915_pciid.c b/tests/i915/i915_pciid.c
> index fe4db405..7de44ff2 100644
> --- a/tests/i915/i915_pciid.c
> +++ b/tests/i915/i915_pciid.c
> @@ -49,13 +49,13 @@ static bool has_known_intel_chipset(int fd)
> return false;
> }
>
> - if (!info->gen) {
> + if (!info->graphics_ver) {
> igt_warn("Unknown PCI-ID: %04x\n", devid);
> return false;
> }
>
> igt_info("PCI-ID: %#04x, gen %d, %s\n",
> - devid, ffs(info->gen), info->codename);
> + devid, info->graphics_ver, info->codename);
> return true;
> }
>
> diff --git a/tools/i915-perf/i915_perf_configs.c b/tools/i915-perf/i915_perf_configs.c
> index 2a0283c9..bce3bd0f 100644
> --- a/tools/i915-perf/i915_perf_configs.c
> +++ b/tools/i915-perf/i915_perf_configs.c
> @@ -228,7 +228,7 @@ main(int argc, char *argv[])
> return EXIT_FAILURE;
> }
>
> - fprintf(stdout, "Device gen=%i gt=%i\n", devinfo->gen, devinfo->gt);
> + fprintf(stdout, "Device graphics_ver=%i gt=%i\n", devinfo->graphics_ver, devinfo->gt);
>
> perf = intel_perf_for_fd(drm_fd);
> if (!perf) {
> diff --git a/tools/i915-perf/i915_perf_reader.c b/tools/i915-perf/i915_perf_reader.c
> index 3e4a6530..e51f5a5d 100644
> --- a/tools/i915-perf/i915_perf_reader.c
> +++ b/tools/i915-perf/i915_perf_reader.c
> @@ -220,8 +220,9 @@ main(int argc, char *argv[])
>
> devinfo = intel_get_device_info(reader.devinfo.devid);
>
> - fprintf(stdout, "Recorded on device=0x%x(%s) gen=%i\n",
> - reader.devinfo.devid, devinfo->codename, reader.devinfo.gen);
> + fprintf(stdout, "Recorded on device=0x%x(%s) graphics_ver=%i\n",
> + reader.devinfo.devid, devinfo->codename,
> + reader.devinfo.graphics_ver);
> fprintf(stdout, "Metric used : %s (%s) uuid=%s\n",
> reader.metric_set->symbol_name, reader.metric_set->name,
> reader.metric_set->hw_config_guid);
> diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
> index 3a8ee46a..00195290 100644
> --- a/tools/i915-perf/i915_perf_recorder.c
> +++ b/tools/i915-perf/i915_perf_recorder.c
> @@ -317,14 +317,14 @@ get_device_timestamp_frequency(const struct intel_device_info *devinfo, int drm_
> if (perf_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0)
> return timestamp_frequency;
>
> - if (devinfo->gen > 9) {
> + if (devinfo->graphics_ver > 9) {
> fprintf(stderr, "Unable to query timestamp frequency from i915, please update kernel.\n");
> return 0;
> }
>
> fprintf(stderr, "Warning: unable to query timestamp frequency from i915, guessing values...\n");
>
> - if (devinfo->gen <= 8)
> + if (devinfo->graphics_ver <= 8)
Nit but I guess would be better to have a prior patch changing those cases that was using devinfo->gen wrongly and change those to intel_gen().
So a future bisect will point to the prior patch for this places that had bugs.
> return 12500000;
> if (devinfo->is_broxton)
> return 19200000;
> @@ -878,7 +878,7 @@ main(int argc, char *argv[])
> }
>
> fprintf(stdout, "Device name=%s gen=%i gt=%i id=0x%x\n",
> - ctx.devinfo->codename, ctx.devinfo->gen, ctx.devinfo->gt, ctx.devid);
> + ctx.devinfo->codename, ctx.devinfo->graphics_ver, ctx.devinfo->gt, ctx.devid);
>
> ctx.topology = get_topology(ctx.drm_fd, &ctx.topology_size);
> if (!ctx.topology) {
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/6] lib/i915: Add intel_display_ver() and use it in display tests/libs
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 2/6] lib/i915: Add intel_display_ver() and use it in display tests/libs Matt Roper
@ 2021-06-05 0:43 ` Souza, Jose
0 siblings, 0 replies; 26+ messages in thread
From: Souza, Jose @ 2021-06-05 0:43 UTC (permalink / raw)
To: igt-dev, Roper, Matthew D
On Fri, 2021-06-04 at 13:39 -0700, Matt Roper wrote:
> Display code should check the display version of the platform rather
> than the graphics version; on some platforms these versions won't be the
> same.
>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> lib/igt_draw.c | 12 ++++++------
> lib/igt_fb.c | 14 +++++++-------
> lib/intel_chipset.h | 1 +
> lib/intel_device_info.c | 14 ++++++++++++++
> tests/kms_atomic_transition.c | 2 +-
> tests/kms_big_fb.c | 10 +++++-----
> tests/kms_ccs.c | 2 +-
> tests/kms_draw_crc.c | 2 +-
> tests/kms_flip_scaled_crc.c | 2 +-
> tests/kms_flip_tiling.c | 2 +-
> tests/kms_frontbuffer_tracking.c | 4 ++--
> tests/kms_getfb.c | 2 +-
> tests/kms_hdmi_inject.c | 2 +-
> tests/kms_panel_fitting.c | 2 +-
> tests/kms_plane.c | 2 +-
> tests/kms_plane_lowres.c | 4 ++--
> tests/kms_plane_scaling.c | 8 ++++----
> tests/kms_rotation_crc.c | 8 ++++----
> tests/kms_universal_plane.c | 2 +-
> 19 files changed, 55 insertions(+), 40 deletions(-)
>
> diff --git a/lib/igt_draw.c b/lib/igt_draw.c
> index a3144b50..295de022 100644
> --- a/lib/igt_draw.c
> +++ b/lib/igt_draw.c
> @@ -339,7 +339,7 @@ static void draw_rect_mmap_cpu(int fd, struct buf_data *buf, struct rect *rect,
>
> /* We didn't implement suport for the older tiling methods yet. */
> if (tiling != I915_TILING_NONE)
> - igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5);
> + igt_require(intel_display_ver(intel_get_drm_devid(fd)) >= 5);
>
> ptr = gem_mmap__cpu(fd, buf->handle, 0, PAGE_ALIGN(buf->size),
> PROT_READ | PROT_WRITE);
> @@ -389,7 +389,7 @@ static void draw_rect_mmap_wc(int fd, struct buf_data *buf, struct rect *rect,
>
> /* We didn't implement suport for the older tiling methods yet. */
> if (tiling != I915_TILING_NONE)
> - igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5);
> + igt_require(intel_display_ver(intel_get_drm_devid(fd)) >= 5);
>
> ptr = gem_mmap__wc(fd, buf->handle, 0, PAGE_ALIGN(buf->size),
> PROT_READ | PROT_WRITE);
> @@ -440,7 +440,7 @@ static void draw_rect_pwrite_tiled(int fd, struct buf_data *buf,
> int pixels_written = 0;
>
> /* We didn't implement suport for the older tiling methods yet. */
> - igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5);
> + igt_require(intel_display_ver(intel_get_drm_devid(fd)) >= 5);
>
> pixel_size = buf->bpp / 8;
> tmp_size = sizeof(tmp) / pixel_size;
> @@ -536,7 +536,7 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
> struct intel_buf *dst;
> int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth;
> uint32_t devid = intel_get_drm_devid(fd);
> - int gen = intel_gen(devid);
> + int ver = intel_display_ver(devid);
> int pitch;
>
> dst = create_buf(fd, cmd_data->bops, buf, tiling);
> @@ -557,9 +557,9 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
> igt_assert(false);
> }
>
> - blt_cmd_len = (gen >= 8) ? 0x5 : 0x4;
> + blt_cmd_len = (ver >= 8) ? 0x5 : 0x4;
> blt_cmd_tiling = (tiling) ? XY_COLOR_BLT_TILED : 0;
> - pitch = (gen >= 4 && tiling) ? buf->stride / 4 : buf->stride;
> + pitch = (ver >= 4 && tiling) ? buf->stride / 4 : buf->stride;
>
> switch_blt_tiling(ibb, tiling, true);
draw_rect_blt() don't look like it should check display version, it is using gen/ver to check handle differences in the blt instruction.
>
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 3e6841fd..585ede38 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -408,7 +408,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
> break;
> case LOCAL_I915_FORMAT_MOD_X_TILED:
> igt_require_intel(fd);
> - if (intel_gen(intel_get_drm_devid(fd)) == 2) {
> + if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
> *width_ret = 128;
> *height_ret = 16;
> } else {
> @@ -422,7 +422,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
> case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
> case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
> igt_require_intel(fd);
> - if (intel_gen(intel_get_drm_devid(fd)) == 2) {
> + if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
> *width_ret = 128;
> *height_ret = 16;
> } else if (IS_915(intel_get_drm_devid(fd))) {
> @@ -693,7 +693,7 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
>
> if (fb->modifier != LOCAL_DRM_FORMAT_MOD_NONE &&
> is_i915_device(fb->fd) &&
> - intel_gen(intel_get_drm_devid(fb->fd)) <= 3) {
> + intel_display_ver(intel_get_drm_devid(fb->fd)) <= 3) {
> uint32_t stride;
>
> /* Round the tiling up to the next power-of-two and the region
> @@ -758,7 +758,7 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
> {
> if (fb->modifier != LOCAL_DRM_FORMAT_MOD_NONE &&
> is_i915_device(fb->fd) &&
> - intel_gen(intel_get_drm_devid(fb->fd)) <= 3) {
> + intel_display_ver(intel_get_drm_devid(fb->fd)) <= 3) {
> uint64_t min_size = (uint64_t) fb->strides[plane] *
> fb->plane_height[plane];
> uint64_t size;
> @@ -2118,12 +2118,12 @@ struct fb_blit_upload {
>
> static bool fast_blit_ok(const struct igt_fb *fb)
> {
> - int gen = intel_gen(intel_get_drm_devid(fb->fd));
> + int ver = intel_display_ver(intel_get_drm_devid(fb->fd));
>
> - if (gen < 9)
> + if (ver < 9)
> return false;
>
> - if (gen < 12)
> + if (ver < 12)
> return true;
>
> return fb->modifier != I915_FORMAT_MOD_X_TILED;
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index 8e81ffa9..87b3bbc4 100644
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -84,6 +84,7 @@ struct intel_device_info {
> const struct intel_device_info *intel_get_device_info(uint16_t devid) __attribute__((pure));
>
> unsigned intel_gen(uint16_t devid) __attribute__((pure));
> +unsigned intel_display_ver(uint16_t devid) __attribute__((pure));
>
> extern enum pch_type intel_pch;
>
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 4ab236e4..0c09f5cd 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -535,3 +535,17 @@ unsigned intel_gen(uint16_t devid)
> {
> return intel_get_device_info(devid)->graphics_ver ?: -1u;
> }
> +
> +/**
> + * intel_display_ver:
> + * @devid: pci device id
> + *
> + * Computes the Intel GFX display version for the given device id.
> + *
> + * Returns:
> + * The display version on successful lookup, -1u on failure.
> + */
> +unsigned intel_display_ver(uint16_t devid)
> +{
> + return intel_get_device_info(devid)->display_ver ?: -1u;
> +}
> diff --git a/tests/kms_atomic_transition.c b/tests/kms_atomic_transition.c
> index d8085ef3..f4131071 100644
> --- a/tests/kms_atomic_transition.c
> +++ b/tests/kms_atomic_transition.c
> @@ -141,7 +141,7 @@ static bool skip_plane(data_t *data, igt_plane_t *plane)
> if (plane->type == DRM_PLANE_TYPE_CURSOR)
> return false;
>
> - if (intel_gen(intel_get_drm_devid(data->drm_fd)) < 11)
> + if (intel_display_ver(intel_get_drm_devid(data->drm_fd)) < 11)
> return false;
>
> /*
> diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c
> index b35727a0..81bf0542 100644
> --- a/tests/kms_big_fb.c
> +++ b/tests/kms_big_fb.c
> @@ -153,7 +153,7 @@ static bool size_ok(data_t *data, uint64_t size)
> * The kernel limits scanout to the
> * mappable portion of ggtt on gmch platforms.
> */
> - if ((intel_gen(data->devid) < 5 ||
> + if ((intel_display_ver(data->devid) < 5 ||
> IS_VALLEYVIEW(data->devid) ||
> IS_CHERRYVIEW(data->devid)) &&
> size > data->mappable_size / 2)
> @@ -182,7 +182,7 @@ static void max_fb_size(data_t *data, int *width, int *height,
> *height = data->max_fb_height;
>
> /* max fence stride is only 8k bytes on gen3 */
> - if (intel_gen(data->devid) < 4 &&
> + if (intel_display_ver(data->devid) < 4 &&
> format == DRM_FORMAT_XRGB8888)
> *width = min(*width, 8192 / 4);
>
> @@ -553,7 +553,7 @@ test_addfb(data_t *data)
> * max fb size of 4k pixels, hence we can't test
> * with 32bpp and must use 16bpp instead.
> */
> - if (intel_gen(data->devid) == 3)
> + if (intel_display_ver(data->devid) == 3)
> format = DRM_FORMAT_RGB565;
> else
> format = DRM_FORMAT_XRGB8888;
> @@ -570,7 +570,7 @@ test_addfb(data_t *data)
> bo = gem_create(data->drm_fd, size);
> igt_require(bo);
>
> - if (intel_gen(data->devid) < 4)
> + if (intel_display_ver(data->devid) < 4)
> gem_set_tiling(data->drm_fd, bo,
> igt_fb_mod_to_tiling(data->modifier), strides[0]);
>
> @@ -660,7 +660,7 @@ igt_main
> * On gen2 we could use either, but let's go for the
> * blitter there as well.
> */
> - if (intel_gen(data.devid) >= 4)
> + if (intel_display_ver(data.devid) >= 4)
> data.render_copy = igt_get_render_copyfunc(data.devid);
>
> data.bops = buf_ops_create(data.drm_fd);
> diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
> index 01e3b979..a3eac1f8 100644
> --- a/tests/kms_ccs.c
> +++ b/tests/kms_ccs.c
> @@ -573,7 +573,7 @@ igt_main_args("cs:", NULL, help_str, opt_handler, &data)
> igt_fixture {
> data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
>
> - igt_require(intel_gen(intel_get_drm_devid(data.drm_fd)) >= 9);
> + igt_require(intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 9);
> kmstest_set_vt_graphics_mode();
> igt_require_pipe_crc(data.drm_fd);
>
> diff --git a/tests/kms_draw_crc.c b/tests/kms_draw_crc.c
> index e1fdcef6..dcda2e04 100644
> --- a/tests/kms_draw_crc.c
> +++ b/tests/kms_draw_crc.c
> @@ -245,7 +245,7 @@ static void fill_fb_subtest(void)
> get_fill_crc(LOCAL_I915_FORMAT_MOD_X_TILED, &crc);
> igt_assert_crc_equal(&crc, &base_crc);
>
> - if (intel_gen(intel_get_drm_devid(drm_fd)) >= 9) {
> + if (intel_display_ver(intel_get_drm_devid(drm_fd)) >= 9) {
> get_fill_crc(LOCAL_I915_FORMAT_MOD_Y_TILED, &crc);
> igt_assert_crc_equal(&crc, &base_crc);
> }
> diff --git a/tests/kms_flip_scaled_crc.c b/tests/kms_flip_scaled_crc.c
> index bb796caf..d81ad352 100644
> --- a/tests/kms_flip_scaled_crc.c
> +++ b/tests/kms_flip_scaled_crc.c
> @@ -261,7 +261,7 @@ igt_main
>
> igt_fixture {
> data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
> - data.gen = intel_gen(intel_get_drm_devid(data.drm_fd));
> + data.gen = intel_display_ver(intel_get_drm_devid(data.drm_fd));
> igt_require(data.gen >= 9);
> igt_display_require(&data.display, data.drm_fd);
> igt_require(data.display.is_atomic);
> diff --git a/tests/kms_flip_tiling.c b/tests/kms_flip_tiling.c
> index 09e99580..573cc337 100644
> --- a/tests/kms_flip_tiling.c
> +++ b/tests/kms_flip_tiling.c
> @@ -155,7 +155,7 @@ igt_main
> {
> igt_fixture {
> data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
> - data.gen = intel_gen(intel_get_drm_devid(data.drm_fd));
> + data.gen = intel_display_ver(intel_get_drm_devid(data.drm_fd));
>
> data.testformat = DRM_FORMAT_XRGB8888;
>
> diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
> index 906caa4c..97902c08 100644
> --- a/tests/kms_frontbuffer_tracking.c
> +++ b/tests/kms_frontbuffer_tracking.c
> @@ -2647,7 +2647,7 @@ static void scaledprimary_subtest(const struct test_mode *t)
> struct igt_fb new_fb, *old_fb;
> struct modeset_params *params = pick_params(t);
> struct fb_region *reg = ¶ms->primary;
> - int gen = intel_gen(intel_get_drm_devid(drm.fd));
> + int gen = intel_display_ver(intel_get_drm_devid(drm.fd));
> int src_y_upscale = ALIGN(reg->h / 4, 4);
>
> igt_require_f(gen >= 9,
> @@ -2831,7 +2831,7 @@ static void farfromfence_subtest(const struct test_mode *t)
> struct draw_pattern_info *pattern = &pattern1;
> struct fb_region *target;
> int max_height, assertions = 0;
> - int gen = intel_gen(intel_get_drm_devid(drm.fd));
> + int gen = intel_display_ver(intel_get_drm_devid(drm.fd));
>
> igt_skip_on(t->method == IGT_DRAW_MMAP_GTT &&
> !gem_has_mappable_ggtt(drm.fd));
> diff --git a/tests/kms_getfb.c b/tests/kms_getfb.c
> index 917b57bb..14be74d6 100644
> --- a/tests/kms_getfb.c
> +++ b/tests/kms_getfb.c
> @@ -92,7 +92,7 @@ static void get_ccs_fb(int fd, struct drm_mode_fb_cmd2 *ret)
> igt_require(has_addfb2_iface(fd));
> igt_require_intel(fd);
>
> - if ((intel_gen(intel_get_drm_devid(fd))) >= 12) {
> + if ((intel_display_ver(intel_get_drm_devid(fd))) >= 12) {
> add.modifier[0] = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
> add.modifier[1] = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
>
> diff --git a/tests/kms_hdmi_inject.c b/tests/kms_hdmi_inject.c
> index 1769df08..b47b8a39 100644
> --- a/tests/kms_hdmi_inject.c
> +++ b/tests/kms_hdmi_inject.c
> @@ -87,7 +87,7 @@ hdmi_inject_4k(int drm_fd, drmModeConnector *connector)
> devid = intel_get_drm_devid(drm_fd);
>
> /* 4K requires at least HSW */
> - igt_require(IS_HASWELL(devid) || intel_gen(devid) >= 8);
> + igt_require(IS_HASWELL(devid) || intel_display_ver(devid) >= 8);
>
> edid = igt_kms_get_4k_edid();
> kmstest_force_edid(drm_fd, connector, edid);
> diff --git a/tests/kms_panel_fitting.c b/tests/kms_panel_fitting.c
> index 1623f34e..3e42d148 100644
> --- a/tests/kms_panel_fitting.c
> +++ b/tests/kms_panel_fitting.c
> @@ -243,7 +243,7 @@ static void test_atomic_fastset(data_t *data)
> if (stat("/sys/module/i915/parameters/fastboot", &sb) == 0)
> igt_set_module_param_int(data->drm_fd, "fastboot", 1);
>
> - igt_require(intel_gen(intel_get_drm_devid(display->drm_fd)) >= 5);
> + igt_require(intel_display_ver(intel_get_drm_devid(display->drm_fd)) >= 5);
> }
>
> igt_require(display->is_atomic);
> diff --git a/tests/kms_plane.c b/tests/kms_plane.c
> index d7cbe892..ba419bbd 100644
> --- a/tests/kms_plane.c
> +++ b/tests/kms_plane.c
> @@ -999,7 +999,7 @@ static bool skip_plane(data_t *data, igt_plane_t *plane)
> if (plane->type == DRM_PLANE_TYPE_CURSOR)
> return false;
>
> - if (intel_gen(intel_get_drm_devid(data->drm_fd)) < 11)
> + if (intel_display_ver(intel_get_drm_devid(data->drm_fd)) < 11)
> return false;
>
> /*
> diff --git a/tests/kms_plane_lowres.c b/tests/kms_plane_lowres.c
> index a4def89f..7fd02180 100644
> --- a/tests/kms_plane_lowres.c
> +++ b/tests/kms_plane_lowres.c
> @@ -80,14 +80,14 @@ static igt_plane_t *first_sdr_plane(igt_output_t *output, uint32_t devid)
> {
> int index;
>
> - index = intel_gen(devid) <= 9 ? 0 : SDR_PLANE_BASE;
> + index = intel_display_ver(devid) <= 9 ? 0 : SDR_PLANE_BASE;
>
> return igt_output_get_plane(output, index);
> }
>
> static bool is_sdr_plane(const igt_plane_t *plane, uint32_t devid)
> {
> - if (intel_gen(devid) <= 9)
> + if (intel_display_ver(devid) <= 9)
> return true;
>
> return plane->index >= SDR_PLANE_BASE;
> diff --git a/tests/kms_plane_scaling.c b/tests/kms_plane_scaling.c
> index 7464b5bd..2aa46ac8 100644
> --- a/tests/kms_plane_scaling.c
> +++ b/tests/kms_plane_scaling.c
> @@ -52,9 +52,9 @@ static int get_num_scalers(data_t* d, enum pipe pipe)
> if (!is_i915_device(d->drm_fd))
> return 1;
>
> - igt_require(intel_gen(d->devid) >= 9);
> + igt_require(intel_display_ver(d->devid) >= 9);
>
> - if (intel_gen(d->devid) >= 10)
> + if (intel_display_ver(d->devid) >= 10)
> return 2;
> else if (pipe != PIPE_C)
> return 2;
> @@ -167,7 +167,7 @@ static bool can_rotate(data_t *d, unsigned format, uint64_t tiling,
>
> switch (format) {
> case DRM_FORMAT_RGB565:
> - if (intel_gen(d->devid) >= 11)
> + if (intel_display_ver(d->devid) >= 11)
> break;
> /* fall through */
> case DRM_FORMAT_C8:
> @@ -198,7 +198,7 @@ static bool can_scale(data_t *d, unsigned format)
> case DRM_FORMAT_XBGR16161616F:
> case DRM_FORMAT_ARGB16161616F:
> case DRM_FORMAT_ABGR16161616F:
> - if (intel_gen(d->devid) >= 11)
> + if (intel_display_ver(d->devid) >= 11)
> return true;
> /* fall through */
> case DRM_FORMAT_C8:
> diff --git a/tests/kms_rotation_crc.c b/tests/kms_rotation_crc.c
> index bcbb9bdc..20556c82 100644
> --- a/tests/kms_rotation_crc.c
> +++ b/tests/kms_rotation_crc.c
> @@ -517,7 +517,7 @@ static void test_plane_rotation(data_t *data, int plane_type, bool test_bad_form
> /* Only support partial covering primary plane on gen9+ */
> if (is_amdgpu_device(data->gfx_fd) ||
> (plane_type == DRM_PLANE_TYPE_PRIMARY &&
> - intel_gen(intel_get_drm_devid(data->gfx_fd)) < 9)) {
> + intel_display_ver(intel_get_drm_devid(data->gfx_fd)) < 9)) {
> if (i != rectangle)
> continue;
> else
> @@ -730,12 +730,12 @@ static void test_multi_plane_rotation(data_t *data, enum pipe pipe)
> */
> if (p[0].format == DRM_FORMAT_RGB565 &&
> (planeconfigs[i].rotation & (IGT_ROTATION_90 | IGT_ROTATION_270))
> - && intel_gen(data->devid) < 11)
> + && intel_display_ver(data->devid) < 11)
> continue;
>
> if (p[1].format == DRM_FORMAT_RGB565 &&
> (planeconfigs[j].rotation & (IGT_ROTATION_90 | IGT_ROTATION_270))
> - && intel_gen(data->devid) < 11)
> + && intel_display_ver(data->devid) < 11)
> continue;
> /*
> * if using packed formats crc's will be
> @@ -1024,7 +1024,7 @@ igt_main_args("", long_opts, help_str, opt_handler, &data)
> data.gfx_fd = drm_open_driver_master(DRIVER_INTEL | DRIVER_AMDGPU);
> if (is_i915_device(data.gfx_fd)) {
> data.devid = intel_get_drm_devid(data.gfx_fd);
> - gen = intel_gen(data.devid);
> + gen = intel_display_ver(data.devid);
> }
>
> kmstest_set_vt_graphics_mode();
> diff --git a/tests/kms_universal_plane.c b/tests/kms_universal_plane.c
> index aae3fc52..26e5e8eb 100644
> --- a/tests/kms_universal_plane.c
> +++ b/tests/kms_universal_plane.c
> @@ -798,7 +798,7 @@ igt_main
>
> igt_fixture {
> data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
> - data.gen = intel_gen(intel_get_drm_devid(data.drm_fd));
> + data.gen = intel_display_ver(intel_get_drm_devid(data.drm_fd));
would be better rename data.gen too.
With those two changes:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> kmstest_set_vt_graphics_mode();
>
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 6/6] lib/i915: Add ADL-P plane offset restriction for CCS framebuffers
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 6/6] lib/i915: Add ADL-P plane offset restriction for CCS framebuffers Matt Roper
@ 2021-06-05 0:46 ` Souza, Jose
0 siblings, 0 replies; 26+ messages in thread
From: Souza, Jose @ 2021-06-05 0:46 UTC (permalink / raw)
To: igt-dev, Roper, Matthew D
On Fri, 2021-06-04 at 13:39 -0700, Matt Roper wrote:
> From: Imre Deak <imre.deak@intel.com>
>
> All DPT FB plane offsets must be 2MB-aligned. The kernel takes care of
> aligning the offset for non-CCS framebuffers. Make sure that the
> allocated CCS FB layout meets the alignment requirement.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> lib/igt_fb.c | 26 ++++++++++++++++++++++++--
> 1 file changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index ce2aa6ce..ab52ea9f 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -804,11 +804,23 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
> return (uint64_t) fb->strides[plane] *
> ALIGN(fb->plane_height[plane], tile_height);
> } else if (is_gen12_ccs_plane(fb, plane)) {
> + uint64_t size;
> +
> /* The AUX CCS surface must be page aligned */
> - return (uint64_t)fb->strides[plane] *
> + size = (uint64_t)fb->strides[plane] *
> ALIGN(fb->plane_height[plane], 64);
> +
> + /*
> + * On ADL_P CCS color planes must be 2MB aligned, until remapping
> + * support is added for CCS FBs.
> + */
> + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> + size = ALIGN(size, 2 * 1024 * 1024);
> +
> + return size;
> } else {
> unsigned int tile_width, tile_height;
> + uint64_t size;
>
> igt_get_fb_tile_size(fb->fd, fb->modifier, fb->plane_bpp[plane],
> &tile_width, &tile_height);
> @@ -817,8 +829,18 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
> if (is_gen12_ccs_modifier(fb->modifier))
> tile_height *= 4;
>
> - return (uint64_t) fb->strides[plane] *
> + size = (uint64_t)fb->strides[plane] *
> ALIGN(fb->plane_height[plane], tile_height);
> +
> + /*
> + * On ADL_P CCS color planes must be 2MB aligned, until remapping
> + * support is added for CCS FBs.
> + */
> + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
> + is_ccs_modifier(fb->modifier))
> + size = ALIGN(size, 2 * 1024 * 1024);
> +
> + return size;
> }
> }
>
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P (rev2)
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (7 preceding siblings ...)
2021-06-04 20:53 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
@ 2021-06-05 5:13 ` Patchwork
2021-06-05 5:14 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
` (4 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2021-06-05 5:13 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev
== Series Details ==
Series: Split display/graphics versions and add ADL-P (rev2)
URL : https://patchwork.freedesktop.org/series/91040/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
1fbc1e7d602f96a7f4e2b95057eef994656b8e74 i915/gem_exec_schedule: Check for timeslicing
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:41:2: note: (near initialization for ‘intel_device_match[301].device_id’)
0x030000, 0xff0000, \
^~~~~~~~
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:41:12: warning: excess elements in scalar initializer
0x030000, 0xff0000, \
^~~~~~~~
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:41:12: note: (near initialization for ‘intel_device_match[301].device_id’)
0x030000, 0xff0000, \
^~~~~~~~
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:42:2: warning: excess elements in scalar initializer
(unsigned long) info }
^
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:42:2: note: (near initialization for ‘intel_device_match[301].device_id’)
(unsigned long) info }
^
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: warning for Split display/graphics versions and add ADL-P (rev2)
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (8 preceding siblings ...)
2021-06-05 5:13 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P (rev2) Patchwork
@ 2021-06-05 5:14 ` Patchwork
2021-06-05 18:53 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P (rev3) Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2021-06-05 5:14 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev
== Series Details ==
Series: Split display/graphics versions and add ADL-P (rev2)
URL : https://patchwork.freedesktop.org/series/91040/
State : warning
== Summary ==
Pipeline status: FAILED.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/332888 for the overview.
build:tests-debian-meson has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492651):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622870024:step_script
section_start:1622870024:cleanup_file_variables
Cleaning up file based variables
section_end:1622870025:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-arm64 has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492654):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622870028:step_script
section_start:1622870028:cleanup_file_variables
Cleaning up file based variables
section_end:1622870029:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-armhf has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492653):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622870025:step_script
section_start:1622870025:cleanup_file_variables
Cleaning up file based variables
section_end:1622870026:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-mips has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492655):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622870029:step_script
section_start:1622870029:cleanup_file_variables
Cleaning up file based variables
section_end:1622870030:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-minimal has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492652):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622870028:step_script
section_start:1622870028:cleanup_file_variables
Cleaning up file based variables
section_end:1622870029:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492646):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622870026:step_script
section_start:1622870026:cleanup_file_variables
Cleaning up file based variables
section_end:1622870028:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-clang has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492650):
#define PCI_MATCH_ANY (~0U)
^~~~~
../lib/i915_pciids.h:39:10: note: expanded from macro 'INTEL_VGA_DEVICE'
0x8086, id, \
^~
../lib/intel_device_info.c:497:2: error: suggest braces around initialization of subobject [-Werror,-Wmissing-braces]
INTEL_ADLP_IDS(&intel_alderlake_p_info),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{
../lib/intel_device_info.c:497:2: error: initializer element is not a compile-time constant
INTEL_ADLP_IDS(&intel_alderlake_p_info),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning and 3 errors generated.
ninja: build stopped: subcommand failed.
section_end:1622870035:step_script
section_start:1622870035:cleanup_file_variables
Cleaning up file based variables
section_end:1622870036:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-no-libdrm-nouveau has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492649):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622870029:step_script
section_start:1622870029:cleanup_file_variables
Cleaning up file based variables
section_end:1622870030:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-no-libunwind has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492647):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622870029:step_script
section_start:1622870029:cleanup_file_variables
Cleaning up file based variables
section_end:1622870030:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-oldest-meson has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10492648):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622870028:step_script
section_start:1622870028:cleanup_file_variables
Cleaning up file based variables
section_end:1622870029:cleanup_file_variables
ERROR: Job failed: exit code 1
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/332888
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P (rev3)
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (9 preceding siblings ...)
2021-06-05 5:14 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
@ 2021-06-05 18:53 ` Patchwork
2021-06-05 18:57 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2021-06-05 18:53 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev
== Series Details ==
Series: Split display/graphics versions and add ADL-P (rev3)
URL : https://patchwork.freedesktop.org/series/91040/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
1fbc1e7d602f96a7f4e2b95057eef994656b8e74 i915/gem_exec_schedule: Check for timeslicing
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:41:2: note: (near initialization for ‘intel_device_match[301].device_id’)
0x030000, 0xff0000, \
^~~~~~~~
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:41:12: warning: excess elements in scalar initializer
0x030000, 0xff0000, \
^~~~~~~~
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:41:12: note: (near initialization for ‘intel_device_match[301].device_id’)
0x030000, 0xff0000, \
^~~~~~~~
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:42:2: warning: excess elements in scalar initializer
(unsigned long) info }
^
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/i915_pciids.h:42:2: note: (near initialization for ‘intel_device_match[301].device_id’)
(unsigned long) info }
^
../lib/intel_device_info.c:499:2: note: in expansion of macro ‘INTEL_VGA_DEVICE’
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
^~~~~~~~~~~~~~~~
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: warning for Split display/graphics versions and add ADL-P (rev3)
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (10 preceding siblings ...)
2021-06-05 18:53 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P (rev3) Patchwork
@ 2021-06-05 18:57 ` Patchwork
2021-06-07 16:26 ` [igt-dev] ✓ Fi.CI.BAT: success for Split display/graphics versions and add ADL-P (rev4) Patchwork
2021-06-07 23:47 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
13 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2021-06-05 18:57 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev
== Series Details ==
Series: Split display/graphics versions and add ADL-P (rev3)
URL : https://patchwork.freedesktop.org/series/91040/
State : warning
== Summary ==
Pipeline status: FAILED.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/333029 for the overview.
build:tests-debian-meson has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495888):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622919258:step_script
section_start:1622919258:cleanup_file_variables
Cleaning up file based variables
section_end:1622919260:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-arm64 has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495891):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622919283:step_script
section_start:1622919283:cleanup_file_variables
Cleaning up file based variables
section_end:1622919284:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-armhf has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495890):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622919264:step_script
section_start:1622919264:cleanup_file_variables
Cleaning up file based variables
section_end:1622919265:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-mips has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495892):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622919259:step_script
section_start:1622919259:cleanup_file_variables
Cleaning up file based variables
section_end:1622919261:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-minimal has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495889):
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
static const struct pci_id_match intel_device_match[] = {
^
../lib/intel_device_info.c:497:2:
INTEL_ADLP_IDS(&intel_alderlake_p_info),
{
../lib/intel_device_info.c:500:1:
};
}
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622919263:step_script
section_start:1622919263:cleanup_file_variables
Cleaning up file based variables
section_end:1622919266:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495883):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622919285:step_script
section_start:1622919285:cleanup_file_variables
Cleaning up file based variables
section_end:1622919286:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-clang has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495887):
#define PCI_MATCH_ANY (~0U)
^~~~~
../lib/i915_pciids.h:39:10: note: expanded from macro 'INTEL_VGA_DEVICE'
0x8086, id, \
^~
../lib/intel_device_info.c:497:2: error: suggest braces around initialization of subobject [-Werror,-Wmissing-braces]
INTEL_ADLP_IDS(&intel_alderlake_p_info),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{
../lib/intel_device_info.c:497:2: error: initializer element is not a compile-time constant
INTEL_ADLP_IDS(&intel_alderlake_p_info),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning and 3 errors generated.
ninja: build stopped: subcommand failed.
section_end:1622919275:step_script
section_start:1622919275:cleanup_file_variables
Cleaning up file based variables
section_end:1622919276:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-no-libdrm-nouveau has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495886):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622919279:step_script
section_start:1622919279:cleanup_file_variables
Cleaning up file based variables
section_end:1622919284:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-no-libunwind has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495884):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622919266:step_script
section_start:1622919266:cleanup_file_variables
Cleaning up file based variables
section_end:1622919267:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-oldest-meson has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/10495885):
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
../lib/intel_device_info.c:406:57: error: missing braces around initializer [-Werror=missing-braces]
406 | static const struct pci_id_match intel_device_match[] = {
| ^
......
497 | INTEL_ADLP_IDS(&intel_alderlake_p_info),
| {
......
500 | };
| }
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1622919268:step_script
section_start:1622919268:cleanup_file_variables
Cleaning up file based variables
section_end:1622919269:cleanup_file_variables
ERROR: Job failed: exit code 1
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/333029
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 5/6] lib/i915: Add ADL-P stride restrictions for non-linear buffers
2021-06-04 20:51 ` Souza, Jose
@ 2021-06-07 7:58 ` Imre Deak
2021-06-08 3:34 ` Matt Roper
0 siblings, 1 reply; 26+ messages in thread
From: Imre Deak @ 2021-06-07 7:58 UTC (permalink / raw)
To: Souza, Jose; +Cc: igt-dev, Heikkila, Juha-pekka, Taylor, Clinton A
On Fri, Jun 04, 2021 at 11:51:51PM +0300, Souza, Jose wrote:
> Hum we can drop this change, Imre landed changes to make framebuffers
> strides power of two for adl_p, so for userspace it should be
> transparent.
Yes, it should be transparent for CCS framebuffers too, however that's a
TODO item. I suspect that kernel would need to recreate the CCS plane if
the main surface stride changes (since the layout of each CCS page would
change, so we can't just remap the CCS pages), hence left this part for
a follow-up.
So this patch is needed.
> On Fri, 2021-06-04 at 13:39 -0700, Matt Roper wrote:
> > From: José Roberto de Souza <jose.souza@intel.com>
> >
> > ADL-P tiled framebuffer strides must be power-of-two aligned and has a
> > minimum of 8 tiles. For non-CCS framebuffers the driver supports FBs not
> > meeting this requirement by remapping the framebuffer and padding the
> > stride as required, but for CCS FBs userspace must ensure the alignment.
> > Adding remap support for CCS FBs to the driver is to be done as a
> > follow-up.
> >
> > Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
> > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
> > Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > ---
> > lib/igt_fb.c | 26 +++++++++++++++++++++-----
> > 1 file changed, 21 insertions(+), 5 deletions(-)
> >
> > diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> > index 585ede38..ce2aa6ce 100644
> > --- a/lib/igt_fb.c
> > +++ b/lib/igt_fb.c
> > @@ -729,8 +729,16 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> > /* clear color always fixed to 64 bytes */
> > return 64;
> > } else if (is_gen12_ccs_plane(fb, plane)) {
> > - /* A main surface using a CCS AUX surface must be 4x4 tiles aligned. */
> > - return ALIGN(min_stride, 64);
> > + /*
> > + * A main surface using a CCS AUX surface must be 4x4 tiles
> > + * aligned. On ADL_P the minimum main surface stride is 8
> > + * tiles (2 * 64 byte on CCS surface) and it has to be POT
> > + * aligned.
> > + */
> > + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > + return roundup_power_of_two(max(min_stride, 128u));
> > + else
> > + return ALIGN(min_stride, 64);
> > } else if (!fb->modifier && is_nouveau_device(fb->fd)) {
> > int align;
> >
> > @@ -743,14 +751,22 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> > return ALIGN(min_stride, align);
> > } else {
> > unsigned int tile_width, tile_height;
> > + uint32_t stride;
> >
> > igt_get_fb_tile_size(fb->fd, fb->modifier, fb->plane_bpp[plane],
> > &tile_width, &tile_height);
> >
> > - if (is_gen12_ccs_modifier(fb->modifier))
> > - tile_width *= 4;
> > + if (is_gen12_ccs_modifier(fb->modifier)) {
> > + stride = ALIGN(min_stride, tile_width * 4);
> >
> > - return ALIGN(min_stride, tile_width);
> > + /* TODO: add support to kernel to POT align CCS format strides */
> > + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > + stride = roundup_power_of_two(max(stride, tile_width * 8));
> > + } else {
> > + stride = ALIGN(min_stride, tile_width);
> > + }
> > +
> > + return stride;
> > }
> > }
> >
>
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P
2021-06-04 21:03 ` Matt Roper
@ 2021-06-07 10:33 ` Petri Latvala
0 siblings, 0 replies; 26+ messages in thread
From: Petri Latvala @ 2021-06-07 10:33 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev
On Fri, Jun 04, 2021 at 02:03:34PM -0700, Matt Roper wrote:
> On Fri, Jun 04, 2021 at 08:50:49PM +0000, Patchwork wrote:
> > == Series Details ==
> >
> > Series: Split display/graphics versions and add ADL-P
> > URL : https://patchwork.freedesktop.org/series/91040/
> > State : failure
> >
> > == Summary ==
> >
> > IGT patchset build failed on latest successful build
> > 1fbc1e7d602f96a7f4e2b95057eef994656b8e74 i915/gem_exec_schedule: Check for timeslicing
>
> Why is this series applying/building on top of this commit instead of
> the latest from the master branch? The master branch has three
> additional commits, one of which contains the device ID's necessary to build
> this series...
Shouldn't happen again. CI was mistakenly left using anongit.fdo as
the IGT repository url and that had hiccups in its mirroring last
week. Now changed to use gitlab.
--
Petri Latvala
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Split display/graphics versions and add ADL-P (rev4)
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (11 preceding siblings ...)
2021-06-05 18:57 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
@ 2021-06-07 16:26 ` Patchwork
2021-06-07 23:47 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
13 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2021-06-07 16:26 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev
[-- Attachment #1.1: Type: text/plain, Size: 7040 bytes --]
== Series Details ==
Series: Split display/graphics versions and add ADL-P (rev4)
URL : https://patchwork.freedesktop.org/series/91040/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10187 -> IGTPW_5891
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/index.html
Known issues
------------
Here are the changes found in IGTPW_5891 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@gem_tiled_blits@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) +3 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-kbl-soraka/igt@gem_tiled_blits@basic.html
* igt@i915_selftest@live@execlists:
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][3] ([i915#2782] / [i915#3462] / [i915#794])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][4] ([i915#1886] / [i915#2291])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827]) +8 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [PASS][6] -> [FAIL][7] ([i915#1372])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#533])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@runner@aborted:
- fi-kbl-soraka: NOTRUN -> [FAIL][9] ([i915#1436] / [i915#2426] / [i915#3363])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-kbl-soraka/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-soraka: [INCOMPLETE][10] ([i915#155]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/fi-kbl-soraka/igt@gem_exec_suspend@basic-s0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-kbl-soraka/igt@gem_exec_suspend@basic-s0.html
* igt@i915_selftest@live@gt_pm:
- fi-cml-s: [DMESG-FAIL][12] ([i915#2291]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/fi-cml-s/igt@i915_selftest@live@gt_pm.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-cml-s/igt@i915_selftest@live@gt_pm.html
#### Warnings ####
* igt@i915_selftest@live@execlists:
- fi-icl-u2: [DMESG-FAIL][14] ([i915#3462]) -> [INCOMPLETE][15] ([i915#2782] / [i915#3462])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/fi-icl-u2/igt@i915_selftest@live@execlists.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-icl-u2/igt@i915_selftest@live@execlists.html
* igt@runner@aborted:
- fi-cfl-8700k: [FAIL][16] ([i915#3363]) -> [FAIL][17] ([i915#2426] / [i915#3363])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/fi-cfl-8700k/igt@runner@aborted.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-cfl-8700k/igt@runner@aborted.html
- fi-icl-u2: [FAIL][18] ([i915#2426] / [i915#2782] / [i915#3363]) -> [FAIL][19] ([i915#2782] / [i915#3363])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/fi-icl-u2/igt@runner@aborted.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-icl-u2/igt@runner@aborted.html
- fi-bxt-dsi: [FAIL][20] ([i915#3363]) -> [FAIL][21] ([i915#2426] / [i915#3363])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/fi-bxt-dsi/igt@runner@aborted.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-bxt-dsi/igt@runner@aborted.html
- fi-skl-guc: [FAIL][22] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][23] ([i915#1436] / [i915#3363])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/fi-skl-guc/igt@runner@aborted.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-skl-guc/igt@runner@aborted.html
- fi-skl-6700k2: [FAIL][24] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][25] ([i915#1436] / [i915#3363])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/fi-skl-6700k2/igt@runner@aborted.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/fi-skl-6700k2/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
[i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3462]: https://gitlab.freedesktop.org/drm/intel/issues/3462
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#794]: https://gitlab.freedesktop.org/drm/intel/issues/794
Participating hosts (49 -> 41)
------------------------------
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan bat-adlp-4 fi-ctg-p8600 fi-dg1-1 fi-bdw-samus bat-jsl-1
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_6099 -> IGTPW_5891
CI-20190529: 20190529
CI_DRM_10187: 30bc4ca43fe0e01c64e5311342993f73a91eda64 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_5891: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/index.html
IGT_6099: adb9ee4ed7206725cfe3589bf49f47f9dcf661f2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/index.html
[-- Attachment #1.2: Type: text/html, Size: 9688 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for Split display/graphics versions and add ADL-P (rev4)
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
` (12 preceding siblings ...)
2021-06-07 16:26 ` [igt-dev] ✓ Fi.CI.BAT: success for Split display/graphics versions and add ADL-P (rev4) Patchwork
@ 2021-06-07 23:47 ` Patchwork
13 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2021-06-07 23:47 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev
[-- Attachment #1.1: Type: text/plain, Size: 30270 bytes --]
== Series Details ==
Series: Split display/graphics versions and add ADL-P (rev4)
URL : https://patchwork.freedesktop.org/series/91040/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10187_full -> IGTPW_5891_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_5891_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_5891_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_5891_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_ctx_persistence@engines-hostile@vcs1:
- shard-tglb: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-tglb2/igt@gem_ctx_persistence@engines-hostile@vcs1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb5/igt@gem_ctx_persistence@engines-hostile@vcs1.html
Known issues
------------
Here are the changes found in IGTPW_5891_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-kbl: NOTRUN -> [DMESG-WARN][3] ([i915#3002])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl2/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@engines-hostile@vcs0:
- shard-iclb: [PASS][4] -> [FAIL][5] ([i915#2410])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-iclb3/igt@gem_ctx_persistence@engines-hostile@vcs0.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb7/igt@gem_ctx_persistence@engines-hostile@vcs0.html
* igt@gem_ctx_persistence@legacy-engines-hostile@bsd2:
- shard-iclb: NOTRUN -> [FAIL][6] ([i915#2410])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb1/igt@gem_ctx_persistence@legacy-engines-hostile@bsd2.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process:
- shard-snb: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-snb6/igt@gem_ctx_persistence@legacy-engines-mixed-process.html
* igt@gem_ctx_persistence@smoketest:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2896])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-tglb7/igt@gem_ctx_persistence@smoketest.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb1/igt@gem_ctx_persistence@smoketest.html
* igt@gem_exec_fair@basic-none@rcs0:
- shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-glk5/igt@gem_exec_fair@basic-none@rcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk3/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-iclb: NOTRUN -> [FAIL][12] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
- shard-glk: NOTRUN -> [FAIL][13] ([i915#2842])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
- shard-tglb: NOTRUN -> [FAIL][14] ([i915#2842])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-tglb: [PASS][15] -> [FAIL][16] ([i915#2842])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-tglb7/igt@gem_exec_fair@basic-pace@vcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb5/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_media_vme:
- shard-tglb: NOTRUN -> [SKIP][17] ([i915#284])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb5/igt@gem_media_vme.html
* igt@gem_mmap_gtt@big-copy-xy:
- shard-glk: [PASS][18] -> [FAIL][19] ([i915#307])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-glk8/igt@gem_mmap_gtt@big-copy-xy.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk4/igt@gem_mmap_gtt@big-copy-xy.html
* igt@gem_mmap_gtt@cpuset-big-copy-xy:
- shard-iclb: [PASS][20] -> [FAIL][21] ([i915#2428])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
* igt@gem_pwrite@basic-exhaustion:
- shard-snb: NOTRUN -> [WARN][22] ([i915#2658])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-snb2/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-glk: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3323])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk2/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@input-checking:
- shard-apl: NOTRUN -> [DMESG-WARN][24] ([i915#3002])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl2/igt@gem_userptr_blits@input-checking.html
* igt@gen7_exec_parse@basic-allowed:
- shard-tglb: NOTRUN -> [SKIP][25] ([fdo#109289]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb6/igt@gen7_exec_parse@basic-allowed.html
* igt@gen7_exec_parse@batch-without-end:
- shard-iclb: NOTRUN -> [SKIP][26] ([fdo#109289]) +2 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb5/igt@gen7_exec_parse@batch-without-end.html
* igt@gen9_exec_parse@bb-large:
- shard-tglb: NOTRUN -> [SKIP][27] ([i915#2527])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb2/igt@gen9_exec_parse@bb-large.html
- shard-glk: NOTRUN -> [FAIL][28] ([i915#3296])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk1/igt@gen9_exec_parse@bb-large.html
- shard-kbl: NOTRUN -> [FAIL][29] ([i915#3296])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl1/igt@gen9_exec_parse@bb-large.html
- shard-iclb: NOTRUN -> [SKIP][30] ([i915#2527])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb5/igt@gen9_exec_parse@bb-large.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-tglb: NOTRUN -> [WARN][31] ([i915#2681])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb6/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-tglb: NOTRUN -> [SKIP][32] ([fdo#111644] / [i915#1397] / [i915#2411]) +2 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb8/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@i915_pm_rpm@modeset-non-lpsp:
- shard-iclb: NOTRUN -> [SKIP][33] ([fdo#110892]) +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb4/igt@i915_pm_rpm@modeset-non-lpsp.html
* igt@i915_pm_sseu@full-enable:
- shard-tglb: NOTRUN -> [SKIP][34] ([fdo#109288])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb8/igt@i915_pm_sseu@full-enable.html
- shard-iclb: NOTRUN -> [SKIP][35] ([fdo#109288])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb2/igt@i915_pm_sseu@full-enable.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-tglb: NOTRUN -> [SKIP][36] ([fdo#109303])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb8/igt@i915_query@query-topology-known-pci-ids.html
- shard-iclb: NOTRUN -> [SKIP][37] ([fdo#109303])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb1/igt@i915_query@query-topology-known-pci-ids.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [PASS][38] -> [INCOMPLETE][39] ([i915#2782])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-snb7/igt@i915_selftest@live@hangcheck.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-snb2/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@debugfs-reader:
- shard-apl: NOTRUN -> [DMESG-WARN][40] ([i915#180])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl1/igt@i915_suspend@debugfs-reader.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][41] ([fdo#111614]) +2 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb2/igt@kms_big_fb@linear-8bpp-rotate-270.html
- shard-iclb: NOTRUN -> [SKIP][42] ([fdo#110725] / [fdo#111614]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][43] ([fdo#111615]) +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb6/igt@kms_big_fb@yf-tiled-64bpp-rotate-270.html
* igt@kms_big_joiner@invalid-modeset:
- shard-iclb: NOTRUN -> [SKIP][44] ([i915#2705])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb7/igt@kms_big_joiner@invalid-modeset.html
- shard-tglb: NOTRUN -> [SKIP][45] ([i915#2705])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb7/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_chamelium@hdmi-edid-change-during-suspend:
- shard-apl: NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +14 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl2/igt@kms_chamelium@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium@vga-frame-dump:
- shard-tglb: NOTRUN -> [SKIP][47] ([fdo#109284] / [fdo#111827]) +10 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb1/igt@kms_chamelium@vga-frame-dump.html
* igt@kms_chamelium@vga-hpd-without-ddc:
- shard-snb: NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +16 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-snb5/igt@kms_chamelium@vga-hpd-without-ddc.html
* igt@kms_color@pipe-d-ctm-0-75:
- shard-iclb: NOTRUN -> [SKIP][49] ([fdo#109278] / [i915#1149]) +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb8/igt@kms_color@pipe-d-ctm-0-75.html
* igt@kms_color_chamelium@pipe-a-ctm-0-5:
- shard-glk: NOTRUN -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +12 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk3/igt@kms_color_chamelium@pipe-a-ctm-0-5.html
* igt@kms_color_chamelium@pipe-b-ctm-0-25:
- shard-kbl: NOTRUN -> [SKIP][51] ([fdo#109271] / [fdo#111827]) +14 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl1/igt@kms_color_chamelium@pipe-b-ctm-0-25.html
* igt@kms_color_chamelium@pipe-b-gamma:
- shard-iclb: NOTRUN -> [SKIP][52] ([fdo#109284] / [fdo#111827]) +4 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb1/igt@kms_color_chamelium@pipe-b-gamma.html
* igt@kms_color_chamelium@pipe-d-ctm-green-to-red:
- shard-iclb: NOTRUN -> [SKIP][53] ([fdo#109278] / [fdo#109284] / [fdo#111827]) +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@kms_color_chamelium@pipe-d-ctm-green-to-red.html
* igt@kms_content_protection@atomic:
- shard-apl: NOTRUN -> [TIMEOUT][54] ([i915#1319]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl8/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-iclb: NOTRUN -> [SKIP][55] ([i915#3116])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@kms_content_protection@dp-mst-type-1.html
- shard-tglb: NOTRUN -> [SKIP][56] ([i915#3116])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb7/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@uevent:
- shard-kbl: NOTRUN -> [FAIL][57] ([i915#2105])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl2/igt@kms_content_protection@uevent.html
- shard-tglb: NOTRUN -> [SKIP][58] ([fdo#111828]) +1 similar issue
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb2/igt@kms_content_protection@uevent.html
- shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109300] / [fdo#111066])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb8/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@pipe-a-cursor-128x128-sliding:
- shard-kbl: [PASS][60] -> [FAIL][61] ([i915#3444])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-128x128-sliding.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-128x128-sliding.html
* igt@kms_cursor_crc@pipe-a-cursor-512x170-onscreen:
- shard-tglb: NOTRUN -> [SKIP][62] ([fdo#109279] / [i915#3359]) +1 similar issue
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb7/igt@kms_cursor_crc@pipe-a-cursor-512x170-onscreen.html
* igt@kms_cursor_crc@pipe-b-cursor-32x32-sliding:
- shard-tglb: NOTRUN -> [SKIP][63] ([i915#3319]) +5 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb3/igt@kms_cursor_crc@pipe-b-cursor-32x32-sliding.html
* igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen:
- shard-iclb: NOTRUN -> [SKIP][64] ([fdo#109278] / [fdo#109279])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb2/igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen.html
* igt@kms_cursor_crc@pipe-b-cursor-max-size-rapid-movement:
- shard-tglb: NOTRUN -> [SKIP][65] ([i915#3359]) +4 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb5/igt@kms_cursor_crc@pipe-b-cursor-max-size-rapid-movement.html
* igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen:
- shard-iclb: NOTRUN -> [SKIP][66] ([fdo#109278]) +18 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen.html
* igt@kms_cursor_edge_walk@pipe-d-64x64-left-edge:
- shard-kbl: NOTRUN -> [SKIP][67] ([fdo#109271]) +122 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl1/igt@kms_cursor_edge_walk@pipe-d-64x64-left-edge.html
* igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
- shard-iclb: NOTRUN -> [SKIP][68] ([fdo#109274] / [fdo#109278])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb4/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
* igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium:
- shard-tglb: NOTRUN -> [SKIP][69] ([i915#3528])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb6/igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium.html
- shard-iclb: NOTRUN -> [SKIP][70] ([i915#3528])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb8/igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [PASS][71] -> [INCOMPLETE][72] ([i915#180])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-panning-interruptible:
- shard-iclb: NOTRUN -> [SKIP][73] ([fdo#109274]) +5 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@kms_flip@2x-flip-vs-panning-interruptible.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: NOTRUN -> [DMESG-WARN][74] ([i915#180]) +1 similar issue
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
- shard-snb: NOTRUN -> [SKIP][75] ([fdo#109271]) +344 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-snb2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt:
- shard-iclb: NOTRUN -> [SKIP][76] ([fdo#109280]) +18 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move:
- shard-tglb: NOTRUN -> [SKIP][77] ([fdo#111825]) +30 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-cpu:
- shard-glk: NOTRUN -> [SKIP][78] ([fdo#109271]) +86 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk7/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-cpu.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-kbl: NOTRUN -> [INCOMPLETE][79] ([i915#155] / [i915#2828])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl4/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@static-swap:
- shard-tglb: NOTRUN -> [SKIP][80] ([i915#1187])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb6/igt@kms_hdr@static-swap.html
- shard-iclb: NOTRUN -> [SKIP][81] ([i915#1187])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb1/igt@kms_hdr@static-swap.html
* igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c:
- shard-apl: NOTRUN -> [SKIP][82] ([fdo#109271]) +162 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl7/igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-glk: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#533])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk3/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
- shard-apl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#533]) +2 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl1/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][85] -> [DMESG-WARN][86] ([i915#180]) +3 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
- shard-apl: NOTRUN -> [FAIL][87] ([fdo#108145] / [i915#265]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl8/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
- shard-glk: NOTRUN -> [FAIL][88] ([i915#265])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk6/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
* igt@kms_plane_lowres@pipe-d-tiling-yf:
- shard-tglb: NOTRUN -> [SKIP][89] ([fdo#112054]) +1 similar issue
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb6/igt@kms_plane_lowres@pipe-d-tiling-yf.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-tglb: NOTRUN -> [SKIP][90] ([i915#2920]) +2 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb7/igt@kms_psr2_sf@cursor-plane-update-sf.html
- shard-iclb: NOTRUN -> [SKIP][91] ([i915#658]) +1 similar issue
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb7/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
- shard-glk: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#658]) +1 similar issue
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
- shard-apl: NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#658]) +5 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl8/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
- shard-kbl: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#658]) +2 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
* igt@kms_psr2_su@frontbuffer:
- shard-tglb: NOTRUN -> [SKIP][95] ([i915#1911])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb2/igt@kms_psr2_su@frontbuffer.html
- shard-iclb: NOTRUN -> [SKIP][96] ([fdo#109642] / [fdo#111068] / [i915#658])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_basic:
- shard-tglb: NOTRUN -> [FAIL][97] ([i915#132] / [i915#3467]) +2 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb8/igt@kms_psr@psr2_basic.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: NOTRUN -> [SKIP][98] ([fdo#109441]) +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@kms_psr@psr2_primary_page_flip.html
* igt@kms_psr@psr2_sprite_mmap_cpu:
- shard-iclb: [PASS][99] -> [SKIP][100] ([fdo#109441])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_cpu.html
* igt@kms_writeback@writeback-fb-id:
- shard-kbl: NOTRUN -> [SKIP][101] ([fdo#109271] / [i915#2437]) +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl4/igt@kms_writeback@writeback-fb-id.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-tglb: NOTRUN -> [SKIP][102] ([i915#2437])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb7/igt@kms_writeback@writeback-invalid-parameters.html
- shard-apl: NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#2437])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl2/igt@kms_writeback@writeback-invalid-parameters.html
- shard-iclb: NOTRUN -> [SKIP][104] ([i915#2437])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb7/igt@kms_writeback@writeback-invalid-parameters.html
* igt@nouveau_crc@pipe-b-ctx-flip-detection:
- shard-tglb: NOTRUN -> [SKIP][105] ([i915#2530]) +1 similar issue
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb3/igt@nouveau_crc@pipe-b-ctx-flip-detection.html
- shard-iclb: NOTRUN -> [SKIP][106] ([i915#2530])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb2/igt@nouveau_crc@pipe-b-ctx-flip-detection.html
* igt@nouveau_crc@pipe-d-source-outp-inactive:
- shard-iclb: NOTRUN -> [SKIP][107] ([fdo#109278] / [i915#2530])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb2/igt@nouveau_crc@pipe-d-source-outp-inactive.html
* igt@perf@polling-parameterized:
- shard-glk: [PASS][108] -> [FAIL][109] ([i915#1542])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-glk6/igt@perf@polling-parameterized.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk6/igt@perf@polling-parameterized.html
* igt@prime_nv_test@nv_write_i915_gtt_mmap_read:
- shard-tglb: NOTRUN -> [SKIP][110] ([fdo#109291]) +1 similar issue
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb2/igt@prime_nv_test@nv_write_i915_gtt_mmap_read.html
- shard-iclb: NOTRUN -> [SKIP][111] ([fdo#109291]) +1 similar issue
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@prime_nv_test@nv_write_i915_gtt_mmap_read.html
* igt@prime_vgem@fence-read-hang:
- shard-tglb: NOTRUN -> [SKIP][112] ([fdo#109295])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb7/igt@prime_vgem@fence-read-hang.html
- shard-iclb: NOTRUN -> [SKIP][113] ([fdo#109295])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb6/igt@prime_vgem@fence-read-hang.html
* igt@sysfs_clients@fair-1:
- shard-apl: NOTRUN -> [SKIP][114] ([fdo#109271] / [i915#2994]) +4 similar issues
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl7/igt@sysfs_clients@fair-1.html
* igt@sysfs_clients@fair-3:
- shard-kbl: NOTRUN -> [SKIP][115] ([fdo#109271] / [i915#2994]) +1 similar issue
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl2/igt@sysfs_clients@fair-3.html
* igt@sysfs_clients@recycle-many:
- shard-glk: NOTRUN -> [SKIP][116] ([fdo#109271] / [i915#2994]) +1 similar issue
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk3/igt@sysfs_clients@recycle-many.html
* igt@sysfs_clients@split-25:
- shard-tglb: NOTRUN -> [SKIP][117] ([i915#2994])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb6/igt@sysfs_clients@split-25.html
- shard-iclb: NOTRUN -> [SKIP][118] ([i915#2994])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb4/igt@sysfs_clients@split-25.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-glk: [FAIL][119] ([i915#2842]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-glk7/igt@gem_exec_fair@basic-none-vip@rcs0.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk5/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [FAIL][121] ([i915#2842]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-tglb: [FAIL][123] ([i915#2842]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-tglb7/igt@gem_exec_fair@basic-pace@rcs0.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb5/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][125] ([i915#2190]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-tglb6/igt@gem_huc_copy@huc-copy.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-tglb8/igt@gem_huc_copy@huc-copy.html
* igt@gem_mmap_gtt@big-copy-odd:
- shard-glk: [FAIL][127] ([i915#307]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-glk7/igt@gem_mmap_gtt@big-copy-odd.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk1/igt@gem_mmap_gtt@big-copy-odd.html
* igt@gem_mmap_gtt@cpuset-medium-copy:
- shard-iclb: [FAIL][129] ([i915#2428]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-iclb7/igt@gem_mmap_gtt@cpuset-medium-copy.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb3/igt@gem_mmap_gtt@cpuset-medium-copy.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [DMESG-WARN][131] ([i915#1436] / [i915#716]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-glk8/igt@gen9_exec_parse@allowed-all.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk3/igt@gen9_exec_parse@allowed-all.html
* igt@i915_suspend@debugfs-reader:
- shard-iclb: [INCOMPLETE][133] ([i915#1185]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-iclb3/igt@i915_suspend@debugfs-reader.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-iclb2/igt@i915_suspend@debugfs-reader.html
* igt@kms_cursor_crc@pipe-a-cursor-256x256-random:
- shard-glk: [FAIL][135] ([i915#3444]) -> [PASS][136]
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-glk7/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-glk3/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
- shard-apl: [FAIL][137] ([i915#3444]) -> [PASS][138]
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-apl7/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/shard-apl7/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [INCOMPLETE][139] ([i915#155] / [i915#180] / [i915#636]) -> [PASS][140]
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10187/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
[140]: https://intel-gfx-ci.01.org/tree/drm-
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5891/index.html
[-- Attachment #1.2: Type: text/html, Size: 33910 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 5/6] lib/i915: Add ADL-P stride restrictions for non-linear buffers
2021-06-07 7:58 ` Imre Deak
@ 2021-06-08 3:34 ` Matt Roper
2021-06-08 10:45 ` Imre Deak
0 siblings, 1 reply; 26+ messages in thread
From: Matt Roper @ 2021-06-08 3:34 UTC (permalink / raw)
To: Imre Deak; +Cc: igt-dev, Heikkila, Juha-pekka, Taylor, Clinton A
On Mon, Jun 07, 2021 at 10:58:21AM +0300, Imre Deak wrote:
> On Fri, Jun 04, 2021 at 11:51:51PM +0300, Souza, Jose wrote:
> > Hum we can drop this change, Imre landed changes to make framebuffers
> > strides power of two for adl_p, so for userspace it should be
> > transparent.
>
> Yes, it should be transparent for CCS framebuffers too, however that's a
> TODO item. I suspect that kernel would need to recreate the CCS plane if
> the main surface stride changes (since the layout of each CCS page would
> change, so we can't just remap the CCS pages), hence left this part for
> a follow-up.
>
> So this patch is needed.
Are there any changes required, or can we consider this r-b?
Thanks.
Matt
>
> > On Fri, 2021-06-04 at 13:39 -0700, Matt Roper wrote:
> > > From: José Roberto de Souza <jose.souza@intel.com>
> > >
> > > ADL-P tiled framebuffer strides must be power-of-two aligned and has a
> > > minimum of 8 tiles. For non-CCS framebuffers the driver supports FBs not
> > > meeting this requirement by remapping the framebuffer and padding the
> > > stride as required, but for CCS FBs userspace must ensure the alignment.
> > > Adding remap support for CCS FBs to the driver is to be done as a
> > > follow-up.
> > >
> > > Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
> > > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
> > > Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > > Cc: Imre Deak <imre.deak@intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > > ---
> > > lib/igt_fb.c | 26 +++++++++++++++++++++-----
> > > 1 file changed, 21 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> > > index 585ede38..ce2aa6ce 100644
> > > --- a/lib/igt_fb.c
> > > +++ b/lib/igt_fb.c
> > > @@ -729,8 +729,16 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> > > /* clear color always fixed to 64 bytes */
> > > return 64;
> > > } else if (is_gen12_ccs_plane(fb, plane)) {
> > > - /* A main surface using a CCS AUX surface must be 4x4 tiles aligned. */
> > > - return ALIGN(min_stride, 64);
> > > + /*
> > > + * A main surface using a CCS AUX surface must be 4x4 tiles
> > > + * aligned. On ADL_P the minimum main surface stride is 8
> > > + * tiles (2 * 64 byte on CCS surface) and it has to be POT
> > > + * aligned.
> > > + */
> > > + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > > + return roundup_power_of_two(max(min_stride, 128u));
> > > + else
> > > + return ALIGN(min_stride, 64);
> > > } else if (!fb->modifier && is_nouveau_device(fb->fd)) {
> > > int align;
> > >
> > > @@ -743,14 +751,22 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> > > return ALIGN(min_stride, align);
> > > } else {
> > > unsigned int tile_width, tile_height;
> > > + uint32_t stride;
> > >
> > > igt_get_fb_tile_size(fb->fd, fb->modifier, fb->plane_bpp[plane],
> > > &tile_width, &tile_height);
> > >
> > > - if (is_gen12_ccs_modifier(fb->modifier))
> > > - tile_width *= 4;
> > > + if (is_gen12_ccs_modifier(fb->modifier)) {
> > > + stride = ALIGN(min_stride, tile_width * 4);
> > >
> > > - return ALIGN(min_stride, tile_width);
> > > + /* TODO: add support to kernel to POT align CCS format strides */
> > > + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > > + stride = roundup_power_of_two(max(stride, tile_width * 8));
> > > + } else {
> > > + stride = ALIGN(min_stride, tile_width);
> > > + }
> > > +
> > > + return stride;
> > > }
> > > }
> > >
> >
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 5/6] lib/i915: Add ADL-P stride restrictions for non-linear buffers
2021-06-08 3:34 ` Matt Roper
@ 2021-06-08 10:45 ` Imre Deak
0 siblings, 0 replies; 26+ messages in thread
From: Imre Deak @ 2021-06-08 10:45 UTC (permalink / raw)
To: Matt Roper; +Cc: igt-dev, Heikkila, Juha-pekka, Taylor, Clinton A
On Mon, Jun 07, 2021 at 08:34:45PM -0700, Matt Roper wrote:
> On Mon, Jun 07, 2021 at 10:58:21AM +0300, Imre Deak wrote:
> > On Fri, Jun 04, 2021 at 11:51:51PM +0300, Souza, Jose wrote:
> > > Hum we can drop this change, Imre landed changes to make framebuffers
> > > strides power of two for adl_p, so for userspace it should be
> > > transparent.
> >
> > Yes, it should be transparent for CCS framebuffers too, however that's a
> > TODO item. I suspect that kernel would need to recreate the CCS plane if
> > the main surface stride changes (since the layout of each CCS page would
> > change, so we can't just remap the CCS pages), hence left this part for
> > a follow-up.
> >
> > So this patch is needed.
>
> Are there any changes required, or can we consider this r-b?
No changes are needed:
Reviewed-by: Imre Deak <imre.deak@intel.com>
>
> Thanks.
>
>
> Matt
>
> >
> > > On Fri, 2021-06-04 at 13:39 -0700, Matt Roper wrote:
> > > > From: José Roberto de Souza <jose.souza@intel.com>
> > > >
> > > > ADL-P tiled framebuffer strides must be power-of-two aligned and has a
> > > > minimum of 8 tiles. For non-CCS framebuffers the driver supports FBs not
> > > > meeting this requirement by remapping the framebuffer and padding the
> > > > stride as required, but for CCS FBs userspace must ensure the alignment.
> > > > Adding remap support for CCS FBs to the driver is to be done as a
> > > > follow-up.
> > > >
> > > > Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
> > > > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > > Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
> > > > Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > > > Cc: Imre Deak <imre.deak@intel.com>
> > > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > > > ---
> > > > lib/igt_fb.c | 26 +++++++++++++++++++++-----
> > > > 1 file changed, 21 insertions(+), 5 deletions(-)
> > > >
> > > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> > > > index 585ede38..ce2aa6ce 100644
> > > > --- a/lib/igt_fb.c
> > > > +++ b/lib/igt_fb.c
> > > > @@ -729,8 +729,16 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> > > > /* clear color always fixed to 64 bytes */
> > > > return 64;
> > > > } else if (is_gen12_ccs_plane(fb, plane)) {
> > > > - /* A main surface using a CCS AUX surface must be 4x4 tiles aligned. */
> > > > - return ALIGN(min_stride, 64);
> > > > + /*
> > > > + * A main surface using a CCS AUX surface must be 4x4 tiles
> > > > + * aligned. On ADL_P the minimum main surface stride is 8
> > > > + * tiles (2 * 64 byte on CCS surface) and it has to be POT
> > > > + * aligned.
> > > > + */
> > > > + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > > > + return roundup_power_of_two(max(min_stride, 128u));
> > > > + else
> > > > + return ALIGN(min_stride, 64);
> > > > } else if (!fb->modifier && is_nouveau_device(fb->fd)) {
> > > > int align;
> > > >
> > > > @@ -743,14 +751,22 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> > > > return ALIGN(min_stride, align);
> > > > } else {
> > > > unsigned int tile_width, tile_height;
> > > > + uint32_t stride;
> > > >
> > > > igt_get_fb_tile_size(fb->fd, fb->modifier, fb->plane_bpp[plane],
> > > > &tile_width, &tile_height);
> > > >
> > > > - if (is_gen12_ccs_modifier(fb->modifier))
> > > > - tile_width *= 4;
> > > > + if (is_gen12_ccs_modifier(fb->modifier)) {
> > > > + stride = ALIGN(min_stride, tile_width * 4);
> > > >
> > > > - return ALIGN(min_stride, tile_width);
> > > > + /* TODO: add support to kernel to POT align CCS format strides */
> > > > + if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > > > + stride = roundup_power_of_two(max(stride, tile_width * 8));
> > > > + } else {
> > > > + stride = ALIGN(min_stride, tile_width);
> > > > + }
> > > > +
> > > > + return stride;
> > > > }
> > > > }
> > > >
> > >
>
> --
> Matt Roper
> Graphics Software Engineer
> VTT-OSGC Platform Enablement
> Intel Corporation
> (916) 356-2795
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 26+ messages in thread
end of thread, other threads:[~2021-06-08 10:45 UTC | newest]
Thread overview: 26+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-04 20:39 [igt-dev] [PATCH i-g-t 0/6] Split display/graphics versions and add ADL-P Matt Roper
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 1/6] lib/i915: Split 'gen' into graphics version and display version Matt Roper
2021-06-05 0:33 ` Souza, Jose
2021-06-05 0:39 ` Souza, Jose
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 2/6] lib/i915: Add intel_display_ver() and use it in display tests/libs Matt Roper
2021-06-05 0:43 ` Souza, Jose
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 3/6] lib/i915/adl-p: Basic ADL-P enabling Matt Roper
2021-06-05 0:24 ` Souza, Jose
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 4/6] lib/i915/perf: Add ADL-P metrics Matt Roper
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 5/6] lib/i915: Add ADL-P stride restrictions for non-linear buffers Matt Roper
2021-06-04 20:51 ` Souza, Jose
2021-06-07 7:58 ` Imre Deak
2021-06-08 3:34 ` Matt Roper
2021-06-08 10:45 ` Imre Deak
2021-06-04 20:39 ` [igt-dev] [PATCH i-g-t 6/6] lib/i915: Add ADL-P plane offset restriction for CCS framebuffers Matt Roper
2021-06-05 0:46 ` Souza, Jose
2021-06-04 20:50 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P Patchwork
2021-06-04 21:03 ` Matt Roper
2021-06-07 10:33 ` Petri Latvala
2021-06-04 20:53 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
2021-06-05 5:13 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P (rev2) Patchwork
2021-06-05 5:14 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
2021-06-05 18:53 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Split display/graphics versions and add ADL-P (rev3) Patchwork
2021-06-05 18:57 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
2021-06-07 16:26 ` [igt-dev] ✓ Fi.CI.BAT: success for Split display/graphics versions and add ADL-P (rev4) Patchwork
2021-06-07 23:47 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
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