From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
To: u-boot@lists.denx.de
Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org>,
Jassi Brar <jaswinder.singh@linaro.org>,
Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Subject: [PATCH 3/6] phy: socionext: Add UniPhier PCIe PHY driver
Date: Tue, 6 Jul 2021 19:01:08 +0900 [thread overview]
Message-ID: <1625565671-30022-4-git-send-email-hayashi.kunihiko@socionext.com> (raw)
In-Reply-To: <1625565671-30022-1-git-send-email-hayashi.kunihiko@socionext.com>
Add PCIe PHY driver support for Pro5, LD20 and PXs3 SoCs.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/Kconfig | 2 ++
drivers/Makefile | 1 +
drivers/phy/socionext/Kconfig | 12 +++++++
drivers/phy/socionext/Makefile | 6 ++++
drivers/phy/socionext/phy-uniphier-pcie.c | 59 +++++++++++++++++++++++++++++++
5 files changed, 80 insertions(+)
create mode 100644 drivers/phy/socionext/Kconfig
create mode 100644 drivers/phy/socionext/Makefile
create mode 100644 drivers/phy/socionext/phy-uniphier-pcie.c
diff --git a/drivers/Kconfig b/drivers/Kconfig
index b1ada1c..c9c812b 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -80,6 +80,8 @@ source "drivers/phy/allwinner/Kconfig"
source "drivers/phy/marvell/Kconfig"
+source "drivers/phy/socionext/Kconfig"
+
source "drivers/pinctrl/Kconfig"
source "drivers/power/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 3510dab..4081289 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -96,6 +96,7 @@ obj-$(CONFIG_PCH) += pch/
obj-y += phy/allwinner/
obj-y += phy/marvell/
obj-y += phy/rockchip/
+obj-y += phy/socionext/
obj-y += rtc/
obj-y += scsi/
obj-y += sound/
diff --git a/drivers/phy/socionext/Kconfig b/drivers/phy/socionext/Kconfig
new file mode 100644
index 0000000..bcd579e
--- /dev/null
+++ b/drivers/phy/socionext/Kconfig
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# PHY drivers for Socionext platforms.
+#
+
+config PHY_UNIPHIER_PCIE
+ bool "UniPhier PCIe PHY driver"
+ depends on PHY && ARCH_UNIPHIER
+ imply REGMAP
+ help
+ Enable this to support PHY implemented in PCIe controller
+ on UniPhier SoCs.
diff --git a/drivers/phy/socionext/Makefile b/drivers/phy/socionext/Makefile
new file mode 100644
index 0000000..5484360
--- /dev/null
+++ b/drivers/phy/socionext/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Makefile for the phy drivers.
+#
+
+obj-$(CONFIG_PHY_UNIPHIER_PCIE) += phy-uniphier-pcie.o
diff --git a/drivers/phy/socionext/phy-uniphier-pcie.c b/drivers/phy/socionext/phy-uniphier-pcie.c
new file mode 100644
index 0000000..d352c4c
--- /dev/null
+++ b/drivers/phy/socionext/phy-uniphier-pcie.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * phy_uniphier_pcie.c - Socionext UniPhier PCIe PHY driver
+ * Copyright 2019-2021 Socionext, Inc.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <linux/bitops.h>
+#include <linux/compat.h>
+#include <regmap.h>
+#include <syscon.h>
+
+/* SG */
+#define SG_USBPCIESEL 0x590
+#define SG_USBPCIESEL_PCIE BIT(0)
+
+struct uniphier_pciephy_priv {
+ int dummy;
+};
+
+static int uniphier_pciephy_init(struct phy *phy)
+{
+ return 0;
+}
+
+static int uniphier_pciephy_probe(struct udevice *dev)
+{
+ struct regmap *regmap;
+
+ regmap = syscon_regmap_lookup_by_phandle(dev,
+ "socionext,syscon");
+ if (!IS_ERR(regmap))
+ regmap_update_bits(regmap, SG_USBPCIESEL,
+ SG_USBPCIESEL_PCIE, SG_USBPCIESEL_PCIE);
+
+ return 0;
+}
+
+static struct phy_ops uniphier_pciephy_ops = {
+ .init = uniphier_pciephy_init,
+};
+
+static const struct udevice_id uniphier_pciephy_ids[] = {
+ { .compatible = "socionext,uniphier-pro5-pcie-phy" },
+ { .compatible = "socionext,uniphier-ld20-pcie-phy" },
+ { .compatible = "socionext,uniphier-pxs3-pcie-phy" },
+ { }
+};
+
+U_BOOT_DRIVER(uniphier_pcie_phy) = {
+ .name = "uniphier-pcie-phy",
+ .id = UCLASS_PHY,
+ .of_match = uniphier_pciephy_ids,
+ .ops = &uniphier_pciephy_ops,
+ .probe = uniphier_pciephy_probe,
+ .priv_auto = sizeof(struct uniphier_pciephy_priv),
+};
--
2.7.4
next prev parent reply other threads:[~2021-07-06 10:02 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-06 10:01 [PATCH 0/6] uniphier: Add PCIe host controller and Akebi96 board support Kunihiko Hayashi
2021-07-06 10:01 ` [PATCH 1/6] clk: uniphier: Add PCIe clock entry Kunihiko Hayashi
2021-07-14 20:52 ` Tom Rini
2021-07-06 10:01 ` [PATCH 2/6] reset: uniphier: Add PCIe reset entry Kunihiko Hayashi
2021-07-14 20:52 ` Tom Rini
2021-07-06 10:01 ` Kunihiko Hayashi [this message]
2021-07-14 20:52 ` [PATCH 3/6] phy: socionext: Add UniPhier PCIe PHY driver Tom Rini
2021-07-06 10:01 ` [PATCH 4/6] pci: uniphier: Add UniPhier PCIe controller driver Kunihiko Hayashi
2021-07-14 20:52 ` Tom Rini
2021-07-06 10:01 ` [PATCH 5/6] configs: uniphier: Enable CONFIG_SYS_PCI_64BIT Kunihiko Hayashi
2021-07-14 20:53 ` Tom Rini
2021-07-06 10:01 ` [PATCH 6/6] ARM: dts: uniphier: Add support for Akebi96 Kunihiko Hayashi
2021-07-14 20:53 ` Tom Rini
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