From: Robin Gong <yibin.gong@nxp.com> To: vkoul@kernel.org, mark.rutland@arm.com, broonie@kernel.org, robh+dt@kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, shawnguo@kernel.org, festevam@gmail.com, s.hauer@pengutronix.de, martin.fuzzey@flowbird.group, u.kleine-koenig@pengutronix.de, dan.j.williams@intel.com, matthias.schiffer@ew.tq-group.com, frieder.schrempf@kontron.de, m.felsch@pengutronix.de, l.stach@pengutronix.de, xiaoning.wang@nxp.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-imx@nxp.com, kernel@pengutronix.de, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v16 11/12] dmaengine: imx-sdma: add uart rom script Date: Wed, 14 Jul 2021 18:20:51 +0800 [thread overview] Message-ID: <1626258052-22198-12-git-send-email-yibin.gong@nxp.com> (raw) In-Reply-To: <1626258052-22198-1-git-send-email-yibin.gong@nxp.com> For the compatibility of NXP internal legacy kernel before 4.19 which is based on uart ram script and upstreaming kernel based on uart rom script, add both uart ram/rom script in latest sdma firmware. By default uart rom script used. Besides, add two multi-fifo scripts for SAI/PDM on i.mx8m/8mm and add back qspi script miss for v4(i.mx7d/8m/8mm family, but v3 is for i.mx6). rom script: uart_2_mcu_addr uartsh_2_mcu_addr /* through spba bus */ am script: uart_2_mcu_ram_addr uartsh_2_mcu_ram_addr /* through spba bus */ Please get latest sdma firmware from the below and put them into the path (/lib/firmware/imx/sdma/): https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git /tree/imx/sdma Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Vinod Koul <vkoul@kernel.org> --- drivers/dma/imx-sdma.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index cfcd413..9ec1edf 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -198,12 +198,12 @@ struct sdma_script_start_addrs { s32 per_2_firi_addr; s32 mcu_2_firi_addr; s32 uart_2_per_addr; - s32 uart_2_mcu_addr; + s32 uart_2_mcu_ram_addr; s32 per_2_app_addr; s32 mcu_2_app_addr; s32 per_2_per_addr; s32 uartsh_2_per_addr; - s32 uartsh_2_mcu_addr; + s32 uartsh_2_mcu_ram_addr; s32 per_2_shp_addr; s32 mcu_2_shp_addr; s32 ata_2_mcu_addr; @@ -230,6 +230,10 @@ struct sdma_script_start_addrs { s32 zcanfd_2_mcu_addr; s32 zqspi_2_mcu_addr; s32 mcu_2_ecspi_addr; + s32 mcu_2_sai_addr; + s32 sai_2_mcu_addr; + s32 uart_2_mcu_addr; + s32 uartsh_2_mcu_addr; /* End of v3 array */ s32 mcu_2_zqspi_addr; /* End of v4 array */ @@ -1747,8 +1751,8 @@ static void sdma_issue_pending(struct dma_chan *chan) #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1 34 #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2 38 -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 41 -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 42 +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 45 +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 46 static void sdma_add_scripts(struct sdma_engine *sdma, const struct sdma_script_start_addrs *addr) @@ -1772,6 +1776,19 @@ static void sdma_add_scripts(struct sdma_engine *sdma, for (i = 0; i < sdma->script_number; i++) if (addr_arr[i] > 0) saddr_arr[i] = addr_arr[i]; + + /* + * get uart_2_mcu_addr/uartsh_2_mcu_addr rom script specially because + * they are now replaced by uart_2_mcu_ram_addr/uartsh_2_mcu_ram_addr + * to be compatible with legacy freescale/nxp sdma firmware, and they + * are located in the bottom part of sdma_script_start_addrs which are + * beyond the SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1. + */ + if (addr->uart_2_mcu_addr) + sdma->script_addrs->uart_2_mcu_addr = addr->uart_2_mcu_addr; + if (addr->uartsh_2_mcu_addr) + sdma->script_addrs->uartsh_2_mcu_addr = addr->uartsh_2_mcu_addr; + } static void sdma_load_firmware(const struct firmware *fw, void *context) -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Robin Gong <yibin.gong@nxp.com> To: vkoul@kernel.org, mark.rutland@arm.com, broonie@kernel.org, robh+dt@kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, shawnguo@kernel.org, festevam@gmail.com, s.hauer@pengutronix.de, martin.fuzzey@flowbird.group, u.kleine-koenig@pengutronix.de, dan.j.williams@intel.com, matthias.schiffer@ew.tq-group.com, frieder.schrempf@kontron.de, m.felsch@pengutronix.de, l.stach@pengutronix.de, xiaoning.wang@nxp.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-imx@nxp.com, kernel@pengutronix.de, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v16 11/12] dmaengine: imx-sdma: add uart rom script Date: Wed, 14 Jul 2021 18:20:51 +0800 [thread overview] Message-ID: <1626258052-22198-12-git-send-email-yibin.gong@nxp.com> (raw) In-Reply-To: <1626258052-22198-1-git-send-email-yibin.gong@nxp.com> For the compatibility of NXP internal legacy kernel before 4.19 which is based on uart ram script and upstreaming kernel based on uart rom script, add both uart ram/rom script in latest sdma firmware. By default uart rom script used. Besides, add two multi-fifo scripts for SAI/PDM on i.mx8m/8mm and add back qspi script miss for v4(i.mx7d/8m/8mm family, but v3 is for i.mx6). rom script: uart_2_mcu_addr uartsh_2_mcu_addr /* through spba bus */ am script: uart_2_mcu_ram_addr uartsh_2_mcu_ram_addr /* through spba bus */ Please get latest sdma firmware from the below and put them into the path (/lib/firmware/imx/sdma/): https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git /tree/imx/sdma Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Vinod Koul <vkoul@kernel.org> --- drivers/dma/imx-sdma.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index cfcd413..9ec1edf 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -198,12 +198,12 @@ struct sdma_script_start_addrs { s32 per_2_firi_addr; s32 mcu_2_firi_addr; s32 uart_2_per_addr; - s32 uart_2_mcu_addr; + s32 uart_2_mcu_ram_addr; s32 per_2_app_addr; s32 mcu_2_app_addr; s32 per_2_per_addr; s32 uartsh_2_per_addr; - s32 uartsh_2_mcu_addr; + s32 uartsh_2_mcu_ram_addr; s32 per_2_shp_addr; s32 mcu_2_shp_addr; s32 ata_2_mcu_addr; @@ -230,6 +230,10 @@ struct sdma_script_start_addrs { s32 zcanfd_2_mcu_addr; s32 zqspi_2_mcu_addr; s32 mcu_2_ecspi_addr; + s32 mcu_2_sai_addr; + s32 sai_2_mcu_addr; + s32 uart_2_mcu_addr; + s32 uartsh_2_mcu_addr; /* End of v3 array */ s32 mcu_2_zqspi_addr; /* End of v4 array */ @@ -1747,8 +1751,8 @@ static void sdma_issue_pending(struct dma_chan *chan) #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1 34 #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2 38 -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 41 -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 42 +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 45 +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 46 static void sdma_add_scripts(struct sdma_engine *sdma, const struct sdma_script_start_addrs *addr) @@ -1772,6 +1776,19 @@ static void sdma_add_scripts(struct sdma_engine *sdma, for (i = 0; i < sdma->script_number; i++) if (addr_arr[i] > 0) saddr_arr[i] = addr_arr[i]; + + /* + * get uart_2_mcu_addr/uartsh_2_mcu_addr rom script specially because + * they are now replaced by uart_2_mcu_ram_addr/uartsh_2_mcu_ram_addr + * to be compatible with legacy freescale/nxp sdma firmware, and they + * are located in the bottom part of sdma_script_start_addrs which are + * beyond the SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1. + */ + if (addr->uart_2_mcu_addr) + sdma->script_addrs->uart_2_mcu_addr = addr->uart_2_mcu_addr; + if (addr->uartsh_2_mcu_addr) + sdma->script_addrs->uartsh_2_mcu_addr = addr->uartsh_2_mcu_addr; + } static void sdma_load_firmware(const struct firmware *fw, void *context) -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-07-14 2:05 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-14 10:20 [PATCH v16 00/12] add ecspi ERR009165 for i.mx6/7 soc family Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 9:05 ` Lucas Stach 2021-07-14 9:05 ` Lucas Stach 2021-07-20 12:22 ` Vinod Koul 2021-07-20 12:22 ` Vinod Koul 2021-07-14 10:20 ` [PATCH v16 01/12] Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core" Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 10:20 ` [PATCH v16 02/12] Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores" Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 10:20 ` [PATCH v16 03/12] Revert "dmaengine: imx-sdma: refine to load context only once" Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 10:20 ` [PATCH v16 04/12] dmaengine: imx-sdma: remove duplicated sdma_load_context Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 10:20 ` [PATCH v16 05/12] dmaengine: dma: imx-sdma: add fw_loaded and is_ram_script Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 8:17 ` Lucas Stach 2021-07-14 8:17 ` Lucas Stach 2021-07-14 10:20 ` [PATCH v16 06/12] dmaengine: imx-sdma: add mcu_2_ecspi script Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 10:20 ` [PATCH v16 07/12] spi: imx: fix ERR009165 Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 10:20 ` [PATCH v16 08/12] spi: imx: remove ERR009165 workaround on i.mx6ul Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 10:20 ` [PATCH v16 09/12] dmaengine: imx-sdma: remove ERR009165 " Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 8:17 ` Lucas Stach 2021-07-14 8:17 ` Lucas Stach 2021-07-14 10:20 ` [PATCH v16 10/12] dma: imx-sdma: add i.mx6ul compatible name Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-14 10:20 ` Robin Gong [this message] 2021-07-14 10:20 ` [PATCH v16 11/12] dmaengine: imx-sdma: add uart rom script Robin Gong 2021-07-14 10:20 ` [PATCH v16 12/12] dmaengine: imx-sdma: add terminated list for freed descriptor in worker Robin Gong 2021-07-14 10:20 ` Robin Gong 2021-07-23 3:20 ` [PATCH v16 00/12] add ecspi ERR009165 for i.mx6/7 soc family Shawn Guo 2021-07-23 3:20 ` Shawn Guo
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