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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Chuanjia Liu <chuanjia.liu@mediatek.com>,
	matthias.bgg@gmail.com, bhelgaas@google.com, robh+dt@kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
	devicetree@vger.kernel.org, yong.wu@mediatek.com,
	linux-kernel@vger.kernel.org, ryder.lee@mediatek.com,
	Frank Wunderlich <frank-w@public-files.de>,
	linux-arm-kernel@lists.infradead.org, jianjun.wang@mediatek.com
Subject: Re: [PATCH v11 0/4] PCI: mediatek: Spilt PCIe node to comply with hardware design
Date: Fri,  6 Aug 2021 10:39:54 +0100	[thread overview]
Message-ID: <162824274659.11010.3812952145024175369.b4-ty@arm.com> (raw)
In-Reply-To: <20210719073456.28666-1-chuanjia.liu@mediatek.com>

On Mon, 19 Jul 2021 15:34:52 +0800, Chuanjia Liu wrote:
> There are two independent PCIe controllers in MT2712 and MT7622 platform.
> Each of them should contain an independent MSI domain.
> 
> In old dts architecture, MSI domain will be inherited from the root bridge,
> and all of the devices will share the same MSI domain.Hence that,
> the PCIe devices will not work properly if the irq number
> which required is more than 32.
> 
> [...]

Applied patches 1-2 to pci/mediatek (we don't merge dts changes), thanks!

[1/2] dt-bindings: PCI: mediatek: Update the Device tree bindings
      https://git.kernel.org/lpieralisi/pci/c/9c23251640
[2/2] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node
      https://git.kernel.org/lpieralisi/pci/c/302e503e08

Thanks,
Lorenzo

WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Chuanjia Liu <chuanjia.liu@mediatek.com>,
	matthias.bgg@gmail.com, bhelgaas@google.com, robh+dt@kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
	devicetree@vger.kernel.org, yong.wu@mediatek.com,
	linux-kernel@vger.kernel.org, ryder.lee@mediatek.com,
	Frank Wunderlich <frank-w@public-files.de>,
	linux-arm-kernel@lists.infradead.org, jianjun.wang@mediatek.com
Subject: Re: [PATCH v11 0/4] PCI: mediatek: Spilt PCIe node to comply with hardware design
Date: Fri,  6 Aug 2021 10:39:54 +0100	[thread overview]
Message-ID: <162824274659.11010.3812952145024175369.b4-ty@arm.com> (raw)
In-Reply-To: <20210719073456.28666-1-chuanjia.liu@mediatek.com>

On Mon, 19 Jul 2021 15:34:52 +0800, Chuanjia Liu wrote:
> There are two independent PCIe controllers in MT2712 and MT7622 platform.
> Each of them should contain an independent MSI domain.
> 
> In old dts architecture, MSI domain will be inherited from the root bridge,
> and all of the devices will share the same MSI domain.Hence that,
> the PCIe devices will not work properly if the irq number
> which required is more than 32.
> 
> [...]

Applied patches 1-2 to pci/mediatek (we don't merge dts changes), thanks!

[1/2] dt-bindings: PCI: mediatek: Update the Device tree bindings
      https://git.kernel.org/lpieralisi/pci/c/9c23251640
[2/2] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node
      https://git.kernel.org/lpieralisi/pci/c/302e503e08

Thanks,
Lorenzo

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Chuanjia Liu <chuanjia.liu@mediatek.com>,
	matthias.bgg@gmail.com, bhelgaas@google.com, robh+dt@kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
	devicetree@vger.kernel.org, yong.wu@mediatek.com,
	linux-kernel@vger.kernel.org, ryder.lee@mediatek.com,
	Frank Wunderlich <frank-w@public-files.de>,
	linux-arm-kernel@lists.infradead.org, jianjun.wang@mediatek.com
Subject: Re: [PATCH v11 0/4] PCI: mediatek: Spilt PCIe node to comply with hardware design
Date: Fri,  6 Aug 2021 10:39:54 +0100	[thread overview]
Message-ID: <162824274659.11010.3812952145024175369.b4-ty@arm.com> (raw)
In-Reply-To: <20210719073456.28666-1-chuanjia.liu@mediatek.com>

On Mon, 19 Jul 2021 15:34:52 +0800, Chuanjia Liu wrote:
> There are two independent PCIe controllers in MT2712 and MT7622 platform.
> Each of them should contain an independent MSI domain.
> 
> In old dts architecture, MSI domain will be inherited from the root bridge,
> and all of the devices will share the same MSI domain.Hence that,
> the PCIe devices will not work properly if the irq number
> which required is more than 32.
> 
> [...]

Applied patches 1-2 to pci/mediatek (we don't merge dts changes), thanks!

[1/2] dt-bindings: PCI: mediatek: Update the Device tree bindings
      https://git.kernel.org/lpieralisi/pci/c/9c23251640
[2/2] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node
      https://git.kernel.org/lpieralisi/pci/c/302e503e08

Thanks,
Lorenzo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-08-06  9:40 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-19  7:34 [PATCH v11 0/4] PCI: mediatek: Spilt PCIe node to comply with hardware design Chuanjia Liu
2021-07-19  7:34 ` Chuanjia Liu
2021-07-19  7:34 ` Chuanjia Liu
2021-07-19  7:34 ` [PATCH v11 1/4] dt-bindings: PCI: mediatek: Update the Device tree bindings Chuanjia Liu
2021-07-19  7:34   ` Chuanjia Liu
2021-07-19  7:34   ` Chuanjia Liu
2021-07-19 22:47   ` Rob Herring
2021-07-19 22:47     ` Rob Herring
2021-07-19 22:47     ` Rob Herring
2021-07-20  2:07     ` Chuanjia Liu
2021-07-20  2:07       ` Chuanjia Liu
2021-07-20  2:07       ` Chuanjia Liu
2021-07-20 16:26       ` Rob Herring
2021-07-20 16:26         ` Rob Herring
2021-07-20 16:26         ` Rob Herring
2021-07-23  7:17         ` Chuanjia Liu
2021-07-23  7:17           ` Chuanjia Liu
2021-07-23  7:17           ` Chuanjia Liu
2021-07-19  7:34 ` [PATCH v11 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node Chuanjia Liu
2021-07-19  7:34   ` Chuanjia Liu
2021-07-19  7:34   ` Chuanjia Liu
2021-07-20  2:59   ` Chuanjia Liu
2021-07-20  2:59     ` Chuanjia Liu
2021-07-20  2:59     ` Chuanjia Liu
2021-08-03 22:18     ` Rob Herring
2021-08-03 22:18       ` Rob Herring
2021-08-03 22:18       ` Rob Herring
2021-08-06  7:37       ` Chuanjia Liu (柳传嘉)
2021-08-02  7:07   ` Chuanjia Liu
2021-08-02  7:07     ` Chuanjia Liu
2021-08-02  7:07     ` Chuanjia Liu
2021-08-10 19:42   ` Bjorn Helgaas
2021-08-10 19:42     ` Bjorn Helgaas
2021-08-10 19:42     ` Bjorn Helgaas
2021-08-13 15:22     ` Lorenzo Pieralisi
2021-08-13 15:22       ` Lorenzo Pieralisi
2021-08-13 15:22       ` Lorenzo Pieralisi
2021-08-17 11:18       ` Chuanjia Liu (柳传嘉)
2021-07-19  7:34 ` [PATCH v11 3/4] arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622 Chuanjia Liu
2021-07-19  7:34   ` Chuanjia Liu
2021-07-19  7:34   ` Chuanjia Liu
2021-07-19  7:34 ` [PATCH v11 4/4] ARM: dts: mediatek: Update MT7629 PCIe node for new format Chuanjia Liu
2021-07-19  7:34   ` Chuanjia Liu
2021-07-19  7:34   ` Chuanjia Liu
2021-08-06  9:39 ` Lorenzo Pieralisi [this message]
2021-08-06  9:39   ` [PATCH v11 0/4] PCI: mediatek: Spilt PCIe node to comply with hardware design Lorenzo Pieralisi
2021-08-06  9:39   ` Lorenzo Pieralisi
2021-08-08  4:50   ` Chuanjia Liu (柳传嘉)

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