* [PATCH V1 1/9] spmi: pmic-arb: add a print in cleanup_irq
2021-08-20 4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
@ 2021-08-20 4:57 ` Fenglin Wu
2021-08-20 4:57 ` [PATCH V1 2/9] spmi: pmic-arb: do not ack and clear peripheral interrupts " Fenglin Wu
` (7 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-08-20 4:57 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd
Cc: collinsd, subbaram, quic_fenglinw, Abhijeet Dharmapurikar
From: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The cleanup_irq() was meant to clear and mask interrupts that were
left enabled in the hardware but there was no interrupt handler
registered for it. Add an error print when it gets invoked.
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index bbbd311..295e19f 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -489,6 +489,8 @@ static void cleanup_irq(struct spmi_pmic_arb *pmic_arb, u16 apid, int id)
u8 per = ppid & 0xFF;
u8 irq_mask = BIT(id);
+ dev_err_ratelimited(&pmic_arb->spmic->dev, "%s apid=%d sid=0x%x per=0x%x irq=%d\n",
+ __func__, apid, sid, per, id);
writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(pmic_arb, apid));
if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid,
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH V1 2/9] spmi: pmic-arb: do not ack and clear peripheral interrupts in cleanup_irq
2021-08-20 4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
2021-08-20 4:57 ` [PATCH V1 1/9] spmi: pmic-arb: add a print in cleanup_irq Fenglin Wu
@ 2021-08-20 4:57 ` Fenglin Wu
2021-08-20 4:57 ` [PATCH V1 3/9] spmi: pmic-arb: check apid against limits before calling irq handler Fenglin Wu
` (6 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-08-20 4:57 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd; +Cc: collinsd, subbaram, quic_fenglinw
From: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, cleanup_irq() is invoked when a peripheral's interrupt
fires and there is no mapping present in the interrupt domain of
spmi interrupt controller.
The cleanup_irq clears the arbiter bit, clears the pmic interrupt
and disables it at the pmic in that order. The last disable in
cleanup_irq races with request_irq() in that it stomps over the
enable issued by request_irq. Fix this by not writing to the pmic
in cleanup_irq. The latched bit will be left set in the pmic,
which will not send us more interrupts even if the enable bit
stays enabled.
When a client wants to request an interrupt, use the activate
callback on the irq_domain to clear latched bit. This ensures
that the latched, if set due to the above changes in cleanup_irq
or when the bootloader leaves it set, gets cleaned up, paving way
for upcoming interrupts to trigger.
With this, there is a possibility of unwanted triggering of
interrupt right after the latched bit is cleared - the interrupt
may be left enabled too. To avoid that, clear the enable first
followed by clearing the latched bit in the activate callback.
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
[collinsd@codeaurora.org: fix merge conflict]
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 295e19f..4d7ad004 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -492,16 +492,6 @@ static void cleanup_irq(struct spmi_pmic_arb *pmic_arb, u16 apid, int id)
dev_err_ratelimited(&pmic_arb->spmic->dev, "%s apid=%d sid=0x%x per=0x%x irq=%d\n",
__func__, apid, sid, per, id);
writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(pmic_arb, apid));
-
- if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid,
- (per << 8) + QPNPINT_REG_LATCHED_CLR, &irq_mask, 1))
- dev_err_ratelimited(&pmic_arb->spmic->dev, "failed to ack irq_mask = 0x%x for ppid = %x\n",
- irq_mask, ppid);
-
- if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid,
- (per << 8) + QPNPINT_REG_EN_CLR, &irq_mask, 1))
- dev_err_ratelimited(&pmic_arb->spmic->dev, "failed to ack irq_mask = 0x%x for ppid = %x\n",
- irq_mask, ppid);
}
static void periph_interrupt(struct spmi_pmic_arb *pmic_arb, u16 apid)
@@ -667,6 +657,7 @@ static int qpnpint_irq_domain_activate(struct irq_domain *domain,
u16 apid = hwirq_to_apid(d->hwirq);
u16 sid = hwirq_to_sid(d->hwirq);
u16 irq = hwirq_to_irq(d->hwirq);
+ u8 buf;
if (pmic_arb->apid_data[apid].irq_ee != pmic_arb->ee) {
dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u: ee=%u but owner=%u\n",
@@ -675,6 +666,10 @@ static int qpnpint_irq_domain_activate(struct irq_domain *domain,
return -ENODEV;
}
+ buf = BIT(irq);
+ qpnpint_spmi_write(d, QPNPINT_REG_EN_CLR, &buf, 1);
+ qpnpint_spmi_write(d, QPNPINT_REG_LATCHED_CLR, &buf, 1);
+
return 0;
}
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH V1 3/9] spmi: pmic-arb: check apid against limits before calling irq handler
2021-08-20 4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
2021-08-20 4:57 ` [PATCH V1 1/9] spmi: pmic-arb: add a print in cleanup_irq Fenglin Wu
2021-08-20 4:57 ` [PATCH V1 2/9] spmi: pmic-arb: do not ack and clear peripheral interrupts " Fenglin Wu
@ 2021-08-20 4:57 ` Fenglin Wu
2021-08-20 4:57 ` [PATCH V1 4/9] spmi: pmic-arb: add support to dispatch interrupt based on IRQ status Fenglin Wu
` (5 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-08-20 4:57 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd; +Cc: collinsd, subbaram, quic_fenglinw
From: David Collins <collinsd@codeaurora.org>
Check that the apid for an SPMI interrupt falls between the
min_apid and max_apid that can be handled by the APPS processor
before invoking the per-apid interrupt handler:
periph_interrupt().
This avoids an access violation in rare cases where the status
bit is set for an interrupt that is not owned by the APPS
processor.
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 4d7ad004..c4adc06 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -535,6 +535,12 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
id = ffs(status) - 1;
status &= ~BIT(id);
apid = id + i * 32;
+ if (apid < pmic_arb->min_apid
+ || apid > pmic_arb->max_apid) {
+ WARN_ONCE(true, "spurious spmi irq received for apid=%d\n",
+ apid);
+ continue;
+ }
enable = readl_relaxed(
ver_ops->acc_enable(pmic_arb, apid));
if (enable & SPMI_PIC_ACC_ENABLE_BIT)
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH V1 4/9] spmi: pmic-arb: add support to dispatch interrupt based on IRQ status
2021-08-20 4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
` (2 preceding siblings ...)
2021-08-20 4:57 ` [PATCH V1 3/9] spmi: pmic-arb: check apid against limits before calling irq handler Fenglin Wu
@ 2021-08-20 4:57 ` Fenglin Wu
2021-08-20 4:58 ` [PATCH V1 5/9] spmi: pmic-arb: correct duplicate APID to PPID mapping logic Fenglin Wu
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-08-20 4:57 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd
Cc: collinsd, subbaram, quic_fenglinw, Ashay Jaiswal
From: Ashay Jaiswal <ashayj@codeaurora.org>
Current implementation of SPMI arbiter dispatches interrupt based on the
Arbiter's accumulator status, in some cases the accumulator status may
remain zero and the interrupt remains un-handled. Add logic to dispatch
interrupts based Arbiter's IRQ status if the accumulator status is zero.
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index c4adc06..59c445b 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -525,12 +525,18 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
u8 ee = pmic_arb->ee;
u32 status, enable;
int i, id, apid;
+ /* status based dispatch */
+ bool acc_valid = false;
+ u32 irq_status = 0;
chained_irq_enter(chip, desc);
for (i = first; i <= last; ++i) {
status = readl_relaxed(
ver_ops->owner_acc_status(pmic_arb, ee, i));
+ if (status)
+ acc_valid = true;
+
while (status) {
id = ffs(status) - 1;
status &= ~BIT(id);
@@ -548,6 +554,28 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
}
}
+ /* ACC_STATUS is empty but IRQ fired check IRQ_STATUS */
+ if (!acc_valid) {
+ for (i = pmic_arb->min_apid; i <= pmic_arb->max_apid; i++) {
+ /* skip if APPS is not irq owner */
+ if (pmic_arb->apid_data[i].irq_ee != pmic_arb->ee)
+ continue;
+
+ irq_status = readl_relaxed(
+ ver_ops->irq_status(pmic_arb, i));
+ if (irq_status) {
+ enable = readl_relaxed(
+ ver_ops->acc_enable(pmic_arb, i));
+ if (enable & SPMI_PIC_ACC_ENABLE_BIT) {
+ dev_dbg(&pmic_arb->spmic->dev,
+ "Dispatching IRQ for apid=%d status=%x\n",
+ i, irq_status);
+ periph_interrupt(pmic_arb, i);
+ }
+ }
+ }
+ }
+
chained_irq_exit(chip, desc);
}
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH V1 5/9] spmi: pmic-arb: correct duplicate APID to PPID mapping logic
2021-08-20 4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
` (3 preceding siblings ...)
2021-08-20 4:57 ` [PATCH V1 4/9] spmi: pmic-arb: add support to dispatch interrupt based on IRQ status Fenglin Wu
@ 2021-08-20 4:58 ` Fenglin Wu
2021-08-20 4:58 ` [PATCH V1 6/9] spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes Fenglin Wu
` (3 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-08-20 4:58 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd; +Cc: collinsd, subbaram, quic_fenglinw
From: David Collins <collinsd@codeaurora.org>
Correct the way that duplicate PPID mappings are handled for PMIC
arbiter v5. The final APID mapped to a given PPID should be the
one which has write owner = APPS EE, if it exists, or if not
that, then the first APID mapped to the PPID, if it exists.
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 59c445b..f1b72d8 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -918,7 +918,8 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb)
* version 5, there is more than one APID mapped to each PPID.
* The owner field for each of these mappings specifies the EE which is
* allowed to write to the APID. The owner of the last (highest) APID
- * for a given PPID will receive interrupts from the PPID.
+ * which has the IRQ owner bit set for a given PPID will receive
+ * interrupts from the PPID.
*/
for (i = 0; ; i++, apidd++) {
offset = pmic_arb->ver_ops->apid_map_offset(i);
@@ -941,16 +942,16 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb)
apid = pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID;
prev_apidd = &pmic_arb->apid_data[apid];
- if (valid && is_irq_ee &&
- prev_apidd->write_ee == pmic_arb->ee) {
+ if (!valid || apidd->write_ee == pmic_arb->ee) {
+ /* First PPID mapping or one for this EE */
+ pmic_arb->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID;
+ } else if (valid && is_irq_ee &&
+ prev_apidd->write_ee == pmic_arb->ee) {
/*
* Duplicate PPID mapping after the one for this EE;
* override the irq owner
*/
prev_apidd->irq_ee = apidd->irq_ee;
- } else if (!valid || is_irq_ee) {
- /* First PPID mapping or duplicate for another EE */
- pmic_arb->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID;
}
apidd->ppid = ppid;
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH V1 6/9] spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes
2021-08-20 4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
` (4 preceding siblings ...)
2021-08-20 4:58 ` [PATCH V1 5/9] spmi: pmic-arb: correct duplicate APID to PPID mapping logic Fenglin Wu
@ 2021-08-20 4:58 ` Fenglin Wu
2021-08-20 4:58 ` [PATCH V1 7/9] spmi: pmic-arb: support updating interrupt type flags Fenglin Wu
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-08-20 4:58 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd; +Cc: collinsd, subbaram, quic_fenglinw
From: David Collins <collinsd@codeaurora.org>
The system crashes due to an access permission violation when
writing to a PMIC peripheral which is not owned by the current
ee. Add a check for PMIC arbiter version 5 for such invalid
write requests and return an error instead of crashing the
system.
Signed-off-by: David Collins <collinsd@codeaurora.org>
---
drivers/spmi/spmi-pmic-arb.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index f1b72d8..9239830 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -1020,6 +1020,11 @@ static int pmic_arb_offset_v5(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
offset = 0x10000 * pmic_arb->ee + 0x80 * apid;
break;
case PMIC_ARB_CHANNEL_RW:
+ if (pmic_arb->apid_data[apid].write_ee != pmic_arb->ee) {
+ dev_err(&pmic_arb->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n",
+ sid, addr);
+ return -EPERM;
+ }
offset = 0x10000 * apid;
break;
}
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH V1 7/9] spmi: pmic-arb: support updating interrupt type flags
2021-08-20 4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
` (5 preceding siblings ...)
2021-08-20 4:58 ` [PATCH V1 6/9] spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes Fenglin Wu
@ 2021-08-20 4:58 ` Fenglin Wu
2021-08-20 4:58 ` [PATCH V1 8/9] spmi: pmic-arb: make interrupt support optional Fenglin Wu
2021-08-20 4:58 ` [PATCH V1 9/9] spmi: pmic-arb: increase SPMI transaction timeout delay Fenglin Wu
8 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-08-20 4:58 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd
Cc: collinsd, subbaram, quic_fenglinw, Yimin Peng
From: Yimin Peng <yiminp@codeaurora.org>
Have the qpnpint_irq_set_type function clear unwanted high/low
trigger bits when updating the interrupt flags.
Signed-off-by: Yimin Peng <yiminp@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 9239830..988204c 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -636,8 +636,12 @@ static int qpnpint_irq_set_type(struct irq_data *d, unsigned int flow_type)
type.type |= BIT(irq);
if (flow_type & IRQF_TRIGGER_RISING)
type.polarity_high |= BIT(irq);
+ else
+ type.polarity_high &= ~BIT(irq);
if (flow_type & IRQF_TRIGGER_FALLING)
type.polarity_low |= BIT(irq);
+ else
+ type.polarity_low &= ~BIT(irq);
flow_handler = handle_edge_irq;
} else {
@@ -646,10 +650,13 @@ static int qpnpint_irq_set_type(struct irq_data *d, unsigned int flow_type)
return -EINVAL;
type.type &= ~BIT(irq); /* level trig */
- if (flow_type & IRQF_TRIGGER_HIGH)
+ if (flow_type & IRQF_TRIGGER_HIGH) {
type.polarity_high |= BIT(irq);
- else
+ type.polarity_low &= ~BIT(irq);
+ } else {
type.polarity_low |= BIT(irq);
+ type.polarity_high &= ~BIT(irq);
+ }
flow_handler = handle_level_irq;
}
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH V1 8/9] spmi: pmic-arb: make interrupt support optional
2021-08-20 4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
` (6 preceding siblings ...)
2021-08-20 4:58 ` [PATCH V1 7/9] spmi: pmic-arb: support updating interrupt type flags Fenglin Wu
@ 2021-08-20 4:58 ` Fenglin Wu
2021-08-20 4:58 ` [PATCH V1 9/9] spmi: pmic-arb: increase SPMI transaction timeout delay Fenglin Wu
8 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-08-20 4:58 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd; +Cc: collinsd, subbaram, quic_fenglinw
From: David Collins <collinsd@codeaurora.org>
Make the support of PMIC peripheral interrupts optional for
spmi-pmic-arb devices. This is useful in situations where
SPMI address mapping is required without the need for IRQ
support.
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 45 +++++++++++++++++++++++++++-----------------
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 988204c..55fa981 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -1280,10 +1280,12 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
goto err_put_ctrl;
}
- pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq");
- if (pmic_arb->irq < 0) {
- err = pmic_arb->irq;
- goto err_put_ctrl;
+ if (of_find_property(pdev->dev.of_node, "interrupt-names", NULL)) {
+ pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq");
+ if (pmic_arb->irq < 0) {
+ err = pmic_arb->irq;
+ goto err_put_ctrl;
+ }
}
err = of_property_read_u32(pdev->dev.of_node, "qcom,channel", &channel);
@@ -1343,17 +1345,22 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
}
}
- dev_dbg(&pdev->dev, "adding irq domain\n");
- pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node,
- &pmic_arb_irq_domain_ops, pmic_arb);
- if (!pmic_arb->domain) {
- dev_err(&pdev->dev, "unable to create irq_domain\n");
- err = -ENOMEM;
- goto err_put_ctrl;
+ if (pmic_arb->irq > 0) {
+ dev_dbg(&pdev->dev, "adding irq domain\n");
+ pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node,
+ &pmic_arb_irq_domain_ops, pmic_arb);
+ if (!pmic_arb->domain) {
+ dev_err(&pdev->dev, "unable to create irq_domain\n");
+ err = -ENOMEM;
+ goto err_put_ctrl;
+ }
+
+ irq_set_chained_handler_and_data(pmic_arb->irq,
+ pmic_arb_chained_irq, pmic_arb);
+ } else {
+ dev_dbg(&pdev->dev, "not supporting PMIC interrupts\n");
}
- irq_set_chained_handler_and_data(pmic_arb->irq, pmic_arb_chained_irq,
- pmic_arb);
err = spmi_controller_add(ctrl);
if (err)
goto err_domain_remove;
@@ -1361,8 +1368,10 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
return 0;
err_domain_remove:
- irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL);
- irq_domain_remove(pmic_arb->domain);
+ if (pmic_arb->irq > 0) {
+ irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL);
+ irq_domain_remove(pmic_arb->domain);
+ }
err_put_ctrl:
spmi_controller_put(ctrl);
return err;
@@ -1373,8 +1382,10 @@ static int spmi_pmic_arb_remove(struct platform_device *pdev)
struct spmi_controller *ctrl = platform_get_drvdata(pdev);
struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
spmi_controller_remove(ctrl);
- irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL);
- irq_domain_remove(pmic_arb->domain);
+ if (pmic_arb->irq > 0) {
+ irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL);
+ irq_domain_remove(pmic_arb->domain);
+ }
spmi_controller_put(ctrl);
return 0;
}
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH V1 9/9] spmi: pmic-arb: increase SPMI transaction timeout delay
2021-08-20 4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
` (7 preceding siblings ...)
2021-08-20 4:58 ` [PATCH V1 8/9] spmi: pmic-arb: make interrupt support optional Fenglin Wu
@ 2021-08-20 4:58 ` Fenglin Wu
8 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-08-20 4:58 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd; +Cc: collinsd, subbaram, quic_fenglinw
From: David Collins <collinsd@codeaurora.org>
Increase the SPMI transaction timeout delay from 100 us to
1000 us in order to account for the slower execution time
found on some simulator targets.
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 55fa981..08c2566 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -91,7 +91,7 @@ enum pmic_arb_channel {
/* Maximum number of support PMIC peripherals */
#define PMIC_ARB_MAX_PERIPHS 512
-#define PMIC_ARB_TIMEOUT_US 100
+#define PMIC_ARB_TIMEOUT_US 1000
#define PMIC_ARB_MAX_TRANS_BYTES (8)
#define PMIC_ARB_APID_MASK 0xFF
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH V1 2/9] spmi: pmic-arb: do not ack and clear peripheral interrupts in cleanup_irq
2021-07-29 1:12 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
@ 2021-07-29 1:12 ` Fenglin Wu
0 siblings, 0 replies; 11+ messages in thread
From: Fenglin Wu @ 2021-07-29 1:12 UTC (permalink / raw)
To: linux-arm-msm, linux-kernel, sboyd; +Cc: collinsd, subbaram, quic_fenglinw
From: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, cleanup_irq() is invoked when a peripheral's interrupt
fires and there is no mapping present in the interrupt domain of
spmi interrupt controller.
The cleanup_irq clears the arbiter bit, clears the pmic interrupt
and disables it at the pmic in that order. The last disable in
cleanup_irq races with request_irq() in that it stomps over the
enable issued by request_irq. Fix this by not writing to the pmic
in cleanup_irq. The latched bit will be left set in the pmic,
which will not send us more interrupts even if the enable bit
stays enabled.
When a client wants to request an interrupt, use the activate
callback on the irq_domain to clear latched bit. This ensures
that the latched, if set due to the above changes in cleanup_irq
or when the bootloader leaves it set, gets cleaned up, paving way
for upcoming interrupts to trigger.
With this, there is a possibility of unwanted triggering of
interrupt right after the latched bit is cleared - the interrupt
may be left enabled too. To avoid that, clear the enable first
followed by clearing the latched bit in the activate callback.
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
[collinsd@codeaurora.org: fix merge conflict]
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 295e19f..4d7ad004 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -492,16 +492,6 @@ static void cleanup_irq(struct spmi_pmic_arb *pmic_arb, u16 apid, int id)
dev_err_ratelimited(&pmic_arb->spmic->dev, "%s apid=%d sid=0x%x per=0x%x irq=%d\n",
__func__, apid, sid, per, id);
writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(pmic_arb, apid));
-
- if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid,
- (per << 8) + QPNPINT_REG_LATCHED_CLR, &irq_mask, 1))
- dev_err_ratelimited(&pmic_arb->spmic->dev, "failed to ack irq_mask = 0x%x for ppid = %x\n",
- irq_mask, ppid);
-
- if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid,
- (per << 8) + QPNPINT_REG_EN_CLR, &irq_mask, 1))
- dev_err_ratelimited(&pmic_arb->spmic->dev, "failed to ack irq_mask = 0x%x for ppid = %x\n",
- irq_mask, ppid);
}
static void periph_interrupt(struct spmi_pmic_arb *pmic_arb, u16 apid)
@@ -667,6 +657,7 @@ static int qpnpint_irq_domain_activate(struct irq_domain *domain,
u16 apid = hwirq_to_apid(d->hwirq);
u16 sid = hwirq_to_sid(d->hwirq);
u16 irq = hwirq_to_irq(d->hwirq);
+ u8 buf;
if (pmic_arb->apid_data[apid].irq_ee != pmic_arb->ee) {
dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u: ee=%u but owner=%u\n",
@@ -675,6 +666,10 @@ static int qpnpint_irq_domain_activate(struct irq_domain *domain,
return -ENODEV;
}
+ buf = BIT(irq);
+ qpnpint_spmi_write(d, QPNPINT_REG_EN_CLR, &buf, 1);
+ qpnpint_spmi_write(d, QPNPINT_REG_LATCHED_CLR, &buf, 1);
+
return 0;
}
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 11+ messages in thread