[Intel-gfx] [PATCH 0/2] i915/uncore: constify the uncore vtables.

[Intel-gfx] [PATCH 0/2] i915/uncore: constify the uncore vtables.

[Dave Airlie]

static const vtables are more secure than writeable function pointers.

These two patches cleanup the uncore vtable to use static const tables.

Dave.

[Intel-gfx] [PATCH 1/2] drm/i915/uncore: split the fw get function into separate vfunc

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

constify it while here. drop the put function since it was never
overloaded and always has done the same thing, no point in
indirecting it for show.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 62 +++++++++++++++--------------
 drivers/gpu/drm/i915/intel_uncore.h |  7 ++--
 2 files changed, 36 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 6b38bc2811c1..d0bbfc320604 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -396,7 +396,7 @@ intel_uncore_fw_release_timer(struct hrtimer *timer)
 
 	GEM_BUG_ON(!domain->wake_count);
 	if (--domain->wake_count == 0)
-		uncore->funcs.force_wake_put(uncore, domain->mask);
+		fw_domains_put(uncore, domain->mask);
 
 	spin_unlock_irqrestore(&uncore->lock, irqflags);
 
@@ -454,7 +454,7 @@ intel_uncore_forcewake_reset(struct intel_uncore *uncore)
 
 	fw = uncore->fw_domains_active;
 	if (fw)
-		uncore->funcs.force_wake_put(uncore, fw);
+		fw_domains_put(uncore, fw);
 
 	fw_domains_reset(uncore, uncore->fw_domains);
 	assert_forcewakes_inactive(uncore);
@@ -562,7 +562,7 @@ static void forcewake_early_sanitize(struct intel_uncore *uncore,
 	intel_uncore_forcewake_reset(uncore);
 	if (restore_forcewake) {
 		spin_lock_irq(&uncore->lock);
-		uncore->funcs.force_wake_get(uncore, restore_forcewake);
+		uncore->fw_get_funcs->force_wake_get(uncore, restore_forcewake);
 
 		if (intel_uncore_has_fifo(uncore))
 			uncore->fifo_count = fifo_free_entries(uncore);
@@ -623,7 +623,7 @@ static void __intel_uncore_forcewake_get(struct intel_uncore *uncore,
 	}
 
 	if (fw_domains)
-		uncore->funcs.force_wake_get(uncore, fw_domains);
+		uncore->fw_get_funcs->force_wake_get(uncore, fw_domains);
 }
 
 /**
@@ -644,7 +644,7 @@ void intel_uncore_forcewake_get(struct intel_uncore *uncore,
 {
 	unsigned long irqflags;
 
-	if (!uncore->funcs.force_wake_get)
+	if (!uncore->fw_get_funcs)
 		return;
 
 	assert_rpm_wakelock_held(uncore->rpm);
@@ -711,7 +711,7 @@ void intel_uncore_forcewake_get__locked(struct intel_uncore *uncore,
 {
 	lockdep_assert_held(&uncore->lock);
 
-	if (!uncore->funcs.force_wake_get)
+	if (!uncore->fw_get_funcs)
 		return;
 
 	__intel_uncore_forcewake_get(uncore, fw_domains);
@@ -733,7 +733,7 @@ static void __intel_uncore_forcewake_put(struct intel_uncore *uncore,
 			continue;
 		}
 
-		uncore->funcs.force_wake_put(uncore, domain->mask);
+		fw_domains_put(uncore, domain->mask);
 	}
 }
 
@@ -750,7 +750,7 @@ void intel_uncore_forcewake_put(struct intel_uncore *uncore,
 {
 	unsigned long irqflags;
 
-	if (!uncore->funcs.force_wake_put)
+	if (!uncore->fw_get_funcs)
 		return;
 
 	spin_lock_irqsave(&uncore->lock, irqflags);
@@ -769,7 +769,7 @@ void intel_uncore_forcewake_flush(struct intel_uncore *uncore,
 	struct intel_uncore_forcewake_domain *domain;
 	unsigned int tmp;
 
-	if (!uncore->funcs.force_wake_put)
+	if (!uncore->fw_get_funcs)
 		return;
 
 	fw_domains &= uncore->fw_domains;
@@ -793,7 +793,7 @@ void intel_uncore_forcewake_put__locked(struct intel_uncore *uncore,
 {
 	lockdep_assert_held(&uncore->lock);
 
-	if (!uncore->funcs.force_wake_put)
+	if (!uncore->fw_get_funcs)
 		return;
 
 	__intel_uncore_forcewake_put(uncore, fw_domains);
@@ -801,7 +801,7 @@ void intel_uncore_forcewake_put__locked(struct intel_uncore *uncore,
 
 void assert_forcewakes_inactive(struct intel_uncore *uncore)
 {
-	if (!uncore->funcs.force_wake_get)
+	if (!uncore->fw_get_funcs)
 		return;
 
 	drm_WARN(&uncore->i915->drm, uncore->fw_domains_active,
@@ -818,7 +818,7 @@ void assert_forcewakes_active(struct intel_uncore *uncore,
 	if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM))
 		return;
 
-	if (!uncore->funcs.force_wake_get)
+	if (!uncore->fw_get_funcs)
 		return;
 
 	spin_lock_irq(&uncore->lock);
@@ -1605,7 +1605,7 @@ static noinline void ___force_wake_auto(struct intel_uncore *uncore,
 	for_each_fw_domain_masked(domain, fw_domains, uncore, tmp)
 		fw_domain_arm_timer(domain);
 
-	uncore->funcs.force_wake_get(uncore, fw_domains);
+	uncore->fw_get_funcs->force_wake_get(uncore, fw_domains);
 }
 
 static inline void __force_wake_auto(struct intel_uncore *uncore,
@@ -1866,6 +1866,18 @@ static void intel_uncore_fw_domains_fini(struct intel_uncore *uncore)
 		fw_domain_fini(uncore, d->id);
 }
 
+static const struct intel_uncore_fw_get uncore_get_fallback = {
+	.force_wake_get = fw_domains_get_with_fallback
+};
+
+static const struct intel_uncore_fw_get uncore_get_normal = {
+	.force_wake_get = fw_domains_get
+};
+
+static const struct intel_uncore_fw_get uncore_get_thread_status = {
+	.force_wake_get = fw_domains_get_with_thread_status
+};
+
 static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 {
 	struct drm_i915_private *i915 = uncore->i915;
@@ -1881,8 +1893,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 		intel_engine_mask_t emask = INTEL_INFO(i915)->platform_engine_mask;
 		int i;
 
-		uncore->funcs.force_wake_get = fw_domains_get_with_fallback;
-		uncore->funcs.force_wake_put = fw_domains_put;
+		uncore->fw_get_funcs = &uncore_get_fallback;
 		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
 			       FORCEWAKE_RENDER_GEN9,
 			       FORCEWAKE_ACK_RENDER_GEN9);
@@ -1907,8 +1918,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 				       FORCEWAKE_ACK_MEDIA_VEBOX_GEN11(i));
 		}
 	} else if (IS_GRAPHICS_VER(i915, 9, 10)) {
-		uncore->funcs.force_wake_get = fw_domains_get_with_fallback;
-		uncore->funcs.force_wake_put = fw_domains_put;
+		uncore->fw_get_funcs = &uncore_get_fallback;
 		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
 			       FORCEWAKE_RENDER_GEN9,
 			       FORCEWAKE_ACK_RENDER_GEN9);
@@ -1918,16 +1928,13 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 		fw_domain_init(uncore, FW_DOMAIN_ID_MEDIA,
 			       FORCEWAKE_MEDIA_GEN9, FORCEWAKE_ACK_MEDIA_GEN9);
 	} else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
-		uncore->funcs.force_wake_get = fw_domains_get;
-		uncore->funcs.force_wake_put = fw_domains_put;
+		uncore->fw_get_funcs = &uncore_get_normal;
 		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
 			       FORCEWAKE_VLV, FORCEWAKE_ACK_VLV);
 		fw_domain_init(uncore, FW_DOMAIN_ID_MEDIA,
 			       FORCEWAKE_MEDIA_VLV, FORCEWAKE_ACK_MEDIA_VLV);
 	} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
-		uncore->funcs.force_wake_get =
-			fw_domains_get_with_thread_status;
-		uncore->funcs.force_wake_put = fw_domains_put;
+		uncore->fw_get_funcs = &uncore_get_thread_status;
 		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
 			       FORCEWAKE_MT, FORCEWAKE_ACK_HSW);
 	} else if (IS_IVYBRIDGE(i915)) {
@@ -1942,9 +1949,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 		 * (correctly) interpreted by the test below as MT
 		 * forcewake being disabled.
 		 */
-		uncore->funcs.force_wake_get =
-			fw_domains_get_with_thread_status;
-		uncore->funcs.force_wake_put = fw_domains_put;
+		uncore->fw_get_funcs = &uncore_get_thread_status;
 
 		/* We need to init first for ECOBUS access and then
 		 * determine later if we want to reinit, in case of MT access is
@@ -1975,9 +1980,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 				       FORCEWAKE, FORCEWAKE_ACK);
 		}
 	} else if (GRAPHICS_VER(i915) == 6) {
-		uncore->funcs.force_wake_get =
-			fw_domains_get_with_thread_status;
-		uncore->funcs.force_wake_put = fw_domains_put;
+		uncore->fw_get_funcs = &uncore_get_thread_status;
 		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
 			       FORCEWAKE, FORCEWAKE_ACK);
 	}
@@ -2186,8 +2189,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 	}
 
 	/* make sure fw funcs are set if and only if we have fw*/
-	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_get);
-	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_put);
+	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->fw_get_funcs);
 	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.read_fw_domains);
 	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.write_fw_domains);
 
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index 3c0b0a8b5250..1a7448f5f16f 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -84,12 +84,12 @@ enum forcewake_domains {
 	FORCEWAKE_ALL = BIT(FW_DOMAIN_ID_COUNT) - 1,
 };
 
-struct intel_uncore_funcs {
+struct intel_uncore_fw_get {
 	void (*force_wake_get)(struct intel_uncore *uncore,
 			       enum forcewake_domains domains);
-	void (*force_wake_put)(struct intel_uncore *uncore,
-			       enum forcewake_domains domains);
+};
 
+struct intel_uncore_funcs {
 	enum forcewake_domains (*read_fw_domains)(struct intel_uncore *uncore,
 						  i915_reg_t r);
 	enum forcewake_domains (*write_fw_domains)(struct intel_uncore *uncore,
@@ -137,6 +137,7 @@ struct intel_uncore {
 	unsigned int fw_domains_table_entries;
 
 	struct notifier_block pmic_bus_access_nb;
+	const struct intel_uncore_fw_get *fw_get_funcs;
 	struct intel_uncore_funcs funcs;
 
 	unsigned int fifo_count;
-- 
2.31.1

Re: [Intel-gfx] [PATCH 1/2] drm/i915/uncore: split the fw get function into separate vfunc

[Jani Nikula]

On Wed, 08 Sep 2021, Dave Airlie <airlied@gmail.com> wrote:
> From: Dave Airlie <airlied@redhat.com>
>
> constify it while here. drop the put function since it was never
> overloaded and always has done the same thing, no point in
> indirecting it for show.
>
> Signed-off-by: Dave Airlie <airlied@redhat.com>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 62 +++++++++++++++--------------
>  drivers/gpu/drm/i915/intel_uncore.h |  7 ++--
>  2 files changed, 36 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 6b38bc2811c1..d0bbfc320604 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -396,7 +396,7 @@ intel_uncore_fw_release_timer(struct hrtimer *timer)
>  
>  	GEM_BUG_ON(!domain->wake_count);
>  	if (--domain->wake_count == 0)
> -		uncore->funcs.force_wake_put(uncore, domain->mask);
> +		fw_domains_put(uncore, domain->mask);
>  
>  	spin_unlock_irqrestore(&uncore->lock, irqflags);
>  
> @@ -454,7 +454,7 @@ intel_uncore_forcewake_reset(struct intel_uncore *uncore)
>  
>  	fw = uncore->fw_domains_active;
>  	if (fw)
> -		uncore->funcs.force_wake_put(uncore, fw);
> +		fw_domains_put(uncore, fw);

I kind of dislike the asymmetry of get remaining a vfunc and put being
called directly in code.

How about making fw_domains_get() a thin wrapper that calls the
appropriate vfunc? Something like this, incorporated into your series:

--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -248,7 +248,7 @@ fw_domain_put(const struct intel_uncore_forcewake_domain *d)
 }
 
 static void
-fw_domains_get(struct intel_uncore *uncore, enum forcewake_domains fw_domains)
+fw_domains_get_normal(struct intel_uncore *uncore, enum forcewake_domains fw_domains)
 {
 	struct intel_uncore_forcewake_domain *d;
 	unsigned int tmp;
@@ -266,6 +266,12 @@ fw_domains_get(struct intel_uncore *uncore, enum forcewake_domains fw_domains)
 	uncore->fw_domains_active |= fw_domains;
 }
 
+static void
+fw_domains_get(struct intel_uncore *uncore, enum forcewake_domains fw_domains)
+{
+	uncore->funcs.force_wake_get(uncore, fw_domains);
+}
+
 static void
 fw_domains_get_with_fallback(struct intel_uncore *uncore,
 			     enum forcewake_domains fw_domains)
@@ -340,7 +346,7 @@ static void __gen6_gt_wait_for_thread_c0(struct intel_uncore *uncore)
 static void fw_domains_get_with_thread_status(struct intel_uncore *uncore,
 					      enum forcewake_domains fw_domains)
 {
-	fw_domains_get(uncore, fw_domains);
+	fw_domains_get_normal(uncore, fw_domains);
 
 	/* WaRsForcewakeWaitTC0:snb,ivb,hsw,bdw,vlv */
 	__gen6_gt_wait_for_thread_c0(uncore);
@@ -1893,7 +1899,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 		fw_domain_init(uncore, FW_DOMAIN_ID_MEDIA,
 			       FORCEWAKE_MEDIA_GEN9, FORCEWAKE_ACK_MEDIA_GEN9);
 	} else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
-		uncore->funcs.force_wake_get = fw_domains_get;
+		uncore->funcs.force_wake_get = fw_domains_get_normal;
 		uncore->funcs.force_wake_put = fw_domains_put;
 		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
 			       FORCEWAKE_VLV, FORCEWAKE_ACK_VLV);

The call sites will look nice and symmetrical, and the compiler will
inline the call away.

Other than that, and the fact that this fails to apply and thus doesn't
give us CI results,


Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>  
>  	fw_domains_reset(uncore, uncore->fw_domains);
>  	assert_forcewakes_inactive(uncore);
> @@ -562,7 +562,7 @@ static void forcewake_early_sanitize(struct intel_uncore *uncore,
>  	intel_uncore_forcewake_reset(uncore);
>  	if (restore_forcewake) {
>  		spin_lock_irq(&uncore->lock);
> -		uncore->funcs.force_wake_get(uncore, restore_forcewake);
> +		uncore->fw_get_funcs->force_wake_get(uncore, restore_forcewake);
>  
>  		if (intel_uncore_has_fifo(uncore))
>  			uncore->fifo_count = fifo_free_entries(uncore);
> @@ -623,7 +623,7 @@ static void __intel_uncore_forcewake_get(struct intel_uncore *uncore,
>  	}
>  
>  	if (fw_domains)
> -		uncore->funcs.force_wake_get(uncore, fw_domains);
> +		uncore->fw_get_funcs->force_wake_get(uncore, fw_domains);
>  }
>  
>  /**
> @@ -644,7 +644,7 @@ void intel_uncore_forcewake_get(struct intel_uncore *uncore,
>  {
>  	unsigned long irqflags;
>  
> -	if (!uncore->funcs.force_wake_get)
> +	if (!uncore->fw_get_funcs)
>  		return;
>  
>  	assert_rpm_wakelock_held(uncore->rpm);
> @@ -711,7 +711,7 @@ void intel_uncore_forcewake_get__locked(struct intel_uncore *uncore,
>  {
>  	lockdep_assert_held(&uncore->lock);
>  
> -	if (!uncore->funcs.force_wake_get)
> +	if (!uncore->fw_get_funcs)
>  		return;
>  
>  	__intel_uncore_forcewake_get(uncore, fw_domains);
> @@ -733,7 +733,7 @@ static void __intel_uncore_forcewake_put(struct intel_uncore *uncore,
>  			continue;
>  		}
>  
> -		uncore->funcs.force_wake_put(uncore, domain->mask);
> +		fw_domains_put(uncore, domain->mask);
>  	}
>  }
>  
> @@ -750,7 +750,7 @@ void intel_uncore_forcewake_put(struct intel_uncore *uncore,
>  {
>  	unsigned long irqflags;
>  
> -	if (!uncore->funcs.force_wake_put)
> +	if (!uncore->fw_get_funcs)
>  		return;
>  
>  	spin_lock_irqsave(&uncore->lock, irqflags);
> @@ -769,7 +769,7 @@ void intel_uncore_forcewake_flush(struct intel_uncore *uncore,
>  	struct intel_uncore_forcewake_domain *domain;
>  	unsigned int tmp;
>  
> -	if (!uncore->funcs.force_wake_put)
> +	if (!uncore->fw_get_funcs)
>  		return;
>  
>  	fw_domains &= uncore->fw_domains;
> @@ -793,7 +793,7 @@ void intel_uncore_forcewake_put__locked(struct intel_uncore *uncore,
>  {
>  	lockdep_assert_held(&uncore->lock);
>  
> -	if (!uncore->funcs.force_wake_put)
> +	if (!uncore->fw_get_funcs)
>  		return;
>  
>  	__intel_uncore_forcewake_put(uncore, fw_domains);
> @@ -801,7 +801,7 @@ void intel_uncore_forcewake_put__locked(struct intel_uncore *uncore,
>  
>  void assert_forcewakes_inactive(struct intel_uncore *uncore)
>  {
> -	if (!uncore->funcs.force_wake_get)
> +	if (!uncore->fw_get_funcs)
>  		return;
>  
>  	drm_WARN(&uncore->i915->drm, uncore->fw_domains_active,
> @@ -818,7 +818,7 @@ void assert_forcewakes_active(struct intel_uncore *uncore,
>  	if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM))
>  		return;
>  
> -	if (!uncore->funcs.force_wake_get)
> +	if (!uncore->fw_get_funcs)
>  		return;
>  
>  	spin_lock_irq(&uncore->lock);
> @@ -1605,7 +1605,7 @@ static noinline void ___force_wake_auto(struct intel_uncore *uncore,
>  	for_each_fw_domain_masked(domain, fw_domains, uncore, tmp)
>  		fw_domain_arm_timer(domain);
>  
> -	uncore->funcs.force_wake_get(uncore, fw_domains);
> +	uncore->fw_get_funcs->force_wake_get(uncore, fw_domains);
>  }
>  
>  static inline void __force_wake_auto(struct intel_uncore *uncore,
> @@ -1866,6 +1866,18 @@ static void intel_uncore_fw_domains_fini(struct intel_uncore *uncore)
>  		fw_domain_fini(uncore, d->id);
>  }
>  
> +static const struct intel_uncore_fw_get uncore_get_fallback = {
> +	.force_wake_get = fw_domains_get_with_fallback
> +};
> +
> +static const struct intel_uncore_fw_get uncore_get_normal = {
> +	.force_wake_get = fw_domains_get
> +};
> +
> +static const struct intel_uncore_fw_get uncore_get_thread_status = {
> +	.force_wake_get = fw_domains_get_with_thread_status
> +};
> +
>  static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>  {
>  	struct drm_i915_private *i915 = uncore->i915;
> @@ -1881,8 +1893,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>  		intel_engine_mask_t emask = INTEL_INFO(i915)->platform_engine_mask;
>  		int i;
>  
> -		uncore->funcs.force_wake_get = fw_domains_get_with_fallback;
> -		uncore->funcs.force_wake_put = fw_domains_put;
> +		uncore->fw_get_funcs = &uncore_get_fallback;
>  		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
>  			       FORCEWAKE_RENDER_GEN9,
>  			       FORCEWAKE_ACK_RENDER_GEN9);
> @@ -1907,8 +1918,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>  				       FORCEWAKE_ACK_MEDIA_VEBOX_GEN11(i));
>  		}
>  	} else if (IS_GRAPHICS_VER(i915, 9, 10)) {
> -		uncore->funcs.force_wake_get = fw_domains_get_with_fallback;
> -		uncore->funcs.force_wake_put = fw_domains_put;
> +		uncore->fw_get_funcs = &uncore_get_fallback;
>  		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
>  			       FORCEWAKE_RENDER_GEN9,
>  			       FORCEWAKE_ACK_RENDER_GEN9);
> @@ -1918,16 +1928,13 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>  		fw_domain_init(uncore, FW_DOMAIN_ID_MEDIA,
>  			       FORCEWAKE_MEDIA_GEN9, FORCEWAKE_ACK_MEDIA_GEN9);
>  	} else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
> -		uncore->funcs.force_wake_get = fw_domains_get;
> -		uncore->funcs.force_wake_put = fw_domains_put;
> +		uncore->fw_get_funcs = &uncore_get_normal;
>  		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
>  			       FORCEWAKE_VLV, FORCEWAKE_ACK_VLV);
>  		fw_domain_init(uncore, FW_DOMAIN_ID_MEDIA,
>  			       FORCEWAKE_MEDIA_VLV, FORCEWAKE_ACK_MEDIA_VLV);
>  	} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
> -		uncore->funcs.force_wake_get =
> -			fw_domains_get_with_thread_status;
> -		uncore->funcs.force_wake_put = fw_domains_put;
> +		uncore->fw_get_funcs = &uncore_get_thread_status;
>  		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
>  			       FORCEWAKE_MT, FORCEWAKE_ACK_HSW);
>  	} else if (IS_IVYBRIDGE(i915)) {
> @@ -1942,9 +1949,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>  		 * (correctly) interpreted by the test below as MT
>  		 * forcewake being disabled.
>  		 */
> -		uncore->funcs.force_wake_get =
> -			fw_domains_get_with_thread_status;
> -		uncore->funcs.force_wake_put = fw_domains_put;
> +		uncore->fw_get_funcs = &uncore_get_thread_status;
>  
>  		/* We need to init first for ECOBUS access and then
>  		 * determine later if we want to reinit, in case of MT access is
> @@ -1975,9 +1980,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>  				       FORCEWAKE, FORCEWAKE_ACK);
>  		}
>  	} else if (GRAPHICS_VER(i915) == 6) {
> -		uncore->funcs.force_wake_get =
> -			fw_domains_get_with_thread_status;
> -		uncore->funcs.force_wake_put = fw_domains_put;
> +		uncore->fw_get_funcs = &uncore_get_thread_status;
>  		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
>  			       FORCEWAKE, FORCEWAKE_ACK);
>  	}
> @@ -2186,8 +2189,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
>  	}
>  
>  	/* make sure fw funcs are set if and only if we have fw*/
> -	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_get);
> -	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_put);
> +	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->fw_get_funcs);
>  	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.read_fw_domains);
>  	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.write_fw_domains);
>  
> diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
> index 3c0b0a8b5250..1a7448f5f16f 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.h
> +++ b/drivers/gpu/drm/i915/intel_uncore.h
> @@ -84,12 +84,12 @@ enum forcewake_domains {
>  	FORCEWAKE_ALL = BIT(FW_DOMAIN_ID_COUNT) - 1,
>  };
>  
> -struct intel_uncore_funcs {
> +struct intel_uncore_fw_get {
>  	void (*force_wake_get)(struct intel_uncore *uncore,
>  			       enum forcewake_domains domains);
> -	void (*force_wake_put)(struct intel_uncore *uncore,
> -			       enum forcewake_domains domains);
> +};
>  
> +struct intel_uncore_funcs {
>  	enum forcewake_domains (*read_fw_domains)(struct intel_uncore *uncore,
>  						  i915_reg_t r);
>  	enum forcewake_domains (*write_fw_domains)(struct intel_uncore *uncore,
> @@ -137,6 +137,7 @@ struct intel_uncore {
>  	unsigned int fw_domains_table_entries;
>  
>  	struct notifier_block pmic_bus_access_nb;
> +	const struct intel_uncore_fw_get *fw_get_funcs;
>  	struct intel_uncore_funcs funcs;
>  
>  	unsigned int fifo_count;

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] [PATCH 2/2] drm/i915/uncore: constify the register vtables.

[Dave Airlie]

From: Dave Airlie <airlied@redhat.com>

This reworks the uncore function vtable so that it's constant.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 139 +++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_uncore.h |   8 +-
 2 files changed, 89 insertions(+), 58 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index d0bbfc320604..0bc6e16fc4e3 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1756,32 +1756,24 @@ __vgpu_write(8)
 __vgpu_write(16)
 __vgpu_write(32)
 
-#define ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, x) \
-do { \
-	(uncore)->funcs.mmio_writeb = x##_write8; \
-	(uncore)->funcs.mmio_writew = x##_write16; \
-	(uncore)->funcs.mmio_writel = x##_write32; \
-} while (0)
-
-#define ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x) \
-do { \
-	(uncore)->funcs.mmio_readb = x##_read8; \
-	(uncore)->funcs.mmio_readw = x##_read16; \
-	(uncore)->funcs.mmio_readl = x##_read32; \
-	(uncore)->funcs.mmio_readq = x##_read64; \
-} while (0)
-
-#define ASSIGN_WRITE_MMIO_VFUNCS(uncore, x) \
-do { \
-	ASSIGN_RAW_WRITE_MMIO_VFUNCS((uncore), x); \
-	(uncore)->funcs.write_fw_domains = x##_reg_write_fw_domains; \
-} while (0)
-
-#define ASSIGN_READ_MMIO_VFUNCS(uncore, x) \
-do { \
-	ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x); \
-	(uncore)->funcs.read_fw_domains = x##_reg_read_fw_domains; \
-} while (0)
+#define MMIO_RAW_WRITE_VFUNCS(x)     \
+	.mmio_writeb = x##_write8,   \
+	.mmio_writew = x##_write16,  \
+	.mmio_writel = x##_write32
+
+#define MMIO_RAW_READ_VFUNCS(x)	  \
+	.mmio_readb = x##_read8,  \
+	.mmio_readw = x##_read16, \
+	.mmio_readl = x##_read32, \
+	.mmio_readq = x##_read64
+
+#define MMIO_WRITE_FW_VFUNCS(x)				\
+	MMIO_RAW_WRITE_VFUNCS(x),			\
+	.write_fw_domains = x##_reg_write_fw_domains
+
+#define MMIO_READ_FW_VFUNCS(x)				\
+	MMIO_RAW_READ_VFUNCS(x),			\
+	.read_fw_domains = x##_reg_read_fw_domains
 
 static int __fw_domain_init(struct intel_uncore *uncore,
 			    enum forcewake_domain_id domain_id,
@@ -2086,22 +2078,70 @@ void intel_uncore_init_early(struct intel_uncore *uncore,
 	uncore->debug = &i915->mmio_debug;
 }
 
+static const struct intel_uncore_funcs vgpu_funcs = {
+	MMIO_RAW_WRITE_VFUNCS(vgpu),
+	MMIO_RAW_READ_VFUNCS(vgpu),
+};
+
+static const struct intel_uncore_funcs gen5_funcs = {
+	MMIO_RAW_WRITE_VFUNCS(gen5),
+	MMIO_RAW_READ_VFUNCS(gen5),
+};
+
+static const struct intel_uncore_funcs gen2_funcs = {
+	MMIO_RAW_WRITE_VFUNCS(gen2),
+	MMIO_RAW_READ_VFUNCS(gen2),
+};
+
+
 static void uncore_raw_init(struct intel_uncore *uncore)
 {
 	GEM_BUG_ON(intel_uncore_has_forcewake(uncore));
 
 	if (intel_vgpu_active(uncore->i915)) {
-		ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, vgpu);
-		ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, vgpu);
+		uncore->funcs = &vgpu_funcs;
 	} else if (GRAPHICS_VER(uncore->i915) == 5) {
-		ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen5);
-		ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen5);
+		uncore->funcs = &gen5_funcs;
 	} else {
-		ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen2);
-		ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen2);
+		uncore->funcs = &gen2_funcs;
 	}
 }
 
+static const struct intel_uncore_funcs xehp_funcs = {
+	MMIO_WRITE_FW_VFUNCS(xehp_fwtable),
+	MMIO_READ_FW_VFUNCS(gen11_fwtable)
+};
+
+static const struct intel_uncore_funcs gen12_funcs = {
+	MMIO_WRITE_FW_VFUNCS(gen12_fwtable),
+	MMIO_READ_FW_VFUNCS(gen12_fwtable)
+};
+
+static const struct intel_uncore_funcs gen11_funcs = {
+	MMIO_WRITE_FW_VFUNCS(gen11_fwtable),
+	MMIO_READ_FW_VFUNCS(gen11_fwtable)
+};
+
+static const struct intel_uncore_funcs gen9_funcs = {
+	MMIO_WRITE_FW_VFUNCS(fwtable),
+	MMIO_READ_FW_VFUNCS(fwtable)
+};
+
+static const struct intel_uncore_funcs gen8_funcs = {
+	MMIO_WRITE_FW_VFUNCS(gen8),
+	MMIO_READ_FW_VFUNCS(gen6)
+};
+
+static const struct intel_uncore_funcs vlv_funcs = {
+	MMIO_WRITE_FW_VFUNCS(gen8),
+	MMIO_READ_FW_VFUNCS(fwtable)
+};
+
+static const struct intel_uncore_funcs gen6_funcs = {
+	MMIO_WRITE_FW_VFUNCS(gen6),
+	MMIO_READ_FW_VFUNCS(gen6)
+};
+
 static int uncore_forcewake_init(struct intel_uncore *uncore)
 {
 	struct drm_i915_private *i915 = uncore->i915;
@@ -2116,38 +2156,29 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)
 
 	if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) {
 		ASSIGN_FW_DOMAINS_TABLE(uncore, __dg2_fw_ranges);
-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, xehp_fwtable);
-		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
+		uncore->funcs = &xehp_funcs;
 	} else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
 		ASSIGN_FW_DOMAINS_TABLE(uncore, __xehp_fw_ranges);
-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, xehp_fwtable);
-		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
+		uncore->funcs = &xehp_funcs;
 	} else if (GRAPHICS_VER(i915) >= 12) {
 		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen12_fw_ranges);
-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen12_fwtable);
-		ASSIGN_READ_MMIO_VFUNCS(uncore, gen12_fwtable);
+		uncore->funcs = &gen12_funcs;
 	} else if (GRAPHICS_VER(i915) == 11) {
 		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen11_fw_ranges);
-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen11_fwtable);
-		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
+		uncore->funcs = &gen11_funcs;
 	} else if (IS_GRAPHICS_VER(i915, 9, 10)) {
 		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen9_fw_ranges);
-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
-		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
+		uncore->funcs = &gen9_funcs;
 	} else if (IS_CHERRYVIEW(i915)) {
 		ASSIGN_FW_DOMAINS_TABLE(uncore, __chv_fw_ranges);
-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
-		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
+		uncore->funcs = &gen9_funcs;
 	} else if (GRAPHICS_VER(i915) == 8) {
-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen8);
-		ASSIGN_READ_MMIO_VFUNCS(uncore, gen6);
+		uncore->funcs = &gen8_funcs;
 	} else if (IS_VALLEYVIEW(i915)) {
 		ASSIGN_FW_DOMAINS_TABLE(uncore, __vlv_fw_ranges);
-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
-		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
+		uncore->funcs = &vlv_funcs;
 	} else if (IS_GRAPHICS_VER(i915, 6, 7)) {
-		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
-		ASSIGN_READ_MMIO_VFUNCS(uncore, gen6);
+		uncore->funcs = &gen6_funcs;
 	}
 
 	uncore->pmic_bus_access_nb.notifier_call = i915_pmic_bus_access_notifier;
@@ -2190,8 +2221,8 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 
 	/* make sure fw funcs are set if and only if we have fw*/
 	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->fw_get_funcs);
-	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.read_fw_domains);
-	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.write_fw_domains);
+	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs->read_fw_domains);
+	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs->write_fw_domains);
 
 	if (HAS_FPGA_DBG_UNCLAIMED(i915))
 		uncore->flags |= UNCORE_HAS_FPGA_DBG_UNCLAIMED;
@@ -2530,10 +2561,10 @@ intel_uncore_forcewake_for_reg(struct intel_uncore *uncore,
 		return 0;
 
 	if (op & FW_REG_READ)
-		fw_domains = uncore->funcs.read_fw_domains(uncore, reg);
+		fw_domains = uncore->funcs->read_fw_domains(uncore, reg);
 
 	if (op & FW_REG_WRITE)
-		fw_domains |= uncore->funcs.write_fw_domains(uncore, reg);
+		fw_domains |= uncore->funcs->write_fw_domains(uncore, reg);
 
 	drm_WARN_ON(&uncore->i915->drm, fw_domains & ~uncore->fw_domains);
 
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index 1a7448f5f16f..52d4baf07656 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -138,7 +138,7 @@ struct intel_uncore {
 
 	struct notifier_block pmic_bus_access_nb;
 	const struct intel_uncore_fw_get *fw_get_funcs;
-	struct intel_uncore_funcs funcs;
+	const struct intel_uncore_funcs *funcs;
 
 	unsigned int fifo_count;
 
@@ -312,14 +312,14 @@ __raw_write(64, q)
 static inline u##x__ intel_uncore_##name__(struct intel_uncore *uncore, \
 					   i915_reg_t reg) \
 { \
-	return uncore->funcs.mmio_read##s__(uncore, reg, (trace__)); \
+	return uncore->funcs->mmio_read##s__(uncore, reg, (trace__)); \
 }
 
 #define __uncore_write(name__, x__, s__, trace__) \
 static inline void intel_uncore_##name__(struct intel_uncore *uncore, \
 					 i915_reg_t reg, u##x__ val) \
 { \
-	uncore->funcs.mmio_write##s__(uncore, reg, val, (trace__)); \
+	uncore->funcs->mmio_write##s__(uncore, reg, val, (trace__)); \
 }
 
 __uncore_read(read8, 8, b, true)
@@ -338,7 +338,7 @@ __uncore_write(write_notrace, 32, l, false)
  * an arbitrary delay between them. This can cause the hardware to
  * act upon the intermediate value, possibly leading to corruption and
  * machine death. For this reason we do not support intel_uncore_write64,
- * or uncore->funcs.mmio_writeq.
+ * or uncore->funcs->mmio_writeq.
  *
  * When reading a 64-bit value as two 32-bit values, the delay may cause
  * the two reads to mismatch, e.g. a timestamp overflowing. Also note that
-- 
2.31.1

Re: [Intel-gfx] [PATCH 2/2] drm/i915/uncore: constify the register vtables.

[Jani Nikula]

On Wed, 08 Sep 2021, Dave Airlie <airlied@gmail.com> wrote:
> From: Dave Airlie <airlied@redhat.com>
>
> This reworks the uncore function vtable so that it's constant.

There's a bug in there, see comment inline, with that fixed,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>
> Signed-off-by: Dave Airlie <airlied@redhat.com>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 139 +++++++++++++++++-----------
>  drivers/gpu/drm/i915/intel_uncore.h |   8 +-
>  2 files changed, 89 insertions(+), 58 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index d0bbfc320604..0bc6e16fc4e3 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1756,32 +1756,24 @@ __vgpu_write(8)
>  __vgpu_write(16)
>  __vgpu_write(32)
>  
> -#define ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, x) \
> -do { \
> -	(uncore)->funcs.mmio_writeb = x##_write8; \
> -	(uncore)->funcs.mmio_writew = x##_write16; \
> -	(uncore)->funcs.mmio_writel = x##_write32; \
> -} while (0)
> -
> -#define ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x) \
> -do { \
> -	(uncore)->funcs.mmio_readb = x##_read8; \
> -	(uncore)->funcs.mmio_readw = x##_read16; \
> -	(uncore)->funcs.mmio_readl = x##_read32; \
> -	(uncore)->funcs.mmio_readq = x##_read64; \
> -} while (0)
> -
> -#define ASSIGN_WRITE_MMIO_VFUNCS(uncore, x) \
> -do { \
> -	ASSIGN_RAW_WRITE_MMIO_VFUNCS((uncore), x); \
> -	(uncore)->funcs.write_fw_domains = x##_reg_write_fw_domains; \
> -} while (0)
> -
> -#define ASSIGN_READ_MMIO_VFUNCS(uncore, x) \
> -do { \
> -	ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x); \
> -	(uncore)->funcs.read_fw_domains = x##_reg_read_fw_domains; \
> -} while (0)
> +#define MMIO_RAW_WRITE_VFUNCS(x)     \
> +	.mmio_writeb = x##_write8,   \
> +	.mmio_writew = x##_write16,  \
> +	.mmio_writel = x##_write32
> +
> +#define MMIO_RAW_READ_VFUNCS(x)	  \
> +	.mmio_readb = x##_read8,  \
> +	.mmio_readw = x##_read16, \
> +	.mmio_readl = x##_read32, \
> +	.mmio_readq = x##_read64
> +
> +#define MMIO_WRITE_FW_VFUNCS(x)				\
> +	MMIO_RAW_WRITE_VFUNCS(x),			\
> +	.write_fw_domains = x##_reg_write_fw_domains
> +
> +#define MMIO_READ_FW_VFUNCS(x)				\
> +	MMIO_RAW_READ_VFUNCS(x),			\
> +	.read_fw_domains = x##_reg_read_fw_domains
>  
>  static int __fw_domain_init(struct intel_uncore *uncore,
>  			    enum forcewake_domain_id domain_id,
> @@ -2086,22 +2078,70 @@ void intel_uncore_init_early(struct intel_uncore *uncore,
>  	uncore->debug = &i915->mmio_debug;
>  }
>  
> +static const struct intel_uncore_funcs vgpu_funcs = {
> +	MMIO_RAW_WRITE_VFUNCS(vgpu),
> +	MMIO_RAW_READ_VFUNCS(vgpu),
> +};
> +
> +static const struct intel_uncore_funcs gen5_funcs = {
> +	MMIO_RAW_WRITE_VFUNCS(gen5),
> +	MMIO_RAW_READ_VFUNCS(gen5),
> +};
> +
> +static const struct intel_uncore_funcs gen2_funcs = {
> +	MMIO_RAW_WRITE_VFUNCS(gen2),
> +	MMIO_RAW_READ_VFUNCS(gen2),
> +};
> +
> +
>  static void uncore_raw_init(struct intel_uncore *uncore)
>  {
>  	GEM_BUG_ON(intel_uncore_has_forcewake(uncore));
>  
>  	if (intel_vgpu_active(uncore->i915)) {
> -		ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, vgpu);
> -		ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, vgpu);
> +		uncore->funcs = &vgpu_funcs;
>  	} else if (GRAPHICS_VER(uncore->i915) == 5) {
> -		ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen5);
> -		ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen5);
> +		uncore->funcs = &gen5_funcs;
>  	} else {
> -		ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen2);
> -		ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen2);
> +		uncore->funcs = &gen2_funcs;
>  	}
>  }
>  
> +static const struct intel_uncore_funcs xehp_funcs = {
> +	MMIO_WRITE_FW_VFUNCS(xehp_fwtable),
> +	MMIO_READ_FW_VFUNCS(gen11_fwtable)
> +};
> +
> +static const struct intel_uncore_funcs gen12_funcs = {
> +	MMIO_WRITE_FW_VFUNCS(gen12_fwtable),
> +	MMIO_READ_FW_VFUNCS(gen12_fwtable)
> +};
> +
> +static const struct intel_uncore_funcs gen11_funcs = {
> +	MMIO_WRITE_FW_VFUNCS(gen11_fwtable),
> +	MMIO_READ_FW_VFUNCS(gen11_fwtable)
> +};
> +
> +static const struct intel_uncore_funcs gen9_funcs = {
> +	MMIO_WRITE_FW_VFUNCS(fwtable),
> +	MMIO_READ_FW_VFUNCS(fwtable)
> +};
> +
> +static const struct intel_uncore_funcs gen8_funcs = {
> +	MMIO_WRITE_FW_VFUNCS(gen8),
> +	MMIO_READ_FW_VFUNCS(gen6)
> +};
> +
> +static const struct intel_uncore_funcs vlv_funcs = {
> +	MMIO_WRITE_FW_VFUNCS(gen8),

Should be gen6.

> +	MMIO_READ_FW_VFUNCS(fwtable)
> +};
> +
> +static const struct intel_uncore_funcs gen6_funcs = {
> +	MMIO_WRITE_FW_VFUNCS(gen6),
> +	MMIO_READ_FW_VFUNCS(gen6)
> +};
> +
>  static int uncore_forcewake_init(struct intel_uncore *uncore)
>  {
>  	struct drm_i915_private *i915 = uncore->i915;
> @@ -2116,38 +2156,29 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)
>  
>  	if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) {
>  		ASSIGN_FW_DOMAINS_TABLE(uncore, __dg2_fw_ranges);
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, xehp_fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> +		uncore->funcs = &xehp_funcs;
>  	} else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
>  		ASSIGN_FW_DOMAINS_TABLE(uncore, __xehp_fw_ranges);
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, xehp_fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> +		uncore->funcs = &xehp_funcs;
>  	} else if (GRAPHICS_VER(i915) >= 12) {
>  		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen12_fw_ranges);
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen12_fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen12_fwtable);
> +		uncore->funcs = &gen12_funcs;
>  	} else if (GRAPHICS_VER(i915) == 11) {
>  		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen11_fw_ranges);
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen11_fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> +		uncore->funcs = &gen11_funcs;
>  	} else if (IS_GRAPHICS_VER(i915, 9, 10)) {
>  		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen9_fw_ranges);
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
> +		uncore->funcs = &gen9_funcs;
>  	} else if (IS_CHERRYVIEW(i915)) {
>  		ASSIGN_FW_DOMAINS_TABLE(uncore, __chv_fw_ranges);
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
> +		uncore->funcs = &gen9_funcs;

Seems funny to use gen9 functions for chv.

>  	} else if (GRAPHICS_VER(i915) == 8) {
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen8);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen6);
> +		uncore->funcs = &gen8_funcs;
>  	} else if (IS_VALLEYVIEW(i915)) {
>  		ASSIGN_FW_DOMAINS_TABLE(uncore, __vlv_fw_ranges);
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
> +		uncore->funcs = &vlv_funcs;
>  	} else if (IS_GRAPHICS_VER(i915, 6, 7)) {
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen6);
> +		uncore->funcs = &gen6_funcs;
>  	}
>  
>  	uncore->pmic_bus_access_nb.notifier_call = i915_pmic_bus_access_notifier;
> @@ -2190,8 +2221,8 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
>  
>  	/* make sure fw funcs are set if and only if we have fw*/
>  	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->fw_get_funcs);
> -	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.read_fw_domains);
> -	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.write_fw_domains);
> +	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs->read_fw_domains);
> +	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs->write_fw_domains);

Gah, I hate the proliferation of GEM_BUG_ON() outside of strictly gem
code. If there's value in it beyond gem, it should not be named
GEM. Otherwise, it should stay within GEM code.

>  
>  	if (HAS_FPGA_DBG_UNCLAIMED(i915))
>  		uncore->flags |= UNCORE_HAS_FPGA_DBG_UNCLAIMED;
> @@ -2530,10 +2561,10 @@ intel_uncore_forcewake_for_reg(struct intel_uncore *uncore,
>  		return 0;
>  
>  	if (op & FW_REG_READ)
> -		fw_domains = uncore->funcs.read_fw_domains(uncore, reg);
> +		fw_domains = uncore->funcs->read_fw_domains(uncore, reg);
>  
>  	if (op & FW_REG_WRITE)
> -		fw_domains |= uncore->funcs.write_fw_domains(uncore, reg);
> +		fw_domains |= uncore->funcs->write_fw_domains(uncore, reg);
>  
>  	drm_WARN_ON(&uncore->i915->drm, fw_domains & ~uncore->fw_domains);
>  
> diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
> index 1a7448f5f16f..52d4baf07656 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.h
> +++ b/drivers/gpu/drm/i915/intel_uncore.h
> @@ -138,7 +138,7 @@ struct intel_uncore {
>  
>  	struct notifier_block pmic_bus_access_nb;
>  	const struct intel_uncore_fw_get *fw_get_funcs;
> -	struct intel_uncore_funcs funcs;
> +	const struct intel_uncore_funcs *funcs;
>  
>  	unsigned int fifo_count;
>  
> @@ -312,14 +312,14 @@ __raw_write(64, q)
>  static inline u##x__ intel_uncore_##name__(struct intel_uncore *uncore, \
>  					   i915_reg_t reg) \
>  { \
> -	return uncore->funcs.mmio_read##s__(uncore, reg, (trace__)); \
> +	return uncore->funcs->mmio_read##s__(uncore, reg, (trace__)); \
>  }
>  
>  #define __uncore_write(name__, x__, s__, trace__) \
>  static inline void intel_uncore_##name__(struct intel_uncore *uncore, \
>  					 i915_reg_t reg, u##x__ val) \
>  { \
> -	uncore->funcs.mmio_write##s__(uncore, reg, val, (trace__)); \
> +	uncore->funcs->mmio_write##s__(uncore, reg, val, (trace__)); \
>  }
>  
>  __uncore_read(read8, 8, b, true)
> @@ -338,7 +338,7 @@ __uncore_write(write_notrace, 32, l, false)
>   * an arbitrary delay between them. This can cause the hardware to
>   * act upon the intermediate value, possibly leading to corruption and
>   * machine death. For this reason we do not support intel_uncore_write64,
> - * or uncore->funcs.mmio_writeq.
> + * or uncore->funcs->mmio_writeq.
>   *
>   * When reading a 64-bit value as two 32-bit values, the delay may cause
>   * the two reads to mismatch, e.g. a timestamp overflowing. Also note that

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.BUILD: failure for i915/uncore: constify the uncore vtables.

[Patchwork]

== Series Details ==

Series: i915/uncore: constify the uncore vtables.
URL   : https://patchwork.freedesktop.org/series/94465/
State : failure

== Summary ==

Applying: drm/i915/uncore: split the fw get function into separate vfunc
Applying: drm/i915/uncore: constify the register vtables.
error: sha1 information is lacking or useless (drivers/gpu/drm/i915/intel_uncore.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0002 drm/i915/uncore: constify the register vtables.
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

[Intel-gfx] ✗ Fi.CI.BUILD: failure for i915/uncore: constify the uncore vtables. (rev2)

[Patchwork]

== Series Details ==

Series: i915/uncore: constify the uncore vtables. (rev2)
URL   : https://patchwork.freedesktop.org/series/94465/
State : failure

== Summary ==

Applying: drm/i915/uncore: split the fw get function into separate vfunc
Applying: drm/i915/uncore: constify the register vtables.
error: sha1 information is lacking or useless (drivers/gpu/drm/i915/intel_uncore.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0002 drm/i915/uncore: constify the register vtables.
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".