* [PATCH v2 0/2] Add Coresight support for RB5 board @ 2021-09-13 6:40 ` Tao Zhang 0 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-13 6:40 UTC (permalink / raw) To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin Cc: Tao Zhang, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang This series adds Coresight support for SM8250 Soc on RB5 board. It is composed of two elements. a) Add ETM PID for Kryo-5XX. b) Add coresight support to DTS for RB5. This series applies to coresight/next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git Tao Zhang (2): coresight: etm4x: Add ETM PID for Kryo-5XX arm64: dts: qcom: sm8250: Add Coresight support arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 +++++++++++++++++- .../coresight/coresight-etm4x-core.c | 1 + 2 files changed, 439 insertions(+), 4 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 0/2] Add Coresight support for RB5 board @ 2021-09-13 6:40 ` Tao Zhang 0 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-13 6:40 UTC (permalink / raw) To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin Cc: Tao Zhang, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang This series adds Coresight support for SM8250 Soc on RB5 board. It is composed of two elements. a) Add ETM PID for Kryo-5XX. b) Add coresight support to DTS for RB5. This series applies to coresight/next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git Tao Zhang (2): coresight: etm4x: Add ETM PID for Kryo-5XX arm64: dts: qcom: sm8250: Add Coresight support arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 +++++++++++++++++- .../coresight/coresight-etm4x-core.c | 1 + 2 files changed, 439 insertions(+), 4 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 1/2] coresight: etm4x: Add ETM PID for Kryo-5XX 2021-09-13 6:40 ` Tao Zhang @ 2021-09-13 6:40 ` Tao Zhang -1 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-13 6:40 UTC (permalink / raw) To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin Cc: Tao Zhang, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang Add ETM PID for Kryo-5XX to the list of supported ETMs. Otherwise, Kryo-5XX ETMs will not be initialized successfully. e.g. This change can be verified on qrb5165-rb5 board. ETM4-ETM7 nodes will not be visible without this change. Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index da27cd4a3c38..52ca918c3bec 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2065,6 +2065,7 @@ static const struct amba_id etm4_ids[] = { CS_AMBA_UCI_ID(0x000bb803, uci_id_etm4),/* Qualcomm Kryo 385 Cortex-A75 */ CS_AMBA_UCI_ID(0x000bb805, uci_id_etm4),/* Qualcomm Kryo 4XX Cortex-A55 */ CS_AMBA_UCI_ID(0x000bb804, uci_id_etm4),/* Qualcomm Kryo 4XX Cortex-A76 */ + CS_AMBA_UCI_ID(0x000bbd0d, uci_id_etm4),/* Qualcomm Kryo 5XX Cortex-A77 */ CS_AMBA_UCI_ID(0x000cc0af, uci_id_etm4),/* Marvell ThunderX2 */ CS_AMBA_UCI_ID(0x000b6d01, uci_id_etm4),/* HiSilicon-Hip08 */ CS_AMBA_UCI_ID(0x000b6d02, uci_id_etm4),/* HiSilicon-Hip09 */ -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 1/2] coresight: etm4x: Add ETM PID for Kryo-5XX @ 2021-09-13 6:40 ` Tao Zhang 0 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-13 6:40 UTC (permalink / raw) To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin Cc: Tao Zhang, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang Add ETM PID for Kryo-5XX to the list of supported ETMs. Otherwise, Kryo-5XX ETMs will not be initialized successfully. e.g. This change can be verified on qrb5165-rb5 board. ETM4-ETM7 nodes will not be visible without this change. Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index da27cd4a3c38..52ca918c3bec 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2065,6 +2065,7 @@ static const struct amba_id etm4_ids[] = { CS_AMBA_UCI_ID(0x000bb803, uci_id_etm4),/* Qualcomm Kryo 385 Cortex-A75 */ CS_AMBA_UCI_ID(0x000bb805, uci_id_etm4),/* Qualcomm Kryo 4XX Cortex-A55 */ CS_AMBA_UCI_ID(0x000bb804, uci_id_etm4),/* Qualcomm Kryo 4XX Cortex-A76 */ + CS_AMBA_UCI_ID(0x000bbd0d, uci_id_etm4),/* Qualcomm Kryo 5XX Cortex-A77 */ CS_AMBA_UCI_ID(0x000cc0af, uci_id_etm4),/* Marvell ThunderX2 */ CS_AMBA_UCI_ID(0x000b6d01, uci_id_etm4),/* HiSilicon-Hip08 */ CS_AMBA_UCI_ID(0x000b6d02, uci_id_etm4),/* HiSilicon-Hip09 */ -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/2] coresight: etm4x: Add ETM PID for Kryo-5XX 2021-09-13 6:40 ` Tao Zhang @ 2021-09-21 16:29 ` Suzuki K Poulose -1 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-21 16:29 UTC (permalink / raw) To: Tao Zhang, Mathieu Poirier, Alexander Shishkin Cc: Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On 13/09/2021 07:40, Tao Zhang wrote: > Add ETM PID for Kryo-5XX to the list of supported ETMs. > Otherwise, Kryo-5XX ETMs will not be initialized successfully. > e.g. > This change can be verified on qrb5165-rb5 board. ETM4-ETM7 nodes > will not be visible without this change. > > Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > drivers/hwtracing/coresight/coresight-etm4x-core.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index da27cd4a3c38..52ca918c3bec 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -2065,6 +2065,7 @@ static const struct amba_id etm4_ids[] = { > CS_AMBA_UCI_ID(0x000bb803, uci_id_etm4),/* Qualcomm Kryo 385 Cortex-A75 */ > CS_AMBA_UCI_ID(0x000bb805, uci_id_etm4),/* Qualcomm Kryo 4XX Cortex-A55 */ > CS_AMBA_UCI_ID(0x000bb804, uci_id_etm4),/* Qualcomm Kryo 4XX Cortex-A76 */ > + CS_AMBA_UCI_ID(0x000bbd0d, uci_id_etm4),/* Qualcomm Kryo 5XX Cortex-A77 */ > CS_AMBA_UCI_ID(0x000cc0af, uci_id_etm4),/* Marvell ThunderX2 */ > CS_AMBA_UCI_ID(0x000b6d01, uci_id_etm4),/* HiSilicon-Hip08 */ > CS_AMBA_UCI_ID(0x000b6d02, uci_id_etm4),/* HiSilicon-Hip09 */ > ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/2] coresight: etm4x: Add ETM PID for Kryo-5XX @ 2021-09-21 16:29 ` Suzuki K Poulose 0 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-21 16:29 UTC (permalink / raw) To: Tao Zhang, Mathieu Poirier, Alexander Shishkin Cc: Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On 13/09/2021 07:40, Tao Zhang wrote: > Add ETM PID for Kryo-5XX to the list of supported ETMs. > Otherwise, Kryo-5XX ETMs will not be initialized successfully. > e.g. > This change can be verified on qrb5165-rb5 board. ETM4-ETM7 nodes > will not be visible without this change. > > Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > drivers/hwtracing/coresight/coresight-etm4x-core.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index da27cd4a3c38..52ca918c3bec 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -2065,6 +2065,7 @@ static const struct amba_id etm4_ids[] = { > CS_AMBA_UCI_ID(0x000bb803, uci_id_etm4),/* Qualcomm Kryo 385 Cortex-A75 */ > CS_AMBA_UCI_ID(0x000bb805, uci_id_etm4),/* Qualcomm Kryo 4XX Cortex-A55 */ > CS_AMBA_UCI_ID(0x000bb804, uci_id_etm4),/* Qualcomm Kryo 4XX Cortex-A76 */ > + CS_AMBA_UCI_ID(0x000bbd0d, uci_id_etm4),/* Qualcomm Kryo 5XX Cortex-A77 */ > CS_AMBA_UCI_ID(0x000cc0af, uci_id_etm4),/* Marvell ThunderX2 */ > CS_AMBA_UCI_ID(0x000b6d01, uci_id_etm4),/* HiSilicon-Hip08 */ > CS_AMBA_UCI_ID(0x000b6d02, uci_id_etm4),/* HiSilicon-Hip09 */ > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support 2021-09-13 6:40 ` Tao Zhang @ 2021-09-13 6:40 ` Tao Zhang -1 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-13 6:40 UTC (permalink / raw) To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin Cc: Tao Zhang, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang Add the basic coresight components found on Qualcomm SM8250 Soc. The basic coresight components include ETF, ETMs,STM and the related funnels. Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- 1 file changed, 438 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 8ac96f8e79d4..9c8f87d80afc 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -222,11 +222,445 @@ regulator-max-microvolt = <1800000>; regulator-always-on; }; -}; -&adsp { - status = "okay"; - firmware-name = "qcom/sm8250/adsp.mbn"; + stm@6002000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0 0x06002000 0 0x1000>, + <0 0x16280000 0 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + stm_out: endpoint { + remote-endpoint = + <&funnel0_in7>; + }; + }; + }; + }; + + funnel@6041000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x06041000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel0_out: endpoint { + remote-endpoint = + <&merge_funnel_in0>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@7 { + reg = <7>; + funnel0_in7: endpoint { + remote-endpoint = <&stm_out>; + }; + }; + }; + }; + + funnel@6042000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x06042000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel2_out: endpoint { + remote-endpoint = + <&merge_funnel_in2>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@4 { + reg = <4>; + funnel2_in5: endpoint { + remote-endpoint = + <&apss_merge_funnel_out>; + }; + }; + }; + }; + + funnel@6b04000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0 0x6b04000 0 0x1000>; + reg-names = "funnel-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + merge_funnel_out: endpoint { + remote-endpoint = + <&etf_in>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@7 { + reg = <7>; + swao_funnel_in7: endpoint { + slave-mode; + remote-endpoint= + <&merg_funnel_out>; + }; + }; + }; + + }; + + funnel@6045000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x06045000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + merg_funnel_out: endpoint { + remote-endpoint = <&swao_funnel_in7>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + merge_funnel_in0: endpoint { + remote-endpoint = + <&funnel0_out>; + }; + }; + + port@1 { + reg = <1>; + merge_funnel_in2: endpoint { + remote-endpoint = + <&funnel2_out>; + }; + }; + }; + }; + + etf@6b05000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x06b05000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + port { + etf_in: endpoint { + remote-endpoint = + <&merge_funnel_out>; + }; + }; + }; + }; + + etm@7040000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07040000 0 0x1000>; + + cpu = <&CPU0>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm0_out: endpoint { + remote-endpoint = + <&apss_funnel_in0>; + }; + }; + }; + }; + + etm@7140000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07140000 0 0x1000>; + + cpu = <&CPU1>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm1_out: endpoint { + remote-endpoint = + <&apss_funnel_in1>; + }; + }; + }; + }; + + etm@7240000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07240000 0 0x1000>; + + cpu = <&CPU2>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm2_out: endpoint { + remote-endpoint = + <&apss_funnel_in2>; + }; + }; + }; + }; + + etm@7340000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07340000 0 0x1000>; + + cpu = <&CPU3>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm3_out: endpoint { + remote-endpoint = + <&apss_funnel_in3>; + }; + }; + }; + }; + + etm@7440000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07440000 0 0x1000>; + + cpu = <&CPU4>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm4_out: endpoint { + remote-endpoint = + <&apss_funnel_in4>; + }; + }; + }; + }; + + etm@7540000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07540000 0 0x1000>; + + cpu = <&CPU5>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm5_out: endpoint { + remote-endpoint = + <&apss_funnel_in5>; + }; + }; + }; + }; + + etm@7640000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07640000 0 0x1000>; + + cpu = <&CPU6>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm6_out: endpoint { + remote-endpoint = + <&apss_funnel_in6>; + }; + }; + }; + }; + + etm@7740000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07740000 0 0x1000>; + + cpu = <&CPU7>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm7_out: endpoint { + remote-endpoint = + <&apss_funnel_in7>; + }; + }; + }; + }; + + funnel@7800000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x07800000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + apss_funnel_out: endpoint { + remote-endpoint = + <&apss_merge_funnel_in>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + apss_funnel_in0: endpoint { + remote-endpoint = + <&etm0_out>; + }; + }; + + port@1 { + reg = <1>; + apss_funnel_in1: endpoint { + remote-endpoint = + <&etm1_out>; + }; + }; + + port@2 { + reg = <2>; + apss_funnel_in2: endpoint { + remote-endpoint = + <&etm2_out>; + }; + }; + + port@3 { + reg = <3>; + apss_funnel_in3: endpoint { + remote-endpoint = + <&etm3_out>; + }; + }; + + port@4 { + reg = <4>; + apss_funnel_in4: endpoint { + remote-endpoint = + <&etm4_out>; + }; + }; + + port@5 { + reg = <5>; + apss_funnel_in5: endpoint { + remote-endpoint = + <&etm5_out>; + }; + }; + + port@6 { + reg = <6>; + apss_funnel_in6: endpoint { + remote-endpoint = + <&etm6_out>; + }; + }; + + port@7 { + reg = <7>; + apss_funnel_in7: endpoint { + remote-endpoint = + <&etm7_out>; + }; + }; + }; + }; + + funnel@7810000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x07810000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + apss_merge_funnel_out: endpoint { + remote-endpoint = + <&funnel2_in5>; + }; + }; + }; + + in-ports { + port { + apss_merge_funnel_in: endpoint { + remote-endpoint = + <&apss_funnel_out>; + }; + }; + }; + }; }; &apps_rsc { -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support @ 2021-09-13 6:40 ` Tao Zhang 0 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-13 6:40 UTC (permalink / raw) To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin Cc: Tao Zhang, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang Add the basic coresight components found on Qualcomm SM8250 Soc. The basic coresight components include ETF, ETMs,STM and the related funnels. Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- 1 file changed, 438 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 8ac96f8e79d4..9c8f87d80afc 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -222,11 +222,445 @@ regulator-max-microvolt = <1800000>; regulator-always-on; }; -}; -&adsp { - status = "okay"; - firmware-name = "qcom/sm8250/adsp.mbn"; + stm@6002000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0 0x06002000 0 0x1000>, + <0 0x16280000 0 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + stm_out: endpoint { + remote-endpoint = + <&funnel0_in7>; + }; + }; + }; + }; + + funnel@6041000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x06041000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel0_out: endpoint { + remote-endpoint = + <&merge_funnel_in0>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@7 { + reg = <7>; + funnel0_in7: endpoint { + remote-endpoint = <&stm_out>; + }; + }; + }; + }; + + funnel@6042000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x06042000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel2_out: endpoint { + remote-endpoint = + <&merge_funnel_in2>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@4 { + reg = <4>; + funnel2_in5: endpoint { + remote-endpoint = + <&apss_merge_funnel_out>; + }; + }; + }; + }; + + funnel@6b04000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0 0x6b04000 0 0x1000>; + reg-names = "funnel-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + merge_funnel_out: endpoint { + remote-endpoint = + <&etf_in>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@7 { + reg = <7>; + swao_funnel_in7: endpoint { + slave-mode; + remote-endpoint= + <&merg_funnel_out>; + }; + }; + }; + + }; + + funnel@6045000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x06045000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + merg_funnel_out: endpoint { + remote-endpoint = <&swao_funnel_in7>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + merge_funnel_in0: endpoint { + remote-endpoint = + <&funnel0_out>; + }; + }; + + port@1 { + reg = <1>; + merge_funnel_in2: endpoint { + remote-endpoint = + <&funnel2_out>; + }; + }; + }; + }; + + etf@6b05000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x06b05000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + port { + etf_in: endpoint { + remote-endpoint = + <&merge_funnel_out>; + }; + }; + }; + }; + + etm@7040000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07040000 0 0x1000>; + + cpu = <&CPU0>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm0_out: endpoint { + remote-endpoint = + <&apss_funnel_in0>; + }; + }; + }; + }; + + etm@7140000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07140000 0 0x1000>; + + cpu = <&CPU1>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm1_out: endpoint { + remote-endpoint = + <&apss_funnel_in1>; + }; + }; + }; + }; + + etm@7240000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07240000 0 0x1000>; + + cpu = <&CPU2>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm2_out: endpoint { + remote-endpoint = + <&apss_funnel_in2>; + }; + }; + }; + }; + + etm@7340000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07340000 0 0x1000>; + + cpu = <&CPU3>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm3_out: endpoint { + remote-endpoint = + <&apss_funnel_in3>; + }; + }; + }; + }; + + etm@7440000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07440000 0 0x1000>; + + cpu = <&CPU4>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm4_out: endpoint { + remote-endpoint = + <&apss_funnel_in4>; + }; + }; + }; + }; + + etm@7540000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07540000 0 0x1000>; + + cpu = <&CPU5>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm5_out: endpoint { + remote-endpoint = + <&apss_funnel_in5>; + }; + }; + }; + }; + + etm@7640000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07640000 0 0x1000>; + + cpu = <&CPU6>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm6_out: endpoint { + remote-endpoint = + <&apss_funnel_in6>; + }; + }; + }; + }; + + etm@7740000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x07740000 0 0x1000>; + + cpu = <&CPU7>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + out-ports { + port { + etm7_out: endpoint { + remote-endpoint = + <&apss_funnel_in7>; + }; + }; + }; + }; + + funnel@7800000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x07800000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + apss_funnel_out: endpoint { + remote-endpoint = + <&apss_merge_funnel_in>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + apss_funnel_in0: endpoint { + remote-endpoint = + <&etm0_out>; + }; + }; + + port@1 { + reg = <1>; + apss_funnel_in1: endpoint { + remote-endpoint = + <&etm1_out>; + }; + }; + + port@2 { + reg = <2>; + apss_funnel_in2: endpoint { + remote-endpoint = + <&etm2_out>; + }; + }; + + port@3 { + reg = <3>; + apss_funnel_in3: endpoint { + remote-endpoint = + <&etm3_out>; + }; + }; + + port@4 { + reg = <4>; + apss_funnel_in4: endpoint { + remote-endpoint = + <&etm4_out>; + }; + }; + + port@5 { + reg = <5>; + apss_funnel_in5: endpoint { + remote-endpoint = + <&etm5_out>; + }; + }; + + port@6 { + reg = <6>; + apss_funnel_in6: endpoint { + remote-endpoint = + <&etm6_out>; + }; + }; + + port@7 { + reg = <7>; + apss_funnel_in7: endpoint { + remote-endpoint = + <&etm7_out>; + }; + }; + }; + }; + + funnel@7810000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x07810000 0 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + apss_merge_funnel_out: endpoint { + remote-endpoint = + <&funnel2_in5>; + }; + }; + }; + + in-ports { + port { + apss_merge_funnel_in: endpoint { + remote-endpoint = + <&apss_funnel_out>; + }; + }; + }; + }; }; &apps_rsc { -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support 2021-09-13 6:40 ` Tao Zhang @ 2021-09-21 16:35 ` Suzuki K Poulose -1 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-21 16:35 UTC (permalink / raw) To: Tao Zhang, Mathieu Poirier, Alexander Shishkin Cc: Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang Hi Tao Are there no sinks at all on this platform ? I had this question on the previous series. How is CoreSight useful on this platform otherwise ? On 13/09/2021 07:40, Tao Zhang wrote: > Add the basic coresight components found on Qualcomm SM8250 Soc. The > basic coresight components include ETF, ETMs,STM and the related > funnels. > > Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- > 1 file changed, 438 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > index 8ac96f8e79d4..9c8f87d80afc 100644 > --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > @@ -222,11 +222,445 @@ > regulator-max-microvolt = <1800000>; > regulator-always-on; > }; > -}; > > -&adsp { > - status = "okay"; > - firmware-name = "qcom/sm8250/adsp.mbn"; Unrelated change ? Please keep it separate from the CoreSight changes. Suzuki ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support @ 2021-09-21 16:35 ` Suzuki K Poulose 0 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-21 16:35 UTC (permalink / raw) To: Tao Zhang, Mathieu Poirier, Alexander Shishkin Cc: Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang Hi Tao Are there no sinks at all on this platform ? I had this question on the previous series. How is CoreSight useful on this platform otherwise ? On 13/09/2021 07:40, Tao Zhang wrote: > Add the basic coresight components found on Qualcomm SM8250 Soc. The > basic coresight components include ETF, ETMs,STM and the related > funnels. > > Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- > 1 file changed, 438 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > index 8ac96f8e79d4..9c8f87d80afc 100644 > --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > @@ -222,11 +222,445 @@ > regulator-max-microvolt = <1800000>; > regulator-always-on; > }; > -}; > > -&adsp { > - status = "okay"; > - firmware-name = "qcom/sm8250/adsp.mbn"; Unrelated change ? Please keep it separate from the CoreSight changes. Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support 2021-09-21 16:35 ` Suzuki K Poulose @ 2021-09-23 9:24 ` Tao Zhang -1 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-23 9:24 UTC (permalink / raw) To: Suzuki K Poulose Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On Tue, Sep 21, 2021 at 05:35:37PM +0100, Suzuki K Poulose wrote: > Hi Tao > > Are there no sinks at all on this platform ? I had this question on the > previous series. How is CoreSight useful on this platform otherwise ? > > On 13/09/2021 07:40, Tao Zhang wrote: ETF/ETR are the sinks on this target. And I have added the ETF to this device tree file. Since the ETR needs SMMU support on this target and SMMU has not been supported for now. I will add the ETR to device tree later if the SMMU is ready for this platform. > >Add the basic coresight components found on Qualcomm SM8250 Soc. The > >basic coresight components include ETF, ETMs,STM and the related > >funnels. > > > >Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> > >--- > > arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- > > 1 file changed, 438 insertions(+), 4 deletions(-) > > > >diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >index 8ac96f8e79d4..9c8f87d80afc 100644 > >--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >@@ -222,11 +222,445 @@ > > regulator-max-microvolt = <1800000>; > > regulator-always-on; > > }; > >-}; > >-&adsp { > >- status = "okay"; > >- firmware-name = "qcom/sm8250/adsp.mbn"; > > Unrelated change ? Please keep it separate from the CoreSight changes. > > Suzuki I combined this change and ETM pid change into one seies because the ETM pid change validation needs ETM support. If there is no ETM configuration in the device tree, ETM pid change can not be verified. Do you think it would be better to separate them? Do I need to resubmit to separate them into two separate patches? Best, Tao ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support @ 2021-09-23 9:24 ` Tao Zhang 0 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-23 9:24 UTC (permalink / raw) To: Suzuki K Poulose Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On Tue, Sep 21, 2021 at 05:35:37PM +0100, Suzuki K Poulose wrote: > Hi Tao > > Are there no sinks at all on this platform ? I had this question on the > previous series. How is CoreSight useful on this platform otherwise ? > > On 13/09/2021 07:40, Tao Zhang wrote: ETF/ETR are the sinks on this target. And I have added the ETF to this device tree file. Since the ETR needs SMMU support on this target and SMMU has not been supported for now. I will add the ETR to device tree later if the SMMU is ready for this platform. > >Add the basic coresight components found on Qualcomm SM8250 Soc. The > >basic coresight components include ETF, ETMs,STM and the related > >funnels. > > > >Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> > >--- > > arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- > > 1 file changed, 438 insertions(+), 4 deletions(-) > > > >diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >index 8ac96f8e79d4..9c8f87d80afc 100644 > >--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >@@ -222,11 +222,445 @@ > > regulator-max-microvolt = <1800000>; > > regulator-always-on; > > }; > >-}; > >-&adsp { > >- status = "okay"; > >- firmware-name = "qcom/sm8250/adsp.mbn"; > > Unrelated change ? Please keep it separate from the CoreSight changes. > > Suzuki I combined this change and ETM pid change into one seies because the ETM pid change validation needs ETM support. If there is no ETM configuration in the device tree, ETM pid change can not be verified. Do you think it would be better to separate them? Do I need to resubmit to separate them into two separate patches? Best, Tao _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support 2021-09-23 9:24 ` Tao Zhang @ 2021-09-23 9:36 ` Suzuki K Poulose -1 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-23 9:36 UTC (permalink / raw) To: Tao Zhang Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On 23/09/2021 10:24, Tao Zhang wrote: > On Tue, Sep 21, 2021 at 05:35:37PM +0100, Suzuki K Poulose wrote: >> Hi Tao >> >> Are there no sinks at all on this platform ? I had this question on the >> previous series. How is CoreSight useful on this platform otherwise ? >> >> On 13/09/2021 07:40, Tao Zhang wrote: > ETF/ETR are the sinks on this target. And I have added the ETF to this > device tree file. Since the ETR needs SMMU support on this target and > SMMU has not been supported for now. I will add the ETR to device tree > later if the SMMU is ready for this platform. Thanks. That is fine. Btw, these sort of additional information could be added to the cover letter to give a better picture of what you are trying to do and why. >>> Add the basic coresight components found on Qualcomm SM8250 Soc. The >>> basic coresight components include ETF, ETMs,STM and the related >>> funnels. >>> >>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- >>> 1 file changed, 438 insertions(+), 4 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts >>> index 8ac96f8e79d4..9c8f87d80afc 100644 >>> --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts >>> +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts >>> @@ -222,11 +222,445 @@ >>> regulator-max-microvolt = <1800000>; >>> regulator-always-on; >>> }; >>> -}; >>> -&adsp { >>> - status = "okay"; >>> - firmware-name = "qcom/sm8250/adsp.mbn"; >> >> Unrelated change ? Please keep it separate from the CoreSight changes. >> >> Suzuki > I combined this change and ETM pid change into one seies because the ETM > pid change validation needs ETM support. If there is no ETM > configuration in the device tree, ETM pid change can not be verified. > Do you think it would be better to separate them? Do I need to resubmit > to separate them into two separate patches? No, I am asking about the lines removed above. i.e, -&adsp { - status = "okay"; - firmware-name = "qcom/sm8250/adsp.mbn"; It doesn't seem to be added back in the patch. So that means, the DT lost those lines, without any mention of that in the description of the patch. Moreover, the lines do not look like they were anything to do with CoreSight. This is why I mentioned they look like "unrelated". Suzuki ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support @ 2021-09-23 9:36 ` Suzuki K Poulose 0 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-23 9:36 UTC (permalink / raw) To: Tao Zhang Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On 23/09/2021 10:24, Tao Zhang wrote: > On Tue, Sep 21, 2021 at 05:35:37PM +0100, Suzuki K Poulose wrote: >> Hi Tao >> >> Are there no sinks at all on this platform ? I had this question on the >> previous series. How is CoreSight useful on this platform otherwise ? >> >> On 13/09/2021 07:40, Tao Zhang wrote: > ETF/ETR are the sinks on this target. And I have added the ETF to this > device tree file. Since the ETR needs SMMU support on this target and > SMMU has not been supported for now. I will add the ETR to device tree > later if the SMMU is ready for this platform. Thanks. That is fine. Btw, these sort of additional information could be added to the cover letter to give a better picture of what you are trying to do and why. >>> Add the basic coresight components found on Qualcomm SM8250 Soc. The >>> basic coresight components include ETF, ETMs,STM and the related >>> funnels. >>> >>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- >>> 1 file changed, 438 insertions(+), 4 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts >>> index 8ac96f8e79d4..9c8f87d80afc 100644 >>> --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts >>> +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts >>> @@ -222,11 +222,445 @@ >>> regulator-max-microvolt = <1800000>; >>> regulator-always-on; >>> }; >>> -}; >>> -&adsp { >>> - status = "okay"; >>> - firmware-name = "qcom/sm8250/adsp.mbn"; >> >> Unrelated change ? Please keep it separate from the CoreSight changes. >> >> Suzuki > I combined this change and ETM pid change into one seies because the ETM > pid change validation needs ETM support. If there is no ETM > configuration in the device tree, ETM pid change can not be verified. > Do you think it would be better to separate them? Do I need to resubmit > to separate them into two separate patches? No, I am asking about the lines removed above. i.e, -&adsp { - status = "okay"; - firmware-name = "qcom/sm8250/adsp.mbn"; It doesn't seem to be added back in the patch. So that means, the DT lost those lines, without any mention of that in the description of the patch. Moreover, the lines do not look like they were anything to do with CoreSight. This is why I mentioned they look like "unrelated". Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support 2021-09-23 9:36 ` Suzuki K Poulose @ 2021-09-24 10:04 ` Tao Zhang -1 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-24 10:04 UTC (permalink / raw) To: Suzuki K Poulose Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On Thu, Sep 23, 2021 at 10:36:28AM +0100, Suzuki K Poulose wrote: > On 23/09/2021 10:24, Tao Zhang wrote: > >On Tue, Sep 21, 2021 at 05:35:37PM +0100, Suzuki K Poulose wrote: > >>Hi Tao > >> > >>Are there no sinks at all on this platform ? I had this question on the > >>previous series. How is CoreSight useful on this platform otherwise ? > >> > >>On 13/09/2021 07:40, Tao Zhang wrote: > >ETF/ETR are the sinks on this target. And I have added the ETF to this > >device tree file. Since the ETR needs SMMU support on this target and > >SMMU has not been supported for now. I will add the ETR to device tree > >later if the SMMU is ready for this platform. > > Thanks. That is fine. Btw, these sort of additional information could be > added to the cover letter to give a better picture of what you are trying to > do and why. > Sure. I will update this to the cover letter. > >>>Add the basic coresight components found on Qualcomm SM8250 Soc. The > >>>basic coresight components include ETF, ETMs,STM and the related > >>>funnels. > >>> > >>>Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> > >>>--- > >>> arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- > >>> 1 file changed, 438 insertions(+), 4 deletions(-) > >>> > >>>diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >>>index 8ac96f8e79d4..9c8f87d80afc 100644 > >>>--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >>>+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >>>@@ -222,11 +222,445 @@ > >>> regulator-max-microvolt = <1800000>; > >>> regulator-always-on; > >>> }; > >>>-}; > >>>-&adsp { > >>>- status = "okay"; > >>>- firmware-name = "qcom/sm8250/adsp.mbn"; > >> > >>Unrelated change ? Please keep it separate from the CoreSight changes. > >> > >>Suzuki > >I combined this change and ETM pid change into one seies because the ETM > >pid change validation needs ETM support. If there is no ETM > >configuration in the device tree, ETM pid change can not be verified. > >Do you think it would be better to separate them? Do I need to resubmit > >to separate them into two separate patches? > > No, I am asking about the lines removed above. i.e, > > -&adsp { > - status = "okay"; > - firmware-name = "qcom/sm8250/adsp.mbn"; > > It doesn't seem to be added back in the patch. So that means, the DT > lost those lines, without any mention of that in the description of > the patch. Moreover, the lines do not look like they were anything to > do with CoreSight. This is why I mentioned they look like "unrelated". > > Suzuki Yes, you are right. This is a mistake. This part of code should not be removed. I will update the patch and resubmit it. Best, Tao ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support @ 2021-09-24 10:04 ` Tao Zhang 0 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-24 10:04 UTC (permalink / raw) To: Suzuki K Poulose Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On Thu, Sep 23, 2021 at 10:36:28AM +0100, Suzuki K Poulose wrote: > On 23/09/2021 10:24, Tao Zhang wrote: > >On Tue, Sep 21, 2021 at 05:35:37PM +0100, Suzuki K Poulose wrote: > >>Hi Tao > >> > >>Are there no sinks at all on this platform ? I had this question on the > >>previous series. How is CoreSight useful on this platform otherwise ? > >> > >>On 13/09/2021 07:40, Tao Zhang wrote: > >ETF/ETR are the sinks on this target. And I have added the ETF to this > >device tree file. Since the ETR needs SMMU support on this target and > >SMMU has not been supported for now. I will add the ETR to device tree > >later if the SMMU is ready for this platform. > > Thanks. That is fine. Btw, these sort of additional information could be > added to the cover letter to give a better picture of what you are trying to > do and why. > Sure. I will update this to the cover letter. > >>>Add the basic coresight components found on Qualcomm SM8250 Soc. The > >>>basic coresight components include ETF, ETMs,STM and the related > >>>funnels. > >>> > >>>Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> > >>>--- > >>> arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 ++++++++++++++++++++++- > >>> 1 file changed, 438 insertions(+), 4 deletions(-) > >>> > >>>diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >>>index 8ac96f8e79d4..9c8f87d80afc 100644 > >>>--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >>>+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts > >>>@@ -222,11 +222,445 @@ > >>> regulator-max-microvolt = <1800000>; > >>> regulator-always-on; > >>> }; > >>>-}; > >>>-&adsp { > >>>- status = "okay"; > >>>- firmware-name = "qcom/sm8250/adsp.mbn"; > >> > >>Unrelated change ? Please keep it separate from the CoreSight changes. > >> > >>Suzuki > >I combined this change and ETM pid change into one seies because the ETM > >pid change validation needs ETM support. If there is no ETM > >configuration in the device tree, ETM pid change can not be verified. > >Do you think it would be better to separate them? Do I need to resubmit > >to separate them into two separate patches? > > No, I am asking about the lines removed above. i.e, > > -&adsp { > - status = "okay"; > - firmware-name = "qcom/sm8250/adsp.mbn"; > > It doesn't seem to be added back in the patch. So that means, the DT > lost those lines, without any mention of that in the description of > the patch. Moreover, the lines do not look like they were anything to > do with CoreSight. This is why I mentioned they look like "unrelated". > > Suzuki Yes, you are right. This is a mistake. This part of code should not be removed. I will update the patch and resubmit it. Best, Tao _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 0/2] Add Coresight support for RB5 board 2021-09-13 6:40 ` Tao Zhang @ 2021-09-21 16:31 ` Suzuki K Poulose -1 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-21 16:31 UTC (permalink / raw) To: Tao Zhang, Mathieu Poirier, Alexander Shishkin Cc: Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang Hi Tao On 13/09/2021 07:40, Tao Zhang wrote: > This series adds Coresight support for SM8250 Soc on RB5 board. > It is composed of two elements. > a) Add ETM PID for Kryo-5XX. > b) Add coresight support to DTS for RB5. > > This series applies to coresight/next > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git > Please could you mention what has changed since the previous version in the cover letter ? Kind regards Suzuki > Tao Zhang (2): > coresight: etm4x: Add ETM PID for Kryo-5XX > arm64: dts: qcom: sm8250: Add Coresight support > > arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 +++++++++++++++++- > .../coresight/coresight-etm4x-core.c | 1 + > 2 files changed, 439 insertions(+), 4 deletions(-) > ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 0/2] Add Coresight support for RB5 board @ 2021-09-21 16:31 ` Suzuki K Poulose 0 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-21 16:31 UTC (permalink / raw) To: Tao Zhang, Mathieu Poirier, Alexander Shishkin Cc: Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang Hi Tao On 13/09/2021 07:40, Tao Zhang wrote: > This series adds Coresight support for SM8250 Soc on RB5 board. > It is composed of two elements. > a) Add ETM PID for Kryo-5XX. > b) Add coresight support to DTS for RB5. > > This series applies to coresight/next > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git > Please could you mention what has changed since the previous version in the cover letter ? Kind regards Suzuki > Tao Zhang (2): > coresight: etm4x: Add ETM PID for Kryo-5XX > arm64: dts: qcom: sm8250: Add Coresight support > > arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 +++++++++++++++++- > .../coresight/coresight-etm4x-core.c | 1 + > 2 files changed, 439 insertions(+), 4 deletions(-) > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 0/2] Add Coresight support for RB5 board 2021-09-21 16:31 ` Suzuki K Poulose @ 2021-09-23 9:16 ` Tao Zhang -1 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-23 9:16 UTC (permalink / raw) To: Suzuki K Poulose Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On Tue, Sep 21, 2021 at 05:31:34PM +0100, Suzuki K Poulose wrote: > Hi Tao > > On 13/09/2021 07:40, Tao Zhang wrote: > >This series adds Coresight support for SM8250 Soc on RB5 board. > >It is composed of two elements. > >a) Add ETM PID for Kryo-5XX. > >b) Add coresight support to DTS for RB5. > > > >This series applies to coresight/next > >https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git > > > > Please could you mention what has changed since the previous version > in the cover letter ? > > Kind regards > Suzuki > The version 2 of the series add more comments "Cortex-A77" for ETM pid. Do I need to rewrite the cover letter and then resubmit it for review? > >Tao Zhang (2): > > coresight: etm4x: Add ETM PID for Kryo-5XX > > arm64: dts: qcom: sm8250: Add Coresight support > > > > arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 +++++++++++++++++- > > .../coresight/coresight-etm4x-core.c | 1 + > > 2 files changed, 439 insertions(+), 4 deletions(-) > > > ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 0/2] Add Coresight support for RB5 board @ 2021-09-23 9:16 ` Tao Zhang 0 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-23 9:16 UTC (permalink / raw) To: Suzuki K Poulose Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On Tue, Sep 21, 2021 at 05:31:34PM +0100, Suzuki K Poulose wrote: > Hi Tao > > On 13/09/2021 07:40, Tao Zhang wrote: > >This series adds Coresight support for SM8250 Soc on RB5 board. > >It is composed of two elements. > >a) Add ETM PID for Kryo-5XX. > >b) Add coresight support to DTS for RB5. > > > >This series applies to coresight/next > >https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git > > > > Please could you mention what has changed since the previous version > in the cover letter ? > > Kind regards > Suzuki > The version 2 of the series add more comments "Cortex-A77" for ETM pid. Do I need to rewrite the cover letter and then resubmit it for review? > >Tao Zhang (2): > > coresight: etm4x: Add ETM PID for Kryo-5XX > > arm64: dts: qcom: sm8250: Add Coresight support > > > > arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 +++++++++++++++++- > > .../coresight/coresight-etm4x-core.c | 1 + > > 2 files changed, 439 insertions(+), 4 deletions(-) > > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 0/2] Add Coresight support for RB5 board 2021-09-23 9:16 ` Tao Zhang @ 2021-09-23 9:31 ` Suzuki K Poulose -1 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-23 9:31 UTC (permalink / raw) To: Tao Zhang Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On 23/09/2021 10:16, Tao Zhang wrote: > On Tue, Sep 21, 2021 at 05:31:34PM +0100, Suzuki K Poulose wrote: >> Hi Tao >> >> On 13/09/2021 07:40, Tao Zhang wrote: >>> This series adds Coresight support for SM8250 Soc on RB5 board. >>> It is composed of two elements. >>> a) Add ETM PID for Kryo-5XX. >>> b) Add coresight support to DTS for RB5. >>> >>> This series applies to coresight/next >>> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git >>> >> >> Please could you mention what has changed since the previous version >> in the cover letter ? >> >> Kind regards >> Suzuki >> > The version 2 of the series add more comments "Cortex-A77" for ETM pid. > Do I need to rewrite the cover letter and then resubmit it for review? No need to resubmit the series for reveiwing the patch. Ultimately patches are what matters. But it is a good practise to keep the changelog in the cover letter for a revision of a series. That helps the reviewers to understand what has changed and we all are able to spend our time efficiently. So, please follow that if possible. Thanks Suzuki ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 0/2] Add Coresight support for RB5 board @ 2021-09-23 9:31 ` Suzuki K Poulose 0 siblings, 0 replies; 24+ messages in thread From: Suzuki K Poulose @ 2021-09-23 9:31 UTC (permalink / raw) To: Tao Zhang Cc: Mathieu Poirier, Alexander Shishkin, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang On 23/09/2021 10:16, Tao Zhang wrote: > On Tue, Sep 21, 2021 at 05:31:34PM +0100, Suzuki K Poulose wrote: >> Hi Tao >> >> On 13/09/2021 07:40, Tao Zhang wrote: >>> This series adds Coresight support for SM8250 Soc on RB5 board. >>> It is composed of two elements. >>> a) Add ETM PID for Kryo-5XX. >>> b) Add coresight support to DTS for RB5. >>> >>> This series applies to coresight/next >>> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git >>> >> >> Please could you mention what has changed since the previous version >> in the cover letter ? >> >> Kind regards >> Suzuki >> > The version 2 of the series add more comments "Cortex-A77" for ETM pid. > Do I need to rewrite the cover letter and then resubmit it for review? No need to resubmit the series for reveiwing the patch. Ultimately patches are what matters. But it is a good practise to keep the changelog in the cover letter for a revision of a series. That helps the reviewers to understand what has changed and we all are able to spend our time efficiently. So, please follow that if possible. Thanks Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 0/2] Add Coresight support for RB5 board @ 2021-09-24 10:06 ` Tao Zhang 0 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-24 10:06 UTC (permalink / raw) To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin Cc: Tao Zhang, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang This series adds Coresight support for SM8250 Soc on RB5 board. It is composed of two elements. a) Add ETM PID for Kryo-5XX. b) Add coresight support to DTS for RB5. Changes since V2: - Add the comment "Cortex-A77" for Kryo-5XX ETM PID. - Correct the errors in the patch "Add Coresight support for RB5 board" v1 version, and the adsp-related configuration should not be deleted. Changes since V1: - Add ETM PID for Kryo-5XX. - Add coresight supoort to device tree for RB5. ETM verification and use of Coresight components need Coresight support in device tree. Since the ETR sink needs SMMU support, and SMMU has not been enabled on RB5. ETR is not added to this patch, and it will be added once SMMU is enabled on RB5. ETF sink has been added to the device tree for RB5. This series applies to coresight/next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git Tao Zhang (2): coresight: etm4x: Add ETM PID for Kryo-5XX arm64: dts: qcom: sm8250: Add Coresight support arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 +++++++++++++++++- .../coresight/coresight-etm4x-core.c | 1 + 2 files changed, 439 insertions(+), 4 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 0/2] Add Coresight support for RB5 board @ 2021-09-24 10:06 ` Tao Zhang 0 siblings, 0 replies; 24+ messages in thread From: Tao Zhang @ 2021-09-24 10:06 UTC (permalink / raw) To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin Cc: Tao Zhang, Mike Leach, Leo Yan, Greg Kroah-Hartman, coresight, linux-arm-kernel, linux-kernel, Tingwei Zhang, Mao Jinlong, Yuanfang Zhang This series adds Coresight support for SM8250 Soc on RB5 board. It is composed of two elements. a) Add ETM PID for Kryo-5XX. b) Add coresight support to DTS for RB5. Changes since V2: - Add the comment "Cortex-A77" for Kryo-5XX ETM PID. - Correct the errors in the patch "Add Coresight support for RB5 board" v1 version, and the adsp-related configuration should not be deleted. Changes since V1: - Add ETM PID for Kryo-5XX. - Add coresight supoort to device tree for RB5. ETM verification and use of Coresight components need Coresight support in device tree. Since the ETR sink needs SMMU support, and SMMU has not been enabled on RB5. ETR is not added to this patch, and it will be added once SMMU is enabled on RB5. ETF sink has been added to the device tree for RB5. This series applies to coresight/next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git Tao Zhang (2): coresight: etm4x: Add ETM PID for Kryo-5XX arm64: dts: qcom: sm8250: Add Coresight support arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 442 +++++++++++++++++- .../coresight/coresight-etm4x-core.c | 1 + 2 files changed, 439 insertions(+), 4 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2021-09-24 10:09 UTC | newest] Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-09-13 6:40 [PATCH v2 0/2] Add Coresight support for RB5 board Tao Zhang 2021-09-13 6:40 ` Tao Zhang 2021-09-13 6:40 ` [PATCH v2 1/2] coresight: etm4x: Add ETM PID for Kryo-5XX Tao Zhang 2021-09-13 6:40 ` Tao Zhang 2021-09-21 16:29 ` Suzuki K Poulose 2021-09-21 16:29 ` Suzuki K Poulose 2021-09-13 6:40 ` [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support Tao Zhang 2021-09-13 6:40 ` Tao Zhang 2021-09-21 16:35 ` Suzuki K Poulose 2021-09-21 16:35 ` Suzuki K Poulose 2021-09-23 9:24 ` Tao Zhang 2021-09-23 9:24 ` Tao Zhang 2021-09-23 9:36 ` Suzuki K Poulose 2021-09-23 9:36 ` Suzuki K Poulose 2021-09-24 10:04 ` Tao Zhang 2021-09-24 10:04 ` Tao Zhang 2021-09-21 16:31 ` [PATCH v2 0/2] Add Coresight support for RB5 board Suzuki K Poulose 2021-09-21 16:31 ` Suzuki K Poulose 2021-09-23 9:16 ` Tao Zhang 2021-09-23 9:16 ` Tao Zhang 2021-09-23 9:31 ` Suzuki K Poulose 2021-09-23 9:31 ` Suzuki K Poulose 2021-09-24 10:06 Tao Zhang 2021-09-24 10:06 ` Tao Zhang
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