* [Intel-gfx] [PATCH CI 1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load
@ 2021-09-22 21:52 José Roberto de Souza
2021-09-22 21:52 ` [Intel-gfx] [PATCH CI 2/3] drm/i915/display: Match PSR2 selective fetch sequences with specification José Roberto de Souza
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: José Roberto de Souza @ 2021-09-22 21:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Imre Deak, Gwan-gyeong Mun, José Roberto de Souza
Specification asks for DC_STATE_DEBUG_MASK_CORES to be set for all
platforms that supports DMC, not only for geminilake and broxton.
While at is also taking the oportunity to simply the code.
BSpec: 7402
BSpec: 49436
Reviewed-by: Imre Deak <imre.deak@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 16 +++-------------
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index b0268552b2863..2dc9d632969db 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -255,20 +255,10 @@ intel_get_stepping_info(struct drm_i915_private *i915,
static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
{
- u32 val, mask;
-
- mask = DC_STATE_DEBUG_MASK_MEMORY_UP;
-
- if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
- mask |= DC_STATE_DEBUG_MASK_CORES;
-
/* The below bit doesn't need to be cleared ever afterwards */
- val = intel_de_read(dev_priv, DC_STATE_DEBUG);
- if ((val & mask) != mask) {
- val |= mask;
- intel_de_write(dev_priv, DC_STATE_DEBUG, val);
- intel_de_posting_read(dev_priv, DC_STATE_DEBUG);
- }
+ intel_de_rmw(dev_priv, DC_STATE_DEBUG, 0,
+ DC_STATE_DEBUG_MASK_CORES | DC_STATE_DEBUG_MASK_MEMORY_UP);
+ intel_de_posting_read(dev_priv, DC_STATE_DEBUG);
}
/**
--
2.33.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] [PATCH CI 2/3] drm/i915/display: Match PSR2 selective fetch sequences with specification
2021-09-22 21:52 [Intel-gfx] [PATCH CI 1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load José Roberto de Souza
@ 2021-09-22 21:52 ` José Roberto de Souza
2021-09-22 21:52 ` [Intel-gfx] [PATCH CI 3/3] drm/i915/display: Only keep PSR enabled if there is active planes José Roberto de Souza
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: José Roberto de Souza @ 2021-09-22 21:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Gwan-gyeong Mun, José Roberto de Souza
We were not completely following the selective fetch programming
sequence, here some things we were doing wrong:
- not programming plane selective fetch a PSR2_MAN_TRK_CTL registers
when doing a modeset
- programming PSR2_MAN_TRK_CTL out of vblank
With this changes the last remainig underrun found in Alderlake-P is
fixed.
Bspec: 55229
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_cursor.c | 4 ++-
drivers/gpu/drm/i915/display/intel_display.c | 12 +++----
drivers/gpu/drm/i915/display/intel_psr.c | 33 ++++++++++++++-----
drivers/gpu/drm/i915/display/intel_psr.h | 2 ++
.../drm/i915/display/skl_universal_plane.c | 4 +--
5 files changed, 36 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index c7618fef01439..901ad3a4c8c3b 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -536,8 +536,10 @@ static void i9xx_update_cursor(struct intel_plane *plane,
if (DISPLAY_VER(dev_priv) >= 9)
skl_write_cursor_wm(plane, crtc_state);
- if (!intel_crtc_needs_modeset(crtc_state))
+ if (plane_state)
intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, 0);
+ else
+ intel_psr2_disable_plane_sel_fetch(plane, crtc_state);
if (plane->cursor.base != base ||
plane->cursor.size != fbc_ctl ||
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 23b1e0ccc72de..66e63f3429172 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6816,11 +6816,9 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
}
- if (!mode_changed) {
- ret = intel_psr2_sel_fetch_update(state, crtc);
- if (ret)
- return ret;
- }
+ ret = intel_psr2_sel_fetch_update(state, crtc);
+ if (ret)
+ return ret;
return 0;
}
@@ -9713,10 +9711,10 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state,
if (new_crtc_state->update_pipe)
intel_pipe_fastset(old_crtc_state, new_crtc_state);
-
- intel_psr2_program_trans_man_trk_ctl(new_crtc_state);
}
+ intel_psr2_program_trans_man_trk_ctl(new_crtc_state);
+
if (dev_priv->display.atomic_update_watermarks)
dev_priv->display.atomic_update_watermarks(state, crtc);
}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index c1894b056d6c1..868e5205dd09e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -561,15 +561,16 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
val |= EDP_PSR2_SU_SDP_SCANLINE;
if (intel_dp->psr.psr2_sel_fetch_enabled) {
+ u32 tmp;
+
/* Wa_1408330847 */
if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
DIS_RAM_BYPASS_PSR2_MAN_TRACK,
DIS_RAM_BYPASS_PSR2_MAN_TRACK);
- intel_de_write(dev_priv,
- PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder),
- PSR2_MAN_TRK_CTL_ENABLE);
+ tmp = intel_de_read(dev_priv, PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder));
+ drm_WARN_ON(&dev_priv->drm, !(tmp & PSR2_MAN_TRK_CTL_ENABLE));
} else if (HAS_PSR2_SEL_FETCH(dev_priv)) {
intel_de_write(dev_priv,
PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder), 0);
@@ -1450,6 +1451,18 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0);
}
+void intel_psr2_disable_plane_sel_fetch(struct intel_plane *plane,
+ const struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ enum pipe pipe = plane->pipe;
+
+ if (!crtc_state->enable_psr2_sel_fetch)
+ return;
+
+ intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), 0);
+}
+
void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state,
@@ -1464,11 +1477,11 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
if (!crtc_state->enable_psr2_sel_fetch)
return;
- val = plane_state ? plane_state->ctl : 0;
- val &= plane->id == PLANE_CURSOR ? val : PLANE_SEL_FETCH_CTL_ENABLE;
- intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), val);
- if (!val || plane->id == PLANE_CURSOR)
+ if (plane->id == PLANE_CURSOR) {
+ intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id),
+ plane_state->ctl);
return;
+ }
clip = &plane_state->psr2_sel_fetch_area;
@@ -1487,14 +1500,16 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
val = (drm_rect_height(clip) - 1) << 16;
val |= (drm_rect_width(&plane_state->uapi.src) >> 16) - 1;
intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_SIZE(pipe, plane->id), val);
+
+ intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id),
+ PLANE_SEL_FETCH_CTL_ENABLE);
}
void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- if (!HAS_PSR2_SEL_FETCH(dev_priv) ||
- !crtc_state->enable_psr2_sel_fetch)
+ if (!crtc_state->enable_psr2_sel_fetch)
return;
intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(crtc_state->cpu_transcoder),
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 641521b101c82..e502964697c62 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -51,6 +51,8 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state,
int color_plane);
+void intel_psr2_disable_plane_sel_fetch(struct intel_plane *plane,
+ const struct intel_crtc_state *crtc_state);
void intel_psr_pause(struct intel_dp *intel_dp);
void intel_psr_resume(struct intel_dp *intel_dp);
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 724e7b04f3b63..247155f2a5538 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -656,6 +656,7 @@ skl_disable_plane(struct intel_plane *plane,
skl_write_plane_wm(plane, crtc_state);
+ intel_psr2_disable_plane_sel_fetch(plane, crtc_state);
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
@@ -1096,8 +1097,7 @@ skl_program_plane(struct intel_plane *plane,
(plane_state->view.color_plane[1].y << 16) |
plane_state->view.color_plane[1].x);
- if (!drm_atomic_crtc_needs_modeset(&crtc_state->uapi))
- intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
+ intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
/*
* Enable the scaler before the plane so that we don't
--
2.33.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] [PATCH CI 3/3] drm/i915/display: Only keep PSR enabled if there is active planes
2021-09-22 21:52 [Intel-gfx] [PATCH CI 1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load José Roberto de Souza
2021-09-22 21:52 ` [Intel-gfx] [PATCH CI 2/3] drm/i915/display: Match PSR2 selective fetch sequences with specification José Roberto de Souza
@ 2021-09-22 21:52 ` José Roberto de Souza
2021-09-22 21:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: José Roberto de Souza @ 2021-09-22 21:52 UTC (permalink / raw)
To: intel-gfx
Cc: Gwan-gyeong Mun, Ville Syrjälä, José Roberto de Souza
PSR always had a requirement to only be enabled if there is active
planes but not following that never caused any issues.
But that changes in Alderlake-P, leaving PSR enabled without
active planes causes transcoder/port underruns.
Similar behavior was fixed during the pipe disable sequence by
commit 84030adb9e27 ("drm/i915/display: Disable audio, DRRS and PSR before planes").
intel_dp_compute_psr_vsc_sdp() had to move from
intel_psr_enable_locked() to intel_psr_compute_config() because we
need to be able to disable/enable PSR from atomic states without
connector and encoder state.
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 -
drivers/gpu/drm/i915/display/intel_display.c | 14 +-
.../drm/i915/display/intel_display_types.h | 3 +-
drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
drivers/gpu/drm/i915/display/intel_dp.h | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 140 ++++++++++--------
drivers/gpu/drm/i915/display/intel_psr.h | 11 +-
7 files changed, 98 insertions(+), 80 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index bba0ab99836b1..a4667741d3548 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3034,7 +3034,6 @@ static void intel_enable_ddi_dp(struct intel_atomic_state *state,
intel_dp_stop_link_train(intel_dp, crtc_state);
intel_edp_backlight_on(crtc_state, conn_state);
- intel_psr_enable(intel_dp, crtc_state, conn_state);
if (!dig_port->lspcon.active || dig_port->dp.has_hdmi_sink)
intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
@@ -3255,7 +3254,6 @@ static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state,
intel_ddi_set_dp_msa(crtc_state, conn_state);
- intel_psr_update(intel_dp, crtc_state, conn_state);
intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
intel_drrs_update(intel_dp, crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 66e63f3429172..9985a1c5be96f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8095,10 +8095,12 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
if (bp_gamma)
PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, hw.gamma_lut, bp_gamma);
- PIPE_CONF_CHECK_BOOL(has_psr);
- PIPE_CONF_CHECK_BOOL(has_psr2);
- PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
- PIPE_CONF_CHECK_I(dc3co_exitline);
+ if (current_config->active_planes) {
+ PIPE_CONF_CHECK_BOOL(has_psr);
+ PIPE_CONF_CHECK_BOOL(has_psr2);
+ PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
+ PIPE_CONF_CHECK_I(dc3co_exitline);
+ }
}
PIPE_CONF_CHECK_BOOL(double_wide);
@@ -8155,7 +8157,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_I(min_voltage_level);
}
- if (fastset && (current_config->has_psr || pipe_config->has_psr))
+ if (current_config->has_psr || pipe_config->has_psr)
PIPE_CONF_CHECK_X_WITH_MASK(infoframes.enable,
~intel_hdmi_infoframe_enable(DP_SDP_VSC));
else
@@ -10209,6 +10211,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_encoders_update_prepare(state);
intel_dbuf_pre_plane_update(state);
+ intel_psr_pre_plane_update(state);
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
if (new_crtc_state->uapi.async_flip)
@@ -10272,6 +10275,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
}
intel_dbuf_post_plane_update(state);
+ intel_psr_post_plane_update(state);
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
intel_post_plane_update(state, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e9e806d90eec4..c900bfbb7cc52 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1056,12 +1056,14 @@ struct intel_crtc_state {
struct intel_link_m_n dp_m2_n2;
bool has_drrs;
+ /* PSR is supported but might not be enabled due the lack of enabled planes */
bool has_psr;
bool has_psr2;
bool enable_psr2_sel_fetch;
bool req_psr2_sdp_prior_scanline;
u32 dc3co_exitline;
u16 su_y_granularity;
+ struct drm_dp_vsc_sdp psr_vsc;
/*
* Frequence the dpll for the port should run at. Differs from the
@@ -1525,7 +1527,6 @@ struct intel_psr {
u32 dc3co_exitline;
u32 dc3co_exit_delay;
struct delayed_work dc3co_work;
- struct drm_dp_vsc_sdp vsc;
};
struct intel_dp {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7559911c140a7..378008873e039 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1674,7 +1674,7 @@ void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
{
vsc->sdp_type = DP_SDP_VSC;
- if (intel_dp->psr.psr2_enabled) {
+ if (crtc_state->has_psr2) {
if (intel_dp->psr.colorimetry_support &&
intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
/* [PSR2, +Colorimetry] */
@@ -1828,7 +1828,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
g4x_dp_set_clock(encoder, pipe_config);
intel_vrr_compute_config(pipe_config, conn_state);
- intel_psr_compute_config(intel_dp, pipe_config);
+ intel_psr_compute_config(intel_dp, pipe_config, conn_state);
intel_drrs_compute_config(intel_dp, pipe_config, output_bpp,
constant_n);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
@@ -2888,7 +2888,7 @@ static void intel_write_dp_sdp(struct intel_encoder *encoder,
void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
- struct drm_dp_vsc_sdp *vsc)
+ const struct drm_dp_vsc_sdp *vsc)
{
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 94b568704b22b..3343c25916807 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -88,7 +88,7 @@ void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
struct drm_dp_vsc_sdp *vsc);
void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
- struct drm_dp_vsc_sdp *vsc);
+ const struct drm_dp_vsc_sdp *vsc);
void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 868e5205dd09e..19a96d3c4acf4 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -950,7 +950,8 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
}
void intel_psr_compute_config(struct intel_dp *intel_dp,
- struct intel_crtc_state *crtc_state)
+ struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
const struct drm_display_mode *adjusted_mode =
@@ -1002,7 +1003,10 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
crtc_state->has_psr = true;
crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
+
crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
+ intel_dp_compute_psr_vsc_sdp(intel_dp, crtc_state, conn_state,
+ &crtc_state->psr_vsc);
}
void intel_psr_get_config(struct intel_encoder *encoder,
@@ -1182,8 +1186,7 @@ static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
}
static void intel_psr_enable_locked(struct intel_dp *intel_dp,
- const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state)
+ const struct intel_crtc_state *crtc_state)
{
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -1210,9 +1213,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
intel_dp->psr.psr2_enabled ? "2" : "1");
- intel_dp_compute_psr_vsc_sdp(intel_dp, crtc_state, conn_state,
- &intel_dp->psr.vsc);
- intel_write_dp_vsc_sdp(encoder, crtc_state, &intel_dp->psr.vsc);
+ intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->psr_vsc);
intel_snps_phy_update_psr_power_state(dev_priv, phy, true);
intel_psr_enable_sink(intel_dp);
intel_psr_enable_source(intel_dp);
@@ -1222,33 +1223,6 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
intel_psr_activate(intel_dp);
}
-/**
- * intel_psr_enable - Enable PSR
- * @intel_dp: Intel DP
- * @crtc_state: new CRTC state
- * @conn_state: new CONNECTOR state
- *
- * This function can only be called after the pipe is fully trained and enabled.
- */
-void intel_psr_enable(struct intel_dp *intel_dp,
- const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state)
-{
- struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-
- if (!CAN_PSR(intel_dp))
- return;
-
- if (!crtc_state->has_psr)
- return;
-
- drm_WARN_ON(&dev_priv->drm, dev_priv->drrs.dp);
-
- mutex_lock(&intel_dp->psr.lock);
- intel_psr_enable_locked(intel_dp, crtc_state, conn_state);
- mutex_unlock(&intel_dp->psr.lock);
-}
-
static void intel_psr_exit(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -1734,48 +1708,92 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
return 0;
}
-/**
- * intel_psr_update - Update PSR state
- * @intel_dp: Intel DP
- * @crtc_state: new CRTC state
- * @conn_state: new CONNECTOR state
- *
- * This functions will update PSR states, disabling, enabling or switching PSR
- * version when executing fastsets. For full modeset, intel_psr_disable() and
- * intel_psr_enable() should be called instead.
- */
-void intel_psr_update(struct intel_dp *intel_dp,
- const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state)
+static void _intel_psr_pre_plane_update(const struct intel_atomic_state *state,
+ const struct intel_crtc_state *crtc_state)
{
- struct intel_psr *psr = &intel_dp->psr;
- bool enable, psr2_enable;
+ struct intel_encoder *encoder;
- if (!CAN_PSR(intel_dp))
+ for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
+ crtc_state->uapi.encoder_mask) {
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ struct intel_psr *psr = &intel_dp->psr;
+ bool needs_to_disable = false;
+
+ mutex_lock(&psr->lock);
+
+ /*
+ * Reasons to disable:
+ * - PSR disabled in new state
+ * - All planes will go inactive
+ * - Changing between PSR versions
+ */
+ needs_to_disable |= !crtc_state->has_psr;
+ needs_to_disable |= !crtc_state->active_planes;
+ needs_to_disable |= crtc_state->has_psr2 != psr->psr2_enabled;
+
+ if (psr->enabled && needs_to_disable)
+ intel_psr_disable_locked(intel_dp);
+
+ mutex_unlock(&psr->lock);
+ }
+}
+
+void intel_psr_pre_plane_update(const struct intel_atomic_state *state)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct intel_crtc_state *crtc_state;
+ struct intel_crtc *crtc;
+ int i;
+
+ if (!HAS_PSR(dev_priv))
return;
- mutex_lock(&intel_dp->psr.lock);
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i)
+ _intel_psr_pre_plane_update(state, crtc_state);
+}
- enable = crtc_state->has_psr;
- psr2_enable = crtc_state->has_psr2;
+static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,
+ const struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct intel_encoder *encoder;
+
+ if (!crtc_state->has_psr)
+ return;
+
+ for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
+ crtc_state->uapi.encoder_mask) {
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ struct intel_psr *psr = &intel_dp->psr;
+
+ mutex_lock(&psr->lock);
+
+ drm_WARN_ON(&dev_priv->drm, psr->enabled && !crtc_state->active_planes);
+
+ /* Only enable if there is active planes */
+ if (!psr->enabled && crtc_state->active_planes)
+ intel_psr_enable_locked(intel_dp, crtc_state);
- if (enable == psr->enabled && psr2_enable == psr->psr2_enabled &&
- crtc_state->enable_psr2_sel_fetch == psr->psr2_sel_fetch_enabled) {
/* Force a PSR exit when enabling CRC to avoid CRC timeouts */
if (crtc_state->crc_enabled && psr->enabled)
psr_force_hw_tracking_exit(intel_dp);
- goto unlock;
+ mutex_unlock(&psr->lock);
}
+}
- if (psr->enabled)
- intel_psr_disable_locked(intel_dp);
+void intel_psr_post_plane_update(const struct intel_atomic_state *state)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct intel_crtc_state *crtc_state;
+ struct intel_crtc *crtc;
+ int i;
- if (enable)
- intel_psr_enable_locked(intel_dp, crtc_state, conn_state);
+ if (!HAS_PSR(dev_priv))
+ return;
-unlock:
- mutex_unlock(&intel_dp->psr.lock);
+ for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i)
+ _intel_psr_post_plane_update(state, crtc_state);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index e502964697c62..facffbacd3575 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -20,14 +20,10 @@ struct intel_plane;
struct intel_encoder;
void intel_psr_init_dpcd(struct intel_dp *intel_dp);
-void intel_psr_enable(struct intel_dp *intel_dp,
- const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state);
+void intel_psr_pre_plane_update(const struct intel_atomic_state *state);
+void intel_psr_post_plane_update(const struct intel_atomic_state *state);
void intel_psr_disable(struct intel_dp *intel_dp,
const struct intel_crtc_state *old_crtc_state);
-void intel_psr_update(struct intel_dp *intel_dp,
- const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state);
int intel_psr_debug_set(struct intel_dp *intel_dp, u64 value);
void intel_psr_invalidate(struct drm_i915_private *dev_priv,
unsigned frontbuffer_bits,
@@ -37,7 +33,8 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
enum fb_op_origin origin);
void intel_psr_init(struct intel_dp *intel_dp);
void intel_psr_compute_config(struct intel_dp *intel_dp,
- struct intel_crtc_state *crtc_state);
+ struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state);
void intel_psr_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config);
void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir);
--
2.33.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load
2021-09-22 21:52 [Intel-gfx] [PATCH CI 1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load José Roberto de Souza
2021-09-22 21:52 ` [Intel-gfx] [PATCH CI 2/3] drm/i915/display: Match PSR2 selective fetch sequences with specification José Roberto de Souza
2021-09-22 21:52 ` [Intel-gfx] [PATCH CI 3/3] drm/i915/display: Only keep PSR enabled if there is active planes José Roberto de Souza
@ 2021-09-22 21:56 ` Patchwork
2021-09-22 22:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-23 1:25 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-09-22 21:56 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load
URL : https://patchwork.freedesktop.org/series/94967/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5b64a2f4c3ca drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load
99491a0cc1f9 drm/i915/display: Match PSR2 selective fetch sequences with specification
f58ed69579ae drm/i915/display: Only keep PSR enabled if there is active planes
-:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#16:
commit 84030adb9e27 ("drm/i915/display: Disable audio, DRRS and PSR before planes").
total: 0 errors, 1 warnings, 0 checks, 321 lines checked
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load
2021-09-22 21:52 [Intel-gfx] [PATCH CI 1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load José Roberto de Souza
` (2 preceding siblings ...)
2021-09-22 21:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load Patchwork
@ 2021-09-22 22:27 ` Patchwork
2021-09-23 1:25 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-09-22 22:27 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3256 bytes --]
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load
URL : https://patchwork.freedesktop.org/series/94967/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10629 -> Patchwork_21136
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_21136:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live@gt_heartbeat:
- {fi-ehl-2}: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/fi-ehl-2/igt@i915_selftest@live@gt_heartbeat.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/fi-ehl-2/igt@i915_selftest@live@gt_heartbeat.html
Known issues
------------
Here are the changes found in Patchwork_21136 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [PASS][3] -> [INCOMPLETE][4] ([i915#3921])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-r: [DMESG-FAIL][5] ([i915#2291] / [i915#541]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (42 -> 35)
------------------------------
Missing (7): fi-ilk-m540 bat-dg1-6 bat-dg1-5 fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus bat-jsl-1
Build changes
-------------
* Linux: CI_DRM_10629 -> Patchwork_21136
CI-20190529: 20190529
CI_DRM_10629: ce6974ec90355ddef78e6bc2221cb2296e5ba349 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6214: 13550e92c6c7bd825abb6c9b087d12a524b4674c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21136: f58ed69579ae3a19f7ddbbbaf0ba19dbc67ecfe7 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f58ed69579ae drm/i915/display: Only keep PSR enabled if there is active planes
99491a0cc1f9 drm/i915/display: Match PSR2 selective fetch sequences with specification
5b64a2f4c3ca drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/index.html
[-- Attachment #2: Type: text/html, Size: 3925 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load
2021-09-22 21:52 [Intel-gfx] [PATCH CI 1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load José Roberto de Souza
` (3 preceding siblings ...)
2021-09-22 22:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-09-23 1:25 ` Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-09-23 1:25 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30324 bytes --]
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load
URL : https://patchwork.freedesktop.org/series/94967/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10629_full -> Patchwork_21136_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_21136_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-skl: [PASS][1] -> [INCOMPLETE][2] ([i915#198])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl10/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl1/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-tglb: [PASS][3] -> [INCOMPLETE][4] ([i915#1373])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-tglb3/igt@gem_ctx_isolation@preservation-s3@rcs0.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb7/igt@gem_ctx_isolation@preservation-s3@rcs0.html
* igt@gem_ctx_persistence@file:
- shard-snb: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-snb2/igt@gem_ctx_persistence@file.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][6] -> [FAIL][7] ([i915#2842])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb4/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) +2 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-tglb2/igt@gem_exec_fair@basic-pace@bcs0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb6/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-glk3/igt@gem_exec_fair@basic-throttle@rcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-glk6/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-snb: NOTRUN -> [SKIP][12] ([fdo#109271]) +76 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-snb2/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_pread@exhaustion:
- shard-apl: NOTRUN -> [WARN][13] ([i915#2658])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl2/igt@gem_pread@exhaustion.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-tglb: NOTRUN -> [SKIP][14] ([i915#3297]) +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb6/igt@gem_userptr_blits@coherency-unsync.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-kbl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#3323])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-kbl7/igt@gem_userptr_blits@dmabuf-sync.html
- shard-apl: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3323])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl8/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@huge-split:
- shard-iclb: [PASS][17] -> [FAIL][18] ([i915#3376])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb3/igt@gem_userptr_blits@huge-split.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb8/igt@gem_userptr_blits@huge-split.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-kbl: NOTRUN -> [SKIP][19] ([fdo#109271]) +22 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-kbl7/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gen9_exec_parse@allowed-all:
- shard-tglb: NOTRUN -> [SKIP][20] ([i915#2856]) +2 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@secure-batches:
- shard-iclb: NOTRUN -> [SKIP][21] ([i915#2856])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb4/igt@gen9_exec_parse@secure-batches.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
- shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#1937])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl7/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-tglb: NOTRUN -> [WARN][23] ([i915#2681])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb6/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rpm@modeset-non-lpsp:
- shard-tglb: NOTRUN -> [SKIP][24] ([fdo#111644] / [i915#1397] / [i915#2411])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb6/igt@i915_pm_rpm@modeset-non-lpsp.html
* igt@i915_pm_sseu@full-enable:
- shard-tglb: NOTRUN -> [SKIP][25] ([fdo#109288])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb3/igt@i915_pm_sseu@full-enable.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-tglb: NOTRUN -> [SKIP][26] ([i915#1769])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][27] ([fdo#111614])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb8/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#3777]) +3 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][29] ([i915#3722]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
- shard-tglb: NOTRUN -> [SKIP][30] ([fdo#111615])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-skl: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#3777])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_joiner@2x-modeset:
- shard-tglb: NOTRUN -> [SKIP][32] ([i915#2705])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb8/igt@kms_big_joiner@2x-modeset.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3886]) +4 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl5/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][34] ([i915#3689] / [i915#3886]) +1 similar issue
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#3886]) +10 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl3/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-bad-rotation-90-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][36] ([i915#3689]) +8 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@kms_ccs@pipe-d-bad-rotation-90-yf_tiled_ccs.html
* igt@kms_chamelium@vga-hpd:
- shard-apl: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827]) +25 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl8/igt@kms_chamelium@vga-hpd.html
* igt@kms_color@pipe-b-ctm-0-5:
- shard-skl: [PASS][38] -> [DMESG-WARN][39] ([i915#1982])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl9/igt@kms_color@pipe-b-ctm-0-5.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl4/igt@kms_color@pipe-b-ctm-0-5.html
* igt@kms_color@pipe-d-ctm-max:
- shard-skl: NOTRUN -> [SKIP][40] ([fdo#109271]) +75 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl5/igt@kms_color@pipe-d-ctm-max.html
* igt@kms_color_chamelium@pipe-a-ctm-0-25:
- shard-snb: NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827]) +2 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-snb2/igt@kms_color_chamelium@pipe-a-ctm-0-25.html
* igt@kms_color_chamelium@pipe-c-ctm-negative:
- shard-skl: NOTRUN -> [SKIP][42] ([fdo#109271] / [fdo#111827]) +8 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl5/igt@kms_color_chamelium@pipe-c-ctm-negative.html
* igt@kms_color_chamelium@pipe-c-gamma:
- shard-kbl: NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-kbl7/igt@kms_color_chamelium@pipe-c-gamma.html
* igt@kms_color_chamelium@pipe-d-ctm-red-to-blue:
- shard-tglb: NOTRUN -> [SKIP][44] ([fdo#109284] / [fdo#111827]) +6 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@kms_color_chamelium@pipe-d-ctm-red-to-blue.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-tglb: NOTRUN -> [SKIP][45] ([i915#3116]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb6/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@srm:
- shard-apl: NOTRUN -> [TIMEOUT][46] ([i915#1319])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl7/igt@kms_content_protection@srm.html
* igt@kms_cursor_crc@pipe-b-cursor-max-size-offscreen:
- shard-tglb: NOTRUN -> [SKIP][47] ([i915#3359]) +1 similar issue
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb3/igt@kms_cursor_crc@pipe-b-cursor-max-size-offscreen.html
* igt@kms_cursor_crc@pipe-d-cursor-512x170-random:
- shard-tglb: NOTRUN -> [SKIP][48] ([fdo#109279] / [i915#3359]) +2 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@kms_cursor_crc@pipe-d-cursor-512x170-random.html
* igt@kms_cursor_legacy@pipe-d-torture-bo:
- shard-apl: NOTRUN -> [SKIP][49] ([fdo#109271] / [i915#533]) +3 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl2/igt@kms_cursor_legacy@pipe-d-torture-bo.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-skl: [PASS][50] -> [FAIL][51] ([i915#79]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-apl: [PASS][52] -> [DMESG-WARN][53] ([i915#180]) +3 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-apl7/igt@kms_flip@flip-vs-suspend@c-dp1.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-apl: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#2672])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt:
- shard-tglb: NOTRUN -> [SKIP][55] ([fdo#111825]) +14 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-tglb: [PASS][56] -> [INCOMPLETE][57] ([i915#2411] / [i915#456])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-tglb8/igt@kms_frontbuffer_tracking@psr-suspend.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb7/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-kbl: [PASS][58] -> [DMESG-WARN][59] ([i915#180]) +2 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-kbl1/igt@kms_hdr@bpc-switch-suspend.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-kbl1/igt@kms_hdr@bpc-switch-suspend.html
- shard-skl: [PASS][60] -> [FAIL][61] ([i915#1188])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl7/igt@kms_hdr@bpc-switch-suspend.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl4/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
- shard-skl: NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#533])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl7/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][63] ([i915#265])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl8/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-apl: NOTRUN -> [FAIL][64] ([fdo#108145] / [i915#265]) +2 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl2/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: NOTRUN -> [FAIL][65] ([fdo#108145] / [i915#265]) +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-kbl: NOTRUN -> [FAIL][66] ([fdo#108145] / [i915#265])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-kbl7/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html
* igt@kms_plane_lowres@pipe-d-tiling-yf:
- shard-tglb: NOTRUN -> [SKIP][67] ([fdo#112054])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb3/igt@kms_plane_lowres@pipe-d-tiling-yf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
- shard-apl: NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#658]) +3 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
- shard-tglb: NOTRUN -> [SKIP][69] ([i915#2920])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
- shard-skl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#658]) +2 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-tglb: NOTRUN -> [FAIL][71] ([i915#132] / [i915#3467]) +1 similar issue
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [PASS][72] -> [SKIP][73] ([fdo#109441])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb3/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@kms_psr@psr2_primary_render:
- shard-iclb: NOTRUN -> [SKIP][74] ([fdo#109441])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb4/igt@kms_psr@psr2_primary_render.html
* igt@kms_rotation_crc@sprite-rotation-180:
- shard-snb: [PASS][75] -> [SKIP][76] ([fdo#109271])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-snb2/igt@kms_rotation_crc@sprite-rotation-180.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-snb6/igt@kms_rotation_crc@sprite-rotation-180.html
* igt@kms_vblank@pipe-d-ts-continuation-idle:
- shard-apl: NOTRUN -> [SKIP][77] ([fdo#109271]) +319 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl7/igt@kms_vblank@pipe-d-ts-continuation-idle.html
* igt@kms_vrr@flip-dpms:
- shard-tglb: NOTRUN -> [SKIP][78] ([fdo#109502])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb6/igt@kms_vrr@flip-dpms.html
* igt@kms_writeback@writeback-check-output:
- shard-apl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2437]) +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl8/igt@kms_writeback@writeback-check-output.html
* igt@nouveau_crc@pipe-a-source-rg:
- shard-tglb: NOTRUN -> [SKIP][80] ([i915#2530]) +2 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb6/igt@nouveau_crc@pipe-a-source-rg.html
* igt@perf@mi-rpc:
- shard-tglb: NOTRUN -> [SKIP][81] ([fdo#109289])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@perf@mi-rpc.html
* igt@perf@short-reads:
- shard-skl: [PASS][82] -> [FAIL][83] ([i915#51])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl2/igt@perf@short-reads.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl6/igt@perf@short-reads.html
* igt@prime_nv_api@i915_nv_import_vs_close:
- shard-tglb: NOTRUN -> [SKIP][84] ([fdo#109291]) +2 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb6/igt@prime_nv_api@i915_nv_import_vs_close.html
* igt@prime_vgem@fence-flip-hang:
- shard-tglb: NOTRUN -> [SKIP][85] ([fdo#109295])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb8/igt@prime_vgem@fence-flip-hang.html
* igt@sysfs_clients@fair-1:
- shard-apl: NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#2994]) +4 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl2/igt@sysfs_clients@fair-1.html
* igt@sysfs_clients@sema-25:
- shard-skl: NOTRUN -> [SKIP][87] ([fdo#109271] / [i915#2994])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl8/igt@sysfs_clients@sema-25.html
#### Possible fixes ####
* igt@feature_discovery@psr2:
- shard-iclb: [SKIP][88] ([i915#658]) -> [PASS][89]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb5/igt@feature_discovery@psr2.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb2/igt@feature_discovery@psr2.html
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-apl: [DMESG-WARN][90] ([i915#180]) -> [PASS][91] +1 similar issue
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-apl1/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-apl8/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_eio@unwedge-stress:
- shard-iclb: [TIMEOUT][92] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb5/igt@gem_eio@unwedge-stress.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb3/igt@gem_eio@unwedge-stress.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-skl: [DMESG-WARN][94] ([i915#1982]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl9/igt@i915_module_load@reload-with-fault-injection.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl4/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_backlight@fade_with_suspend:
- shard-skl: [INCOMPLETE][96] ([i915#198]) -> [PASS][97] +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl10/igt@i915_pm_backlight@fade_with_suspend.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl5/igt@i915_pm_backlight@fade_with_suspend.html
* igt@i915_pm_rpm@system-suspend:
- shard-tglb: [INCOMPLETE][98] ([i915#2411] / [i915#456]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-tglb7/igt@i915_pm_rpm@system-suspend.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb5/igt@i915_pm_rpm@system-suspend.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-tglb: [INCOMPLETE][100] ([i915#456] / [i915#750]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-tglb5/igt@i915_suspend@fence-restore-tiled2untiled.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb8/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][102] ([i915#2346] / [i915#533]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [INCOMPLETE][104] ([i915#155] / [i915#180] / [i915#636]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-skl: [FAIL][106] ([i915#79]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: [DMESG-WARN][108] ([i915#180]) -> [PASS][109] +3 similar issues
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
- shard-tglb: [INCOMPLETE][110] ([i915#2411] / [i915#4173] / [i915#456]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-tglb7/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb3/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
- shard-skl: [FAIL][112] ([i915#2122]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl5/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile:
- shard-iclb: [SKIP][114] ([i915#3701]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
- shard-tglb: [INCOMPLETE][116] ([i915#2828] / [i915#456]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-tglb7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-tglb6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][118] ([fdo#108145] / [i915#265]) -> [PASS][119] +1 similar issue
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_sprite_render:
- shard-iclb: [SKIP][120] ([fdo#109441]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb4/igt@kms_psr@psr2_sprite_render.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
* igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-skl: [INCOMPLETE][122] ([i915#198] / [i915#2828]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl2/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl7/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
* igt@perf@polling-parameterized:
- shard-skl: [FAIL][124] ([i915#1542]) -> [PASS][125]
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl4/igt@perf@polling-parameterized.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl9/igt@perf@polling-parameterized.html
* igt@perf@polling-small-buf:
- shard-skl: [FAIL][126] ([i915#1722]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-skl2/igt@perf@polling-small-buf.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-skl6/igt@perf@polling-small-buf.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][128] ([i915#1804] / [i915#2684]) -> [WARN][129] ([i915#2684])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb4/igt@i915_pm_rc6_residency@rc6-fence.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb1/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][130] ([i915#2684]) -> [WARN][131] ([i915#1804] / [i915#2684])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb6/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
- shard-iclb: [SKIP][132] ([i915#658]) -> [SKIP][133] ([i915#2920]) +2 similar issues
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
- shard-iclb: [SKIP][134] ([i915#2920]) -> [SKIP][135] ([i915#658]) +1 similar issue
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/shard-iclb1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#92]) -> ([FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-kbl1/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-kbl4/igt@runner@aborted.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-kbl1/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-kbl6/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10629/shard-kbl1/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21136/index.html
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-- links below jump to the message on this page --
2021-09-22 21:52 [Intel-gfx] [PATCH CI 1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load José Roberto de Souza
2021-09-22 21:52 ` [Intel-gfx] [PATCH CI 2/3] drm/i915/display: Match PSR2 selective fetch sequences with specification José Roberto de Souza
2021-09-22 21:52 ` [Intel-gfx] [PATCH CI 3/3] drm/i915/display: Only keep PSR enabled if there is active planes José Roberto de Souza
2021-09-22 21:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load Patchwork
2021-09-22 22:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-23 1:25 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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