All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] perf/x86/intel: Update event constraints for ICX
@ 2021-09-28 15:19 kan.liang
  2021-10-01 12:10 ` [tip: perf/urgent] " tip-bot2 for Kan Liang
  0 siblings, 1 reply; 2+ messages in thread
From: kan.liang @ 2021-09-28 15:19 UTC (permalink / raw)
  To: peterz; +Cc: linux-kernel, ak, Kan Liang

From: Kan Liang <kan.liang@linux.intel.com>

According to the latest event list, the event encoding 0xEF is only
available on the first 4 counters. Add it into the event constraints
table.

Fixes: 6017608936c1 ("perf/x86/intel: Add Icelake support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
 arch/x86/events/intel/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 7011e87..9a04443 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -263,6 +263,7 @@ static struct event_constraint intel_icl_event_constraints[] = {
 	INTEL_EVENT_CONSTRAINT_RANGE(0xa8, 0xb0, 0xf),
 	INTEL_EVENT_CONSTRAINT_RANGE(0xb7, 0xbd, 0xf),
 	INTEL_EVENT_CONSTRAINT_RANGE(0xd0, 0xe6, 0xf),
+	INTEL_EVENT_CONSTRAINT(0xef, 0xf),
 	INTEL_EVENT_CONSTRAINT_RANGE(0xf0, 0xf4, 0xf),
 	EVENT_CONSTRAINT_END
 };
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* [tip: perf/urgent] perf/x86/intel: Update event constraints for ICX
  2021-09-28 15:19 [PATCH] perf/x86/intel: Update event constraints for ICX kan.liang
@ 2021-10-01 12:10 ` tip-bot2 for Kan Liang
  0 siblings, 0 replies; 2+ messages in thread
From: tip-bot2 for Kan Liang @ 2021-10-01 12:10 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: Kan Liang, Peter Zijlstra (Intel), x86, linux-kernel

The following commit has been merged into the perf/urgent branch of tip:

Commit-ID:     ecc2123e09f9e71ddc6c53d71e283b8ada685fe2
Gitweb:        https://git.kernel.org/tip/ecc2123e09f9e71ddc6c53d71e283b8ada685fe2
Author:        Kan Liang <kan.liang@linux.intel.com>
AuthorDate:    Tue, 28 Sep 2021 08:19:03 -07:00
Committer:     Peter Zijlstra <peterz@infradead.org>
CommitterDate: Fri, 01 Oct 2021 13:57:54 +02:00

perf/x86/intel: Update event constraints for ICX

According to the latest event list, the event encoding 0xEF is only
available on the first 4 counters. Add it into the event constraints
table.

Fixes: 6017608936c1 ("perf/x86/intel: Add Icelake support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1632842343-25862-1-git-send-email-kan.liang@linux.intel.com
---
 arch/x86/events/intel/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 7011e87..9a04443 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -263,6 +263,7 @@ static struct event_constraint intel_icl_event_constraints[] = {
 	INTEL_EVENT_CONSTRAINT_RANGE(0xa8, 0xb0, 0xf),
 	INTEL_EVENT_CONSTRAINT_RANGE(0xb7, 0xbd, 0xf),
 	INTEL_EVENT_CONSTRAINT_RANGE(0xd0, 0xe6, 0xf),
+	INTEL_EVENT_CONSTRAINT(0xef, 0xf),
 	INTEL_EVENT_CONSTRAINT_RANGE(0xf0, 0xf4, 0xf),
 	EVENT_CONSTRAINT_END
 };

^ permalink raw reply related	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2021-10-01 12:10 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-28 15:19 [PATCH] perf/x86/intel: Update event constraints for ICX kan.liang
2021-10-01 12:10 ` [tip: perf/urgent] " tip-bot2 for Kan Liang

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.