All of lore.kernel.org
 help / color / mirror / Atom feed
From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve DP link training further (rev4)
Date: Tue, 05 Oct 2021 12:18:18 -0000	[thread overview]
Message-ID: <163343629822.19281.5048553831091543791@emeril.freedesktop.org> (raw)
In-Reply-To: <20211004170535.4173-1-ville.syrjala@linux.intel.com>

== Series Details ==

Series: drm/i915: Improve DP link training further (rev4)
URL   : https://patchwork.freedesktop.org/series/95405/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
abef31c7b13c drm/i915: Tweak the DP "max vswing reached?" condition
b54d2483d9e1 drm/i915: Show LTTPR in the TPS debug print
5799665e91f9 drm/i915: Print the DP vswing adjustment request
-:25: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#25: FILE: drivers/gpu/drm/i915/display/intel_dp_link_training.c:349:
+#define TRAIN_REQ_VSWING_ARGS(link_status) \
+	_TRAIN_REQ_VSWING_ARGS(link_status, 0), \
+	_TRAIN_REQ_VSWING_ARGS(link_status, 1), \
+	_TRAIN_REQ_VSWING_ARGS(link_status, 2), \
+	_TRAIN_REQ_VSWING_ARGS(link_status, 3)

-:25: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'link_status' - possible side-effects?
#25: FILE: drivers/gpu/drm/i915/display/intel_dp_link_training.c:349:
+#define TRAIN_REQ_VSWING_ARGS(link_status) \
+	_TRAIN_REQ_VSWING_ARGS(link_status, 0), \
+	_TRAIN_REQ_VSWING_ARGS(link_status, 1), \
+	_TRAIN_REQ_VSWING_ARGS(link_status, 2), \
+	_TRAIN_REQ_VSWING_ARGS(link_status, 3)

-:31: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#31: FILE: drivers/gpu/drm/i915/display/intel_dp_link_training.c:355:
+	(drm_dp_get_adjust_request_pre_emphasis((link_status), (lane)) >> DP_TRAIN_PRE_EMPHASIS_SHIFT)

-:32: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#32: FILE: drivers/gpu/drm/i915/display/intel_dp_link_training.c:356:
+#define TRAIN_REQ_PREEMPH_ARGS(link_status) \
+	_TRAIN_REQ_PREEMPH_ARGS(link_status, 0), \
+	_TRAIN_REQ_PREEMPH_ARGS(link_status, 1), \
+	_TRAIN_REQ_PREEMPH_ARGS(link_status, 2), \
+	_TRAIN_REQ_PREEMPH_ARGS(link_status, 3)

-:32: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'link_status' - possible side-effects?
#32: FILE: drivers/gpu/drm/i915/display/intel_dp_link_training.c:356:
+#define TRAIN_REQ_PREEMPH_ARGS(link_status) \
+	_TRAIN_REQ_PREEMPH_ARGS(link_status, 0), \
+	_TRAIN_REQ_PREEMPH_ARGS(link_status, 1), \
+	_TRAIN_REQ_PREEMPH_ARGS(link_status, 2), \
+	_TRAIN_REQ_PREEMPH_ARGS(link_status, 3)

total: 2 errors, 1 warnings, 2 checks, 41 lines checked
189e1f80ff45 drm/i915: Pimp link training debug prints
2581f8d15990 drm/i915: Call intel_dp_dump_link_status() for CR failures



  parent reply	other threads:[~2021-10-05 12:18 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-04 17:05 [Intel-gfx] [PATCH v2 0/5] drm/i915: Improve DP link training further Ville Syrjala
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 1/5] drm/i915: Tweak the DP "max vswing reached?" condition Ville Syrjala
2021-10-06 15:44   ` Imre Deak
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 2/5] drm/i915: Show LTTPR in the TPS debug print Ville Syrjala
2021-10-06 15:47   ` Imre Deak
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 3/5] drm/i915: Print the DP vswing adjustment request Ville Syrjala
2021-10-06 15:50   ` Imre Deak
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 4/5] drm/i915: Pimp link training debug prints Ville Syrjala
2021-10-06 16:09   ` Imre Deak
2021-10-06 16:48     ` Ville Syrjälä
2021-10-06 19:28       ` Ville Syrjälä
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Call intel_dp_dump_link_status() for CR failures Ville Syrjala
2021-10-06 16:12   ` Imre Deak
2021-10-04 18:55 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve DP link training further (rev2) Patchwork
2021-10-04 23:46 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve DP link training further (rev3) Patchwork
2021-10-05 12:18 ` Patchwork [this message]
2021-10-05 12:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Improve DP link training further (rev4) Patchwork
2021-10-05 13:42   ` Ville Syrjälä
2021-10-05 14:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve DP link training further (rev5) Patchwork
2021-10-05 14:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-05 18:25 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=163343629822.19281.5048553831091543791@emeril.freedesktop.org \
    --to=patchwork@emeril.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.