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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 4/5] drm/i915: Pimp link training debug prints
Date: Wed, 6 Oct 2021 19:48:18 +0300	[thread overview]
Message-ID: <YV3TUhNQtkfo4Am5@intel.com> (raw)
In-Reply-To: <20211006160902.GD3025323@ideak-desk.fi.intel.com>

On Wed, Oct 06, 2021 at 07:09:02PM +0300, Imre Deak wrote:
> On Mon, Oct 04, 2021 at 08:05:34PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Unify all debug prints during link training to include information
> > on both the encoder and the LTTPR. We unify the format to something
> > like "[ENCODER:1:FOO][LTTPR 1] Something something". Though not
> > sure if those brackets around the dp_phy just make it look like
> > line noise? I'll accept suggestions on better formatting.
> > 
> > I'm slightly on the fence about also including the connector,
> > but technically only the DPRX is the SST connector (ie.
> > intel_dp->attached_connector). I suppose you could think of it
> > as the branch device/whatever in the topology, and we're training
> > the link leading to it. So that could argue for its inclusion.
> > But it's all getting a bit long alrady, so not going to do it
> > I think.
> 
> Imo including the connector info eventually would be good to be able to
> match these lines with those only showing the connector, or connectors
> in i915_display_info etc.

You're probably right. I was just looking at a dmesg wondering which
connector it's training there...

Although with MST it of course doesn't match up with anything
that the user thinks as a connected connector. So a bit annoying.
And using a single MST connector wouldn't really lead to a
coherent debug message either since there could be many MST
connectors active on the same link :/

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2021-10-06 16:51 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-04 17:05 [Intel-gfx] [PATCH v2 0/5] drm/i915: Improve DP link training further Ville Syrjala
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 1/5] drm/i915: Tweak the DP "max vswing reached?" condition Ville Syrjala
2021-10-06 15:44   ` Imre Deak
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 2/5] drm/i915: Show LTTPR in the TPS debug print Ville Syrjala
2021-10-06 15:47   ` Imre Deak
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 3/5] drm/i915: Print the DP vswing adjustment request Ville Syrjala
2021-10-06 15:50   ` Imre Deak
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 4/5] drm/i915: Pimp link training debug prints Ville Syrjala
2021-10-06 16:09   ` Imre Deak
2021-10-06 16:48     ` Ville Syrjälä [this message]
2021-10-06 19:28       ` Ville Syrjälä
2021-10-04 17:05 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Call intel_dp_dump_link_status() for CR failures Ville Syrjala
2021-10-06 16:12   ` Imre Deak
2021-10-04 18:55 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve DP link training further (rev2) Patchwork
2021-10-04 23:46 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve DP link training further (rev3) Patchwork
2021-10-05 12:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve DP link training further (rev4) Patchwork
2021-10-05 12:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-05 13:42   ` Ville Syrjälä
2021-10-05 14:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve DP link training further (rev5) Patchwork
2021-10-05 14:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-05 18:25 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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