From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Masami Hiramatsu <mhiramat@kernel.org> Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Subject: [PATCH v3 1/5] clk: uniphier: Add audio system and video input clock control for PXs3 Date: Tue, 12 Oct 2021 09:53:51 +0900 [thread overview] Message-ID: <1634000035-3114-2-git-send-email-hayashi.kunihiko@socionext.com> (raw) In-Reply-To: <1634000035-3114-1-git-send-email-hayashi.kunihiko@socionext.com> Add clocks for audio subsystem (AIO) and video input subsystem (EXIV) on UniPhier PXs3 SoC. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- drivers/clk/uniphier/clk-uniphier-sys.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 32b301724183..0ec28ebc39c2 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -288,6 +288,8 @@ const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x210c, 7), UNIPHIER_CLK_GATE("sata1", 29, NULL, 0x210c, 8), UNIPHIER_CLK_GATE("sata-phy", 30, NULL, 0x210c, 21), + UNIPHIER_LD11_SYS_CLK_AIO(40), + UNIPHIER_LD11_SYS_CLK_EXIV(42), /* CPU gears */ UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8), UNIPHIER_CLK_DIV4("spll", 2, 3, 4, 8), -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Masami Hiramatsu <mhiramat@kernel.org> Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Subject: [PATCH v3 1/5] clk: uniphier: Add audio system and video input clock control for PXs3 Date: Tue, 12 Oct 2021 09:53:51 +0900 [thread overview] Message-ID: <1634000035-3114-2-git-send-email-hayashi.kunihiko@socionext.com> (raw) In-Reply-To: <1634000035-3114-1-git-send-email-hayashi.kunihiko@socionext.com> Add clocks for audio subsystem (AIO) and video input subsystem (EXIV) on UniPhier PXs3 SoC. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- drivers/clk/uniphier/clk-uniphier-sys.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 32b301724183..0ec28ebc39c2 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -288,6 +288,8 @@ const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x210c, 7), UNIPHIER_CLK_GATE("sata1", 29, NULL, 0x210c, 8), UNIPHIER_CLK_GATE("sata-phy", 30, NULL, 0x210c, 21), + UNIPHIER_LD11_SYS_CLK_AIO(40), + UNIPHIER_LD11_SYS_CLK_EXIV(42), /* CPU gears */ UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8), UNIPHIER_CLK_DIV4("spll", 2, 3, 4, 8), -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-10-12 0:54 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-12 0:53 [PATCH v3 0/5] clk: uniphier: Introduce some clock features and NX1 support Kunihiko Hayashi 2021-10-12 0:53 ` Kunihiko Hayashi 2021-10-12 0:53 ` Kunihiko Hayashi [this message] 2021-10-12 0:53 ` [PATCH v3 1/5] clk: uniphier: Add audio system and video input clock control for PXs3 Kunihiko Hayashi 2021-11-02 21:37 ` Stephen Boyd 2021-11-02 21:37 ` Stephen Boyd 2021-10-12 0:53 ` [PATCH v3 2/5] dt-bindings: clock: uniphier: Add NX1 clock binding Kunihiko Hayashi 2021-10-12 0:53 ` Kunihiko Hayashi 2021-10-18 19:06 ` Rob Herring 2021-10-18 19:06 ` Rob Herring 2021-11-02 21:37 ` Stephen Boyd 2021-11-02 21:37 ` Stephen Boyd 2021-10-12 0:53 ` [PATCH v3 3/5] clk: uniphier: Add NX1 clock support Kunihiko Hayashi 2021-10-12 0:53 ` Kunihiko Hayashi 2021-11-02 21:37 ` Stephen Boyd 2021-11-02 21:37 ` Stephen Boyd 2021-10-12 0:53 ` [PATCH v3 4/5] dt-bindings: clock: uniphier: Add clock binding for SoC-glue Kunihiko Hayashi 2021-10-12 0:53 ` Kunihiko Hayashi 2021-10-18 19:06 ` Rob Herring 2021-10-18 19:06 ` Rob Herring 2021-11-02 21:37 ` Stephen Boyd 2021-11-02 21:37 ` Stephen Boyd 2021-10-12 0:53 ` [PATCH v3 5/5] clk: uniphier: Add SoC-glue clock source selector support for Pro4 Kunihiko Hayashi 2021-10-12 0:53 ` Kunihiko Hayashi 2021-11-02 21:37 ` Stephen Boyd 2021-11-02 21:37 ` Stephen Boyd
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