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From: Stephen Boyd <sboyd@kernel.org>
To: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>,
	mturquette@baylibre.com, robh+dt@kernel.org
Cc: nicolas.ferre@microchip.com, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	UNGLinuxDriver@microchip.com, Eugen.Hristev@microchip.com,
	Kavyasree.Kotagiri@microchip.com, Manohar.Puri@microchip.com
Subject: Re: [PATCH v9 3/3] clk: lan966x: Add lan966x SoC clock driver
Date: Tue, 02 Nov 2021 14:52:50 -0700	[thread overview]
Message-ID: <163588997070.2993099.15915757233630724042@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20211019074030.31294-4-kavyasree.kotagiri@microchip.com>

Quoting Kavyasree Kotagiri (2021-10-19 00:40:30)
> diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
> new file mode 100644
> index 000000000000..19bec94e1551
> --- /dev/null
> +++ b/drivers/clk/clk-lan966x.c
> @@ -0,0 +1,240 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Microchip LAN966x SoC Clock driver.
> + *
> + * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries
> + *
> + * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/clk-provider.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +#include <dt-bindings/clock/microchip,lan966x.h>
> +
> +#define GCK_ENA         BIT(0)
> +#define GCK_SRC_SEL     GENMASK(9, 8)
> +#define GCK_PRESCALER   GENMASK(23, 16)
> +
> +#define DIV_MAX                255
> +
> +static const char *clk_names[N_CLOCKS] = {
> +       "qspi0", "qspi1", "qspi2", "sdmmc0",
> +       "pi", "mcan0", "mcan1", "flexcom0",
> +       "flexcom1", "flexcom2", "flexcom3",
> +       "flexcom4", "timer1", "usb_refclk",
> +};
> +
> +struct lan966x_gck {
> +       struct clk_hw hw;
> +       void __iomem *reg;
> +};
> +#define to_lan966x_gck(hw) container_of(hw, struct lan966x_gck, hw)
> +
> +static const struct clk_parent_data lan966x_gck_pdata[] = {
> +       { .fw_name = "cpu_clk", .name = "cpu_clk" },

name shouldn't be required if the binding is new. That's the case
right?


> +       { .fw_name = "ddr_clk", .name = "ddr_clk" },
> +       { .fw_name = "sys_clk", .name = "sys_clk" },
> +};
> +

  reply	other threads:[~2021-11-02 21:52 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-19  7:40 [PATCH v9 0/3] Add driver for lan966x Generic Clock Controller Kavyasree Kotagiri
2021-10-19  7:40 ` [PATCH v9 1/3] dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs Kavyasree Kotagiri
2021-10-19  7:40 ` [PATCH v9 2/3] dt-bindings: clock: lan966x: Add LAN966X Clock Controller Kavyasree Kotagiri
2021-10-19  7:40 ` [PATCH v9 3/3] clk: lan966x: Add lan966x SoC clock driver Kavyasree Kotagiri
2021-11-02 21:52   ` Stephen Boyd [this message]
2021-11-02 12:47 ` [PATCH v9 0/3] Add driver for lan966x Generic Clock Controller Kavyasree.Kotagiri
2021-11-02 21:53   ` Stephen Boyd

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