* [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature.
@ 2021-11-19 13:13 Mika Kahola
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 1/5] drm/i915/display/dg2: Introduce CD clock squashing table Mika Kahola
` (8 more replies)
0 siblings, 9 replies; 15+ messages in thread
From: Mika Kahola @ 2021-11-19 13:13 UTC (permalink / raw)
To: intel-gfx
Add support for CD clock squashing feature.
v2: Reorder patches (Jani)
Add Ville's "Allow cdclk squasher to be reconfigured live"
to the series
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Mika Kahola (4):
drm/i915/display/dg2: Introduce CD clock squashing table
drm/i915/display/dg2: Sanitize CD clock
drm/i915/display/dg2: Set CD clock squashing registers
drm/i915/display/dg2: Read CD clock from squasher table
Ville Syrjälä (1):
drm/i915: Allow cdclk squasher to be reconfigured live
drivers/gpu/drm/i915/display/intel_cdclk.c | 132 ++++++++++++++++++---
drivers/gpu/drm/i915/display/intel_cdclk.h | 1 +
drivers/gpu/drm/i915/i915_reg.h | 8 ++
3 files changed, 127 insertions(+), 14 deletions(-)
--
2.27.0
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v2 1/5] drm/i915/display/dg2: Introduce CD clock squashing table
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
@ 2021-11-19 13:13 ` Mika Kahola
2021-11-23 8:53 ` Lisovskiy, Stanislav
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 2/5] drm/i915/display/dg2: Sanitize CD clock Mika Kahola
` (7 subsequent siblings)
8 siblings, 1 reply; 15+ messages in thread
From: Mika Kahola @ 2021-11-19 13:13 UTC (permalink / raw)
To: intel-gfx
For CD clock squashing method, we need to define corresponding CD clock table for
reference clocks, dividers and ratios for all CD clock options.
BSpec: 54034
v2: Add CD squashing waveforms as part of CD clock table (Ville)
v3: Waveform is 16 bits wide (Ville)
[v4: vsyrjala: Nuke the non-squasher based table,
Set .divider=2 for consistency,
Pack intel_cdclk_vals a bit nicer]
v5: Fix error in waveform value (Swati)
v6 (Lucas): Rebase on upstream
v7 (MattR): Drop 40.8, 81.6, and 122.4 MHz frequencies to reflect new
bspec update.
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 19 +++++++++++++------
drivers/gpu/drm/i915/display/intel_cdclk.h | 1 +
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 91c19e0a98d7..7af4cb965060 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1313,12 +1313,19 @@ static const struct intel_cdclk_vals adlp_cdclk_table[] = {
};
static const struct intel_cdclk_vals dg2_cdclk_table[] = {
- { .refclk = 38400, .cdclk = 172800, .divider = 2, .ratio = 9 },
- { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 },
- { .refclk = 38400, .cdclk = 307200, .divider = 2, .ratio = 16 },
- { .refclk = 38400, .cdclk = 326400, .divider = 4, .ratio = 34 },
- { .refclk = 38400, .cdclk = 556800, .divider = 2, .ratio = 29 },
- { .refclk = 38400, .cdclk = 652800, .divider = 2, .ratio = 34 },
+ { .refclk = 38400, .cdclk = 163200, .divider = 2, .ratio = 34, .waveform = 0x8888 },
+ { .refclk = 38400, .cdclk = 204000, .divider = 2, .ratio = 34, .waveform = 0x9248 },
+ { .refclk = 38400, .cdclk = 244800, .divider = 2, .ratio = 34, .waveform = 0xa4a4 },
+ { .refclk = 38400, .cdclk = 285600, .divider = 2, .ratio = 34, .waveform = 0xa54a },
+ { .refclk = 38400, .cdclk = 326400, .divider = 2, .ratio = 34, .waveform = 0xaaaa },
+ { .refclk = 38400, .cdclk = 367200, .divider = 2, .ratio = 34, .waveform = 0xad5a },
+ { .refclk = 38400, .cdclk = 408000, .divider = 2, .ratio = 34, .waveform = 0xb6b6 },
+ { .refclk = 38400, .cdclk = 448800, .divider = 2, .ratio = 34, .waveform = 0xdbb6 },
+ { .refclk = 38400, .cdclk = 489600, .divider = 2, .ratio = 34, .waveform = 0xeeee },
+ { .refclk = 38400, .cdclk = 530400, .divider = 2, .ratio = 34, .waveform = 0xf7de },
+ { .refclk = 38400, .cdclk = 571200, .divider = 2, .ratio = 34, .waveform = 0xfefe },
+ { .refclk = 38400, .cdclk = 612000, .divider = 2, .ratio = 34, .waveform = 0xfffe },
+ { .refclk = 38400, .cdclk = 652800, .divider = 2, .ratio = 34, .waveform = 0xffff },
{}
};
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index 309b3f394e24..89ca59c46102 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -19,6 +19,7 @@ struct intel_crtc_state;
struct intel_cdclk_vals {
u32 cdclk;
u16 refclk;
+ u16 waveform;
u8 divider; /* CD2X divider * 2 */
u8 ratio;
};
--
2.27.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v2 2/5] drm/i915/display/dg2: Sanitize CD clock
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 1/5] drm/i915/display/dg2: Introduce CD clock squashing table Mika Kahola
@ 2021-11-19 13:13 ` Mika Kahola
2021-11-23 8:54 ` Lisovskiy, Stanislav
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 3/5] drm/i915/display/dg2: Set CD clock squashing registers Mika Kahola
` (6 subsequent siblings)
8 siblings, 1 reply; 15+ messages in thread
From: Mika Kahola @ 2021-11-19 13:13 UTC (permalink / raw)
To: intel-gfx
In case of CD clock squashing the divider is always 1. We don't
need to calculate the divider in use so let's skip that for DG2.
v2: Drop unnecessary local variable (Ville)
v3: Avoid if-else structure (Ville)
[v4: vsyrjala: Fix cd2x divider calculation (Uma),
Introduce has_cdclk_squasher()]
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 7af4cb965060..3a61d52bdc0e 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1212,6 +1212,11 @@ static void skl_cdclk_uninit_hw(struct drm_i915_private *dev_priv)
skl_set_cdclk(dev_priv, &cdclk_config, INVALID_PIPE);
}
+static bool has_cdclk_squasher(struct drm_i915_private *i915)
+{
+ return IS_DG2(i915);
+}
+
static const struct intel_cdclk_vals bxt_cdclk_table[] = {
{ .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
{ .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
@@ -1735,7 +1740,7 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
{
u32 cdctl, expected;
- int cdclk, vco;
+ int cdclk, clock, vco;
intel_update_cdclk(dev_priv);
intel_dump_cdclk_config(&dev_priv->cdclk.hw, "Current CDCLK");
@@ -1771,8 +1776,12 @@ static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
expected = skl_cdclk_decimal(cdclk);
/* Figure out what CD2X divider we should be using for this cdclk */
- expected |= bxt_cdclk_cd2x_div_sel(dev_priv,
- dev_priv->cdclk.hw.cdclk,
+ if (has_cdclk_squasher(dev_priv))
+ clock = dev_priv->cdclk.hw.vco / 2;
+ else
+ clock = dev_priv->cdclk.hw.cdclk;
+
+ expected |= bxt_cdclk_cd2x_div_sel(dev_priv, clock,
dev_priv->cdclk.hw.vco);
/*
--
2.27.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v2 3/5] drm/i915/display/dg2: Set CD clock squashing registers
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 1/5] drm/i915/display/dg2: Introduce CD clock squashing table Mika Kahola
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 2/5] drm/i915/display/dg2: Sanitize CD clock Mika Kahola
@ 2021-11-19 13:13 ` Mika Kahola
2021-11-23 8:55 ` Lisovskiy, Stanislav
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 4/5] drm/i915/display/dg2: Read CD clock from squasher table Mika Kahola
` (5 subsequent siblings)
8 siblings, 1 reply; 15+ messages in thread
From: Mika Kahola @ 2021-11-19 13:13 UTC (permalink / raw)
To: intel-gfx
Set CD clock squashing registers based on selected CD clock.
v2: use slk_cdclk_decimal() to compute decimal values instead of a
specific table (Ville)
Set waveform based on CD clock table (Ville)
Drop unnecessary local variable (Ville)
v3: Correct function naming (Ville)
Correct if-else structure (Ville)
[v4: vsyrjala: Fix spaces vs. tabs]
[v5: vsyrjala: Fix cd2x divider calculation (Uma),
Add warn to waveform lookup (Uma),
Handle bypass freq in waveform lookup,
Generalize waveform handling in bxt_set_cdclk()]
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 41 +++++++++++++++++++++-
drivers/gpu/drm/i915/i915_reg.h | 8 +++++
2 files changed, 48 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 3a61d52bdc0e..560383e8c5b6 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1638,6 +1638,26 @@ static u32 bxt_cdclk_cd2x_div_sel(struct drm_i915_private *dev_priv,
}
}
+static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
+ int cdclk)
+{
+ const struct intel_cdclk_vals *table = dev_priv->cdclk.table;
+ int i;
+
+ if (cdclk == dev_priv->cdclk.hw.bypass)
+ return 0;
+
+ for (i = 0; table[i].refclk; i++)
+ if (table[i].refclk == dev_priv->cdclk.hw.ref &&
+ table[i].cdclk == cdclk)
+ return table[i].waveform;
+
+ drm_WARN(&dev_priv->drm, 1, "cdclk %d not valid for refclk %u\n",
+ cdclk, dev_priv->cdclk.hw.ref);
+
+ return 0xffff;
+}
+
static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
const struct intel_cdclk_config *cdclk_config,
enum pipe pipe)
@@ -1645,6 +1665,8 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
int cdclk = cdclk_config->cdclk;
int vco = cdclk_config->vco;
u32 val;
+ u16 waveform;
+ int clock;
int ret;
/* Inform power controller of upcoming frequency change. */
@@ -1688,7 +1710,24 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
bxt_de_pll_enable(dev_priv, vco);
}
- val = bxt_cdclk_cd2x_div_sel(dev_priv, cdclk, vco) |
+ waveform = cdclk_squash_waveform(dev_priv, cdclk);
+
+ if (waveform)
+ clock = vco / 2;
+ else
+ clock = cdclk;
+
+ if (has_cdclk_squasher(dev_priv)) {
+ u32 squash_ctl = 0;
+
+ if (waveform)
+ squash_ctl = CDCLK_SQUASH_ENABLE |
+ CDCLK_SQUASH_WINDOW_SIZE(0xf) | waveform;
+
+ intel_de_write(dev_priv, CDCLK_SQUASH_CTL, squash_ctl);
+ }
+
+ val = bxt_cdclk_cd2x_div_sel(dev_priv, clock, vco) |
bxt_cdclk_cd2x_pipe(dev_priv, pipe) |
skl_cdclk_decimal(cdclk);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3450818802c2..36f14f243190 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -10654,6 +10654,14 @@ enum skl_power_gate {
#define BXT_CDCLK_SSA_PRECHARGE_ENABLE (1 << 16)
#define CDCLK_FREQ_DECIMAL_MASK (0x7ff)
+/* CDCLK_SQUASH_CTL */
+#define CDCLK_SQUASH_CTL _MMIO(0x46008)
+#define CDCLK_SQUASH_ENABLE REG_BIT(31)
+#define CDCLK_SQUASH_WINDOW_SIZE_MASK REG_GENMASK(27, 24)
+#define CDCLK_SQUASH_WINDOW_SIZE(x) REG_FIELD_PREP(CDCLK_SQUASH_WINDOW_SIZE_MASK, (x))
+#define CDCLK_SQUASH_WAVEFORM_MASK REG_GENMASK(15, 0)
+#define CDCLK_SQUASH_WAVEFORM(x) REG_FIELD_PREP(CDCLK_SQUASH_WAVEFORM_MASK, (x))
+
/* LCPLL_CTL */
#define LCPLL1_CTL _MMIO(0x46010)
#define LCPLL2_CTL _MMIO(0x46014)
--
2.27.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v2 4/5] drm/i915/display/dg2: Read CD clock from squasher table
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
` (2 preceding siblings ...)
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 3/5] drm/i915/display/dg2: Set CD clock squashing registers Mika Kahola
@ 2021-11-19 13:13 ` Mika Kahola
2021-11-23 8:55 ` Lisovskiy, Stanislav
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Allow cdclk squasher to be reconfigured live Mika Kahola
` (4 subsequent siblings)
8 siblings, 1 reply; 15+ messages in thread
From: Mika Kahola @ 2021-11-19 13:13 UTC (permalink / raw)
To: intel-gfx
To calculate CD clock with squasher unit, we set CD clock ratio to fixed value of 34.
The CD clock value is read from CD clock squasher table.
BSpec: 54034
v2: Read ratio from register (Ville)
Drop unnecessary local variable (Ville)
Get CD clock from the given table
v3: Calculate CD clock frequency based on waveform bit pattern (Ville)
[v4: vsyrjala: Actually do a proper blind readout from the hardware]
[v5: vsyrjala: Use has_cdclk_squasher()]
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 560383e8c5b6..5fcb393079f7 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1466,6 +1466,7 @@ static void bxt_de_pll_readout(struct drm_i915_private *dev_priv,
static void bxt_get_cdclk(struct drm_i915_private *dev_priv,
struct intel_cdclk_config *cdclk_config)
{
+ u32 squash_ctl = 0;
u32 divider;
int div;
@@ -1503,7 +1504,21 @@ static void bxt_get_cdclk(struct drm_i915_private *dev_priv,
return;
}
- cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, div);
+ if (has_cdclk_squasher(dev_priv))
+ squash_ctl = intel_de_read(dev_priv, CDCLK_SQUASH_CTL);
+
+ if (squash_ctl & CDCLK_SQUASH_ENABLE) {
+ u16 waveform;
+ int size;
+
+ size = REG_FIELD_GET(CDCLK_SQUASH_WINDOW_SIZE_MASK, squash_ctl) + 1;
+ waveform = REG_FIELD_GET(CDCLK_SQUASH_WAVEFORM_MASK, squash_ctl) >> (16 - size);
+
+ cdclk_config->cdclk = DIV_ROUND_CLOSEST(hweight16(waveform) *
+ cdclk_config->vco, size * div);
+ } else {
+ cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, div);
+ }
out:
/*
--
2.27.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v2 5/5] drm/i915: Allow cdclk squasher to be reconfigured live
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
` (3 preceding siblings ...)
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 4/5] drm/i915/display/dg2: Read CD clock from squasher table Mika Kahola
@ 2021-11-19 13:13 ` Mika Kahola
2021-11-22 13:02 ` Kahola, Mika
2021-11-19 13:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for CD clock squashing feature Patchwork
` (3 subsequent siblings)
8 siblings, 1 reply; 15+ messages in thread
From: Mika Kahola @ 2021-11-19 13:13 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Supposedly we should be able to change the cdclk squasher waveform
even when many pipes are active. Make it so.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 40 ++++++++++++++++++++--
1 file changed, 37 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 5fcb393079f7..075ad6055765 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1951,6 +1951,25 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
a->ref == b->ref;
}
+static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
+ const struct intel_cdclk_config *a,
+ const struct intel_cdclk_config *b)
+{
+ /*
+ * FIXME should store a bit more state in intel_cdclk_config
+ * to differentiate squasher vs. cd2x divider properly. For
+ * the moment all platforms with squasher use a fixed cd2x
+ * divider.
+ */
+ if (!has_cdclk_squasher(dev_priv))
+ return false;
+
+ return a->cdclk != b->cdclk &&
+ a->vco != 0 &&
+ a->vco == b->vco &&
+ a->ref == b->ref;
+}
+
/**
* intel_cdclk_needs_modeset - Determine if changong between the CDCLK
* configurations requires a modeset on all pipes
@@ -1988,7 +2007,17 @@ static bool intel_cdclk_can_cd2x_update(struct drm_i915_private *dev_priv,
if (DISPLAY_VER(dev_priv) < 10 && !IS_BROXTON(dev_priv))
return false;
+ /*
+ * FIXME should store a bit more state in intel_cdclk_config
+ * to differentiate squasher vs. cd2x divider properly. For
+ * the moment all platforms with squasher use a fixed cd2x
+ * divider.
+ */
+ if (has_cdclk_squasher(dev_priv))
+ return false;
+
return a->cdclk != b->cdclk &&
+ a->vco != 0 &&
a->vco == b->vco &&
a->ref == b->ref;
}
@@ -2672,9 +2701,14 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
pipe = INVALID_PIPE;
}
- if (intel_cdclk_can_crawl(dev_priv,
- &old_cdclk_state->actual,
- &new_cdclk_state->actual)) {
+ if (intel_cdclk_can_squash(dev_priv,
+ &old_cdclk_state->actual,
+ &new_cdclk_state->actual)) {
+ drm_dbg_kms(&dev_priv->drm,
+ "Can change cdclk via squasher\n");
+ } else if (intel_cdclk_can_crawl(dev_priv,
+ &old_cdclk_state->actual,
+ &new_cdclk_state->actual)) {
drm_dbg_kms(&dev_priv->drm,
"Can change cdclk via crawl\n");
} else if (pipe != INVALID_PIPE) {
--
2.27.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for CD clock squashing feature.
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
` (4 preceding siblings ...)
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Allow cdclk squasher to be reconfigured live Mika Kahola
@ 2021-11-19 13:46 ` Patchwork
2021-11-19 13:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
8 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-11-19 13:46 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
== Series Details ==
Series: Add support for CD clock squashing feature.
URL : https://patchwork.freedesktop.org/series/97104/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1372fab833bb drm/i915/display/dg2: Introduce CD clock squashing table
-:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#9:
For CD clock squashing method, we need to define corresponding CD clock table for
total: 0 errors, 1 warnings, 0 checks, 32 lines checked
4ded7cded63e drm/i915/display/dg2: Sanitize CD clock
8a5e9f1943f0 drm/i915/display/dg2: Set CD clock squashing registers
784c7e613365 drm/i915/display/dg2: Read CD clock from squasher table
-:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#9:
To calculate CD clock with squasher unit, we set CD clock ratio to fixed value of 34.
total: 0 errors, 1 warnings, 0 checks, 29 lines checked
c9471d4f8383 drm/i915: Allow cdclk squasher to be reconfigured live
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add support for CD clock squashing feature.
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
` (5 preceding siblings ...)
2021-11-19 13:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for CD clock squashing feature Patchwork
@ 2021-11-19 13:47 ` Patchwork
2021-11-19 14:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-19 17:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
8 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-11-19 13:47 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
== Series Details ==
Series: Add support for CD clock squashing feature.
URL : https://patchwork.freedesktop.org/series/97104/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Add support for CD clock squashing feature.
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
` (6 preceding siblings ...)
2021-11-19 13:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2021-11-19 14:23 ` Patchwork
2021-11-19 17:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
8 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-11-19 14:23 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 10496 bytes --]
== Series Details ==
Series: Add support for CD clock squashing feature.
URL : https://patchwork.freedesktop.org/series/97104/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10906 -> Patchwork_21638
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/index.html
Participating hosts (40 -> 35)
------------------------------
Additional (2): fi-tgl-1115g4 fi-icl-u2
Missing (7): bat-dg1-6 fi-tgl-u2 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 bat-jsl-2 bat-jsl-1
Known issues
------------
Here are the changes found in Patchwork_21638 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@query-info:
- fi-tgl-1115g4: NOTRUN -> [SKIP][1] ([fdo#109315])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@amdgpu/amd_basic@query-info.html
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> [SKIP][2] ([fdo#109315]) +17 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-icl-u2/igt@amdgpu/amd_cs_nop@fork-gfx0.html
* igt@amdgpu/amd_cs_nop@nop-gfx0:
- fi-tgl-1115g4: NOTRUN -> [SKIP][3] ([fdo#109315] / [i915#2575]) +16 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@amdgpu/amd_cs_nop@nop-gfx0.html
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600: NOTRUN -> [SKIP][4] ([fdo#109271]) +17 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html
* igt@amdgpu/amd_cs_nop@sync-gfx0:
- fi-bsw-n3050: NOTRUN -> [SKIP][5] ([fdo#109271]) +17 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-bsw-n3050/igt@amdgpu/amd_cs_nop@sync-gfx0.html
* igt@gem_exec_suspend@basic-s3:
- fi-bdw-5557u: [PASS][6] -> [INCOMPLETE][7] ([i915#146])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html
* igt@gem_huc_copy@huc-copy:
- fi-tgl-1115g4: NOTRUN -> [SKIP][8] ([i915#2190])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html
- fi-icl-u2: NOTRUN -> [SKIP][9] ([i915#2190])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-tgl-1115g4: NOTRUN -> [SKIP][10] ([i915#4555])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-icl-u2: NOTRUN -> [SKIP][11] ([i915#4555]) +3 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-icl-u2/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_lmem_swapping@verify-random:
- fi-tgl-1115g4: NOTRUN -> [SKIP][12] ([i915#4555] / [i915#4565]) +2 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@gem_lmem_swapping@verify-random.html
* igt@i915_pm_backlight@basic-brightness:
- fi-tgl-1115g4: NOTRUN -> [SKIP][13] ([i915#1155])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-tgl-1115g4: NOTRUN -> [SKIP][14] ([fdo#111827]) +8 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: NOTRUN -> [SKIP][15] ([fdo#111827]) +8 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-tgl-1115g4: NOTRUN -> [SKIP][16] ([i915#4103]) +1 similar issue
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2: NOTRUN -> [SKIP][17] ([fdo#109278]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-tgl-1115g4: NOTRUN -> [SKIP][18] ([fdo#109285])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html
- fi-icl-u2: NOTRUN -> [SKIP][19] ([fdo#109285])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-icl-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-bdw-samus: [PASS][20] -> [INCOMPLETE][21] ([i915#4444])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/fi-bdw-samus/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-bdw-samus/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_psr@primary_mmap_gtt:
- fi-tgl-1115g4: NOTRUN -> [SKIP][22] ([i915#1072]) +3 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html
* igt@kms_psr@primary_page_flip:
- fi-skl-6600u: [PASS][23] -> [FAIL][24] ([i915#4547])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
* igt@prime_vgem@basic-userptr:
- fi-icl-u2: NOTRUN -> [SKIP][25] ([i915#3301])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-icl-u2/igt@prime_vgem@basic-userptr.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][26] ([i915#3301])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-skl-6600u: NOTRUN -> [FAIL][27] ([i915#3363] / [i915#4312])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-skl-6600u/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@execlists:
- fi-bsw-n3050: [INCOMPLETE][28] ([i915#2940]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_pm:
- {fi-jsl-1}: [DMESG-FAIL][30] ([i915#1886]) -> [PASS][31]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/fi-jsl-1/igt@i915_selftest@live@gt_pm.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-jsl-1/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [INCOMPLETE][32] ([i915#3921]) -> [PASS][33]
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [DMESG-WARN][34] ([i915#4269]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4444]: https://gitlab.freedesktop.org/drm/intel/issues/4444
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4555]: https://gitlab.freedesktop.org/drm/intel/issues/4555
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
Build changes
-------------
* Linux: CI_DRM_10906 -> Patchwork_21638
CI-20190529: 20190529
CI_DRM_10906: 0d2cc36c9cceec20df2d81e285e112d385c93eab @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6285: 2e0355faad5c2e81cd6705b76e529ce526c7c9bf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21638: c9471d4f8383f153745fedd8fe7deaa7c95e0d5d @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c9471d4f8383 drm/i915: Allow cdclk squasher to be reconfigured live
784c7e613365 drm/i915/display/dg2: Read CD clock from squasher table
8a5e9f1943f0 drm/i915/display/dg2: Set CD clock squashing registers
4ded7cded63e drm/i915/display/dg2: Sanitize CD clock
1372fab833bb drm/i915/display/dg2: Introduce CD clock squashing table
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/index.html
[-- Attachment #2: Type: text/html, Size: 12430 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Add support for CD clock squashing feature.
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
` (7 preceding siblings ...)
2021-11-19 14:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-11-19 17:29 ` Patchwork
8 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-11-19 17:29 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30266 bytes --]
== Series Details ==
Series: Add support for CD clock squashing feature.
URL : https://patchwork.freedesktop.org/series/97104/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10906_full -> Patchwork_21638_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 10)
------------------------------
Missing (1): shard-rkl
Known issues
------------
Here are the changes found in Patchwork_21638_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][1] ([i915#3002])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl8/igt@gem_create@create-massive.html
* igt@gem_exec_capture@pi@bcs0:
- shard-skl: [PASS][2] -> [INCOMPLETE][3] ([i915#2369])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl7/igt@gem_exec_capture@pi@bcs0.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl2/igt@gem_exec_capture@pi@bcs0.html
* igt@gem_exec_capture@pi@vcs0:
- shard-iclb: [PASS][4] -> [INCOMPLETE][5] ([i915#2369] / [i915#3371])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-iclb6/igt@gem_exec_capture@pi@vcs0.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb5/igt@gem_exec_capture@pi@vcs0.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: NOTRUN -> [FAIL][6] ([i915#2842])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-kbl: [PASS][7] -> [FAIL][8] ([i915#2842])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-kbl1/igt@gem_exec_fair@basic-none-vip@rcs0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@gem_exec_fair@basic-none@rcs0:
- shard-glk: [PASS][9] -> [FAIL][10] ([i915#2842])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-glk5/igt@gem_exec_fair@basic-none@rcs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-glk7/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-tglb: [PASS][11] -> [FAIL][12] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-tglb1/igt@gem_exec_fair@basic-pace@rcs0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb8/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-kbl: [PASS][13] -> [SKIP][14] ([fdo#109271])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-kbl1/igt@gem_exec_fair@basic-pace@vcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl1/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_lmem_swapping@random-engines:
- shard-tglb: NOTRUN -> [SKIP][15] ([i915#4555] / [i915#4565]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb2/igt@gem_lmem_swapping@random-engines.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-iclb: NOTRUN -> [SKIP][16] ([i915#4270])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb7/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@gem_render_copy@y-tiled-to-vebox-x-tiled:
- shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271]) +6 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-apl1/igt@gem_render_copy@y-tiled-to-vebox-x-tiled.html
* igt@gem_render_copy@y-tiled-to-vebox-y-tiled:
- shard-iclb: NOTRUN -> [SKIP][18] ([i915#768])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@gem_render_copy@y-tiled-to-vebox-y-tiled.html
* igt@gen3_render_linear_blits:
- shard-tglb: NOTRUN -> [SKIP][19] ([fdo#109289]) +2 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@gen3_render_linear_blits.html
* igt@gen9_exec_parse@allowed-all:
- shard-iclb: NOTRUN -> [SKIP][20] ([i915#2856])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@gen9_exec_parse@allowed-all.html
- shard-tglb: NOTRUN -> [SKIP][21] ([i915#2856]) +2 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][22] -> [DMESG-WARN][23] ([i915#1436] / [i915#716])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl2/igt@gen9_exec_parse@allowed-single.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl4/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_backlight@fade_with_dpms:
- shard-kbl: NOTRUN -> [SKIP][24] ([fdo#109271]) +26 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl6/igt@i915_pm_backlight@fade_with_dpms.html
* igt@i915_pm_dc@dc6-dpms:
- shard-skl: NOTRUN -> [FAIL][25] ([i915#454])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl8/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [PASS][26] -> [INCOMPLETE][27] ([i915#3921])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-snb5/igt@i915_selftest@live@hangcheck.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-snb5/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@fence-restore-untiled:
- shard-skl: NOTRUN -> [INCOMPLETE][28] ([i915#198])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl1/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [PASS][29] -> [FAIL][30] ([i915#2521])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl10/igt@kms_async_flips@alternate-sync-async-flip.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl5/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@crc:
- shard-skl: NOTRUN -> [FAIL][31] ([i915#4272])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl10/igt@kms_async_flips@crc.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-glk: NOTRUN -> [SKIP][32] ([fdo#109271]) +2 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-glk9/igt@kms_big_fb@linear-8bpp-rotate-90.html
- shard-tglb: NOTRUN -> [SKIP][33] ([fdo#111614]) +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@kms_big_fb@linear-8bpp-rotate-90.html
- shard-iclb: NOTRUN -> [SKIP][34] ([fdo#110725] / [fdo#111614])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-skl: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#3777])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl7/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-skl: NOTRUN -> [FAIL][36] ([i915#3743]) +2 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-tglb: NOTRUN -> [SKIP][37] ([fdo#111615]) +2 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_mc_ccs:
- shard-iclb: NOTRUN -> [SKIP][38] ([fdo#109278] / [i915#3886])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_mc_ccs.html
- shard-tglb: NOTRUN -> [SKIP][39] ([i915#3689] / [i915#3886])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_mc_ccs.html
- shard-glk: NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3886])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-glk9/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][41] ([fdo#111615] / [i915#3689]) +4 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-yf_tiled_ccs.html
* igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][42] ([i915#3689]) +3 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_ccs.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl8/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#3886]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl6/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_cdclk@plane-scaling:
- shard-iclb: NOTRUN -> [SKIP][45] ([i915#3742])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@kms_cdclk@plane-scaling.html
- shard-tglb: NOTRUN -> [SKIP][46] ([i915#3742])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium@hdmi-audio-edid:
- shard-kbl: NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +1 similar issue
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl6/igt@kms_chamelium@hdmi-audio-edid.html
* igt@kms_chamelium@hdmi-crc-single:
- shard-iclb: NOTRUN -> [SKIP][48] ([fdo#109284] / [fdo#111827])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@kms_chamelium@hdmi-crc-single.html
* igt@kms_color_chamelium@pipe-b-ctm-limited-range:
- shard-tglb: NOTRUN -> [SKIP][49] ([fdo#109284] / [fdo#111827]) +8 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@kms_color_chamelium@pipe-b-ctm-limited-range.html
* igt@kms_color_chamelium@pipe-d-ctm-0-75:
- shard-skl: NOTRUN -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +9 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl1/igt@kms_color_chamelium@pipe-d-ctm-0-75.html
* igt@kms_color_chamelium@pipe-d-ctm-negative:
- shard-apl: NOTRUN -> [SKIP][51] ([fdo#109271] / [fdo#111827]) +1 similar issue
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-apl1/igt@kms_color_chamelium@pipe-d-ctm-negative.html
* igt@kms_content_protection@uevent:
- shard-tglb: NOTRUN -> [SKIP][52] ([fdo#111828])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-skl: [PASS][53] -> [INCOMPLETE][54] ([i915#2828] / [i915#300])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl10/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-b-cursor-32x32-offscreen:
- shard-tglb: NOTRUN -> [SKIP][55] ([i915#3319]) +3 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@kms_cursor_crc@pipe-b-cursor-32x32-offscreen.html
* igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen:
- shard-skl: NOTRUN -> [SKIP][56] ([fdo#109271]) +168 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl7/igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement:
- shard-tglb: NOTRUN -> [SKIP][57] ([i915#3359]) +4 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement.html
* igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen:
- shard-tglb: NOTRUN -> [SKIP][58] ([fdo#109279] / [i915#3359]) +1 similar issue
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [PASS][59] -> [INCOMPLETE][60] ([i915#180] / [i915#1982])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-iclb: NOTRUN -> [SKIP][61] ([fdo#109274]) +2 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-skl: [PASS][62] -> [FAIL][63] ([i915#79])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@wf_vblank-ts-check-interruptible@c-edp1:
- shard-skl: [PASS][64] -> [FAIL][65] ([i915#2122])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl5/igt@kms_flip@wf_vblank-ts-check-interruptible@c-edp1.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl8/igt@kms_flip@wf_vblank-ts-check-interruptible@c-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile:
- shard-iclb: [PASS][66] -> [SKIP][67] ([i915#3701]) +1 similar issue
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-iclb7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-2p-rte:
- shard-glk: [PASS][68] -> [FAIL][69] ([i915#1888] / [i915#2546])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-glk9/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-glk9/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt:
- shard-iclb: NOTRUN -> [SKIP][70] ([fdo#109280]) +6 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff:
- shard-tglb: NOTRUN -> [SKIP][71] ([fdo#111825]) +19 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][72] -> [FAIL][73] ([i915#1188])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl10/igt@kms_hdr@bpc-switch-suspend.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl2/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@static-swap:
- shard-tglb: NOTRUN -> [SKIP][74] ([i915#1187])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb2/igt@kms_hdr@static-swap.html
- shard-iclb: NOTRUN -> [SKIP][75] ([i915#1187])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb7/igt@kms_hdr@static-swap.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d:
- shard-skl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#533]) +1 similar issue
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl8/igt@kms_pipe_crc_basic@read-crc-pipe-d.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
- shard-apl: [PASS][77] -> [DMESG-WARN][78] ([i915#180]) +5 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-kbl: [PASS][79] -> [DMESG-WARN][80] ([i915#180]) +4 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-skl: NOTRUN -> [FAIL][81] ([fdo#108145] / [i915#265]) +1 similar issue
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-skl: NOTRUN -> [FAIL][82] ([i915#265])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-d-constant-alpha-min:
- shard-iclb: NOTRUN -> [SKIP][83] ([fdo#109278]) +10 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb7/igt@kms_plane_alpha_blend@pipe-d-constant-alpha-min.html
* igt@kms_plane_lowres@pipe-a-tiling-none:
- shard-tglb: NOTRUN -> [SKIP][84] ([i915#3536])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@kms_plane_lowres@pipe-a-tiling-none.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
- shard-tglb: NOTRUN -> [SKIP][85] ([i915#2920]) +2 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3:
- shard-iclb: NOTRUN -> [SKIP][86] ([i915#658]) +1 similar issue
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-1:
- shard-skl: NOTRUN -> [SKIP][87] ([fdo#109271] / [i915#658]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl7/igt@kms_psr2_sf@plane-move-sf-dmg-area-1.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [PASS][88] -> [SKIP][89] ([fdo#109441]) +4 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb5/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-tglb: NOTRUN -> [FAIL][90] ([i915#132] / [i915#3467]) +1 similar issue
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_vrr@flip-suspend:
- shard-tglb: NOTRUN -> [SKIP][91] ([fdo#109502])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@kms_vrr@flip-suspend.html
* igt@kms_writeback@writeback-fb-id:
- shard-kbl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#2437])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl6/igt@kms_writeback@writeback-fb-id.html
* igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame:
- shard-iclb: NOTRUN -> [SKIP][93] ([i915#2530]) +1 similar issue
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame.html
* igt@nouveau_crc@pipe-c-source-outp-complete:
- shard-tglb: NOTRUN -> [SKIP][94] ([i915#2530]) +2 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb2/igt@nouveau_crc@pipe-c-source-outp-complete.html
* igt@perf@polling-parameterized:
- shard-iclb: [PASS][95] -> [FAIL][96] ([i915#1542])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-iclb6/igt@perf@polling-parameterized.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb3/igt@perf@polling-parameterized.html
- shard-skl: [PASS][97] -> [FAIL][98] ([i915#1542])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl8/igt@perf@polling-parameterized.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl2/igt@perf@polling-parameterized.html
* igt@prime_nv_test@i915_import_gtt_mmap:
- shard-tglb: NOTRUN -> [SKIP][99] ([fdo#109291]) +1 similar issue
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@prime_nv_test@i915_import_gtt_mmap.html
* igt@sysfs_clients@fair-0:
- shard-tglb: NOTRUN -> [SKIP][100] ([i915#2994]) +1 similar issue
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@sysfs_clients@fair-0.html
- shard-apl: NOTRUN -> [SKIP][101] ([fdo#109271] / [i915#2994])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-apl1/igt@sysfs_clients@fair-0.html
* igt@sysfs_clients@fair-3:
- shard-kbl: NOTRUN -> [SKIP][102] ([fdo#109271] / [i915#2994])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl6/igt@sysfs_clients@fair-3.html
* igt@sysfs_clients@fair-7:
- shard-skl: NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#2994]) +1 similar issue
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl8/igt@sysfs_clients@fair-7.html
#### Possible fixes ####
* igt@gem_eio@in-flight-contexts-1us:
- shard-skl: [TIMEOUT][104] ([i915#3063]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl5/igt@gem_eio@in-flight-contexts-1us.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl8/igt@gem_eio@in-flight-contexts-1us.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][106] ([i915#2842]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-tglb: [FAIL][108] ([i915#2842]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-tglb1/igt@gem_exec_fair@basic-pace@vcs0.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_exec_suspend@basic-s3:
- shard-tglb: [INCOMPLETE][110] ([i915#456]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-tglb7/igt@gem_exec_suspend@basic-s3.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@gem_exec_suspend@basic-s3.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [DMESG-WARN][112] ([i915#1436] / [i915#716]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-glk9/igt@gen9_exec_parse@allowed-all.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-glk9/igt@gen9_exec_parse@allowed-all.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-tglb: [INCOMPLETE][114] ([i915#456] / [i915#750]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-tglb7/igt@i915_suspend@fence-restore-tiled2untiled.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb2/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@i915_suspend@fence-restore-untiled:
- shard-kbl: [DMESG-WARN][116] ([i915#180]) -> [PASS][117] +1 similar issue
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-kbl1/igt@i915_suspend@fence-restore-untiled.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl6/igt@i915_suspend@fence-restore-untiled.html
* igt@i915_suspend@forcewake:
- shard-apl: [DMESG-WARN][118] ([i915#180]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-apl8/igt@i915_suspend@forcewake.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-apl1/igt@i915_suspend@forcewake.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-0:
- shard-glk: [DMESG-WARN][120] ([i915#118]) -> [PASS][121] +1 similar issue
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-glk9/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][122] ([i915#2346] / [i915#533]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-tglb: [INCOMPLETE][124] ([i915#2411] / [i915#456]) -> [PASS][125]
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-tglb7/igt@kms_fbcon_fbt@psr-suspend.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb5/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw:
- shard-glk: [FAIL][126] ([i915#2546]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-glk9/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-glk4/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-skl: [INCOMPLETE][128] ([i915#123]) -> [PASS][129]
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-skl8/igt@kms_frontbuffer_tracking@psr-suspend.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-skl8/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [SKIP][130] ([fdo#109441]) -> [PASS][131] +2 similar issues
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-iclb3/igt@kms_psr@psr2_dpms.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@kms_psr@psr2_dpms.html
* igt@perf@polling:
- shard-tglb: [FAIL][132] ([i915#1542]) -> [PASS][133]
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-tglb6/igt@perf@polling.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@perf@polling.html
#### Warnings ####
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-tglb: [SKIP][134] ([i915#2848]) -> [FAIL][135] ([i915#2842])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-tglb6/igt@gem_exec_fair@basic-none-solo@rcs0.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-tglb3/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [FAIL][136] ([i915#2842]) -> [SKIP][137] ([fdo#109271])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-kbl1/igt@gem_exec_fair@basic-pace@vecs0.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-kbl1/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
- shard-iclb: [SKIP][138] ([i915#658]) -> [SKIP][139] ([i915#2920]) +1 similar issue
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
* igt@runner@aborted:
- shard-apl: ([FAIL][140], [FAIL][141], [FAIL][142]) ([i915#180] / [i915#3002] / [i915#3363] / [i915#4312]) -> ([FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#4312])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-apl8/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10906/shard-apl1/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21638/index.html
[-- Attachment #2: Type: text/html, Size: 33551 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Allow cdclk squasher to be reconfigured live
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Allow cdclk squasher to be reconfigured live Mika Kahola
@ 2021-11-22 13:02 ` Kahola, Mika
0 siblings, 0 replies; 15+ messages in thread
From: Kahola, Mika @ 2021-11-22 13:02 UTC (permalink / raw)
To: Kahola, Mika, intel-gfx
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Mika
> Kahola
> Sent: Friday, November 19, 2021 3:14 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 5/5] drm/i915: Allow cdclk squasher to be
> reconfigured live
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Supposedly we should be able to change the cdclk squasher waveform even
> when many pipes are active. Make it so.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 40 ++++++++++++++++++++--
> 1 file changed, 37 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 5fcb393079f7..075ad6055765 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1951,6 +1951,25 @@ static bool intel_cdclk_can_crawl(struct
> drm_i915_private *dev_priv,
> a->ref == b->ref;
> }
>
> +static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
> + const struct intel_cdclk_config *a,
> + const struct intel_cdclk_config *b) {
> + /*
> + * FIXME should store a bit more state in intel_cdclk_config
> + * to differentiate squasher vs. cd2x divider properly. For
> + * the moment all platforms with squasher use a fixed cd2x
> + * divider.
> + */
> + if (!has_cdclk_squasher(dev_priv))
> + return false;
> +
> + return a->cdclk != b->cdclk &&
> + a->vco != 0 &&
> + a->vco == b->vco &&
> + a->ref == b->ref;
> +}
> +
> /**
> * intel_cdclk_needs_modeset - Determine if changong between the CDCLK
> * configurations requires a modeset on all pipes
> @@ -1988,7 +2007,17 @@ static bool intel_cdclk_can_cd2x_update(struct
> drm_i915_private *dev_priv,
> if (DISPLAY_VER(dev_priv) < 10 && !IS_BROXTON(dev_priv))
> return false;
>
> + /*
> + * FIXME should store a bit more state in intel_cdclk_config
> + * to differentiate squasher vs. cd2x divider properly. For
> + * the moment all platforms with squasher use a fixed cd2x
> + * divider.
> + */
> + if (has_cdclk_squasher(dev_priv))
> + return false;
> +
> return a->cdclk != b->cdclk &&
> + a->vco != 0 &&
> a->vco == b->vco &&
> a->ref == b->ref;
> }
> @@ -2672,9 +2701,14 @@ int intel_modeset_calc_cdclk(struct
> intel_atomic_state *state)
> pipe = INVALID_PIPE;
> }
>
> - if (intel_cdclk_can_crawl(dev_priv,
> - &old_cdclk_state->actual,
> - &new_cdclk_state->actual)) {
> + if (intel_cdclk_can_squash(dev_priv,
> + &old_cdclk_state->actual,
> + &new_cdclk_state->actual)) {
> + drm_dbg_kms(&dev_priv->drm,
> + "Can change cdclk via squasher\n");
> + } else if (intel_cdclk_can_crawl(dev_priv,
> + &old_cdclk_state->actual,
> + &new_cdclk_state->actual)) {
> drm_dbg_kms(&dev_priv->drm,
> "Can change cdclk via crawl\n");
> } else if (pipe != INVALID_PIPE) {
> --
> 2.27.0
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v2 1/5] drm/i915/display/dg2: Introduce CD clock squashing table
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 1/5] drm/i915/display/dg2: Introduce CD clock squashing table Mika Kahola
@ 2021-11-23 8:53 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 15+ messages in thread
From: Lisovskiy, Stanislav @ 2021-11-23 8:53 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
On Fri, Nov 19, 2021 at 03:13:44PM +0200, Mika Kahola wrote:
> For CD clock squashing method, we need to define corresponding CD clock table for
> reference clocks, dividers and ratios for all CD clock options.
>
> BSpec: 54034
>
> v2: Add CD squashing waveforms as part of CD clock table (Ville)
> v3: Waveform is 16 bits wide (Ville)
> [v4: vsyrjala: Nuke the non-squasher based table,
> Set .divider=2 for consistency,
> Pack intel_cdclk_vals a bit nicer]
> v5: Fix error in waveform value (Swati)
> v6 (Lucas): Rebase on upstream
> v7 (MattR): Drop 40.8, 81.6, and 122.4 MHz frequencies to reflect new
> bspec update.
>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 19 +++++++++++++------
> drivers/gpu/drm/i915/display/intel_cdclk.h | 1 +
> 2 files changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 91c19e0a98d7..7af4cb965060 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1313,12 +1313,19 @@ static const struct intel_cdclk_vals adlp_cdclk_table[] = {
> };
>
> static const struct intel_cdclk_vals dg2_cdclk_table[] = {
> - { .refclk = 38400, .cdclk = 172800, .divider = 2, .ratio = 9 },
> - { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 },
> - { .refclk = 38400, .cdclk = 307200, .divider = 2, .ratio = 16 },
> - { .refclk = 38400, .cdclk = 326400, .divider = 4, .ratio = 34 },
> - { .refclk = 38400, .cdclk = 556800, .divider = 2, .ratio = 29 },
> - { .refclk = 38400, .cdclk = 652800, .divider = 2, .ratio = 34 },
> + { .refclk = 38400, .cdclk = 163200, .divider = 2, .ratio = 34, .waveform = 0x8888 },
> + { .refclk = 38400, .cdclk = 204000, .divider = 2, .ratio = 34, .waveform = 0x9248 },
> + { .refclk = 38400, .cdclk = 244800, .divider = 2, .ratio = 34, .waveform = 0xa4a4 },
> + { .refclk = 38400, .cdclk = 285600, .divider = 2, .ratio = 34, .waveform = 0xa54a },
> + { .refclk = 38400, .cdclk = 326400, .divider = 2, .ratio = 34, .waveform = 0xaaaa },
> + { .refclk = 38400, .cdclk = 367200, .divider = 2, .ratio = 34, .waveform = 0xad5a },
> + { .refclk = 38400, .cdclk = 408000, .divider = 2, .ratio = 34, .waveform = 0xb6b6 },
> + { .refclk = 38400, .cdclk = 448800, .divider = 2, .ratio = 34, .waveform = 0xdbb6 },
> + { .refclk = 38400, .cdclk = 489600, .divider = 2, .ratio = 34, .waveform = 0xeeee },
> + { .refclk = 38400, .cdclk = 530400, .divider = 2, .ratio = 34, .waveform = 0xf7de },
> + { .refclk = 38400, .cdclk = 571200, .divider = 2, .ratio = 34, .waveform = 0xfefe },
> + { .refclk = 38400, .cdclk = 612000, .divider = 2, .ratio = 34, .waveform = 0xfffe },
> + { .refclk = 38400, .cdclk = 652800, .divider = 2, .ratio = 34, .waveform = 0xffff },
> {}
> };
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
> index 309b3f394e24..89ca59c46102 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> @@ -19,6 +19,7 @@ struct intel_crtc_state;
> struct intel_cdclk_vals {
> u32 cdclk;
> u16 refclk;
> + u16 waveform;
> u8 divider; /* CD2X divider * 2 */
> u8 ratio;
> };
> --
> 2.27.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v2 2/5] drm/i915/display/dg2: Sanitize CD clock
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 2/5] drm/i915/display/dg2: Sanitize CD clock Mika Kahola
@ 2021-11-23 8:54 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 15+ messages in thread
From: Lisovskiy, Stanislav @ 2021-11-23 8:54 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
On Fri, Nov 19, 2021 at 03:13:45PM +0200, Mika Kahola wrote:
> In case of CD clock squashing the divider is always 1. We don't
> need to calculate the divider in use so let's skip that for DG2.
>
> v2: Drop unnecessary local variable (Ville)
> v3: Avoid if-else structure (Ville)
> [v4: vsyrjala: Fix cd2x divider calculation (Uma),
> Introduce has_cdclk_squasher()]
>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 15 ++++++++++++---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 7af4cb965060..3a61d52bdc0e 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1212,6 +1212,11 @@ static void skl_cdclk_uninit_hw(struct drm_i915_private *dev_priv)
> skl_set_cdclk(dev_priv, &cdclk_config, INVALID_PIPE);
> }
>
> +static bool has_cdclk_squasher(struct drm_i915_private *i915)
> +{
> + return IS_DG2(i915);
> +}
> +
> static const struct intel_cdclk_vals bxt_cdclk_table[] = {
> { .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
> { .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
> @@ -1735,7 +1740,7 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
> {
> u32 cdctl, expected;
> - int cdclk, vco;
> + int cdclk, clock, vco;
>
> intel_update_cdclk(dev_priv);
> intel_dump_cdclk_config(&dev_priv->cdclk.hw, "Current CDCLK");
> @@ -1771,8 +1776,12 @@ static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
> expected = skl_cdclk_decimal(cdclk);
>
> /* Figure out what CD2X divider we should be using for this cdclk */
> - expected |= bxt_cdclk_cd2x_div_sel(dev_priv,
> - dev_priv->cdclk.hw.cdclk,
> + if (has_cdclk_squasher(dev_priv))
> + clock = dev_priv->cdclk.hw.vco / 2;
> + else
> + clock = dev_priv->cdclk.hw.cdclk;
> +
> + expected |= bxt_cdclk_cd2x_div_sel(dev_priv, clock,
> dev_priv->cdclk.hw.vco);
>
> /*
> --
> 2.27.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v2 3/5] drm/i915/display/dg2: Set CD clock squashing registers
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 3/5] drm/i915/display/dg2: Set CD clock squashing registers Mika Kahola
@ 2021-11-23 8:55 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 15+ messages in thread
From: Lisovskiy, Stanislav @ 2021-11-23 8:55 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
On Fri, Nov 19, 2021 at 03:13:46PM +0200, Mika Kahola wrote:
> Set CD clock squashing registers based on selected CD clock.
>
> v2: use slk_cdclk_decimal() to compute decimal values instead of a
> specific table (Ville)
> Set waveform based on CD clock table (Ville)
> Drop unnecessary local variable (Ville)
> v3: Correct function naming (Ville)
> Correct if-else structure (Ville)
> [v4: vsyrjala: Fix spaces vs. tabs]
> [v5: vsyrjala: Fix cd2x divider calculation (Uma),
> Add warn to waveform lookup (Uma),
> Handle bypass freq in waveform lookup,
> Generalize waveform handling in bxt_set_cdclk()]
>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 41 +++++++++++++++++++++-
> drivers/gpu/drm/i915/i915_reg.h | 8 +++++
> 2 files changed, 48 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 3a61d52bdc0e..560383e8c5b6 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1638,6 +1638,26 @@ static u32 bxt_cdclk_cd2x_div_sel(struct drm_i915_private *dev_priv,
> }
> }
>
> +static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
> + int cdclk)
> +{
> + const struct intel_cdclk_vals *table = dev_priv->cdclk.table;
> + int i;
> +
> + if (cdclk == dev_priv->cdclk.hw.bypass)
> + return 0;
> +
> + for (i = 0; table[i].refclk; i++)
> + if (table[i].refclk == dev_priv->cdclk.hw.ref &&
> + table[i].cdclk == cdclk)
> + return table[i].waveform;
> +
> + drm_WARN(&dev_priv->drm, 1, "cdclk %d not valid for refclk %u\n",
> + cdclk, dev_priv->cdclk.hw.ref);
> +
> + return 0xffff;
> +}
> +
> static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> const struct intel_cdclk_config *cdclk_config,
> enum pipe pipe)
> @@ -1645,6 +1665,8 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> int cdclk = cdclk_config->cdclk;
> int vco = cdclk_config->vco;
> u32 val;
> + u16 waveform;
> + int clock;
> int ret;
>
> /* Inform power controller of upcoming frequency change. */
> @@ -1688,7 +1710,24 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> bxt_de_pll_enable(dev_priv, vco);
> }
>
> - val = bxt_cdclk_cd2x_div_sel(dev_priv, cdclk, vco) |
> + waveform = cdclk_squash_waveform(dev_priv, cdclk);
> +
> + if (waveform)
> + clock = vco / 2;
> + else
> + clock = cdclk;
> +
> + if (has_cdclk_squasher(dev_priv)) {
> + u32 squash_ctl = 0;
> +
> + if (waveform)
> + squash_ctl = CDCLK_SQUASH_ENABLE |
> + CDCLK_SQUASH_WINDOW_SIZE(0xf) | waveform;
> +
> + intel_de_write(dev_priv, CDCLK_SQUASH_CTL, squash_ctl);
> + }
> +
> + val = bxt_cdclk_cd2x_div_sel(dev_priv, clock, vco) |
> bxt_cdclk_cd2x_pipe(dev_priv, pipe) |
> skl_cdclk_decimal(cdclk);
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3450818802c2..36f14f243190 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -10654,6 +10654,14 @@ enum skl_power_gate {
> #define BXT_CDCLK_SSA_PRECHARGE_ENABLE (1 << 16)
> #define CDCLK_FREQ_DECIMAL_MASK (0x7ff)
>
> +/* CDCLK_SQUASH_CTL */
> +#define CDCLK_SQUASH_CTL _MMIO(0x46008)
> +#define CDCLK_SQUASH_ENABLE REG_BIT(31)
> +#define CDCLK_SQUASH_WINDOW_SIZE_MASK REG_GENMASK(27, 24)
> +#define CDCLK_SQUASH_WINDOW_SIZE(x) REG_FIELD_PREP(CDCLK_SQUASH_WINDOW_SIZE_MASK, (x))
> +#define CDCLK_SQUASH_WAVEFORM_MASK REG_GENMASK(15, 0)
> +#define CDCLK_SQUASH_WAVEFORM(x) REG_FIELD_PREP(CDCLK_SQUASH_WAVEFORM_MASK, (x))
> +
> /* LCPLL_CTL */
> #define LCPLL1_CTL _MMIO(0x46010)
> #define LCPLL2_CTL _MMIO(0x46014)
> --
> 2.27.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v2 4/5] drm/i915/display/dg2: Read CD clock from squasher table
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 4/5] drm/i915/display/dg2: Read CD clock from squasher table Mika Kahola
@ 2021-11-23 8:55 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 15+ messages in thread
From: Lisovskiy, Stanislav @ 2021-11-23 8:55 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
On Fri, Nov 19, 2021 at 03:13:47PM +0200, Mika Kahola wrote:
> To calculate CD clock with squasher unit, we set CD clock ratio to fixed value of 34.
> The CD clock value is read from CD clock squasher table.
>
> BSpec: 54034
>
> v2: Read ratio from register (Ville)
> Drop unnecessary local variable (Ville)
> Get CD clock from the given table
> v3: Calculate CD clock frequency based on waveform bit pattern (Ville)
> [v4: vsyrjala: Actually do a proper blind readout from the hardware]
> [v5: vsyrjala: Use has_cdclk_squasher()]
>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 560383e8c5b6..5fcb393079f7 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1466,6 +1466,7 @@ static void bxt_de_pll_readout(struct drm_i915_private *dev_priv,
> static void bxt_get_cdclk(struct drm_i915_private *dev_priv,
> struct intel_cdclk_config *cdclk_config)
> {
> + u32 squash_ctl = 0;
> u32 divider;
> int div;
>
> @@ -1503,7 +1504,21 @@ static void bxt_get_cdclk(struct drm_i915_private *dev_priv,
> return;
> }
>
> - cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, div);
> + if (has_cdclk_squasher(dev_priv))
> + squash_ctl = intel_de_read(dev_priv, CDCLK_SQUASH_CTL);
> +
> + if (squash_ctl & CDCLK_SQUASH_ENABLE) {
> + u16 waveform;
> + int size;
> +
> + size = REG_FIELD_GET(CDCLK_SQUASH_WINDOW_SIZE_MASK, squash_ctl) + 1;
> + waveform = REG_FIELD_GET(CDCLK_SQUASH_WAVEFORM_MASK, squash_ctl) >> (16 - size);
> +
> + cdclk_config->cdclk = DIV_ROUND_CLOSEST(hweight16(waveform) *
> + cdclk_config->vco, size * div);
> + } else {
> + cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, div);
> + }
>
> out:
> /*
> --
> 2.27.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2021-11-23 8:55 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-11-19 13:13 [Intel-gfx] [PATCH v2 0/5] Add support for CD clock squashing feature Mika Kahola
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 1/5] drm/i915/display/dg2: Introduce CD clock squashing table Mika Kahola
2021-11-23 8:53 ` Lisovskiy, Stanislav
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 2/5] drm/i915/display/dg2: Sanitize CD clock Mika Kahola
2021-11-23 8:54 ` Lisovskiy, Stanislav
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 3/5] drm/i915/display/dg2: Set CD clock squashing registers Mika Kahola
2021-11-23 8:55 ` Lisovskiy, Stanislav
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 4/5] drm/i915/display/dg2: Read CD clock from squasher table Mika Kahola
2021-11-23 8:55 ` Lisovskiy, Stanislav
2021-11-19 13:13 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Allow cdclk squasher to be reconfigured live Mika Kahola
2021-11-22 13:02 ` Kahola, Mika
2021-11-19 13:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for CD clock squashing feature Patchwork
2021-11-19 13:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-19 14:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-19 17:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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