* [Intel-gfx] [PATCH 0/3] Support bigger GuC RSA keys
@ 2021-12-09 0:56 Daniele Ceraolo Spurio
2021-12-09 0:56 ` [Intel-gfx] [PATCH 1/3] drm/i915/uc: correctly track uc_fw init failure Daniele Ceraolo Spurio
` (5 more replies)
0 siblings, 6 replies; 10+ messages in thread
From: Daniele Ceraolo Spurio @ 2021-12-09 0:56 UTC (permalink / raw)
To: intel-gfx
Some of the newer platforms use a bigger RSA key to authenticate the GuC,
which is provided to the HW via a ggtt-pinned object instead of mmio.
While doing the changes for this I've also spotted an inconsistency in
the error status of the fw on init failure, so I've added a path to fix
that as well.
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Daniele Ceraolo Spurio (2):
drm/i915/uc: correctly track uc_fw init failure
drm/i915/guc: support bigger RSA keys
Michal Wajdeczko (1):
drm/i915/uc: Prepare for different firmware key sizes
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 32 ++++++--
drivers/gpu/drm/i915/gt/uc/intel_huc.c | 75 +-----------------
drivers/gpu/drm/i915/gt/uc/intel_huc.h | 2 -
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 95 ++++++++++++++++++++---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 18 +++--
5 files changed, 127 insertions(+), 95 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH 1/3] drm/i915/uc: correctly track uc_fw init failure 2021-12-09 0:56 [Intel-gfx] [PATCH 0/3] Support bigger GuC RSA keys Daniele Ceraolo Spurio @ 2021-12-09 0:56 ` Daniele Ceraolo Spurio 2021-12-09 19:04 ` Matthew Brost 2021-12-09 0:56 ` [Intel-gfx] [PATCH 2/3] drm/i915/uc: Prepare for different firmware key sizes Daniele Ceraolo Spurio ` (4 subsequent siblings) 5 siblings, 1 reply; 10+ messages in thread From: Daniele Ceraolo Spurio @ 2021-12-09 0:56 UTC (permalink / raw) To: intel-gfx The FAILURE state of uc_fw currently implies that the fw is loadable (i.e init completed), so we can't use it for init failures and instead need a dedicated error code. Note that this currently does not cause any issues because if we fail to init any of the firmwares we abort the load, but better be accurate anyway in case things change in the future. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 2 +- drivers/gpu/drm/i915/gt/uc/intel_huc.c | 2 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 4 ++-- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 17 +++++++++++------ 4 files changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c index 196424be0998..796483a41353 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c @@ -164,6 +164,6 @@ int intel_guc_fw_upload(struct intel_guc *guc) return 0; out: - intel_uc_fw_change_status(&guc->fw, INTEL_UC_FIRMWARE_FAIL); + intel_uc_fw_change_status(&guc->fw, INTEL_UC_FIRMWARE_LOAD_FAIL); return ret; } diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c index ff4b6869b80b..c10736dddfb4 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c @@ -199,7 +199,7 @@ int intel_huc_auth(struct intel_huc *huc) fail: i915_probe_error(gt->i915, "HuC: Authentication failed %d\n", ret); - intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_FAIL); + intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_LOAD_FAIL); return ret; } diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index 3aa87be4f2e4..b7fa51aefdff 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -540,7 +540,7 @@ int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n", intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, err); - intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); + intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_LOAD_FAIL); return err; } @@ -558,7 +558,7 @@ int intel_uc_fw_init(struct intel_uc_fw *uc_fw) if (err) { DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", intel_uc_fw_type_repr(uc_fw->type), err); - intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); + intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_INIT_FAIL); } return err; diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h index 1e00bf65639e..fd17abf2ab02 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h @@ -32,11 +32,12 @@ struct intel_gt; * | | MISSING <--/ | \--> ERROR | * | fetch | V | * | | AVAILABLE | - * +------------+- | -+ + * +------------+- | \ -+ + * | | | \--> INIT FAIL | * | init | V | * | | /------> LOADABLE <----<-----------\ | * +------------+- \ / \ \ \ -+ - * | | FAIL <--< \--> TRANSFERRED \ | + * | | LOAD FAIL <--< \--> TRANSFERRED \ | * | upload | \ / \ / | * | | \---------/ \--> RUNNING | * +------------+---------------------------------------------------+ @@ -50,8 +51,9 @@ enum intel_uc_fw_status { INTEL_UC_FIRMWARE_MISSING, /* blob not found on the system */ INTEL_UC_FIRMWARE_ERROR, /* invalid format or version */ INTEL_UC_FIRMWARE_AVAILABLE, /* blob found and copied in mem */ + INTEL_UC_FIRMWARE_INIT_FAIL, /* failed to prepare fw objects for load */ INTEL_UC_FIRMWARE_LOADABLE, /* all fw-required objects are ready */ - INTEL_UC_FIRMWARE_FAIL, /* failed to xfer or init/auth the fw */ + INTEL_UC_FIRMWARE_LOAD_FAIL, /* failed to xfer or init/auth the fw */ INTEL_UC_FIRMWARE_TRANSFERRED, /* dma xfer done */ INTEL_UC_FIRMWARE_RUNNING /* init/auth done */ }; @@ -130,10 +132,12 @@ const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status) return "ERROR"; case INTEL_UC_FIRMWARE_AVAILABLE: return "AVAILABLE"; + case INTEL_UC_FIRMWARE_INIT_FAIL: + return "INIT FAIL"; case INTEL_UC_FIRMWARE_LOADABLE: return "LOADABLE"; - case INTEL_UC_FIRMWARE_FAIL: - return "FAIL"; + case INTEL_UC_FIRMWARE_LOAD_FAIL: + return "LOAD FAIL"; case INTEL_UC_FIRMWARE_TRANSFERRED: return "TRANSFERRED"; case INTEL_UC_FIRMWARE_RUNNING: @@ -155,7 +159,8 @@ static inline int intel_uc_fw_status_to_error(enum intel_uc_fw_status status) return -ENOENT; case INTEL_UC_FIRMWARE_ERROR: return -ENOEXEC; - case INTEL_UC_FIRMWARE_FAIL: + case INTEL_UC_FIRMWARE_INIT_FAIL: + case INTEL_UC_FIRMWARE_LOAD_FAIL: return -EIO; case INTEL_UC_FIRMWARE_SELECTED: return -ESTALE; -- 2.25.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915/uc: correctly track uc_fw init failure 2021-12-09 0:56 ` [Intel-gfx] [PATCH 1/3] drm/i915/uc: correctly track uc_fw init failure Daniele Ceraolo Spurio @ 2021-12-09 19:04 ` Matthew Brost 0 siblings, 0 replies; 10+ messages in thread From: Matthew Brost @ 2021-12-09 19:04 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-gfx On Wed, Dec 08, 2021 at 04:56:08PM -0800, Daniele Ceraolo Spurio wrote: > The FAILURE state of uc_fw currently implies that the fw is loadable > (i.e init completed), so we can't use it for init failures and instead > need a dedicated error code. > > Note that this currently does not cause any issues because if we fail to > init any of the firmwares we abort the load, but better be accurate > anyway in case things change in the future. > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 2 +- > drivers/gpu/drm/i915/gt/uc/intel_huc.c | 2 +- > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 4 ++-- > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 17 +++++++++++------ > 4 files changed, 15 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c > index 196424be0998..796483a41353 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c > @@ -164,6 +164,6 @@ int intel_guc_fw_upload(struct intel_guc *guc) > return 0; > > out: > - intel_uc_fw_change_status(&guc->fw, INTEL_UC_FIRMWARE_FAIL); > + intel_uc_fw_change_status(&guc->fw, INTEL_UC_FIRMWARE_LOAD_FAIL); > return ret; > } > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c > index ff4b6869b80b..c10736dddfb4 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c > @@ -199,7 +199,7 @@ int intel_huc_auth(struct intel_huc *huc) > > fail: > i915_probe_error(gt->i915, "HuC: Authentication failed %d\n", ret); > - intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_FAIL); > + intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_LOAD_FAIL); > return ret; > } > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > index 3aa87be4f2e4..b7fa51aefdff 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > @@ -540,7 +540,7 @@ int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) > i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n", > intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, > err); > - intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); > + intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_LOAD_FAIL); > return err; > } > > @@ -558,7 +558,7 @@ int intel_uc_fw_init(struct intel_uc_fw *uc_fw) > if (err) { > DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", > intel_uc_fw_type_repr(uc_fw->type), err); > - intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); > + intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_INIT_FAIL); > } > > return err; > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h > index 1e00bf65639e..fd17abf2ab02 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h > @@ -32,11 +32,12 @@ struct intel_gt; > * | | MISSING <--/ | \--> ERROR | > * | fetch | V | > * | | AVAILABLE | > - * +------------+- | -+ > + * +------------+- | \ -+ > + * | | | \--> INIT FAIL | > * | init | V | > * | | /------> LOADABLE <----<-----------\ | > * +------------+- \ / \ \ \ -+ > - * | | FAIL <--< \--> TRANSFERRED \ | > + * | | LOAD FAIL <--< \--> TRANSFERRED \ | > * | upload | \ / \ / | > * | | \---------/ \--> RUNNING | > * +------------+---------------------------------------------------+ > @@ -50,8 +51,9 @@ enum intel_uc_fw_status { > INTEL_UC_FIRMWARE_MISSING, /* blob not found on the system */ > INTEL_UC_FIRMWARE_ERROR, /* invalid format or version */ > INTEL_UC_FIRMWARE_AVAILABLE, /* blob found and copied in mem */ > + INTEL_UC_FIRMWARE_INIT_FAIL, /* failed to prepare fw objects for load */ > INTEL_UC_FIRMWARE_LOADABLE, /* all fw-required objects are ready */ > - INTEL_UC_FIRMWARE_FAIL, /* failed to xfer or init/auth the fw */ > + INTEL_UC_FIRMWARE_LOAD_FAIL, /* failed to xfer or init/auth the fw */ > INTEL_UC_FIRMWARE_TRANSFERRED, /* dma xfer done */ > INTEL_UC_FIRMWARE_RUNNING /* init/auth done */ > }; > @@ -130,10 +132,12 @@ const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status) > return "ERROR"; > case INTEL_UC_FIRMWARE_AVAILABLE: > return "AVAILABLE"; > + case INTEL_UC_FIRMWARE_INIT_FAIL: > + return "INIT FAIL"; > case INTEL_UC_FIRMWARE_LOADABLE: > return "LOADABLE"; > - case INTEL_UC_FIRMWARE_FAIL: > - return "FAIL"; > + case INTEL_UC_FIRMWARE_LOAD_FAIL: > + return "LOAD FAIL"; > case INTEL_UC_FIRMWARE_TRANSFERRED: > return "TRANSFERRED"; > case INTEL_UC_FIRMWARE_RUNNING: > @@ -155,7 +159,8 @@ static inline int intel_uc_fw_status_to_error(enum intel_uc_fw_status status) > return -ENOENT; > case INTEL_UC_FIRMWARE_ERROR: > return -ENOEXEC; > - case INTEL_UC_FIRMWARE_FAIL: > + case INTEL_UC_FIRMWARE_INIT_FAIL: > + case INTEL_UC_FIRMWARE_LOAD_FAIL: > return -EIO; > case INTEL_UC_FIRMWARE_SELECTED: > return -ESTALE; > -- > 2.25.1 > ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH 2/3] drm/i915/uc: Prepare for different firmware key sizes 2021-12-09 0:56 [Intel-gfx] [PATCH 0/3] Support bigger GuC RSA keys Daniele Ceraolo Spurio 2021-12-09 0:56 ` [Intel-gfx] [PATCH 1/3] drm/i915/uc: correctly track uc_fw init failure Daniele Ceraolo Spurio @ 2021-12-09 0:56 ` Daniele Ceraolo Spurio 2021-12-09 18:57 ` Matthew Brost 2021-12-09 0:56 ` [Intel-gfx] [PATCH 3/3] drm/i915/guc: support bigger RSA keys Daniele Ceraolo Spurio ` (3 subsequent siblings) 5 siblings, 1 reply; 10+ messages in thread From: Daniele Ceraolo Spurio @ 2021-12-09 0:56 UTC (permalink / raw) To: intel-gfx From: Michal Wajdeczko <michal.wajdeczko@intel.com> Future GuC/HuC firmwares might be signed with different key sizes. Don't assume that it must be always 2048 bits long. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index b7fa51aefdff..01683f5f95bd 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -322,13 +322,6 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw) uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32); /* now RSA */ - if (unlikely(css->key_size_dw != UOS_RSA_SCRATCH_COUNT)) { - drm_warn(&i915->drm, "%s firmware %s: unexpected key size: %u != %u\n", - intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, - css->key_size_dw, UOS_RSA_SCRATCH_COUNT); - err = -EPROTO; - goto fail; - } uc_fw->rsa_size = css->key_size_dw * sizeof(u32); /* At least, it should have header, uCode and RSA. Size of all three. */ -- 2.25.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 2/3] drm/i915/uc: Prepare for different firmware key sizes 2021-12-09 0:56 ` [Intel-gfx] [PATCH 2/3] drm/i915/uc: Prepare for different firmware key sizes Daniele Ceraolo Spurio @ 2021-12-09 18:57 ` Matthew Brost 0 siblings, 0 replies; 10+ messages in thread From: Matthew Brost @ 2021-12-09 18:57 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-gfx On Wed, Dec 08, 2021 at 04:56:09PM -0800, Daniele Ceraolo Spurio wrote: > From: Michal Wajdeczko <michal.wajdeczko@intel.com> > > Future GuC/HuC firmwares might be signed with different key sizes. > Don't assume that it must be always 2048 bits long. > > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> You need SOB here since your posting this even though this is Michal's patch. With that fixed: Reviewed-by: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 7 ------- > 1 file changed, 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > index b7fa51aefdff..01683f5f95bd 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > @@ -322,13 +322,6 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw) > uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32); > > /* now RSA */ > - if (unlikely(css->key_size_dw != UOS_RSA_SCRATCH_COUNT)) { > - drm_warn(&i915->drm, "%s firmware %s: unexpected key size: %u != %u\n", > - intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, > - css->key_size_dw, UOS_RSA_SCRATCH_COUNT); > - err = -EPROTO; > - goto fail; > - } > uc_fw->rsa_size = css->key_size_dw * sizeof(u32); > > /* At least, it should have header, uCode and RSA. Size of all three. */ > -- > 2.25.1 > ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915/guc: support bigger RSA keys 2021-12-09 0:56 [Intel-gfx] [PATCH 0/3] Support bigger GuC RSA keys Daniele Ceraolo Spurio 2021-12-09 0:56 ` [Intel-gfx] [PATCH 1/3] drm/i915/uc: correctly track uc_fw init failure Daniele Ceraolo Spurio 2021-12-09 0:56 ` [Intel-gfx] [PATCH 2/3] drm/i915/uc: Prepare for different firmware key sizes Daniele Ceraolo Spurio @ 2021-12-09 0:56 ` Daniele Ceraolo Spurio 2021-12-09 19:47 ` Matthew Brost 2021-12-09 23:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Support bigger GuC " Patchwork ` (2 subsequent siblings) 5 siblings, 1 reply; 10+ messages in thread From: Daniele Ceraolo Spurio @ 2021-12-09 0:56 UTC (permalink / raw) To: intel-gfx Some of the newer HW will use bigger RSA keys to authenticate the GuC binary. On those platforms the HW will read the key from memory instead of the RSA registers, so we need to copy it in a dedicated vma, like we do for the HuC. The address of the key is provided to the HW via the first RSA register. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 30 ++++++-- drivers/gpu/drm/i915/gt/uc/intel_huc.c | 73 +------------------ drivers/gpu/drm/i915/gt/uc/intel_huc.h | 2 - drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 86 ++++++++++++++++++++++- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 1 + 5 files changed, 113 insertions(+), 79 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c index 796483a41353..811f032199eb 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c @@ -40,9 +40,8 @@ static void guc_prepare_xfer(struct intel_uncore *uncore) } } -/* Copy RSA signature from the fw image to HW for verification */ -static int guc_xfer_rsa(struct intel_uc_fw *guc_fw, - struct intel_uncore *uncore) +static int guc_xfer_rsa_mmio(struct intel_uc_fw *guc_fw, + struct intel_uncore *uncore) { u32 rsa[UOS_RSA_SCRATCH_COUNT]; size_t copied; @@ -58,6 +57,27 @@ static int guc_xfer_rsa(struct intel_uc_fw *guc_fw, return 0; } +static int guc_xfer_rsa_vma(struct intel_uc_fw *guc_fw, + struct intel_uncore *uncore) +{ + struct intel_guc *guc = container_of(guc_fw, struct intel_guc, fw); + + intel_uncore_write(uncore, UOS_RSA_SCRATCH(0), + intel_guc_ggtt_offset(guc, guc_fw->rsa_data)); + + return 0; +} + +/* Copy RSA signature from the fw image to HW for verification */ +static int guc_xfer_rsa(struct intel_uc_fw *guc_fw, + struct intel_uncore *uncore) +{ + if (guc_fw->rsa_data) + return guc_xfer_rsa_vma(guc_fw, uncore); + else + return guc_xfer_rsa_mmio(guc_fw, uncore); +} + /* * Read the GuC status register (GUC_STATUS) and store it in the * specified location; then return a boolean indicating whether @@ -142,7 +162,9 @@ int intel_guc_fw_upload(struct intel_guc *guc) /* * Note that GuC needs the CSS header plus uKernel code to be copied * by the DMA engine in one operation, whereas the RSA signature is - * loaded via MMIO. + * loaded separately, either by copying it to the UOS_RSA_SCRATCH + * register (if key size <= 256) or through a ggtt-pinned vma (if key + * size > 256). */ ret = guc_xfer_rsa(&guc->fw, uncore); if (ret) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c index c10736dddfb4..d10b227ac4aa 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c @@ -54,65 +54,6 @@ void intel_huc_init_early(struct intel_huc *huc) } } -static int intel_huc_rsa_data_create(struct intel_huc *huc) -{ - struct intel_gt *gt = huc_to_gt(huc); - struct intel_guc *guc = >->uc.guc; - struct i915_vma *vma; - size_t copied; - void *vaddr; - int err; - - err = i915_inject_probe_error(gt->i915, -ENXIO); - if (err) - return err; - - /* - * HuC firmware will sit above GUC_GGTT_TOP and will not map - * through GTT. Unfortunately, this means GuC cannot perform - * the HuC auth. as the rsa offset now falls within the GuC - * inaccessible range. We resort to perma-pinning an additional - * vma within the accessible range that only contains the rsa - * signature. The GuC can use this extra pinning to perform - * the authentication since its GGTT offset will be GuC - * accessible. - */ - GEM_BUG_ON(huc->fw.rsa_size > PAGE_SIZE); - vma = intel_guc_allocate_vma(guc, PAGE_SIZE); - if (IS_ERR(vma)) - return PTR_ERR(vma); - - vaddr = i915_gem_object_pin_map_unlocked(vma->obj, - i915_coherent_map_type(gt->i915, - vma->obj, true)); - if (IS_ERR(vaddr)) { - i915_vma_unpin_and_release(&vma, 0); - err = PTR_ERR(vaddr); - goto unpin_out; - } - - copied = intel_uc_fw_copy_rsa(&huc->fw, vaddr, vma->size); - i915_gem_object_unpin_map(vma->obj); - - if (copied < huc->fw.rsa_size) { - err = -ENOMEM; - goto unpin_out; - } - - huc->rsa_data = vma; - - return 0; - -unpin_out: - i915_vma_unpin_and_release(&vma, 0); - return err; -} - -static void intel_huc_rsa_data_destroy(struct intel_huc *huc) -{ - i915_vma_unpin_and_release(&huc->rsa_data, 0); -} - int intel_huc_init(struct intel_huc *huc) { struct drm_i915_private *i915 = huc_to_gt(huc)->i915; @@ -122,21 +63,10 @@ int intel_huc_init(struct intel_huc *huc) if (err) goto out; - /* - * HuC firmware image is outside GuC accessible range. - * Copy the RSA signature out of the image into - * a perma-pinned region set aside for it - */ - err = intel_huc_rsa_data_create(huc); - if (err) - goto out_fini; - intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_LOADABLE); return 0; -out_fini: - intel_uc_fw_fini(&huc->fw); out: i915_probe_error(i915, "failed with %d\n", err); return err; @@ -147,7 +77,6 @@ void intel_huc_fini(struct intel_huc *huc) if (!intel_uc_fw_is_loadable(&huc->fw)) return; - intel_huc_rsa_data_destroy(huc); intel_uc_fw_fini(&huc->fw); } @@ -177,7 +106,7 @@ int intel_huc_auth(struct intel_huc *huc) goto fail; ret = intel_guc_auth_huc(guc, - intel_guc_ggtt_offset(guc, huc->rsa_data)); + intel_guc_ggtt_offset(guc, huc->fw.rsa_data)); if (ret) { DRM_ERROR("HuC: GuC did not ack Auth request %d\n", ret); goto fail; diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.h b/drivers/gpu/drm/i915/gt/uc/intel_huc.h index daee43b661d4..ae8c8a6c8cc8 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.h @@ -15,8 +15,6 @@ struct intel_huc { struct intel_uc_fw fw; /* HuC-specific additions */ - struct i915_vma *rsa_data; - struct { i915_reg_t reg; u32 mask; diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index 01683f5f95bd..ee1254f3f30b 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -537,6 +537,75 @@ int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) return err; } +static inline bool uc_fw_need_rsa_in_memory(struct intel_uc_fw *uc_fw) +{ + /* + * The HW reads the GuC RSA from memory if the key size is > 256 bytes, + * while it reads it from the 64 RSA registers if it is smaller. + * The HuC RSA is always read from memory. + */ + return uc_fw->type == INTEL_UC_FW_TYPE_HUC || uc_fw->rsa_size > 256; +} + +static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw) +{ + struct intel_gt *gt = __uc_fw_to_gt(uc_fw); + struct i915_vma *vma; + size_t copied; + void *vaddr; + int err; + + err = i915_inject_probe_error(gt->i915, -ENXIO); + if (err) + return err; + + if (!uc_fw_need_rsa_in_memory(uc_fw)) + return 0; + + /* + * uC firmwares will sit above GUC_GGTT_TOP and will not map through + * GGTT. Unfortunately, this means that the GuC HW cannot perform the uC + * authentication from memory, as the RSA offset now falls within the + * GuC inaccessible range. We resort to perma-pinning an additional vma + * within the accessible range that only contains the RSA signature. + * The GuC HW can use this extra pinning to perform the authentication + * since its GGTT offset will be GuC accessible. + */ + GEM_BUG_ON(uc_fw->rsa_size > PAGE_SIZE); + vma = intel_guc_allocate_vma(>->uc.guc, PAGE_SIZE); + if (IS_ERR(vma)) + return PTR_ERR(vma); + + vaddr = i915_gem_object_pin_map_unlocked(vma->obj, + i915_coherent_map_type(gt->i915, vma->obj, true)); + if (IS_ERR(vaddr)) { + i915_vma_unpin_and_release(&vma, 0); + err = PTR_ERR(vaddr); + goto unpin_out; + } + + copied = intel_uc_fw_copy_rsa(uc_fw, vaddr, vma->size); + i915_gem_object_unpin_map(vma->obj); + + if (copied < uc_fw->rsa_size) { + err = -ENOMEM; + goto unpin_out; + } + + uc_fw->rsa_data = vma; + + return 0; + +unpin_out: + i915_vma_unpin_and_release(&vma, 0); + return err; +} + +static void uc_fw_rsa_data_destroy(struct intel_uc_fw *uc_fw) +{ + i915_vma_unpin_and_release(&uc_fw->rsa_data, 0); +} + int intel_uc_fw_init(struct intel_uc_fw *uc_fw) { int err; @@ -551,14 +620,29 @@ int intel_uc_fw_init(struct intel_uc_fw *uc_fw) if (err) { DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", intel_uc_fw_type_repr(uc_fw->type), err); - intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_INIT_FAIL); + goto out; } + err = uc_fw_rsa_data_create(uc_fw); + if (err) { + DRM_DEBUG_DRIVER("%s fw rsa data creation failed, err=%d\n", + intel_uc_fw_type_repr(uc_fw->type), err); + goto out_unpin; + } + + return 0; + +out_unpin: + i915_gem_object_unpin_pages(uc_fw->obj); +out: + intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_INIT_FAIL); return err; } void intel_uc_fw_fini(struct intel_uc_fw *uc_fw) { + uc_fw_rsa_data_destroy(uc_fw); + if (i915_gem_object_has_pinned_pages(uc_fw->obj)) i915_gem_object_unpin_pages(uc_fw->obj); diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h index fd17abf2ab02..d9d1dc0b4cbb 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h @@ -86,6 +86,7 @@ struct intel_uc_fw { * or during a GT reset (mutex guarantees single threaded). */ struct i915_vma dummy; + struct i915_vma *rsa_data; /* * The firmware build process will generate a version header file with major and -- 2.25.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/guc: support bigger RSA keys 2021-12-09 0:56 ` [Intel-gfx] [PATCH 3/3] drm/i915/guc: support bigger RSA keys Daniele Ceraolo Spurio @ 2021-12-09 19:47 ` Matthew Brost 0 siblings, 0 replies; 10+ messages in thread From: Matthew Brost @ 2021-12-09 19:47 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-gfx On Wed, Dec 08, 2021 at 04:56:10PM -0800, Daniele Ceraolo Spurio wrote: > Some of the newer HW will use bigger RSA keys to authenticate the GuC > binary. On those platforms the HW will read the key from memory instead > of the RSA registers, so we need to copy it in a dedicated vma, like we > do for the HuC. The address of the key is provided to the HW via the > first RSA register. > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: John Harrison <John.C.Harrison@Intel.com> > Cc: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 30 ++++++-- > drivers/gpu/drm/i915/gt/uc/intel_huc.c | 73 +------------------ > drivers/gpu/drm/i915/gt/uc/intel_huc.h | 2 - > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 86 ++++++++++++++++++++++- > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 1 + > 5 files changed, 113 insertions(+), 79 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c > index 796483a41353..811f032199eb 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c > @@ -40,9 +40,8 @@ static void guc_prepare_xfer(struct intel_uncore *uncore) > } > } > > -/* Copy RSA signature from the fw image to HW for verification */ > -static int guc_xfer_rsa(struct intel_uc_fw *guc_fw, > - struct intel_uncore *uncore) > +static int guc_xfer_rsa_mmio(struct intel_uc_fw *guc_fw, > + struct intel_uncore *uncore) > { > u32 rsa[UOS_RSA_SCRATCH_COUNT]; > size_t copied; > @@ -58,6 +57,27 @@ static int guc_xfer_rsa(struct intel_uc_fw *guc_fw, > return 0; > } > > +static int guc_xfer_rsa_vma(struct intel_uc_fw *guc_fw, > + struct intel_uncore *uncore) > +{ > + struct intel_guc *guc = container_of(guc_fw, struct intel_guc, fw); > + > + intel_uncore_write(uncore, UOS_RSA_SCRATCH(0), > + intel_guc_ggtt_offset(guc, guc_fw->rsa_data)); > + > + return 0; > +} > + > +/* Copy RSA signature from the fw image to HW for verification */ > +static int guc_xfer_rsa(struct intel_uc_fw *guc_fw, > + struct intel_uncore *uncore) > +{ > + if (guc_fw->rsa_data) > + return guc_xfer_rsa_vma(guc_fw, uncore); > + else > + return guc_xfer_rsa_mmio(guc_fw, uncore); > +} > + > /* > * Read the GuC status register (GUC_STATUS) and store it in the > * specified location; then return a boolean indicating whether > @@ -142,7 +162,9 @@ int intel_guc_fw_upload(struct intel_guc *guc) > /* > * Note that GuC needs the CSS header plus uKernel code to be copied > * by the DMA engine in one operation, whereas the RSA signature is > - * loaded via MMIO. > + * loaded separately, either by copying it to the UOS_RSA_SCRATCH > + * register (if key size <= 256) or through a ggtt-pinned vma (if key > + * size > 256). Maybe add comment saying whether the key is in MMIO or memory is hard coded in the bootrom. With an extra comment: Reviewed-by: Matthew Brost <matthew.brost@intel.com> > */ > ret = guc_xfer_rsa(&guc->fw, uncore); > if (ret) > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c > index c10736dddfb4..d10b227ac4aa 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c > @@ -54,65 +54,6 @@ void intel_huc_init_early(struct intel_huc *huc) > } > } > > -static int intel_huc_rsa_data_create(struct intel_huc *huc) > -{ > - struct intel_gt *gt = huc_to_gt(huc); > - struct intel_guc *guc = >->uc.guc; > - struct i915_vma *vma; > - size_t copied; > - void *vaddr; > - int err; > - > - err = i915_inject_probe_error(gt->i915, -ENXIO); > - if (err) > - return err; > - > - /* > - * HuC firmware will sit above GUC_GGTT_TOP and will not map > - * through GTT. Unfortunately, this means GuC cannot perform > - * the HuC auth. as the rsa offset now falls within the GuC > - * inaccessible range. We resort to perma-pinning an additional > - * vma within the accessible range that only contains the rsa > - * signature. The GuC can use this extra pinning to perform > - * the authentication since its GGTT offset will be GuC > - * accessible. > - */ > - GEM_BUG_ON(huc->fw.rsa_size > PAGE_SIZE); > - vma = intel_guc_allocate_vma(guc, PAGE_SIZE); > - if (IS_ERR(vma)) > - return PTR_ERR(vma); > - > - vaddr = i915_gem_object_pin_map_unlocked(vma->obj, > - i915_coherent_map_type(gt->i915, > - vma->obj, true)); > - if (IS_ERR(vaddr)) { > - i915_vma_unpin_and_release(&vma, 0); > - err = PTR_ERR(vaddr); > - goto unpin_out; > - } > - > - copied = intel_uc_fw_copy_rsa(&huc->fw, vaddr, vma->size); > - i915_gem_object_unpin_map(vma->obj); > - > - if (copied < huc->fw.rsa_size) { > - err = -ENOMEM; > - goto unpin_out; > - } > - > - huc->rsa_data = vma; > - > - return 0; > - > -unpin_out: > - i915_vma_unpin_and_release(&vma, 0); > - return err; > -} > - > -static void intel_huc_rsa_data_destroy(struct intel_huc *huc) > -{ > - i915_vma_unpin_and_release(&huc->rsa_data, 0); > -} > - > int intel_huc_init(struct intel_huc *huc) > { > struct drm_i915_private *i915 = huc_to_gt(huc)->i915; > @@ -122,21 +63,10 @@ int intel_huc_init(struct intel_huc *huc) > if (err) > goto out; > > - /* > - * HuC firmware image is outside GuC accessible range. > - * Copy the RSA signature out of the image into > - * a perma-pinned region set aside for it > - */ > - err = intel_huc_rsa_data_create(huc); > - if (err) > - goto out_fini; > - > intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_LOADABLE); > > return 0; > > -out_fini: > - intel_uc_fw_fini(&huc->fw); > out: > i915_probe_error(i915, "failed with %d\n", err); > return err; > @@ -147,7 +77,6 @@ void intel_huc_fini(struct intel_huc *huc) > if (!intel_uc_fw_is_loadable(&huc->fw)) > return; > > - intel_huc_rsa_data_destroy(huc); > intel_uc_fw_fini(&huc->fw); > } > > @@ -177,7 +106,7 @@ int intel_huc_auth(struct intel_huc *huc) > goto fail; > > ret = intel_guc_auth_huc(guc, > - intel_guc_ggtt_offset(guc, huc->rsa_data)); > + intel_guc_ggtt_offset(guc, huc->fw.rsa_data)); > if (ret) { > DRM_ERROR("HuC: GuC did not ack Auth request %d\n", ret); > goto fail; > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.h b/drivers/gpu/drm/i915/gt/uc/intel_huc.h > index daee43b661d4..ae8c8a6c8cc8 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.h > @@ -15,8 +15,6 @@ struct intel_huc { > struct intel_uc_fw fw; > > /* HuC-specific additions */ > - struct i915_vma *rsa_data; > - > struct { > i915_reg_t reg; > u32 mask; > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > index 01683f5f95bd..ee1254f3f30b 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > @@ -537,6 +537,75 @@ int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) > return err; > } > > +static inline bool uc_fw_need_rsa_in_memory(struct intel_uc_fw *uc_fw) > +{ > + /* > + * The HW reads the GuC RSA from memory if the key size is > 256 bytes, > + * while it reads it from the 64 RSA registers if it is smaller. > + * The HuC RSA is always read from memory. > + */ > + return uc_fw->type == INTEL_UC_FW_TYPE_HUC || uc_fw->rsa_size > 256; > +} > + > +static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw) > +{ > + struct intel_gt *gt = __uc_fw_to_gt(uc_fw); > + struct i915_vma *vma; > + size_t copied; > + void *vaddr; > + int err; > + > + err = i915_inject_probe_error(gt->i915, -ENXIO); > + if (err) > + return err; > + > + if (!uc_fw_need_rsa_in_memory(uc_fw)) > + return 0; > + > + /* > + * uC firmwares will sit above GUC_GGTT_TOP and will not map through > + * GGTT. Unfortunately, this means that the GuC HW cannot perform the uC > + * authentication from memory, as the RSA offset now falls within the > + * GuC inaccessible range. We resort to perma-pinning an additional vma > + * within the accessible range that only contains the RSA signature. > + * The GuC HW can use this extra pinning to perform the authentication > + * since its GGTT offset will be GuC accessible. > + */ > + GEM_BUG_ON(uc_fw->rsa_size > PAGE_SIZE); > + vma = intel_guc_allocate_vma(>->uc.guc, PAGE_SIZE); > + if (IS_ERR(vma)) > + return PTR_ERR(vma); > + > + vaddr = i915_gem_object_pin_map_unlocked(vma->obj, > + i915_coherent_map_type(gt->i915, vma->obj, true)); > + if (IS_ERR(vaddr)) { > + i915_vma_unpin_and_release(&vma, 0); > + err = PTR_ERR(vaddr); > + goto unpin_out; > + } > + > + copied = intel_uc_fw_copy_rsa(uc_fw, vaddr, vma->size); > + i915_gem_object_unpin_map(vma->obj); > + > + if (copied < uc_fw->rsa_size) { > + err = -ENOMEM; > + goto unpin_out; > + } > + > + uc_fw->rsa_data = vma; > + > + return 0; > + > +unpin_out: > + i915_vma_unpin_and_release(&vma, 0); > + return err; > +} > + > +static void uc_fw_rsa_data_destroy(struct intel_uc_fw *uc_fw) > +{ > + i915_vma_unpin_and_release(&uc_fw->rsa_data, 0); > +} > + > int intel_uc_fw_init(struct intel_uc_fw *uc_fw) > { > int err; > @@ -551,14 +620,29 @@ int intel_uc_fw_init(struct intel_uc_fw *uc_fw) > if (err) { > DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", > intel_uc_fw_type_repr(uc_fw->type), err); > - intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_INIT_FAIL); > + goto out; > } > > + err = uc_fw_rsa_data_create(uc_fw); > + if (err) { > + DRM_DEBUG_DRIVER("%s fw rsa data creation failed, err=%d\n", > + intel_uc_fw_type_repr(uc_fw->type), err); > + goto out_unpin; > + } > + > + return 0; > + > +out_unpin: > + i915_gem_object_unpin_pages(uc_fw->obj); > +out: > + intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_INIT_FAIL); > return err; > } > > void intel_uc_fw_fini(struct intel_uc_fw *uc_fw) > { > + uc_fw_rsa_data_destroy(uc_fw); > + > if (i915_gem_object_has_pinned_pages(uc_fw->obj)) > i915_gem_object_unpin_pages(uc_fw->obj); > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h > index fd17abf2ab02..d9d1dc0b4cbb 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h > @@ -86,6 +86,7 @@ struct intel_uc_fw { > * or during a GT reset (mutex guarantees single threaded). > */ > struct i915_vma dummy; > + struct i915_vma *rsa_data; > > /* > * The firmware build process will generate a version header file with major and > -- > 2.25.1 > ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Support bigger GuC RSA keys 2021-12-09 0:56 [Intel-gfx] [PATCH 0/3] Support bigger GuC RSA keys Daniele Ceraolo Spurio ` (2 preceding siblings ...) 2021-12-09 0:56 ` [Intel-gfx] [PATCH 3/3] drm/i915/guc: support bigger RSA keys Daniele Ceraolo Spurio @ 2021-12-09 23:27 ` Patchwork 2021-12-09 23:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-12-10 9:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2021-12-09 23:27 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-gfx == Series Details == Series: Support bigger GuC RSA keys URL : https://patchwork.freedesktop.org/series/97760/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Support bigger GuC RSA keys 2021-12-09 0:56 [Intel-gfx] [PATCH 0/3] Support bigger GuC RSA keys Daniele Ceraolo Spurio ` (3 preceding siblings ...) 2021-12-09 23:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Support bigger GuC " Patchwork @ 2021-12-09 23:54 ` Patchwork 2021-12-10 9:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2021-12-09 23:54 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 8288 bytes --] == Series Details == Series: Support bigger GuC RSA keys URL : https://patchwork.freedesktop.org/series/97760/ State : success == Summary == CI Bug Log - changes from CI_DRM_10984 -> Patchwork_21797 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/index.html Participating hosts (44 -> 35) ------------------------------ Additional (2): fi-kbl-soraka fi-tgl-u2 Missing (11): fi-ilk-m540 bat-dg1-6 fi-hsw-4200u fi-icl-u2 fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-ctg-p8600 fi-pnv-d510 bat-jsl-2 fi-bdw-samus Known issues ------------ Here are the changes found in Patchwork_21797 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_hotunplug@unbind-rebind: - fi-tgl-u2: NOTRUN -> [INCOMPLETE][1] ([i915#4006]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) +8 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html * igt@gem_exec_suspend@basic-s3: - fi-bdw-5557u: [PASS][3] -> [INCOMPLETE][4] ([i915#146]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html * igt@gem_flink_basic@bad-flink: - fi-skl-6600u: [PASS][5] -> [FAIL][6] ([i915#4547]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html * igt@gem_huc_copy@huc-copy: - fi-tgl-u2: NOTRUN -> [SKIP][7] ([i915#2190]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-tgl-u2/igt@gem_huc_copy@huc-copy.html - fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#2190]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#4613]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html * igt@gem_lmem_swapping@verify-random: - fi-tgl-u2: NOTRUN -> [SKIP][10] ([i915#4613]) +3 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-tgl-u2/igt@gem_lmem_swapping@verify-random.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][11] ([i915#1886] / [i915#2291]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271] / [fdo#111827]) +8 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_chamelium@dp-hpd-fast: - fi-tgl-u2: NOTRUN -> [SKIP][13] ([fdo#109284] / [fdo#111827]) +8 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-tgl-u2/igt@kms_chamelium@dp-hpd-fast.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-tgl-u2: NOTRUN -> [SKIP][14] ([i915#4103]) +1 similar issue [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-tgl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2: - fi-bsw-n3050: [PASS][15] -> [FAIL][16] ([i915#2122]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-bsw-n3050/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-bsw-n3050/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2.html * igt@kms_force_connector_basic@force-load-detect: - fi-tgl-u2: NOTRUN -> [SKIP][17] ([fdo#109285]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-tgl-u2/igt@kms_force_connector_basic@force-load-detect.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-kbl-soraka: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#533]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html * igt@prime_vgem@basic-userptr: - fi-tgl-u2: NOTRUN -> [SKIP][19] ([i915#3301]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-tgl-u2/igt@prime_vgem@basic-userptr.html * igt@runner@aborted: - fi-skl-6600u: NOTRUN -> [FAIL][20] ([i915#3363] / [i915#4312]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-skl-6600u/igt@runner@aborted.html - fi-tgl-u2: NOTRUN -> [FAIL][21] ([i915#2722] / [i915#4312]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-tgl-u2/igt@runner@aborted.html #### Possible fixes #### * igt@gem_exec_suspend@basic-s0: - fi-glk-dsi: [DMESG-WARN][22] ([i915#2943]) -> [PASS][23] [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-glk-dsi/igt@gem_exec_suspend@basic-s0.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-glk-dsi/igt@gem_exec_suspend@basic-s0.html - fi-tgl-1115g4: [FAIL][24] ([i915#1888]) -> [PASS][25] [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146 [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291 [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411 [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722 [i915#2943]: https://gitlab.freedesktop.org/drm/intel/issues/2943 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363 [i915#4006]: https://gitlab.freedesktop.org/drm/intel/issues/4006 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 Build changes ------------- * Linux: CI_DRM_10984 -> Patchwork_21797 CI-20190529: 20190529 CI_DRM_10984: d7b5243a6417de5fc244d7dc45109f6835aa7c88 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6304: ef0df2fbe5847fe5c4426b8a86a0b101588d0586 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_21797: 70d931e50f9e7a9b71d0466bb4e4e5e5d70feaa5 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 70d931e50f9e drm/i915/guc: support bigger RSA keys ba2a0aaaa249 drm/i915/uc: Prepare for different firmware key sizes 5e0f3cf71177 drm/i915/uc: correctly track uc_fw init failure == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/index.html [-- Attachment #2: Type: text/html, Size: 9787 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Support bigger GuC RSA keys 2021-12-09 0:56 [Intel-gfx] [PATCH 0/3] Support bigger GuC RSA keys Daniele Ceraolo Spurio ` (4 preceding siblings ...) 2021-12-09 23:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2021-12-10 9:08 ` Patchwork 5 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2021-12-10 9:08 UTC (permalink / raw) To: Daniele Ceraolo Spurio; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 30250 bytes --] == Series Details == Series: Support bigger GuC RSA keys URL : https://patchwork.freedesktop.org/series/97760/ State : success == Summary == CI Bug Log - changes from CI_DRM_10984_full -> Patchwork_21797_full ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in Patchwork_21797_full that come from known issues: ### CI changes ### #### Issues hit #### * boot: - shard-glk: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [FAIL][50]) ([i915#4392]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk1/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk5/boot.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk1/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk2/boot.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk2/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk3/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk3/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk3/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk9/boot.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk9/boot.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk4/boot.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk9/boot.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk8/boot.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk8/boot.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk4/boot.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk4/boot.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk1/boot.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk5/boot.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk8/boot.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk7/boot.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk7/boot.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk6/boot.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk6/boot.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk5/boot.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk6/boot.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk9/boot.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk9/boot.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk9/boot.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk8/boot.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk8/boot.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk8/boot.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk7/boot.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk7/boot.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk7/boot.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk6/boot.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk6/boot.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk6/boot.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk5/boot.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk5/boot.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk4/boot.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk4/boot.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk4/boot.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk3/boot.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk3/boot.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk3/boot.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk2/boot.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk2/boot.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk1/boot.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk1/boot.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk1/boot.html ### IGT changes ### #### Issues hit #### * igt@gem_create@create-massive: - shard-apl: NOTRUN -> [DMESG-WARN][51] ([i915#3002]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl2/igt@gem_create@create-massive.html * igt@gem_ctx_persistence@many-contexts: - shard-glk: [PASS][52] -> [DMESG-WARN][53] ([i915#118]) +1 similar issue [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk5/igt@gem_ctx_persistence@many-contexts.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk7/igt@gem_ctx_persistence@many-contexts.html * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][54] -> [TIMEOUT][55] ([i915#3063] / [i915#3648]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-tglb1/igt@gem_eio@unwedge-stress.html [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-tglb8/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-kbl: NOTRUN -> [FAIL][56] ([i915#2842]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl1/igt@gem_exec_fair@basic-none-solo@rcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][57] ([i915#2842]) +4 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-glk: [PASS][58] -> [FAIL][59] ([i915#2842]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk5/igt@gem_exec_fair@basic-throttle@rcs0.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_exec_params@no-vebox: - shard-skl: NOTRUN -> [SKIP][60] ([fdo#109271]) +32 similar issues [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl1/igt@gem_exec_params@no-vebox.html * igt@gem_lmem_swapping@parallel-random-verify: - shard-skl: NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#4613]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl6/igt@gem_lmem_swapping@parallel-random-verify.html - shard-apl: NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#4613]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl3/igt@gem_lmem_swapping@parallel-random-verify.html * igt@gem_lmem_swapping@verify: - shard-kbl: NOTRUN -> [SKIP][63] ([fdo#109271] / [i915#4613]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl7/igt@gem_lmem_swapping@verify.html * igt@gem_pxp@regular-baseline-src-copy-readible: - shard-kbl: NOTRUN -> [SKIP][64] ([fdo#109271]) +116 similar issues [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl2/igt@gem_pxp@regular-baseline-src-copy-readible.html * igt@gem_render_copy@y-tiled-to-vebox-linear: - shard-iclb: NOTRUN -> [SKIP][65] ([i915#768]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@gem_render_copy@y-tiled-to-vebox-linear.html * igt@gem_userptr_blits@input-checking: - shard-kbl: NOTRUN -> [DMESG-WARN][66] ([i915#3002]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl1/igt@gem_userptr_blits@input-checking.html * igt@gem_userptr_blits@vma-merge: - shard-kbl: NOTRUN -> [FAIL][67] ([i915#3318]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl2/igt@gem_userptr_blits@vma-merge.html * igt@gen7_exec_parse@load-register-reg: - shard-iclb: NOTRUN -> [SKIP][68] ([fdo#109289]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@gen7_exec_parse@load-register-reg.html * igt@i915_pm_dc@dc3co-vpb-simulation: - shard-apl: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#658]) +1 similar issue [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl2/igt@i915_pm_dc@dc3co-vpb-simulation.html * igt@i915_pm_dc@dc6-dpms: - shard-iclb: [PASS][70] -> [FAIL][71] ([i915#454]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb7/igt@i915_pm_dc@dc6-dpms.html [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html * igt@i915_pm_rpm@gem-execbuf-stress-pc8: - shard-tglb: NOTRUN -> [SKIP][72] ([fdo#109506] / [i915#2411]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-tglb2/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html * igt@i915_suspend@fence-restore-untiled: - shard-apl: [PASS][73] -> [DMESG-WARN][74] ([i915#180]) +1 similar issue [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-apl7/igt@i915_suspend@fence-restore-untiled.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl3/igt@i915_suspend@fence-restore-untiled.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-kbl: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#3777]) +2 similar issues [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs: - shard-apl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#3886]) +4 similar issues [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl2/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs: - shard-iclb: NOTRUN -> [SKIP][77] ([fdo#109278]) +7 similar issues [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs.html * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs: - shard-kbl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#3886]) +5 similar issues [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl1/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs: - shard-iclb: NOTRUN -> [SKIP][79] ([fdo#109278] / [i915#3886]) +1 similar issue [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc: - shard-skl: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#3886]) +1 similar issue [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl1/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html * igt@kms_cdclk@mode-transition: - shard-apl: NOTRUN -> [SKIP][81] ([fdo#109271]) +94 similar issues [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl2/igt@kms_cdclk@mode-transition.html * igt@kms_chamelium@hdmi-edid-change-during-suspend: - shard-apl: NOTRUN -> [SKIP][82] ([fdo#109271] / [fdo#111827]) +5 similar issues [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl2/igt@kms_chamelium@hdmi-edid-change-during-suspend.html * igt@kms_chamelium@vga-edid-read: - shard-iclb: NOTRUN -> [SKIP][83] ([fdo#109284] / [fdo#111827]) +3 similar issues [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@kms_chamelium@vga-edid-read.html * igt@kms_color@pipe-c-ctm-0-25: - shard-skl: [PASS][84] -> [DMESG-WARN][85] ([i915#1982]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-skl7/igt@kms_color@pipe-c-ctm-0-25.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl9/igt@kms_color@pipe-c-ctm-0-25.html * igt@kms_color_chamelium@pipe-b-ctm-0-25: - shard-skl: NOTRUN -> [SKIP][86] ([fdo#109271] / [fdo#111827]) +2 similar issues [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl6/igt@kms_color_chamelium@pipe-b-ctm-0-25.html * igt@kms_color_chamelium@pipe-c-gamma: - shard-kbl: NOTRUN -> [SKIP][87] ([fdo#109271] / [fdo#111827]) +8 similar issues [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl2/igt@kms_color_chamelium@pipe-c-gamma.html * igt@kms_content_protection@lic: - shard-apl: NOTRUN -> [TIMEOUT][88] ([i915#1319]) [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl3/igt@kms_content_protection@lic.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-apl: NOTRUN -> [DMESG-WARN][89] ([i915#180]) [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen: - shard-iclb: NOTRUN -> [SKIP][90] ([fdo#109278] / [fdo#109279]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-skl: [PASS][91] -> [FAIL][92] ([i915#2346]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-apl: [PASS][93] -> [INCOMPLETE][94] ([i915#180] / [i915#1982]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html - shard-kbl: [PASS][95] -> [INCOMPLETE][96] ([i915#180] / [i915#636]) [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl6/igt@kms_fbcon_fbt@fbc-suspend.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_flip@2x-nonexisting-fb: - shard-iclb: NOTRUN -> [SKIP][97] ([fdo#109274]) +2 similar issues [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@kms_flip@2x-nonexisting-fb.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile: - shard-iclb: [PASS][98] -> [SKIP][99] ([i915#3701]) +2 similar issues [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-msflip-blt: - shard-iclb: NOTRUN -> [SKIP][100] ([fdo#109280]) +5 similar issues [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-msflip-blt.html * igt@kms_hdr@bpc-switch-suspend: - shard-skl: [PASS][101] -> [FAIL][102] ([i915#1188]) [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-skl7/igt@kms_hdr@bpc-switch-suspend.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl7/igt@kms_hdr@bpc-switch-suspend.html * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d: - shard-kbl: NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#533]) [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl1/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html * igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence: - shard-skl: NOTRUN -> [SKIP][104] ([fdo#109271] / [i915#533]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl1/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-kbl: [PASS][105] -> [DMESG-WARN][106] ([i915#180]) +7 similar issues [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: - shard-skl: NOTRUN -> [FAIL][107] ([fdo#108145] / [i915#265]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html - shard-apl: NOTRUN -> [FAIL][108] ([fdo#108145] / [i915#265]) [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb: - shard-kbl: NOTRUN -> [FAIL][109] ([fdo#108145] / [i915#265]) [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl2/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html * igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping: - shard-kbl: NOTRUN -> [SKIP][110] ([fdo#109271] / [i915#2733]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl1/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2: - shard-kbl: NOTRUN -> [SKIP][111] ([fdo#109271] / [i915#658]) +2 similar issues [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html * igt@kms_psr2_su@page_flip-p010: - shard-skl: NOTRUN -> [SKIP][112] ([fdo#109271] / [i915#658]) [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl6/igt@kms_psr2_su@page_flip-p010.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [PASS][113] -> [SKIP][114] ([fdo#109441]) +1 similar issue [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb2/igt@kms_psr@psr2_cursor_render.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb1/igt@kms_psr@psr2_cursor_render.html * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-skl: [PASS][115] -> [INCOMPLETE][116] ([i915#198] / [i915#2828]) [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-skl8/igt@kms_vblank@pipe-c-ts-continuation-suspend.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl7/igt@kms_vblank@pipe-c-ts-continuation-suspend.html * igt@kms_writeback@writeback-invalid-parameters: - shard-kbl: NOTRUN -> [SKIP][117] ([fdo#109271] / [i915#2437]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl1/igt@kms_writeback@writeback-invalid-parameters.html * igt@nouveau_crc@pipe-c-ctx-flip-detection: - shard-iclb: NOTRUN -> [SKIP][118] ([i915#2530]) [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@nouveau_crc@pipe-c-ctx-flip-detection.html * igt@prime_vgem@fence-write-hang: - shard-iclb: NOTRUN -> [SKIP][119] ([fdo#109295]) [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb2/igt@prime_vgem@fence-write-hang.html * igt@sysfs_clients@create: - shard-kbl: NOTRUN -> [SKIP][120] ([fdo#109271] / [i915#2994]) +1 similar issue [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl7/igt@sysfs_clients@create.html #### Possible fixes #### * igt@drm_read@short-buffer-nonblock: - {shard-rkl}: ([SKIP][121], [SKIP][122]) ([i915#4098]) -> [PASS][123] [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-2/igt@drm_read@short-buffer-nonblock.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-4/igt@drm_read@short-buffer-nonblock.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@drm_read@short-buffer-nonblock.html * igt@feature_discovery@psr1: - {shard-rkl}: [SKIP][124] ([i915#658]) -> [PASS][125] [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-1/igt@feature_discovery@psr1.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@feature_discovery@psr1.html * igt@gem_eio@in-flight-contexts-10ms: - shard-tglb: [TIMEOUT][126] ([i915#3063]) -> [PASS][127] [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-tglb2/igt@gem_eio@in-flight-contexts-10ms.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-tglb1/igt@gem_eio@in-flight-contexts-10ms.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [FAIL][128] ([i915#2842]) -> [PASS][129] +2 similar issues [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb6/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-kbl: [FAIL][130] ([i915#2842]) -> [PASS][131] [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl2/igt@gem_exec_fair@basic-none@vcs1.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl4/igt@gem_exec_fair@basic-none@vcs1.html * igt@gem_exec_fair@basic-none@vecs0: - shard-apl: [FAIL][132] ([i915#2842]) -> [PASS][133] [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-apl1/igt@gem_exec_fair@basic-none@vecs0.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-apl6/igt@gem_exec_fair@basic-none@vecs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [FAIL][134] ([i915#2842]) -> [PASS][135] [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-tglb8/igt@gem_exec_fair@basic-pace-share@rcs0.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-kbl: [SKIP][136] ([fdo#109271]) -> [PASS][137] [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl4/igt@gem_exec_fair@basic-pace@vecs0.html [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl2/igt@gem_exec_fair@basic-pace@vecs0.html * igt@gem_exec_reloc@basic-scanout@vecs0: - {shard-rkl}: [SKIP][138] ([i915#3639]) -> [PASS][139] +3 similar issues [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-2/igt@gem_exec_reloc@basic-scanout@vecs0.html [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@gem_exec_reloc@basic-scanout@vecs0.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [DMESG-WARN][140] ([i915#180]) -> [PASS][141] +2 similar issues [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl1/igt@gem_workarounds@suspend-resume-fd.html [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-kbl2/igt@gem_workarounds@suspend-resume-fd.html * igt@i915_pm_backlight@basic-brightness: - {shard-rkl}: [SKIP][142] ([i915#3012]) -> [PASS][143] [142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-1/igt@i915_pm_backlight@basic-brightness.html [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@i915_pm_backlight@basic-brightness.html * igt@i915_pm_rpm@basic-pci-d3-state: - {shard-rkl}: ([SKIP][144], [SKIP][145]) ([fdo#109308]) -> [PASS][146] [144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-4/igt@i915_pm_rpm@basic-pci-d3-state.html [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-1/igt@i915_pm_rpm@basic-pci-d3-state.html [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@i915_pm_rpm@basic-pci-d3-state.html * igt@i915_pm_rpm@gem-execbuf: - {shard-rkl}: [SKIP][147] ([fdo#109308]) -> [PASS][148] [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-2/igt@i915_pm_rpm@gem-execbuf.html [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@i915_pm_rpm@gem-execbuf.html * igt@i915_pm_rpm@system-suspend-execbuf: - shard-skl: [INCOMPLETE][149] ([i915#151]) -> [PASS][150] [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-skl4/igt@i915_pm_rpm@system-suspend-execbuf.html [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl6/igt@i915_pm_rpm@system-suspend-execbuf.html * igt@kms_big_fb@linear-64bpp-rotate-0: - {shard-rkl}: ([SKIP][151], [SKIP][152]) ([i915#1845]) -> [PASS][153] [151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-4/igt@kms_big_fb@linear-64bpp-rotate-0.html [152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-2/igt@kms_big_fb@linear-64bpp-rotate-0.html [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-0.html * igt@kms_big_fb@x-tiled-8bpp-rotate-0: - {shard-rkl}: [SKIP][154] ([i915#1845]) -> [PASS][155] +16 similar issues [154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-2/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html * igt@kms_color@pipe-c-invalid-degamma-lut-sizes: - {shard-rkl}: [SKIP][156] ([i915#4070]) -> [PASS][157] [156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-1/igt@kms_color@pipe-c-invalid-degamma-lut-sizes.html [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-4/igt@kms_color@pipe-c-invalid-degamma-lut-sizes.html * igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen: - {shard-rkl}: [SKIP][158] ([fdo#112022] / [i915#4070]) -> [PASS][159] +2 similar issues [158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-1/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html * igt@kms_cursor_crc@pipe-a-cursor-dpms: - {shard-rkl}: ([SKIP][160], [SKIP][161]) ([fdo#112022] / [i915#4070]) -> [PASS][162] [160]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-2/igt@kms_cursor_crc@pipe-a-cursor-dpms.html [161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-4/igt@kms_cursor_crc@pipe-a-cursor-dpms.html [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-dpms.html * igt@kms_cursor_edge_walk@pipe-a-128x128-top-edge: - {shard-rkl}: [SKIP][163] ([i915#1849] / [i915#4070]) -> [PASS][164] +3 similar issues [163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-2/igt@kms_cursor_edge_walk@pipe-a-128x128-top-edge.html [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@kms_cursor_edge_walk@pipe-a-128x128-top-edge.html * igt@kms_cursor_legacy@cursora-vs-flipa-legacy: - {shard-rkl}: [SKIP][165] ([fdo#111825] / [i915#4070]) -> [PASS][166] +1 similar issue [165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-rkl-1/igt@kms_cursor_legacy@cursora-vs-flipa-legacy.html [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-rkl-6/igt@kms_cursor_legacy@cursora-vs-flipa-legacy.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-iclb: [FAIL][167] ([i915#2346]) -> [PASS][168] [167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-iclb3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [FAIL][169] ([i915#2346] / [i915#533]) -> [PASS][170] [169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/shard-skl9/igt@kms_ == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21797/index.html [-- Attachment #2: Type: text/html, Size: 33386 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2021-12-10 9:08 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-12-09 0:56 [Intel-gfx] [PATCH 0/3] Support bigger GuC RSA keys Daniele Ceraolo Spurio 2021-12-09 0:56 ` [Intel-gfx] [PATCH 1/3] drm/i915/uc: correctly track uc_fw init failure Daniele Ceraolo Spurio 2021-12-09 19:04 ` Matthew Brost 2021-12-09 0:56 ` [Intel-gfx] [PATCH 2/3] drm/i915/uc: Prepare for different firmware key sizes Daniele Ceraolo Spurio 2021-12-09 18:57 ` Matthew Brost 2021-12-09 0:56 ` [Intel-gfx] [PATCH 3/3] drm/i915/guc: support bigger RSA keys Daniele Ceraolo Spurio 2021-12-09 19:47 ` Matthew Brost 2021-12-09 23:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Support bigger GuC " Patchwork 2021-12-09 23:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-12-10 9:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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