From: "irqchip-bot for Marc Zyngier" <tip-bot2@linutronix.de>
To: linux-kernel@vger.kernel.org
Cc: Alexandru Elisei <alexandru.elisei@arm.com>,
Marc Zyngier <maz@kernel.org>,
tglx@linutronix.de
Subject: [irqchip: irq/irqchip-next] KVM: arm64: Add minimal handling for the ARMv8.7 PMU
Date: Mon, 20 Dec 2021 14:00:49 -0000 [thread overview]
Message-ID: <164000884963.23020.18240369465894812989.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20211126115533.217903-1-maz@kernel.org>
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 00e228b31596c6bf5f08b5ef76f80cb26e620f02
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/00e228b31596c6bf5f08b5ef76f80cb26e620f02
Author: Marc Zyngier <maz@kernel.org>
AuthorDate: Fri, 26 Nov 2021 11:36:43
Committer: Marc Zyngier <maz@kernel.org>
CommitterDate: Wed, 01 Dec 2021 13:11:22
KVM: arm64: Add minimal handling for the ARMv8.7 PMU
When running a KVM guest hosted on an ARMv8.7 machine, the host
kernel complains that it doesn't know about the architected number
of events.
Fix it by adding the PMUver code corresponding to PMUv3 for ARMv8.7.
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Tested-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211126115533.217903-1-maz@kernel.org
---
arch/arm64/include/asm/sysreg.h | 1 +
arch/arm64/kvm/pmu-emul.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 16b3f1a..615dd62 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -937,6 +937,7 @@
#define ID_AA64DFR0_PMUVER_8_1 0x4
#define ID_AA64DFR0_PMUVER_8_4 0x5
#define ID_AA64DFR0_PMUVER_8_5 0x6
+#define ID_AA64DFR0_PMUVER_8_7 0x7
#define ID_AA64DFR0_PMUVER_IMP_DEF 0xf
#define ID_AA64DFR0_PMSVER_8_2 0x1
diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
index a5e4bbf..ca92cc5 100644
--- a/arch/arm64/kvm/pmu-emul.c
+++ b/arch/arm64/kvm/pmu-emul.c
@@ -28,6 +28,7 @@ static u32 kvm_pmu_event_mask(struct kvm *kvm)
case ID_AA64DFR0_PMUVER_8_1:
case ID_AA64DFR0_PMUVER_8_4:
case ID_AA64DFR0_PMUVER_8_5:
+ case ID_AA64DFR0_PMUVER_8_7:
return GENMASK(15, 0);
default: /* Shouldn't be here, just for sanity */
WARN_ONCE(1, "Unknown PMU version %d\n", kvm->arch.pmuver);
next prev parent reply other threads:[~2021-12-20 14:01 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 11:55 [PATCH] KVM: arm64: Add minimal handling for the ARMv8.7 PMU Marc Zyngier
2021-11-26 11:55 ` Marc Zyngier
2021-11-26 11:55 ` Marc Zyngier
2021-11-29 16:59 ` Alexandru Elisei
2021-11-29 16:59 ` Alexandru Elisei
2021-11-29 16:59 ` Alexandru Elisei
2021-12-20 14:00 ` irqchip-bot for Marc Zyngier [this message]
2021-12-20 14:04 ` [irqchip: irq/irqchip-next] " Marc Zyngier
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