* [PATCH 1/2] dt-bindings: spmi: spmi can have at least up to 5 registers
@ 2021-12-24 16:33 David Heidelberg
2021-12-24 16:33 ` [PATCH 2/2] dt-bindings: spmi: convert QCOM PMIC SPMI bindings to yaml David Heidelberg
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: David Heidelberg @ 2021-12-24 16:33 UTC (permalink / raw)
To: Stephen Boyd, Rob Herring
Cc: ~okias/devicetree, David Heidelberg, linux-kernel, devicetree
Since Qualcomm SPMI Controller (PMIC Arbiter) can have 5,
bump reg up to maxItems 5.
Fixes warning as:
arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: spmi@c440000: reg: [[0, 205783040, 0, 4352], [0, 207618048, 0, 33554432], [0, 241172480, 0, 1048576], [0, 242221056, 0, 655360], [0, 205561856, 0, 155648]] is too long
From schema: Documentation/devicetree/bindings/spmi/spmi.yaml
Signed-off-by: David Heidelberg <david@ixit.cz>
---
Documentation/devicetree/bindings/spmi/spmi.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml
index 1d243faef2f8..d7d9345d7c60 100644
--- a/Documentation/devicetree/bindings/spmi/spmi.yaml
+++ b/Documentation/devicetree/bindings/spmi/spmi.yaml
@@ -25,7 +25,8 @@ properties:
pattern: "^spmi@.*"
reg:
- maxItems: 1
+ minItems: 1
+ maxItems: 5
"#address-cells":
const: 2
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] dt-bindings: spmi: convert QCOM PMIC SPMI bindings to yaml
2021-12-24 16:33 [PATCH 1/2] dt-bindings: spmi: spmi can have at least up to 5 registers David Heidelberg
@ 2021-12-24 16:33 ` David Heidelberg
2021-12-25 14:48 ` Rob Herring
2021-12-25 14:48 ` [PATCH 1/2] dt-bindings: spmi: spmi can have at least up to 5 registers Rob Herring
2022-01-04 20:57 ` Rob Herring
2 siblings, 1 reply; 5+ messages in thread
From: David Heidelberg @ 2021-12-24 16:33 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Stephen Boyd, Rob Herring
Cc: ~okias/devicetree, David Heidelberg, linux-arm-msm, linux-kernel,
devicetree
Convert Qualcomm PMIC SPMI binding to yaml format.
Signed-off-by: David Heidelberg <david@ixit.cz>
---
Patches for fixing dt-schema warnings for SDX55 and MSM8998 qcom,spmi
already sent to ML.
Signed-off-by: David Heidelberg <david@ixit.cz>
---
.../bindings/spmi/qcom,spmi-pmic-arb.txt | 65 ----------
.../bindings/spmi/qcom,spmi-pmic-arb.yaml | 118 ++++++++++++++++++
2 files changed, 118 insertions(+), 65 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
create mode 100644 Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
deleted file mode 100644
index ca645e21fe47..000000000000
--- a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
+++ /dev/null
@@ -1,65 +0,0 @@
-Qualcomm SPMI Controller (PMIC Arbiter)
-
-The SPMI PMIC Arbiter is found on Snapdragon chipsets. It is an SPMI
-controller with wrapping arbitration logic to allow for multiple on-chip
-devices to control a single SPMI master.
-
-The PMIC Arbiter can also act as an interrupt controller, providing interrupts
-to slave devices.
-
-See Documentation/devicetree/bindings/spmi/spmi.yaml for the generic SPMI
-controller binding requirements for child nodes.
-
-See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
-generic interrupt controller binding documentation.
-
-Required properties:
-- compatible : should be "qcom,spmi-pmic-arb".
-- reg-names : must contain:
- "core" - core registers
- "intr" - interrupt controller registers
- "cnfg" - configuration registers
- Registers used only for V2 PMIC Arbiter:
- "chnls" - tx-channel per virtual slave registers.
- "obsrvr" - rx-channel (called observer) per virtual slave registers.
-
-- reg : address + size pairs describing the PMIC arb register sets; order must
- correspond with the order of entries in reg-names
-- #address-cells : must be set to 2
-- #size-cells : must be set to 0
-- qcom,ee : indicates the active Execution Environment identifier (0-5)
-- qcom,channel : which of the PMIC Arb provided channels to use for accesses (0-5)
-- interrupts : interrupt list for the PMIC Arb controller, must contain a
- single interrupt entry for the peripheral interrupt
-- interrupt-names : corresponding interrupt names for the interrupts
- listed in the 'interrupts' property, must contain:
- "periph_irq" - summary interrupt for PMIC peripherals
-- interrupt-controller : boolean indicator that the PMIC arbiter is an interrupt controller
-- #interrupt-cells : must be set to 4. Interrupts are specified as a 4-tuple:
- cell 1: slave ID for the requested interrupt (0-15)
- cell 2: peripheral ID for requested interrupt (0-255)
- cell 3: the requested peripheral interrupt (0-7)
- cell 4: interrupt flags indicating level-sense information, as defined in
- dt-bindings/interrupt-controller/irq.h
-
-Example:
-
- spmi {
- compatible = "qcom,spmi-pmic-arb";
- reg-names = "core", "intr", "cnfg";
- reg = <0xfc4cf000 0x1000>,
- <0xfc4cb000 0x1000>,
- <0xfc4ca000 0x1000>;
-
- interrupt-names = "periph_irq";
- interrupts = <0 190 0>;
-
- qcom,ee = <0>;
- qcom,channel = <0>;
-
- #address-cells = <2>;
- #size-cells = <0>;
-
- interrupt-controller;
- #interrupt-cells = <4>;
- };
diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
new file mode 100644
index 000000000000..54d1220cf692
--- /dev/null
+++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
@@ -0,0 +1,118 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SPMI Controller (PMIC Arbiter)
+
+maintainers:
+ - Stephen Boyd <sboyd@kernel.org>
+
+description: |
+ The SPMI PMIC Arbiter is found on Snapdragon chipsets. It is an SPMI
+ controller with wrapping arbitration logic to allow for multiple on-chip
+ devices to control a single SPMI master.
+
+ The PMIC Arbiter can also act as an interrupt controller, providing interrupts
+ to slave devices.
+
+allOf:
+ - $ref: spmi.yaml
+
+properties:
+ compatible:
+ const: qcom,spmi-pmic-arb
+
+ reg:
+ oneOf:
+ - items: # V1
+ - description: core registers
+ - description: interrupt controller registers
+ - description: configuration registers
+ - items: # V2
+ - description: core registers
+ - description: tx-channel per virtual slave regosters
+ - description: rx-channel (called observer) per virtual slave registers
+ - description: interrupt controller registers
+ - description: configuration registers
+
+ reg-names:
+ oneOf:
+ - items:
+ - const: core
+ - const: intr
+ - const: cnfg
+ - items:
+ - const: core
+ - const: chnls
+ - const: obsrvr
+ - const: intr
+ - const: cnfg
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ const: periph_irq
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 4
+ description: |
+ cell 1: slave ID for the requested interrupt (0-15)
+ cell 2: peripheral ID for requested interrupt (0-255)
+ cell 3: the requested peripheral interrupt (0-7)
+ cell 4: interrupt flags indicating level-sense information,
+ as defined in dt-bindings/interrupt-controller/irq.h
+
+
+ qcom,ee:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 5
+ description: >
+ indicates the active Execution Environment identifier
+
+ qcom,channel:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 5
+ description: >
+ which of the PMIC Arb provided channels to use for accesses
+
+required:
+ - compatible
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - '#interrupt-cells'
+ - qcom,ee
+ - qcom,channel
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/spmi/spmi.h>
+ spmi {
+ compatible = "qcom,spmi-pmic-arb";
+ reg-names = "core", "intr", "cnfg";
+ reg = <0xfc4cf000 0x1000>,
+ <0xfc4cb000 0x1000>,
+ <0xfc4ca000 0x1000>;
+
+ interrupt-names = "periph_irq";
+ interrupts = <0 190 0>;
+
+ qcom,ee = <0>;
+ qcom,channel = <0>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ };
+
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] dt-bindings: spmi: convert QCOM PMIC SPMI bindings to yaml
2021-12-24 16:33 ` [PATCH 2/2] dt-bindings: spmi: convert QCOM PMIC SPMI bindings to yaml David Heidelberg
@ 2021-12-25 14:48 ` Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2021-12-25 14:48 UTC (permalink / raw)
To: David Heidelberg
Cc: linux-kernel, devicetree, Andy Gross, Stephen Boyd,
linux-arm-msm, Rob Herring, Bjorn Andersson, ~okias/devicetree
On Fri, 24 Dec 2021 17:33:44 +0100, David Heidelberg wrote:
> Convert Qualcomm PMIC SPMI binding to yaml format.
>
> Signed-off-by: David Heidelberg <david@ixit.cz>
>
> ---
> Patches for fixing dt-schema warnings for SDX55 and MSM8998 qcom,spmi
> already sent to ML.
>
> Signed-off-by: David Heidelberg <david@ixit.cz>
> ---
> .../bindings/spmi/qcom,spmi-pmic-arb.txt | 65 ----------
> .../bindings/spmi/qcom,spmi-pmic-arb.yaml | 118 ++++++++++++++++++
> 2 files changed, 118 insertions(+), 65 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
> create mode 100644 Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.example.dts:20.14-38.11: Warning (unit_address_vs_reg): /example-0/spmi: node has a reg or ranges property, but no unit name
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.example.dt.yaml: spmi: $nodename:0: 'spmi' does not match '^spmi@.*'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.example.dt.yaml: spmi: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
doc reference errors (make refcheckdocs):
Warning: Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt references a file that doesn't exist: Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt: Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
See https://patchwork.ozlabs.org/patch/1573075
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] dt-bindings: spmi: spmi can have at least up to 5 registers
2021-12-24 16:33 [PATCH 1/2] dt-bindings: spmi: spmi can have at least up to 5 registers David Heidelberg
2021-12-24 16:33 ` [PATCH 2/2] dt-bindings: spmi: convert QCOM PMIC SPMI bindings to yaml David Heidelberg
@ 2021-12-25 14:48 ` Rob Herring
2022-01-04 20:57 ` Rob Herring
2 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2021-12-25 14:48 UTC (permalink / raw)
To: David Heidelberg
Cc: linux-kernel, ~okias/devicetree, devicetree, Rob Herring, Stephen Boyd
On Fri, 24 Dec 2021 17:33:43 +0100, David Heidelberg wrote:
> Since Qualcomm SPMI Controller (PMIC Arbiter) can have 5,
> bump reg up to maxItems 5.
>
> Fixes warning as:
> arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: spmi@c440000: reg: [[0, 205783040, 0, 4352], [0, 207618048, 0, 33554432], [0, 241172480, 0, 1048576], [0, 242221056, 0, 655360], [0, 205561856, 0, 155648]] is too long
> From schema: Documentation/devicetree/bindings/spmi/spmi.yaml
>
> Signed-off-by: David Heidelberg <david@ixit.cz>
> ---
> Documentation/devicetree/bindings/spmi/spmi.yaml | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/1573074
spmi@c440000: #address-cells:0:0: 2 was expected
arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7280-herobrine.dt.yaml
arch/arm64/boot/dts/qcom/sc7280-idp2.dt.yaml
arch/arm64/boot/dts/qcom/sc7280-idp.dt.yaml
spmi@c440000: #size-cells:0:0: 0 was expected
arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r3-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r2.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar-r3.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r3-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dt.yaml
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dt.yaml
arch/arm64/boot/dts/qcom/sc7280-herobrine.dt.yaml
arch/arm64/boot/dts/qcom/sc7280-idp2.dt.yaml
arch/arm64/boot/dts/qcom/sc7280-idp.dt.yaml
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] dt-bindings: spmi: spmi can have at least up to 5 registers
2021-12-24 16:33 [PATCH 1/2] dt-bindings: spmi: spmi can have at least up to 5 registers David Heidelberg
2021-12-24 16:33 ` [PATCH 2/2] dt-bindings: spmi: convert QCOM PMIC SPMI bindings to yaml David Heidelberg
2021-12-25 14:48 ` [PATCH 1/2] dt-bindings: spmi: spmi can have at least up to 5 registers Rob Herring
@ 2022-01-04 20:57 ` Rob Herring
2 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2022-01-04 20:57 UTC (permalink / raw)
To: David Heidelberg
Cc: Stephen Boyd, ~okias/devicetree, linux-kernel, devicetree
On Fri, Dec 24, 2021 at 05:33:43PM +0100, David Heidelberg wrote:
> Since Qualcomm SPMI Controller (PMIC Arbiter) can have 5,
> bump reg up to maxItems 5.
Already has a fix in linux-next.
>
> Fixes warning as:
> arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: spmi@c440000: reg: [[0, 205783040, 0, 4352], [0, 207618048, 0, 33554432], [0, 241172480, 0, 1048576], [0, 242221056, 0, 655360], [0, 205561856, 0, 155648]] is too long
> From schema: Documentation/devicetree/bindings/spmi/spmi.yaml
>
> Signed-off-by: David Heidelberg <david@ixit.cz>
> ---
> Documentation/devicetree/bindings/spmi/spmi.yaml | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml
> index 1d243faef2f8..d7d9345d7c60 100644
> --- a/Documentation/devicetree/bindings/spmi/spmi.yaml
> +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml
> @@ -25,7 +25,8 @@ properties:
> pattern: "^spmi@.*"
>
> reg:
> - maxItems: 1
> + minItems: 1
> + maxItems: 5
>
> "#address-cells":
> const: 2
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-01-04 20:57 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2021-12-25 14:48 ` Rob Herring
2021-12-25 14:48 ` [PATCH 1/2] dt-bindings: spmi: spmi can have at least up to 5 registers Rob Herring
2022-01-04 20:57 ` Rob Herring
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